1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * TI VPFE capture Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 - 2014 Texas Instruments, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Benoit Parrot <bparrot@ti.com>
8*4882a593Smuzhiyun * Lad, Prabhakar <prabhakar.csengg@gmail.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/of_graph.h>
18*4882a593Smuzhiyun #include <linux/pinctrl/consumer.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/pm_runtime.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun #include <linux/uaccess.h>
23*4882a593Smuzhiyun #include <linux/videodev2.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <media/v4l2-common.h>
26*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
27*4882a593Smuzhiyun #include <media/v4l2-event.h>
28*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
29*4882a593Smuzhiyun #include <media/v4l2-rect.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include "am437x-vpfe.h"
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun #define VPFE_MODULE_NAME "vpfe"
34*4882a593Smuzhiyun #define VPFE_VERSION "0.1.0"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static int debug;
37*4882a593Smuzhiyun module_param(debug, int, 0644);
38*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Debug level 0-8");
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define vpfe_dbg(level, dev, fmt, arg...) \
41*4882a593Smuzhiyun v4l2_dbg(level, debug, &dev->v4l2_dev, fmt, ##arg)
42*4882a593Smuzhiyun #define vpfe_info(dev, fmt, arg...) \
43*4882a593Smuzhiyun v4l2_info(&dev->v4l2_dev, fmt, ##arg)
44*4882a593Smuzhiyun #define vpfe_err(dev, fmt, arg...) \
45*4882a593Smuzhiyun v4l2_err(&dev->v4l2_dev, fmt, ##arg)
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* standard information */
48*4882a593Smuzhiyun struct vpfe_standard {
49*4882a593Smuzhiyun v4l2_std_id std_id;
50*4882a593Smuzhiyun unsigned int width;
51*4882a593Smuzhiyun unsigned int height;
52*4882a593Smuzhiyun struct v4l2_fract pixelaspect;
53*4882a593Smuzhiyun int frame_format;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun static const struct vpfe_standard vpfe_standards[] = {
57*4882a593Smuzhiyun {V4L2_STD_525_60, 720, 480, {11, 10}, 1},
58*4882a593Smuzhiyun {V4L2_STD_625_50, 720, 576, {54, 59}, 1},
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static struct vpfe_fmt formats[VPFE_NUM_FORMATS] = {
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_YUYV,
64*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_YUYV8_2X8,
65*4882a593Smuzhiyun .bitsperpixel = 16,
66*4882a593Smuzhiyun }, {
67*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_UYVY,
68*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_UYVY8_2X8,
69*4882a593Smuzhiyun .bitsperpixel = 16,
70*4882a593Smuzhiyun }, {
71*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_YVYU,
72*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_YVYU8_2X8,
73*4882a593Smuzhiyun .bitsperpixel = 16,
74*4882a593Smuzhiyun }, {
75*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_VYUY,
76*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_VYUY8_2X8,
77*4882a593Smuzhiyun .bitsperpixel = 16,
78*4882a593Smuzhiyun }, {
79*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_SBGGR8,
80*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_SBGGR8_1X8,
81*4882a593Smuzhiyun .bitsperpixel = 8,
82*4882a593Smuzhiyun }, {
83*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_SGBRG8,
84*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_SGBRG8_1X8,
85*4882a593Smuzhiyun .bitsperpixel = 8,
86*4882a593Smuzhiyun }, {
87*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_SGRBG8,
88*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_SGRBG8_1X8,
89*4882a593Smuzhiyun .bitsperpixel = 8,
90*4882a593Smuzhiyun }, {
91*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_SRGGB8,
92*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_SRGGB8_1X8,
93*4882a593Smuzhiyun .bitsperpixel = 8,
94*4882a593Smuzhiyun }, {
95*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_RGB565,
96*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
97*4882a593Smuzhiyun .bitsperpixel = 16,
98*4882a593Smuzhiyun }, {
99*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_RGB565X,
100*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
101*4882a593Smuzhiyun .bitsperpixel = 16,
102*4882a593Smuzhiyun },
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static int __subdev_get_format(struct vpfe_device *vpfe,
106*4882a593Smuzhiyun struct v4l2_mbus_framefmt *fmt);
107*4882a593Smuzhiyun static int vpfe_calc_format_size(struct vpfe_device *vpfe,
108*4882a593Smuzhiyun const struct vpfe_fmt *fmt,
109*4882a593Smuzhiyun struct v4l2_format *f);
110*4882a593Smuzhiyun
find_format_by_code(struct vpfe_device * vpfe,unsigned int code)111*4882a593Smuzhiyun static struct vpfe_fmt *find_format_by_code(struct vpfe_device *vpfe,
112*4882a593Smuzhiyun unsigned int code)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct vpfe_fmt *fmt;
115*4882a593Smuzhiyun unsigned int k;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun for (k = 0; k < vpfe->num_active_fmt; k++) {
118*4882a593Smuzhiyun fmt = vpfe->active_fmt[k];
119*4882a593Smuzhiyun if (fmt->code == code)
120*4882a593Smuzhiyun return fmt;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return NULL;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
find_format_by_pix(struct vpfe_device * vpfe,unsigned int pixelformat)126*4882a593Smuzhiyun static struct vpfe_fmt *find_format_by_pix(struct vpfe_device *vpfe,
127*4882a593Smuzhiyun unsigned int pixelformat)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun struct vpfe_fmt *fmt;
130*4882a593Smuzhiyun unsigned int k;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun for (k = 0; k < vpfe->num_active_fmt; k++) {
133*4882a593Smuzhiyun fmt = vpfe->active_fmt[k];
134*4882a593Smuzhiyun if (fmt->fourcc == pixelformat)
135*4882a593Smuzhiyun return fmt;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun return NULL;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
__get_bytesperpixel(struct vpfe_device * vpfe,const struct vpfe_fmt * fmt)141*4882a593Smuzhiyun static unsigned int __get_bytesperpixel(struct vpfe_device *vpfe,
142*4882a593Smuzhiyun const struct vpfe_fmt *fmt)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo = vpfe->current_subdev;
145*4882a593Smuzhiyun unsigned int bus_width = sdinfo->vpfe_param.bus_width;
146*4882a593Smuzhiyun u32 bpp, bus_width_bytes, clocksperpixel;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun bus_width_bytes = ALIGN(bus_width, 8) >> 3;
149*4882a593Smuzhiyun clocksperpixel = DIV_ROUND_UP(fmt->bitsperpixel, bus_width);
150*4882a593Smuzhiyun bpp = clocksperpixel * bus_width_bytes;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return bpp;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* Print Four-character-code (FOURCC) */
print_fourcc(u32 fmt)156*4882a593Smuzhiyun static char *print_fourcc(u32 fmt)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun static char code[5];
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun code[0] = (unsigned char)(fmt & 0xff);
161*4882a593Smuzhiyun code[1] = (unsigned char)((fmt >> 8) & 0xff);
162*4882a593Smuzhiyun code[2] = (unsigned char)((fmt >> 16) & 0xff);
163*4882a593Smuzhiyun code[3] = (unsigned char)((fmt >> 24) & 0xff);
164*4882a593Smuzhiyun code[4] = '\0';
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun return code;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
vpfe_reg_read(struct vpfe_ccdc * ccdc,u32 offset)169*4882a593Smuzhiyun static inline u32 vpfe_reg_read(struct vpfe_ccdc *ccdc, u32 offset)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun return ioread32(ccdc->ccdc_cfg.base_addr + offset);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
vpfe_reg_write(struct vpfe_ccdc * ccdc,u32 val,u32 offset)174*4882a593Smuzhiyun static inline void vpfe_reg_write(struct vpfe_ccdc *ccdc, u32 val, u32 offset)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun iowrite32(val, ccdc->ccdc_cfg.base_addr + offset);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
to_vpfe(struct vpfe_ccdc * ccdc)179*4882a593Smuzhiyun static inline struct vpfe_device *to_vpfe(struct vpfe_ccdc *ccdc)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun return container_of(ccdc, struct vpfe_device, ccdc);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static inline
to_vpfe_buffer(struct vb2_v4l2_buffer * vb)185*4882a593Smuzhiyun struct vpfe_cap_buffer *to_vpfe_buffer(struct vb2_v4l2_buffer *vb)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun return container_of(vb, struct vpfe_cap_buffer, vb);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
vpfe_pcr_enable(struct vpfe_ccdc * ccdc,int flag)190*4882a593Smuzhiyun static inline void vpfe_pcr_enable(struct vpfe_ccdc *ccdc, int flag)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun vpfe_reg_write(ccdc, !!flag, VPFE_PCR);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
vpfe_config_enable(struct vpfe_ccdc * ccdc,int flag)195*4882a593Smuzhiyun static void vpfe_config_enable(struct vpfe_ccdc *ccdc, int flag)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun unsigned int cfg;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if (!flag) {
200*4882a593Smuzhiyun cfg = vpfe_reg_read(ccdc, VPFE_CONFIG);
201*4882a593Smuzhiyun cfg &= ~(VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT);
202*4882a593Smuzhiyun } else {
203*4882a593Smuzhiyun cfg = VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun vpfe_reg_write(ccdc, cfg, VPFE_CONFIG);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
vpfe_ccdc_setwin(struct vpfe_ccdc * ccdc,struct v4l2_rect * image_win,enum ccdc_frmfmt frm_fmt,int bpp)209*4882a593Smuzhiyun static void vpfe_ccdc_setwin(struct vpfe_ccdc *ccdc,
210*4882a593Smuzhiyun struct v4l2_rect *image_win,
211*4882a593Smuzhiyun enum ccdc_frmfmt frm_fmt,
212*4882a593Smuzhiyun int bpp)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun int horz_start, horz_nr_pixels;
215*4882a593Smuzhiyun int vert_start, vert_nr_lines;
216*4882a593Smuzhiyun int val, mid_img;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /*
219*4882a593Smuzhiyun * ppc - per pixel count. indicates how many pixels per cell
220*4882a593Smuzhiyun * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
221*4882a593Smuzhiyun * raw capture this is 1
222*4882a593Smuzhiyun */
223*4882a593Smuzhiyun horz_start = image_win->left * bpp;
224*4882a593Smuzhiyun horz_nr_pixels = (image_win->width * bpp) - 1;
225*4882a593Smuzhiyun vpfe_reg_write(ccdc, (horz_start << VPFE_HORZ_INFO_SPH_SHIFT) |
226*4882a593Smuzhiyun horz_nr_pixels, VPFE_HORZ_INFO);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun vert_start = image_win->top;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
231*4882a593Smuzhiyun vert_nr_lines = (image_win->height >> 1) - 1;
232*4882a593Smuzhiyun vert_start >>= 1;
233*4882a593Smuzhiyun /* configure VDINT0 */
234*4882a593Smuzhiyun val = (vert_start << VPFE_VDINT_VDINT0_SHIFT);
235*4882a593Smuzhiyun } else {
236*4882a593Smuzhiyun vert_nr_lines = image_win->height - 1;
237*4882a593Smuzhiyun /*
238*4882a593Smuzhiyun * configure VDINT0 and VDINT1. VDINT1 will be at half
239*4882a593Smuzhiyun * of image height
240*4882a593Smuzhiyun */
241*4882a593Smuzhiyun mid_img = vert_start + (image_win->height / 2);
242*4882a593Smuzhiyun val = (vert_start << VPFE_VDINT_VDINT0_SHIFT) |
243*4882a593Smuzhiyun (mid_img & VPFE_VDINT_VDINT1_MASK);
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun vpfe_reg_write(ccdc, val, VPFE_VDINT);
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun vpfe_reg_write(ccdc, (vert_start << VPFE_VERT_START_SLV0_SHIFT) |
249*4882a593Smuzhiyun vert_start, VPFE_VERT_START);
250*4882a593Smuzhiyun vpfe_reg_write(ccdc, vert_nr_lines, VPFE_VERT_LINES);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
vpfe_reg_dump(struct vpfe_ccdc * ccdc)253*4882a593Smuzhiyun static void vpfe_reg_dump(struct vpfe_ccdc *ccdc)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun struct vpfe_device *vpfe = to_vpfe(ccdc);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "ALAW: 0x%x\n", vpfe_reg_read(ccdc, VPFE_ALAW));
258*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "CLAMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_CLAMP));
259*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "DCSUB: 0x%x\n", vpfe_reg_read(ccdc, VPFE_DCSUB));
260*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "BLKCMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_BLKCMP));
261*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "COLPTN: 0x%x\n", vpfe_reg_read(ccdc, VPFE_COLPTN));
262*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "SDOFST: 0x%x\n", vpfe_reg_read(ccdc, VPFE_SDOFST));
263*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "SYN_MODE: 0x%x\n",
264*4882a593Smuzhiyun vpfe_reg_read(ccdc, VPFE_SYNMODE));
265*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "HSIZE_OFF: 0x%x\n",
266*4882a593Smuzhiyun vpfe_reg_read(ccdc, VPFE_HSIZE_OFF));
267*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "HORZ_INFO: 0x%x\n",
268*4882a593Smuzhiyun vpfe_reg_read(ccdc, VPFE_HORZ_INFO));
269*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "VERT_START: 0x%x\n",
270*4882a593Smuzhiyun vpfe_reg_read(ccdc, VPFE_VERT_START));
271*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "VERT_LINES: 0x%x\n",
272*4882a593Smuzhiyun vpfe_reg_read(ccdc, VPFE_VERT_LINES));
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun static int
vpfe_ccdc_validate_param(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_config_params_raw * ccdcparam)276*4882a593Smuzhiyun vpfe_ccdc_validate_param(struct vpfe_ccdc *ccdc,
277*4882a593Smuzhiyun struct vpfe_ccdc_config_params_raw *ccdcparam)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun struct vpfe_device *vpfe = to_vpfe(ccdc);
280*4882a593Smuzhiyun u8 max_gamma, max_data;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun if (!ccdcparam->alaw.enable)
283*4882a593Smuzhiyun return 0;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun max_gamma = ccdc_gamma_width_max_bit(ccdcparam->alaw.gamma_wd);
286*4882a593Smuzhiyun max_data = ccdc_data_size_max_bit(ccdcparam->data_sz);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (ccdcparam->alaw.gamma_wd > VPFE_CCDC_GAMMA_BITS_09_0 ||
289*4882a593Smuzhiyun ccdcparam->data_sz > VPFE_CCDC_DATA_8BITS ||
290*4882a593Smuzhiyun max_gamma > max_data) {
291*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "Invalid data line select\n");
292*4882a593Smuzhiyun return -EINVAL;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun return 0;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun static void
vpfe_ccdc_update_raw_params(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_config_params_raw * raw_params)299*4882a593Smuzhiyun vpfe_ccdc_update_raw_params(struct vpfe_ccdc *ccdc,
300*4882a593Smuzhiyun struct vpfe_ccdc_config_params_raw *raw_params)
301*4882a593Smuzhiyun {
302*4882a593Smuzhiyun struct vpfe_ccdc_config_params_raw *config_params =
303*4882a593Smuzhiyun &ccdc->ccdc_cfg.bayer.config_params;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun *config_params = *raw_params;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun /*
309*4882a593Smuzhiyun * vpfe_ccdc_restore_defaults()
310*4882a593Smuzhiyun * This function will write defaults to all CCDC registers
311*4882a593Smuzhiyun */
vpfe_ccdc_restore_defaults(struct vpfe_ccdc * ccdc)312*4882a593Smuzhiyun static void vpfe_ccdc_restore_defaults(struct vpfe_ccdc *ccdc)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun int i;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun /* Disable CCDC */
317*4882a593Smuzhiyun vpfe_pcr_enable(ccdc, 0);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun /* set all registers to default value */
320*4882a593Smuzhiyun for (i = 4; i <= 0x94; i += 4)
321*4882a593Smuzhiyun vpfe_reg_write(ccdc, 0, i);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_NO_CULLING, VPFE_CULLING);
324*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_CCDC_GAMMA_BITS_11_2, VPFE_ALAW);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
vpfe_ccdc_close(struct vpfe_ccdc * ccdc,struct device * dev)327*4882a593Smuzhiyun static int vpfe_ccdc_close(struct vpfe_ccdc *ccdc, struct device *dev)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun struct vpfe_device *vpfe = to_vpfe(ccdc);
330*4882a593Smuzhiyun u32 dma_cntl, pcr;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun pcr = vpfe_reg_read(ccdc, VPFE_PCR);
333*4882a593Smuzhiyun if (pcr)
334*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "VPFE_PCR is still set (%x)", pcr);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun dma_cntl = vpfe_reg_read(ccdc, VPFE_DMA_CNTL);
337*4882a593Smuzhiyun if ((dma_cntl & VPFE_DMA_CNTL_OVERFLOW))
338*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "VPFE_DMA_CNTL_OVERFLOW is still set (%x)",
339*4882a593Smuzhiyun dma_cntl);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* Disable CCDC by resetting all register to default POR values */
342*4882a593Smuzhiyun vpfe_ccdc_restore_defaults(ccdc);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun /* Disabled the module at the CONFIG level */
345*4882a593Smuzhiyun vpfe_config_enable(ccdc, 0);
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun pm_runtime_put_sync(dev);
348*4882a593Smuzhiyun return 0;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
vpfe_ccdc_set_params(struct vpfe_ccdc * ccdc,void __user * params)351*4882a593Smuzhiyun static int vpfe_ccdc_set_params(struct vpfe_ccdc *ccdc, void __user *params)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun struct vpfe_device *vpfe = to_vpfe(ccdc);
354*4882a593Smuzhiyun struct vpfe_ccdc_config_params_raw raw_params;
355*4882a593Smuzhiyun int x;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type != VPFE_RAW_BAYER)
358*4882a593Smuzhiyun return -EINVAL;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun x = copy_from_user(&raw_params, params, sizeof(raw_params));
361*4882a593Smuzhiyun if (x) {
362*4882a593Smuzhiyun vpfe_dbg(1, vpfe,
363*4882a593Smuzhiyun "%s: error in copying ccdc params, %d\n",
364*4882a593Smuzhiyun __func__, x);
365*4882a593Smuzhiyun return -EFAULT;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun if (!vpfe_ccdc_validate_param(ccdc, &raw_params)) {
369*4882a593Smuzhiyun vpfe_ccdc_update_raw_params(ccdc, &raw_params);
370*4882a593Smuzhiyun return 0;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun return -EINVAL;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun /*
377*4882a593Smuzhiyun * vpfe_ccdc_config_ycbcr()
378*4882a593Smuzhiyun * This function will configure CCDC for YCbCr video capture
379*4882a593Smuzhiyun */
vpfe_ccdc_config_ycbcr(struct vpfe_ccdc * ccdc)380*4882a593Smuzhiyun static void vpfe_ccdc_config_ycbcr(struct vpfe_ccdc *ccdc)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun struct ccdc_params_ycbcr *params = &ccdc->ccdc_cfg.ycbcr;
383*4882a593Smuzhiyun u32 syn_mode;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun /*
386*4882a593Smuzhiyun * first restore the CCDC registers to default values
387*4882a593Smuzhiyun * This is important since we assume default values to be set in
388*4882a593Smuzhiyun * a lot of registers that we didn't touch
389*4882a593Smuzhiyun */
390*4882a593Smuzhiyun vpfe_ccdc_restore_defaults(ccdc);
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun /*
393*4882a593Smuzhiyun * configure pixel format, frame format, configure video frame
394*4882a593Smuzhiyun * format, enable output to SDRAM, enable internal timing generator
395*4882a593Smuzhiyun * and 8bit pack mode
396*4882a593Smuzhiyun */
397*4882a593Smuzhiyun syn_mode = (((params->pix_fmt & VPFE_SYN_MODE_INPMOD_MASK) <<
398*4882a593Smuzhiyun VPFE_SYN_MODE_INPMOD_SHIFT) |
399*4882a593Smuzhiyun ((params->frm_fmt & VPFE_SYN_FLDMODE_MASK) <<
400*4882a593Smuzhiyun VPFE_SYN_FLDMODE_SHIFT) | VPFE_VDHDEN_ENABLE |
401*4882a593Smuzhiyun VPFE_WEN_ENABLE | VPFE_DATA_PACK_ENABLE);
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun /* setup BT.656 sync mode */
404*4882a593Smuzhiyun if (params->bt656_enable) {
405*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_REC656IF_BT656_EN, VPFE_REC656IF);
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /*
408*4882a593Smuzhiyun * configure the FID, VD, HD pin polarity,
409*4882a593Smuzhiyun * fld,hd pol positive, vd negative, 8-bit data
410*4882a593Smuzhiyun */
411*4882a593Smuzhiyun syn_mode |= VPFE_SYN_MODE_VD_POL_NEGATIVE;
412*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
413*4882a593Smuzhiyun syn_mode |= VPFE_SYN_MODE_10BITS;
414*4882a593Smuzhiyun else
415*4882a593Smuzhiyun syn_mode |= VPFE_SYN_MODE_8BITS;
416*4882a593Smuzhiyun } else {
417*4882a593Smuzhiyun /* y/c external sync mode */
418*4882a593Smuzhiyun syn_mode |= (((params->fid_pol & VPFE_FID_POL_MASK) <<
419*4882a593Smuzhiyun VPFE_FID_POL_SHIFT) |
420*4882a593Smuzhiyun ((params->hd_pol & VPFE_HD_POL_MASK) <<
421*4882a593Smuzhiyun VPFE_HD_POL_SHIFT) |
422*4882a593Smuzhiyun ((params->vd_pol & VPFE_VD_POL_MASK) <<
423*4882a593Smuzhiyun VPFE_VD_POL_SHIFT));
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun /* configure video window */
428*4882a593Smuzhiyun vpfe_ccdc_setwin(ccdc, ¶ms->win,
429*4882a593Smuzhiyun params->frm_fmt, params->bytesperpixel);
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun /*
432*4882a593Smuzhiyun * configure the order of y cb cr in SDRAM, and disable latch
433*4882a593Smuzhiyun * internal register on vsync
434*4882a593Smuzhiyun */
435*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
436*4882a593Smuzhiyun vpfe_reg_write(ccdc,
437*4882a593Smuzhiyun (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
438*4882a593Smuzhiyun VPFE_LATCH_ON_VSYNC_DISABLE |
439*4882a593Smuzhiyun VPFE_CCDCFG_BW656_10BIT, VPFE_CCDCFG);
440*4882a593Smuzhiyun else
441*4882a593Smuzhiyun vpfe_reg_write(ccdc,
442*4882a593Smuzhiyun (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
443*4882a593Smuzhiyun VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun /*
446*4882a593Smuzhiyun * configure the horizontal line offset. This should be a
447*4882a593Smuzhiyun * on 32 byte boundary. So clear LSB 5 bits
448*4882a593Smuzhiyun */
449*4882a593Smuzhiyun vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* configure the memory line offset */
452*4882a593Smuzhiyun if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED)
453*4882a593Smuzhiyun /* two fields are interleaved in memory */
454*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_SDOFST_FIELD_INTERLEAVED,
455*4882a593Smuzhiyun VPFE_SDOFST);
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun static void
vpfe_ccdc_config_black_clamp(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_black_clamp * bclamp)459*4882a593Smuzhiyun vpfe_ccdc_config_black_clamp(struct vpfe_ccdc *ccdc,
460*4882a593Smuzhiyun struct vpfe_ccdc_black_clamp *bclamp)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun u32 val;
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun if (!bclamp->enable) {
465*4882a593Smuzhiyun /* configure DCSub */
466*4882a593Smuzhiyun val = (bclamp->dc_sub) & VPFE_BLK_DC_SUB_MASK;
467*4882a593Smuzhiyun vpfe_reg_write(ccdc, val, VPFE_DCSUB);
468*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_CLAMP_DEFAULT_VAL, VPFE_CLAMP);
469*4882a593Smuzhiyun return;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun /*
472*4882a593Smuzhiyun * Configure gain, Start pixel, No of line to be avg,
473*4882a593Smuzhiyun * No of pixel/line to be avg, & Enable the Black clamping
474*4882a593Smuzhiyun */
475*4882a593Smuzhiyun val = ((bclamp->sgain & VPFE_BLK_SGAIN_MASK) |
476*4882a593Smuzhiyun ((bclamp->start_pixel & VPFE_BLK_ST_PXL_MASK) <<
477*4882a593Smuzhiyun VPFE_BLK_ST_PXL_SHIFT) |
478*4882a593Smuzhiyun ((bclamp->sample_ln & VPFE_BLK_SAMPLE_LINE_MASK) <<
479*4882a593Smuzhiyun VPFE_BLK_SAMPLE_LINE_SHIFT) |
480*4882a593Smuzhiyun ((bclamp->sample_pixel & VPFE_BLK_SAMPLE_LN_MASK) <<
481*4882a593Smuzhiyun VPFE_BLK_SAMPLE_LN_SHIFT) | VPFE_BLK_CLAMP_ENABLE);
482*4882a593Smuzhiyun vpfe_reg_write(ccdc, val, VPFE_CLAMP);
483*4882a593Smuzhiyun /* If Black clamping is enable then make dcsub 0 */
484*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_DCSUB_DEFAULT_VAL, VPFE_DCSUB);
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun static void
vpfe_ccdc_config_black_compense(struct vpfe_ccdc * ccdc,struct vpfe_ccdc_black_compensation * bcomp)488*4882a593Smuzhiyun vpfe_ccdc_config_black_compense(struct vpfe_ccdc *ccdc,
489*4882a593Smuzhiyun struct vpfe_ccdc_black_compensation *bcomp)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun u32 val;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun val = ((bcomp->b & VPFE_BLK_COMP_MASK) |
494*4882a593Smuzhiyun ((bcomp->gb & VPFE_BLK_COMP_MASK) <<
495*4882a593Smuzhiyun VPFE_BLK_COMP_GB_COMP_SHIFT) |
496*4882a593Smuzhiyun ((bcomp->gr & VPFE_BLK_COMP_MASK) <<
497*4882a593Smuzhiyun VPFE_BLK_COMP_GR_COMP_SHIFT) |
498*4882a593Smuzhiyun ((bcomp->r & VPFE_BLK_COMP_MASK) <<
499*4882a593Smuzhiyun VPFE_BLK_COMP_R_COMP_SHIFT));
500*4882a593Smuzhiyun vpfe_reg_write(ccdc, val, VPFE_BLKCMP);
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun /*
504*4882a593Smuzhiyun * vpfe_ccdc_config_raw()
505*4882a593Smuzhiyun * This function will configure CCDC for Raw capture mode
506*4882a593Smuzhiyun */
vpfe_ccdc_config_raw(struct vpfe_ccdc * ccdc)507*4882a593Smuzhiyun static void vpfe_ccdc_config_raw(struct vpfe_ccdc *ccdc)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun struct vpfe_device *vpfe = to_vpfe(ccdc);
510*4882a593Smuzhiyun struct vpfe_ccdc_config_params_raw *config_params =
511*4882a593Smuzhiyun &ccdc->ccdc_cfg.bayer.config_params;
512*4882a593Smuzhiyun struct ccdc_params_raw *params = &ccdc->ccdc_cfg.bayer;
513*4882a593Smuzhiyun unsigned int syn_mode;
514*4882a593Smuzhiyun unsigned int val;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun /* Reset CCDC */
517*4882a593Smuzhiyun vpfe_ccdc_restore_defaults(ccdc);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun /* Disable latching function registers on VSYNC */
520*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun /*
523*4882a593Smuzhiyun * Configure the vertical sync polarity(SYN_MODE.VDPOL),
524*4882a593Smuzhiyun * horizontal sync polarity (SYN_MODE.HDPOL), frame id polarity
525*4882a593Smuzhiyun * (SYN_MODE.FLDPOL), frame format(progressive or interlace),
526*4882a593Smuzhiyun * data size(SYNMODE.DATSIZ), &pixel format (Input mode), output
527*4882a593Smuzhiyun * SDRAM, enable internal timing generator
528*4882a593Smuzhiyun */
529*4882a593Smuzhiyun syn_mode = (((params->vd_pol & VPFE_VD_POL_MASK) << VPFE_VD_POL_SHIFT) |
530*4882a593Smuzhiyun ((params->hd_pol & VPFE_HD_POL_MASK) << VPFE_HD_POL_SHIFT) |
531*4882a593Smuzhiyun ((params->fid_pol & VPFE_FID_POL_MASK) <<
532*4882a593Smuzhiyun VPFE_FID_POL_SHIFT) | ((params->frm_fmt &
533*4882a593Smuzhiyun VPFE_FRM_FMT_MASK) << VPFE_FRM_FMT_SHIFT) |
534*4882a593Smuzhiyun ((config_params->data_sz & VPFE_DATA_SZ_MASK) <<
535*4882a593Smuzhiyun VPFE_DATA_SZ_SHIFT) | ((params->pix_fmt &
536*4882a593Smuzhiyun VPFE_PIX_FMT_MASK) << VPFE_PIX_FMT_SHIFT) |
537*4882a593Smuzhiyun VPFE_WEN_ENABLE | VPFE_VDHDEN_ENABLE);
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun /* Enable and configure aLaw register if needed */
540*4882a593Smuzhiyun if (config_params->alaw.enable) {
541*4882a593Smuzhiyun val = ((config_params->alaw.gamma_wd &
542*4882a593Smuzhiyun VPFE_ALAW_GAMMA_WD_MASK) | VPFE_ALAW_ENABLE);
543*4882a593Smuzhiyun vpfe_reg_write(ccdc, val, VPFE_ALAW);
544*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "\nWriting 0x%x to ALAW...\n", val);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun /* Configure video window */
548*4882a593Smuzhiyun vpfe_ccdc_setwin(ccdc, ¶ms->win, params->frm_fmt,
549*4882a593Smuzhiyun params->bytesperpixel);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun /* Configure Black Clamp */
552*4882a593Smuzhiyun vpfe_ccdc_config_black_clamp(ccdc, &config_params->blk_clamp);
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /* Configure Black level compensation */
555*4882a593Smuzhiyun vpfe_ccdc_config_black_compense(ccdc, &config_params->blk_comp);
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun /* If data size is 8 bit then pack the data */
558*4882a593Smuzhiyun if ((config_params->data_sz == VPFE_CCDC_DATA_8BITS) ||
559*4882a593Smuzhiyun config_params->alaw.enable)
560*4882a593Smuzhiyun syn_mode |= VPFE_DATA_PACK_ENABLE;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun /*
563*4882a593Smuzhiyun * Configure Horizontal offset register. If pack 8 is enabled then
564*4882a593Smuzhiyun * 1 pixel will take 1 byte
565*4882a593Smuzhiyun */
566*4882a593Smuzhiyun vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "Writing %d (%x) to HSIZE_OFF\n",
569*4882a593Smuzhiyun params->bytesperline, params->bytesperline);
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun /* Set value for SDOFST */
572*4882a593Smuzhiyun if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
573*4882a593Smuzhiyun if (params->image_invert_enable) {
574*4882a593Smuzhiyun /* For interlace inverse mode */
575*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_INTERLACED_IMAGE_INVERT,
576*4882a593Smuzhiyun VPFE_SDOFST);
577*4882a593Smuzhiyun } else {
578*4882a593Smuzhiyun /* For interlace non inverse mode */
579*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_INTERLACED_NO_IMAGE_INVERT,
580*4882a593Smuzhiyun VPFE_SDOFST);
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
583*4882a593Smuzhiyun vpfe_reg_write(ccdc, VPFE_PROGRESSIVE_NO_IMAGE_INVERT,
584*4882a593Smuzhiyun VPFE_SDOFST);
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun vpfe_reg_dump(ccdc);
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun static inline int
vpfe_ccdc_set_buftype(struct vpfe_ccdc * ccdc,enum ccdc_buftype buf_type)593*4882a593Smuzhiyun vpfe_ccdc_set_buftype(struct vpfe_ccdc *ccdc,
594*4882a593Smuzhiyun enum ccdc_buftype buf_type)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
597*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.buf_type = buf_type;
598*4882a593Smuzhiyun else
599*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.buf_type = buf_type;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun return 0;
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
vpfe_ccdc_get_buftype(struct vpfe_ccdc * ccdc)604*4882a593Smuzhiyun static inline enum ccdc_buftype vpfe_ccdc_get_buftype(struct vpfe_ccdc *ccdc)
605*4882a593Smuzhiyun {
606*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
607*4882a593Smuzhiyun return ccdc->ccdc_cfg.bayer.buf_type;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun return ccdc->ccdc_cfg.ycbcr.buf_type;
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun
vpfe_ccdc_set_pixel_format(struct vpfe_ccdc * ccdc,u32 pixfmt)612*4882a593Smuzhiyun static int vpfe_ccdc_set_pixel_format(struct vpfe_ccdc *ccdc, u32 pixfmt)
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun struct vpfe_device *vpfe = to_vpfe(ccdc);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "%s: if_type: %d, pixfmt:%s\n",
617*4882a593Smuzhiyun __func__, ccdc->ccdc_cfg.if_type, print_fourcc(pixfmt));
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
620*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
621*4882a593Smuzhiyun /*
622*4882a593Smuzhiyun * Need to clear it in case it was left on
623*4882a593Smuzhiyun * after the last capture.
624*4882a593Smuzhiyun */
625*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 0;
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun switch (pixfmt) {
628*4882a593Smuzhiyun case V4L2_PIX_FMT_SBGGR8:
629*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 1;
630*4882a593Smuzhiyun break;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun case V4L2_PIX_FMT_YUYV:
633*4882a593Smuzhiyun case V4L2_PIX_FMT_UYVY:
634*4882a593Smuzhiyun case V4L2_PIX_FMT_YUV420:
635*4882a593Smuzhiyun case V4L2_PIX_FMT_NV12:
636*4882a593Smuzhiyun case V4L2_PIX_FMT_RGB565X:
637*4882a593Smuzhiyun break;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun case V4L2_PIX_FMT_SBGGR16:
640*4882a593Smuzhiyun default:
641*4882a593Smuzhiyun return -EINVAL;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun } else {
644*4882a593Smuzhiyun switch (pixfmt) {
645*4882a593Smuzhiyun case V4L2_PIX_FMT_YUYV:
646*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
647*4882a593Smuzhiyun break;
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun case V4L2_PIX_FMT_UYVY:
650*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
651*4882a593Smuzhiyun break;
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun default:
654*4882a593Smuzhiyun return -EINVAL;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun return 0;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
vpfe_ccdc_get_pixel_format(struct vpfe_ccdc * ccdc)661*4882a593Smuzhiyun static u32 vpfe_ccdc_get_pixel_format(struct vpfe_ccdc *ccdc)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun u32 pixfmt;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
666*4882a593Smuzhiyun pixfmt = V4L2_PIX_FMT_YUYV;
667*4882a593Smuzhiyun } else {
668*4882a593Smuzhiyun if (ccdc->ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
669*4882a593Smuzhiyun pixfmt = V4L2_PIX_FMT_YUYV;
670*4882a593Smuzhiyun else
671*4882a593Smuzhiyun pixfmt = V4L2_PIX_FMT_UYVY;
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun return pixfmt;
675*4882a593Smuzhiyun }
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun static int
vpfe_ccdc_set_image_window(struct vpfe_ccdc * ccdc,struct v4l2_rect * win,unsigned int bpp)678*4882a593Smuzhiyun vpfe_ccdc_set_image_window(struct vpfe_ccdc *ccdc,
679*4882a593Smuzhiyun struct v4l2_rect *win, unsigned int bpp)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
682*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.win = *win;
683*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.bytesperpixel = bpp;
684*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.bytesperline = ALIGN(win->width * bpp, 32);
685*4882a593Smuzhiyun } else {
686*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.win = *win;
687*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.bytesperpixel = bpp;
688*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.bytesperline = ALIGN(win->width * bpp, 32);
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun return 0;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun static inline void
vpfe_ccdc_get_image_window(struct vpfe_ccdc * ccdc,struct v4l2_rect * win)695*4882a593Smuzhiyun vpfe_ccdc_get_image_window(struct vpfe_ccdc *ccdc,
696*4882a593Smuzhiyun struct v4l2_rect *win)
697*4882a593Smuzhiyun {
698*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
699*4882a593Smuzhiyun *win = ccdc->ccdc_cfg.bayer.win;
700*4882a593Smuzhiyun else
701*4882a593Smuzhiyun *win = ccdc->ccdc_cfg.ycbcr.win;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun
vpfe_ccdc_get_line_length(struct vpfe_ccdc * ccdc)704*4882a593Smuzhiyun static inline unsigned int vpfe_ccdc_get_line_length(struct vpfe_ccdc *ccdc)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
707*4882a593Smuzhiyun return ccdc->ccdc_cfg.bayer.bytesperline;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun return ccdc->ccdc_cfg.ycbcr.bytesperline;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun static inline int
vpfe_ccdc_set_frame_format(struct vpfe_ccdc * ccdc,enum ccdc_frmfmt frm_fmt)713*4882a593Smuzhiyun vpfe_ccdc_set_frame_format(struct vpfe_ccdc *ccdc,
714*4882a593Smuzhiyun enum ccdc_frmfmt frm_fmt)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
717*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.frm_fmt = frm_fmt;
718*4882a593Smuzhiyun else
719*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun return 0;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun static inline enum ccdc_frmfmt
vpfe_ccdc_get_frame_format(struct vpfe_ccdc * ccdc)725*4882a593Smuzhiyun vpfe_ccdc_get_frame_format(struct vpfe_ccdc *ccdc)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
728*4882a593Smuzhiyun return ccdc->ccdc_cfg.bayer.frm_fmt;
729*4882a593Smuzhiyun
730*4882a593Smuzhiyun return ccdc->ccdc_cfg.ycbcr.frm_fmt;
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun
vpfe_ccdc_getfid(struct vpfe_ccdc * ccdc)733*4882a593Smuzhiyun static inline int vpfe_ccdc_getfid(struct vpfe_ccdc *ccdc)
734*4882a593Smuzhiyun {
735*4882a593Smuzhiyun return (vpfe_reg_read(ccdc, VPFE_SYNMODE) >> 15) & 1;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
vpfe_set_sdr_addr(struct vpfe_ccdc * ccdc,unsigned long addr)738*4882a593Smuzhiyun static inline void vpfe_set_sdr_addr(struct vpfe_ccdc *ccdc, unsigned long addr)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun vpfe_reg_write(ccdc, addr & 0xffffffe0, VPFE_SDR_ADDR);
741*4882a593Smuzhiyun }
742*4882a593Smuzhiyun
vpfe_ccdc_set_hw_if_params(struct vpfe_ccdc * ccdc,struct vpfe_hw_if_param * params)743*4882a593Smuzhiyun static int vpfe_ccdc_set_hw_if_params(struct vpfe_ccdc *ccdc,
744*4882a593Smuzhiyun struct vpfe_hw_if_param *params)
745*4882a593Smuzhiyun {
746*4882a593Smuzhiyun struct vpfe_device *vpfe = to_vpfe(ccdc);
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun ccdc->ccdc_cfg.if_type = params->if_type;
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun switch (params->if_type) {
751*4882a593Smuzhiyun case VPFE_BT656:
752*4882a593Smuzhiyun case VPFE_YCBCR_SYNC_16:
753*4882a593Smuzhiyun case VPFE_YCBCR_SYNC_8:
754*4882a593Smuzhiyun case VPFE_BT656_10BIT:
755*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.vd_pol = params->vdpol;
756*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.hd_pol = params->hdpol;
757*4882a593Smuzhiyun break;
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun case VPFE_RAW_BAYER:
760*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.vd_pol = params->vdpol;
761*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.hd_pol = params->hdpol;
762*4882a593Smuzhiyun if (params->bus_width == 10)
763*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.config_params.data_sz =
764*4882a593Smuzhiyun VPFE_CCDC_DATA_10BITS;
765*4882a593Smuzhiyun else
766*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.config_params.data_sz =
767*4882a593Smuzhiyun VPFE_CCDC_DATA_8BITS;
768*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "params.bus_width: %d\n",
769*4882a593Smuzhiyun params->bus_width);
770*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "config_params.data_sz: %d\n",
771*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.config_params.data_sz);
772*4882a593Smuzhiyun break;
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun default:
775*4882a593Smuzhiyun return -EINVAL;
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun return 0;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
vpfe_clear_intr(struct vpfe_ccdc * ccdc,int vdint)781*4882a593Smuzhiyun static void vpfe_clear_intr(struct vpfe_ccdc *ccdc, int vdint)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun unsigned int vpfe_int_status;
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun switch (vdint) {
788*4882a593Smuzhiyun /* VD0 interrupt */
789*4882a593Smuzhiyun case VPFE_VDINT0:
790*4882a593Smuzhiyun vpfe_int_status &= ~VPFE_VDINT0;
791*4882a593Smuzhiyun vpfe_int_status |= VPFE_VDINT0;
792*4882a593Smuzhiyun break;
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun /* VD1 interrupt */
795*4882a593Smuzhiyun case VPFE_VDINT1:
796*4882a593Smuzhiyun vpfe_int_status &= ~VPFE_VDINT1;
797*4882a593Smuzhiyun vpfe_int_status |= VPFE_VDINT1;
798*4882a593Smuzhiyun break;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun /* VD2 interrupt */
801*4882a593Smuzhiyun case VPFE_VDINT2:
802*4882a593Smuzhiyun vpfe_int_status &= ~VPFE_VDINT2;
803*4882a593Smuzhiyun vpfe_int_status |= VPFE_VDINT2;
804*4882a593Smuzhiyun break;
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun /* Clear all interrupts */
807*4882a593Smuzhiyun default:
808*4882a593Smuzhiyun vpfe_int_status &= ~(VPFE_VDINT0 |
809*4882a593Smuzhiyun VPFE_VDINT1 |
810*4882a593Smuzhiyun VPFE_VDINT2);
811*4882a593Smuzhiyun vpfe_int_status |= (VPFE_VDINT0 |
812*4882a593Smuzhiyun VPFE_VDINT1 |
813*4882a593Smuzhiyun VPFE_VDINT2);
814*4882a593Smuzhiyun break;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun /* Clear specific VDINT from the status register */
817*4882a593Smuzhiyun vpfe_reg_write(ccdc, vpfe_int_status, VPFE_IRQ_STS);
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun /* Acknowledge that we are done with all interrupts */
822*4882a593Smuzhiyun vpfe_reg_write(ccdc, 1, VPFE_IRQ_EOI);
823*4882a593Smuzhiyun }
824*4882a593Smuzhiyun
vpfe_ccdc_config_defaults(struct vpfe_ccdc * ccdc)825*4882a593Smuzhiyun static void vpfe_ccdc_config_defaults(struct vpfe_ccdc *ccdc)
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun ccdc->ccdc_cfg.if_type = VPFE_RAW_BAYER;
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
830*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.frm_fmt = CCDC_FRMFMT_INTERLACED;
831*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.fid_pol = VPFE_PINPOL_POSITIVE;
832*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.vd_pol = VPFE_PINPOL_POSITIVE;
833*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.hd_pol = VPFE_PINPOL_POSITIVE;
834*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
835*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED;
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.win.left = 0;
838*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.win.top = 0;
839*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.win.width = 720;
840*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.win.height = 576;
841*4882a593Smuzhiyun ccdc->ccdc_cfg.ycbcr.bt656_enable = 1;
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
844*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
845*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.fid_pol = VPFE_PINPOL_POSITIVE;
846*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.vd_pol = VPFE_PINPOL_POSITIVE;
847*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.hd_pol = VPFE_PINPOL_POSITIVE;
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.win.left = 0;
850*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.win.top = 0;
851*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.win.width = 800;
852*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.win.height = 600;
853*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.config_params.data_sz = VPFE_CCDC_DATA_8BITS;
854*4882a593Smuzhiyun ccdc->ccdc_cfg.bayer.config_params.alaw.gamma_wd =
855*4882a593Smuzhiyun VPFE_CCDC_GAMMA_BITS_09_0;
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun /*
859*4882a593Smuzhiyun * vpfe_get_ccdc_image_format - Get image parameters based on CCDC settings
860*4882a593Smuzhiyun */
vpfe_get_ccdc_image_format(struct vpfe_device * vpfe,struct v4l2_format * f)861*4882a593Smuzhiyun static int vpfe_get_ccdc_image_format(struct vpfe_device *vpfe,
862*4882a593Smuzhiyun struct v4l2_format *f)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun struct v4l2_rect image_win;
865*4882a593Smuzhiyun enum ccdc_buftype buf_type;
866*4882a593Smuzhiyun enum ccdc_frmfmt frm_fmt;
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun memset(f, 0, sizeof(*f));
869*4882a593Smuzhiyun f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
870*4882a593Smuzhiyun vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
871*4882a593Smuzhiyun f->fmt.pix.width = image_win.width;
872*4882a593Smuzhiyun f->fmt.pix.height = image_win.height;
873*4882a593Smuzhiyun f->fmt.pix.bytesperline = vpfe_ccdc_get_line_length(&vpfe->ccdc);
874*4882a593Smuzhiyun f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
875*4882a593Smuzhiyun f->fmt.pix.height;
876*4882a593Smuzhiyun buf_type = vpfe_ccdc_get_buftype(&vpfe->ccdc);
877*4882a593Smuzhiyun f->fmt.pix.pixelformat = vpfe_ccdc_get_pixel_format(&vpfe->ccdc);
878*4882a593Smuzhiyun frm_fmt = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun if (frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
881*4882a593Smuzhiyun f->fmt.pix.field = V4L2_FIELD_NONE;
882*4882a593Smuzhiyun } else if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
883*4882a593Smuzhiyun if (buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) {
884*4882a593Smuzhiyun f->fmt.pix.field = V4L2_FIELD_INTERLACED;
885*4882a593Smuzhiyun } else if (buf_type == CCDC_BUFTYPE_FLD_SEPARATED) {
886*4882a593Smuzhiyun f->fmt.pix.field = V4L2_FIELD_SEQ_TB;
887*4882a593Smuzhiyun } else {
888*4882a593Smuzhiyun vpfe_err(vpfe, "Invalid buf_type\n");
889*4882a593Smuzhiyun return -EINVAL;
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun } else {
892*4882a593Smuzhiyun vpfe_err(vpfe, "Invalid frm_fmt\n");
893*4882a593Smuzhiyun return -EINVAL;
894*4882a593Smuzhiyun }
895*4882a593Smuzhiyun return 0;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun
vpfe_config_ccdc_image_format(struct vpfe_device * vpfe)898*4882a593Smuzhiyun static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun enum ccdc_frmfmt frm_fmt = CCDC_FRMFMT_INTERLACED;
901*4882a593Smuzhiyun u32 bpp;
902*4882a593Smuzhiyun int ret = 0;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "pixelformat: %s\n",
905*4882a593Smuzhiyun print_fourcc(vpfe->fmt.fmt.pix.pixelformat));
906*4882a593Smuzhiyun
907*4882a593Smuzhiyun if (vpfe_ccdc_set_pixel_format(&vpfe->ccdc,
908*4882a593Smuzhiyun vpfe->fmt.fmt.pix.pixelformat) < 0) {
909*4882a593Smuzhiyun vpfe_err(vpfe, "couldn't set pix format in ccdc\n");
910*4882a593Smuzhiyun return -EINVAL;
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun /* configure the image window */
914*4882a593Smuzhiyun bpp = __get_bytesperpixel(vpfe, vpfe->current_vpfe_fmt);
915*4882a593Smuzhiyun vpfe_ccdc_set_image_window(&vpfe->ccdc, &vpfe->crop, bpp);
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun switch (vpfe->fmt.fmt.pix.field) {
918*4882a593Smuzhiyun case V4L2_FIELD_INTERLACED:
919*4882a593Smuzhiyun /* do nothing, since it is default */
920*4882a593Smuzhiyun ret = vpfe_ccdc_set_buftype(
921*4882a593Smuzhiyun &vpfe->ccdc,
922*4882a593Smuzhiyun CCDC_BUFTYPE_FLD_INTERLEAVED);
923*4882a593Smuzhiyun break;
924*4882a593Smuzhiyun
925*4882a593Smuzhiyun case V4L2_FIELD_NONE:
926*4882a593Smuzhiyun frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
927*4882a593Smuzhiyun /* buffer type only applicable for interlaced scan */
928*4882a593Smuzhiyun break;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun case V4L2_FIELD_SEQ_TB:
931*4882a593Smuzhiyun ret = vpfe_ccdc_set_buftype(
932*4882a593Smuzhiyun &vpfe->ccdc,
933*4882a593Smuzhiyun CCDC_BUFTYPE_FLD_SEPARATED);
934*4882a593Smuzhiyun break;
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun default:
937*4882a593Smuzhiyun return -EINVAL;
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun if (ret)
941*4882a593Smuzhiyun return ret;
942*4882a593Smuzhiyun
943*4882a593Smuzhiyun return vpfe_ccdc_set_frame_format(&vpfe->ccdc, frm_fmt);
944*4882a593Smuzhiyun }
945*4882a593Smuzhiyun
946*4882a593Smuzhiyun /*
947*4882a593Smuzhiyun * vpfe_config_image_format()
948*4882a593Smuzhiyun * For a given standard, this functions sets up the default
949*4882a593Smuzhiyun * pix format & crop values in the vpfe device and ccdc. It first
950*4882a593Smuzhiyun * starts with defaults based values from the standard table.
951*4882a593Smuzhiyun * It then checks if sub device supports get_fmt and then override the
952*4882a593Smuzhiyun * values based on that.Sets crop values to match with scan resolution
953*4882a593Smuzhiyun * starting at 0,0. It calls vpfe_config_ccdc_image_format() set the
954*4882a593Smuzhiyun * values in ccdc
955*4882a593Smuzhiyun */
vpfe_config_image_format(struct vpfe_device * vpfe,v4l2_std_id std_id)956*4882a593Smuzhiyun static int vpfe_config_image_format(struct vpfe_device *vpfe,
957*4882a593Smuzhiyun v4l2_std_id std_id)
958*4882a593Smuzhiyun {
959*4882a593Smuzhiyun struct vpfe_fmt *fmt;
960*4882a593Smuzhiyun struct v4l2_mbus_framefmt mbus_fmt;
961*4882a593Smuzhiyun int i, ret;
962*4882a593Smuzhiyun
963*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vpfe_standards); i++) {
964*4882a593Smuzhiyun if (vpfe_standards[i].std_id & std_id) {
965*4882a593Smuzhiyun vpfe->std_info.active_pixels =
966*4882a593Smuzhiyun vpfe_standards[i].width;
967*4882a593Smuzhiyun vpfe->std_info.active_lines =
968*4882a593Smuzhiyun vpfe_standards[i].height;
969*4882a593Smuzhiyun vpfe->std_info.frame_format =
970*4882a593Smuzhiyun vpfe_standards[i].frame_format;
971*4882a593Smuzhiyun vpfe->std_index = i;
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun break;
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun if (i == ARRAY_SIZE(vpfe_standards)) {
978*4882a593Smuzhiyun vpfe_err(vpfe, "standard not supported\n");
979*4882a593Smuzhiyun return -EINVAL;
980*4882a593Smuzhiyun }
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun ret = __subdev_get_format(vpfe, &mbus_fmt);
983*4882a593Smuzhiyun if (ret)
984*4882a593Smuzhiyun return ret;
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun fmt = find_format_by_code(vpfe, mbus_fmt.code);
987*4882a593Smuzhiyun if (!fmt) {
988*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "mbus code format (0x%08x) not found.\n",
989*4882a593Smuzhiyun mbus_fmt.code);
990*4882a593Smuzhiyun return -EINVAL;
991*4882a593Smuzhiyun }
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun /* Save current subdev format */
994*4882a593Smuzhiyun v4l2_fill_pix_format(&vpfe->fmt.fmt.pix, &mbus_fmt);
995*4882a593Smuzhiyun vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
996*4882a593Smuzhiyun vpfe->fmt.fmt.pix.pixelformat = fmt->fourcc;
997*4882a593Smuzhiyun vpfe_calc_format_size(vpfe, fmt, &vpfe->fmt);
998*4882a593Smuzhiyun vpfe->current_vpfe_fmt = fmt;
999*4882a593Smuzhiyun
1000*4882a593Smuzhiyun /* Update the crop window based on found values */
1001*4882a593Smuzhiyun vpfe->crop.top = 0;
1002*4882a593Smuzhiyun vpfe->crop.left = 0;
1003*4882a593Smuzhiyun vpfe->crop.width = mbus_fmt.width;
1004*4882a593Smuzhiyun vpfe->crop.height = mbus_fmt.height;
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun return vpfe_config_ccdc_image_format(vpfe);
1007*4882a593Smuzhiyun }
1008*4882a593Smuzhiyun
vpfe_initialize_device(struct vpfe_device * vpfe)1009*4882a593Smuzhiyun static int vpfe_initialize_device(struct vpfe_device *vpfe)
1010*4882a593Smuzhiyun {
1011*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1012*4882a593Smuzhiyun int ret;
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun sdinfo = &vpfe->cfg->sub_devs[0];
1015*4882a593Smuzhiyun sdinfo->sd = vpfe->sd[0];
1016*4882a593Smuzhiyun vpfe->current_input = 0;
1017*4882a593Smuzhiyun vpfe->std_index = 0;
1018*4882a593Smuzhiyun /* Configure the default format information */
1019*4882a593Smuzhiyun ret = vpfe_config_image_format(vpfe,
1020*4882a593Smuzhiyun vpfe_standards[vpfe->std_index].std_id);
1021*4882a593Smuzhiyun if (ret)
1022*4882a593Smuzhiyun return ret;
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun ret = pm_runtime_resume_and_get(vpfe->pdev);
1025*4882a593Smuzhiyun if (ret < 0)
1026*4882a593Smuzhiyun return ret;
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun vpfe_config_enable(&vpfe->ccdc, 1);
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun vpfe_ccdc_restore_defaults(&vpfe->ccdc);
1031*4882a593Smuzhiyun
1032*4882a593Smuzhiyun /* Clear all VPFE interrupts */
1033*4882a593Smuzhiyun vpfe_clear_intr(&vpfe->ccdc, -1);
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun return ret;
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun /*
1039*4882a593Smuzhiyun * vpfe_release : This function is based on the vb2_fop_release
1040*4882a593Smuzhiyun * helper function.
1041*4882a593Smuzhiyun * It has been augmented to handle module power management,
1042*4882a593Smuzhiyun * by disabling/enabling h/w module fcntl clock when necessary.
1043*4882a593Smuzhiyun */
vpfe_release(struct file * file)1044*4882a593Smuzhiyun static int vpfe_release(struct file *file)
1045*4882a593Smuzhiyun {
1046*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1047*4882a593Smuzhiyun bool fh_singular;
1048*4882a593Smuzhiyun int ret;
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun mutex_lock(&vpfe->lock);
1051*4882a593Smuzhiyun
1052*4882a593Smuzhiyun /* Save the singular status before we call the clean-up helper */
1053*4882a593Smuzhiyun fh_singular = v4l2_fh_is_singular_file(file);
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun /* the release helper will cleanup any on-going streaming */
1056*4882a593Smuzhiyun ret = _vb2_fop_release(file, NULL);
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun /*
1059*4882a593Smuzhiyun * If this was the last open file.
1060*4882a593Smuzhiyun * Then de-initialize hw module.
1061*4882a593Smuzhiyun */
1062*4882a593Smuzhiyun if (fh_singular)
1063*4882a593Smuzhiyun vpfe_ccdc_close(&vpfe->ccdc, vpfe->pdev);
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun mutex_unlock(&vpfe->lock);
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun return ret;
1068*4882a593Smuzhiyun }
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun /*
1071*4882a593Smuzhiyun * vpfe_open : This function is based on the v4l2_fh_open helper function.
1072*4882a593Smuzhiyun * It has been augmented to handle module power management,
1073*4882a593Smuzhiyun * by disabling/enabling h/w module fcntl clock when necessary.
1074*4882a593Smuzhiyun */
vpfe_open(struct file * file)1075*4882a593Smuzhiyun static int vpfe_open(struct file *file)
1076*4882a593Smuzhiyun {
1077*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1078*4882a593Smuzhiyun int ret;
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun mutex_lock(&vpfe->lock);
1081*4882a593Smuzhiyun
1082*4882a593Smuzhiyun ret = v4l2_fh_open(file);
1083*4882a593Smuzhiyun if (ret) {
1084*4882a593Smuzhiyun vpfe_err(vpfe, "v4l2_fh_open failed\n");
1085*4882a593Smuzhiyun goto unlock;
1086*4882a593Smuzhiyun }
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun if (!v4l2_fh_is_singular_file(file))
1089*4882a593Smuzhiyun goto unlock;
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun if (vpfe_initialize_device(vpfe)) {
1092*4882a593Smuzhiyun v4l2_fh_release(file);
1093*4882a593Smuzhiyun ret = -ENODEV;
1094*4882a593Smuzhiyun }
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun unlock:
1097*4882a593Smuzhiyun mutex_unlock(&vpfe->lock);
1098*4882a593Smuzhiyun return ret;
1099*4882a593Smuzhiyun }
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun /**
1102*4882a593Smuzhiyun * vpfe_schedule_next_buffer: set next buffer address for capture
1103*4882a593Smuzhiyun * @vpfe : ptr to vpfe device
1104*4882a593Smuzhiyun *
1105*4882a593Smuzhiyun * This function will get next buffer from the dma queue and
1106*4882a593Smuzhiyun * set the buffer address in the vpfe register for capture.
1107*4882a593Smuzhiyun * the buffer is marked active
1108*4882a593Smuzhiyun */
vpfe_schedule_next_buffer(struct vpfe_device * vpfe)1109*4882a593Smuzhiyun static void vpfe_schedule_next_buffer(struct vpfe_device *vpfe)
1110*4882a593Smuzhiyun {
1111*4882a593Smuzhiyun dma_addr_t addr;
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun spin_lock(&vpfe->dma_queue_lock);
1114*4882a593Smuzhiyun if (list_empty(&vpfe->dma_queue)) {
1115*4882a593Smuzhiyun spin_unlock(&vpfe->dma_queue_lock);
1116*4882a593Smuzhiyun return;
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun vpfe->next_frm = list_entry(vpfe->dma_queue.next,
1120*4882a593Smuzhiyun struct vpfe_cap_buffer, list);
1121*4882a593Smuzhiyun list_del(&vpfe->next_frm->list);
1122*4882a593Smuzhiyun spin_unlock(&vpfe->dma_queue_lock);
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0);
1125*4882a593Smuzhiyun vpfe_set_sdr_addr(&vpfe->ccdc, addr);
1126*4882a593Smuzhiyun }
1127*4882a593Smuzhiyun
vpfe_schedule_bottom_field(struct vpfe_device * vpfe)1128*4882a593Smuzhiyun static inline void vpfe_schedule_bottom_field(struct vpfe_device *vpfe)
1129*4882a593Smuzhiyun {
1130*4882a593Smuzhiyun dma_addr_t addr;
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb.vb2_buf, 0) +
1133*4882a593Smuzhiyun vpfe->field_off;
1134*4882a593Smuzhiyun
1135*4882a593Smuzhiyun vpfe_set_sdr_addr(&vpfe->ccdc, addr);
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun /*
1139*4882a593Smuzhiyun * vpfe_process_buffer_complete: process a completed buffer
1140*4882a593Smuzhiyun * @vpfe : ptr to vpfe device
1141*4882a593Smuzhiyun *
1142*4882a593Smuzhiyun * This function time stamp the buffer and mark it as DONE. It also
1143*4882a593Smuzhiyun * wake up any process waiting on the QUEUE and set the next buffer
1144*4882a593Smuzhiyun * as current
1145*4882a593Smuzhiyun */
vpfe_process_buffer_complete(struct vpfe_device * vpfe)1146*4882a593Smuzhiyun static inline void vpfe_process_buffer_complete(struct vpfe_device *vpfe)
1147*4882a593Smuzhiyun {
1148*4882a593Smuzhiyun vpfe->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns();
1149*4882a593Smuzhiyun vpfe->cur_frm->vb.field = vpfe->fmt.fmt.pix.field;
1150*4882a593Smuzhiyun vpfe->cur_frm->vb.sequence = vpfe->sequence++;
1151*4882a593Smuzhiyun vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE);
1152*4882a593Smuzhiyun vpfe->cur_frm = vpfe->next_frm;
1153*4882a593Smuzhiyun }
1154*4882a593Smuzhiyun
vpfe_handle_interlaced_irq(struct vpfe_device * vpfe,enum v4l2_field field)1155*4882a593Smuzhiyun static void vpfe_handle_interlaced_irq(struct vpfe_device *vpfe,
1156*4882a593Smuzhiyun enum v4l2_field field)
1157*4882a593Smuzhiyun {
1158*4882a593Smuzhiyun int fid;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun /* interlaced or TB capture check which field
1161*4882a593Smuzhiyun * we are in hardware
1162*4882a593Smuzhiyun */
1163*4882a593Smuzhiyun fid = vpfe_ccdc_getfid(&vpfe->ccdc);
1164*4882a593Smuzhiyun
1165*4882a593Smuzhiyun /* switch the software maintained field id */
1166*4882a593Smuzhiyun vpfe->field ^= 1;
1167*4882a593Smuzhiyun if (fid == vpfe->field) {
1168*4882a593Smuzhiyun /* we are in-sync here,continue */
1169*4882a593Smuzhiyun if (fid == 0) {
1170*4882a593Smuzhiyun /*
1171*4882a593Smuzhiyun * One frame is just being captured. If the
1172*4882a593Smuzhiyun * next frame is available, release the
1173*4882a593Smuzhiyun * current frame and move on
1174*4882a593Smuzhiyun */
1175*4882a593Smuzhiyun if (vpfe->cur_frm != vpfe->next_frm)
1176*4882a593Smuzhiyun vpfe_process_buffer_complete(vpfe);
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun if (vpfe->stopping)
1179*4882a593Smuzhiyun return;
1180*4882a593Smuzhiyun
1181*4882a593Smuzhiyun /*
1182*4882a593Smuzhiyun * based on whether the two fields are stored
1183*4882a593Smuzhiyun * interleave or separately in memory,
1184*4882a593Smuzhiyun * reconfigure the CCDC memory address
1185*4882a593Smuzhiyun */
1186*4882a593Smuzhiyun if (field == V4L2_FIELD_SEQ_TB)
1187*4882a593Smuzhiyun vpfe_schedule_bottom_field(vpfe);
1188*4882a593Smuzhiyun } else {
1189*4882a593Smuzhiyun /*
1190*4882a593Smuzhiyun * if one field is just being captured configure
1191*4882a593Smuzhiyun * the next frame get the next frame from the empty
1192*4882a593Smuzhiyun * queue if no frame is available hold on to the
1193*4882a593Smuzhiyun * current buffer
1194*4882a593Smuzhiyun */
1195*4882a593Smuzhiyun if (vpfe->cur_frm == vpfe->next_frm)
1196*4882a593Smuzhiyun vpfe_schedule_next_buffer(vpfe);
1197*4882a593Smuzhiyun }
1198*4882a593Smuzhiyun } else if (fid == 0) {
1199*4882a593Smuzhiyun /*
1200*4882a593Smuzhiyun * out of sync. Recover from any hardware out-of-sync.
1201*4882a593Smuzhiyun * May loose one frame
1202*4882a593Smuzhiyun */
1203*4882a593Smuzhiyun vpfe->field = fid;
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun }
1206*4882a593Smuzhiyun
1207*4882a593Smuzhiyun /*
1208*4882a593Smuzhiyun * vpfe_isr : ISR handler for vpfe capture (VINT0)
1209*4882a593Smuzhiyun * @irq: irq number
1210*4882a593Smuzhiyun * @dev_id: dev_id ptr
1211*4882a593Smuzhiyun *
1212*4882a593Smuzhiyun * It changes status of the captured buffer, takes next buffer from the queue
1213*4882a593Smuzhiyun * and sets its address in VPFE registers
1214*4882a593Smuzhiyun */
vpfe_isr(int irq,void * dev)1215*4882a593Smuzhiyun static irqreturn_t vpfe_isr(int irq, void *dev)
1216*4882a593Smuzhiyun {
1217*4882a593Smuzhiyun struct vpfe_device *vpfe = (struct vpfe_device *)dev;
1218*4882a593Smuzhiyun enum v4l2_field field = vpfe->fmt.fmt.pix.field;
1219*4882a593Smuzhiyun int intr_status, stopping = vpfe->stopping;
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun intr_status = vpfe_reg_read(&vpfe->ccdc, VPFE_IRQ_STS);
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun if (intr_status & VPFE_VDINT0) {
1224*4882a593Smuzhiyun if (field == V4L2_FIELD_NONE) {
1225*4882a593Smuzhiyun if (vpfe->cur_frm != vpfe->next_frm)
1226*4882a593Smuzhiyun vpfe_process_buffer_complete(vpfe);
1227*4882a593Smuzhiyun } else {
1228*4882a593Smuzhiyun vpfe_handle_interlaced_irq(vpfe, field);
1229*4882a593Smuzhiyun }
1230*4882a593Smuzhiyun if (stopping) {
1231*4882a593Smuzhiyun vpfe->stopping = false;
1232*4882a593Smuzhiyun complete(&vpfe->capture_stop);
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun }
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun if (intr_status & VPFE_VDINT1 && !stopping) {
1237*4882a593Smuzhiyun if (field == V4L2_FIELD_NONE &&
1238*4882a593Smuzhiyun vpfe->cur_frm == vpfe->next_frm)
1239*4882a593Smuzhiyun vpfe_schedule_next_buffer(vpfe);
1240*4882a593Smuzhiyun }
1241*4882a593Smuzhiyun
1242*4882a593Smuzhiyun vpfe_clear_intr(&vpfe->ccdc, intr_status);
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun return IRQ_HANDLED;
1245*4882a593Smuzhiyun }
1246*4882a593Smuzhiyun
vpfe_detach_irq(struct vpfe_device * vpfe)1247*4882a593Smuzhiyun static inline void vpfe_detach_irq(struct vpfe_device *vpfe)
1248*4882a593Smuzhiyun {
1249*4882a593Smuzhiyun unsigned int intr = VPFE_VDINT0;
1250*4882a593Smuzhiyun enum ccdc_frmfmt frame_format;
1251*4882a593Smuzhiyun
1252*4882a593Smuzhiyun frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1253*4882a593Smuzhiyun if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1254*4882a593Smuzhiyun intr |= VPFE_VDINT1;
1255*4882a593Smuzhiyun
1256*4882a593Smuzhiyun vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_CLR);
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun
vpfe_attach_irq(struct vpfe_device * vpfe)1259*4882a593Smuzhiyun static inline void vpfe_attach_irq(struct vpfe_device *vpfe)
1260*4882a593Smuzhiyun {
1261*4882a593Smuzhiyun unsigned int intr = VPFE_VDINT0;
1262*4882a593Smuzhiyun enum ccdc_frmfmt frame_format;
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1265*4882a593Smuzhiyun if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1266*4882a593Smuzhiyun intr |= VPFE_VDINT1;
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_SET);
1269*4882a593Smuzhiyun }
1270*4882a593Smuzhiyun
vpfe_querycap(struct file * file,void * priv,struct v4l2_capability * cap)1271*4882a593Smuzhiyun static int vpfe_querycap(struct file *file, void *priv,
1272*4882a593Smuzhiyun struct v4l2_capability *cap)
1273*4882a593Smuzhiyun {
1274*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun strscpy(cap->driver, VPFE_MODULE_NAME, sizeof(cap->driver));
1277*4882a593Smuzhiyun strscpy(cap->card, "TI AM437x VPFE", sizeof(cap->card));
1278*4882a593Smuzhiyun snprintf(cap->bus_info, sizeof(cap->bus_info),
1279*4882a593Smuzhiyun "platform:%s", vpfe->v4l2_dev.name);
1280*4882a593Smuzhiyun return 0;
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun /* get the format set at output pad of the adjacent subdev */
__subdev_get_format(struct vpfe_device * vpfe,struct v4l2_mbus_framefmt * fmt)1284*4882a593Smuzhiyun static int __subdev_get_format(struct vpfe_device *vpfe,
1285*4882a593Smuzhiyun struct v4l2_mbus_framefmt *fmt)
1286*4882a593Smuzhiyun {
1287*4882a593Smuzhiyun struct v4l2_subdev *sd = vpfe->current_subdev->sd;
1288*4882a593Smuzhiyun struct v4l2_subdev_format sd_fmt;
1289*4882a593Smuzhiyun struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format;
1290*4882a593Smuzhiyun int ret;
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1293*4882a593Smuzhiyun sd_fmt.pad = 0;
1294*4882a593Smuzhiyun
1295*4882a593Smuzhiyun ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sd_fmt);
1296*4882a593Smuzhiyun if (ret)
1297*4882a593Smuzhiyun return ret;
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun *fmt = *mbus_fmt;
1300*4882a593Smuzhiyun
1301*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "%s: %dx%d code:%04X\n", __func__,
1302*4882a593Smuzhiyun fmt->width, fmt->height, fmt->code);
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun return 0;
1305*4882a593Smuzhiyun }
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun /* set the format at output pad of the adjacent subdev */
__subdev_set_format(struct vpfe_device * vpfe,struct v4l2_mbus_framefmt * fmt)1308*4882a593Smuzhiyun static int __subdev_set_format(struct vpfe_device *vpfe,
1309*4882a593Smuzhiyun struct v4l2_mbus_framefmt *fmt)
1310*4882a593Smuzhiyun {
1311*4882a593Smuzhiyun struct v4l2_subdev *sd = vpfe->current_subdev->sd;
1312*4882a593Smuzhiyun struct v4l2_subdev_format sd_fmt;
1313*4882a593Smuzhiyun struct v4l2_mbus_framefmt *mbus_fmt = &sd_fmt.format;
1314*4882a593Smuzhiyun int ret;
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1317*4882a593Smuzhiyun sd_fmt.pad = 0;
1318*4882a593Smuzhiyun *mbus_fmt = *fmt;
1319*4882a593Smuzhiyun
1320*4882a593Smuzhiyun ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sd_fmt);
1321*4882a593Smuzhiyun if (ret)
1322*4882a593Smuzhiyun return ret;
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "%s %dx%d code:%04X\n", __func__,
1325*4882a593Smuzhiyun fmt->width, fmt->height, fmt->code);
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun return 0;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun
vpfe_calc_format_size(struct vpfe_device * vpfe,const struct vpfe_fmt * fmt,struct v4l2_format * f)1330*4882a593Smuzhiyun static int vpfe_calc_format_size(struct vpfe_device *vpfe,
1331*4882a593Smuzhiyun const struct vpfe_fmt *fmt,
1332*4882a593Smuzhiyun struct v4l2_format *f)
1333*4882a593Smuzhiyun {
1334*4882a593Smuzhiyun u32 bpp;
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun if (!fmt) {
1337*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "No vpfe_fmt provided!\n");
1338*4882a593Smuzhiyun return -EINVAL;
1339*4882a593Smuzhiyun }
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun bpp = __get_bytesperpixel(vpfe, fmt);
1342*4882a593Smuzhiyun
1343*4882a593Smuzhiyun /* pitch should be 32 bytes aligned */
1344*4882a593Smuzhiyun f->fmt.pix.bytesperline = ALIGN(f->fmt.pix.width * bpp, 32);
1345*4882a593Smuzhiyun f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
1346*4882a593Smuzhiyun f->fmt.pix.height;
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "%s: fourcc: %s size: %dx%d bpl:%d img_size:%d\n",
1349*4882a593Smuzhiyun __func__, print_fourcc(f->fmt.pix.pixelformat),
1350*4882a593Smuzhiyun f->fmt.pix.width, f->fmt.pix.height,
1351*4882a593Smuzhiyun f->fmt.pix.bytesperline, f->fmt.pix.sizeimage);
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun return 0;
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun
vpfe_g_fmt(struct file * file,void * priv,struct v4l2_format * fmt)1356*4882a593Smuzhiyun static int vpfe_g_fmt(struct file *file, void *priv,
1357*4882a593Smuzhiyun struct v4l2_format *fmt)
1358*4882a593Smuzhiyun {
1359*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1360*4882a593Smuzhiyun
1361*4882a593Smuzhiyun *fmt = vpfe->fmt;
1362*4882a593Smuzhiyun
1363*4882a593Smuzhiyun return 0;
1364*4882a593Smuzhiyun }
1365*4882a593Smuzhiyun
vpfe_enum_fmt(struct file * file,void * priv,struct v4l2_fmtdesc * f)1366*4882a593Smuzhiyun static int vpfe_enum_fmt(struct file *file, void *priv,
1367*4882a593Smuzhiyun struct v4l2_fmtdesc *f)
1368*4882a593Smuzhiyun {
1369*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1370*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1371*4882a593Smuzhiyun struct vpfe_fmt *fmt;
1372*4882a593Smuzhiyun
1373*4882a593Smuzhiyun sdinfo = vpfe->current_subdev;
1374*4882a593Smuzhiyun if (!sdinfo->sd)
1375*4882a593Smuzhiyun return -EINVAL;
1376*4882a593Smuzhiyun
1377*4882a593Smuzhiyun if (f->index >= vpfe->num_active_fmt)
1378*4882a593Smuzhiyun return -EINVAL;
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun fmt = vpfe->active_fmt[f->index];
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun f->pixelformat = fmt->fourcc;
1383*4882a593Smuzhiyun
1384*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "%s: mbus index: %d code: %x pixelformat: %s\n",
1385*4882a593Smuzhiyun __func__, f->index, fmt->code, print_fourcc(fmt->fourcc));
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun return 0;
1388*4882a593Smuzhiyun }
1389*4882a593Smuzhiyun
vpfe_try_fmt(struct file * file,void * priv,struct v4l2_format * f)1390*4882a593Smuzhiyun static int vpfe_try_fmt(struct file *file, void *priv,
1391*4882a593Smuzhiyun struct v4l2_format *f)
1392*4882a593Smuzhiyun {
1393*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1394*4882a593Smuzhiyun struct v4l2_subdev *sd = vpfe->current_subdev->sd;
1395*4882a593Smuzhiyun const struct vpfe_fmt *fmt;
1396*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum fse;
1397*4882a593Smuzhiyun int ret, found;
1398*4882a593Smuzhiyun
1399*4882a593Smuzhiyun fmt = find_format_by_pix(vpfe, f->fmt.pix.pixelformat);
1400*4882a593Smuzhiyun if (!fmt) {
1401*4882a593Smuzhiyun /* default to first entry */
1402*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "Invalid pixel code: %x, default used instead\n",
1403*4882a593Smuzhiyun f->fmt.pix.pixelformat);
1404*4882a593Smuzhiyun fmt = vpfe->active_fmt[0];
1405*4882a593Smuzhiyun f->fmt.pix.pixelformat = fmt->fourcc;
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun f->fmt.pix.field = vpfe->fmt.fmt.pix.field;
1409*4882a593Smuzhiyun
1410*4882a593Smuzhiyun /* check for/find a valid width/height */
1411*4882a593Smuzhiyun ret = 0;
1412*4882a593Smuzhiyun found = false;
1413*4882a593Smuzhiyun fse.pad = 0;
1414*4882a593Smuzhiyun fse.code = fmt->code;
1415*4882a593Smuzhiyun fse.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1416*4882a593Smuzhiyun for (fse.index = 0; ; fse.index++) {
1417*4882a593Smuzhiyun ret = v4l2_subdev_call(sd, pad, enum_frame_size,
1418*4882a593Smuzhiyun NULL, &fse);
1419*4882a593Smuzhiyun if (ret)
1420*4882a593Smuzhiyun break;
1421*4882a593Smuzhiyun
1422*4882a593Smuzhiyun if (f->fmt.pix.width == fse.max_width &&
1423*4882a593Smuzhiyun f->fmt.pix.height == fse.max_height) {
1424*4882a593Smuzhiyun found = true;
1425*4882a593Smuzhiyun break;
1426*4882a593Smuzhiyun } else if (f->fmt.pix.width >= fse.min_width &&
1427*4882a593Smuzhiyun f->fmt.pix.width <= fse.max_width &&
1428*4882a593Smuzhiyun f->fmt.pix.height >= fse.min_height &&
1429*4882a593Smuzhiyun f->fmt.pix.height <= fse.max_height) {
1430*4882a593Smuzhiyun found = true;
1431*4882a593Smuzhiyun break;
1432*4882a593Smuzhiyun }
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun
1435*4882a593Smuzhiyun if (!found) {
1436*4882a593Smuzhiyun /* use existing values as default */
1437*4882a593Smuzhiyun f->fmt.pix.width = vpfe->fmt.fmt.pix.width;
1438*4882a593Smuzhiyun f->fmt.pix.height = vpfe->fmt.fmt.pix.height;
1439*4882a593Smuzhiyun }
1440*4882a593Smuzhiyun
1441*4882a593Smuzhiyun /*
1442*4882a593Smuzhiyun * Use current colorspace for now, it will get
1443*4882a593Smuzhiyun * updated properly during s_fmt
1444*4882a593Smuzhiyun */
1445*4882a593Smuzhiyun f->fmt.pix.colorspace = vpfe->fmt.fmt.pix.colorspace;
1446*4882a593Smuzhiyun return vpfe_calc_format_size(vpfe, fmt, f);
1447*4882a593Smuzhiyun }
1448*4882a593Smuzhiyun
vpfe_s_fmt(struct file * file,void * priv,struct v4l2_format * fmt)1449*4882a593Smuzhiyun static int vpfe_s_fmt(struct file *file, void *priv,
1450*4882a593Smuzhiyun struct v4l2_format *fmt)
1451*4882a593Smuzhiyun {
1452*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1453*4882a593Smuzhiyun struct vpfe_fmt *f;
1454*4882a593Smuzhiyun struct v4l2_mbus_framefmt mbus_fmt;
1455*4882a593Smuzhiyun int ret;
1456*4882a593Smuzhiyun
1457*4882a593Smuzhiyun /* If streaming is started, return error */
1458*4882a593Smuzhiyun if (vb2_is_busy(&vpfe->buffer_queue)) {
1459*4882a593Smuzhiyun vpfe_err(vpfe, "%s device busy\n", __func__);
1460*4882a593Smuzhiyun return -EBUSY;
1461*4882a593Smuzhiyun }
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun ret = vpfe_try_fmt(file, priv, fmt);
1464*4882a593Smuzhiyun if (ret < 0)
1465*4882a593Smuzhiyun return ret;
1466*4882a593Smuzhiyun
1467*4882a593Smuzhiyun f = find_format_by_pix(vpfe, fmt->fmt.pix.pixelformat);
1468*4882a593Smuzhiyun
1469*4882a593Smuzhiyun v4l2_fill_mbus_format(&mbus_fmt, &fmt->fmt.pix, f->code);
1470*4882a593Smuzhiyun
1471*4882a593Smuzhiyun ret = __subdev_set_format(vpfe, &mbus_fmt);
1472*4882a593Smuzhiyun if (ret)
1473*4882a593Smuzhiyun return ret;
1474*4882a593Smuzhiyun
1475*4882a593Smuzhiyun /* Just double check nothing has gone wrong */
1476*4882a593Smuzhiyun if (mbus_fmt.code != f->code) {
1477*4882a593Smuzhiyun vpfe_dbg(3, vpfe,
1478*4882a593Smuzhiyun "%s subdev changed format on us, this should not happen\n",
1479*4882a593Smuzhiyun __func__);
1480*4882a593Smuzhiyun return -EINVAL;
1481*4882a593Smuzhiyun }
1482*4882a593Smuzhiyun
1483*4882a593Smuzhiyun v4l2_fill_pix_format(&vpfe->fmt.fmt.pix, &mbus_fmt);
1484*4882a593Smuzhiyun vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1485*4882a593Smuzhiyun vpfe->fmt.fmt.pix.pixelformat = f->fourcc;
1486*4882a593Smuzhiyun vpfe_calc_format_size(vpfe, f, &vpfe->fmt);
1487*4882a593Smuzhiyun *fmt = vpfe->fmt;
1488*4882a593Smuzhiyun vpfe->current_vpfe_fmt = f;
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun /* Update the crop window based on found values */
1491*4882a593Smuzhiyun vpfe->crop.width = fmt->fmt.pix.width;
1492*4882a593Smuzhiyun vpfe->crop.height = fmt->fmt.pix.height;
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun /* set image capture parameters in the ccdc */
1495*4882a593Smuzhiyun return vpfe_config_ccdc_image_format(vpfe);
1496*4882a593Smuzhiyun }
1497*4882a593Smuzhiyun
vpfe_enum_size(struct file * file,void * priv,struct v4l2_frmsizeenum * fsize)1498*4882a593Smuzhiyun static int vpfe_enum_size(struct file *file, void *priv,
1499*4882a593Smuzhiyun struct v4l2_frmsizeenum *fsize)
1500*4882a593Smuzhiyun {
1501*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1502*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum fse;
1503*4882a593Smuzhiyun struct v4l2_subdev *sd = vpfe->current_subdev->sd;
1504*4882a593Smuzhiyun struct vpfe_fmt *fmt;
1505*4882a593Smuzhiyun int ret;
1506*4882a593Smuzhiyun
1507*4882a593Smuzhiyun /* check for valid format */
1508*4882a593Smuzhiyun fmt = find_format_by_pix(vpfe, fsize->pixel_format);
1509*4882a593Smuzhiyun if (!fmt) {
1510*4882a593Smuzhiyun vpfe_dbg(3, vpfe, "Invalid pixel code: %x\n",
1511*4882a593Smuzhiyun fsize->pixel_format);
1512*4882a593Smuzhiyun return -EINVAL;
1513*4882a593Smuzhiyun }
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun memset(fsize->reserved, 0x0, sizeof(fsize->reserved));
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun memset(&fse, 0x0, sizeof(fse));
1518*4882a593Smuzhiyun fse.index = fsize->index;
1519*4882a593Smuzhiyun fse.pad = 0;
1520*4882a593Smuzhiyun fse.code = fmt->code;
1521*4882a593Smuzhiyun fse.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1522*4882a593Smuzhiyun ret = v4l2_subdev_call(sd, pad, enum_frame_size, NULL, &fse);
1523*4882a593Smuzhiyun if (ret)
1524*4882a593Smuzhiyun return ret;
1525*4882a593Smuzhiyun
1526*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "%s: index: %d code: %x W:[%d,%d] H:[%d,%d]\n",
1527*4882a593Smuzhiyun __func__, fse.index, fse.code, fse.min_width, fse.max_width,
1528*4882a593Smuzhiyun fse.min_height, fse.max_height);
1529*4882a593Smuzhiyun
1530*4882a593Smuzhiyun fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1531*4882a593Smuzhiyun fsize->discrete.width = fse.max_width;
1532*4882a593Smuzhiyun fsize->discrete.height = fse.max_height;
1533*4882a593Smuzhiyun
1534*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "%s: index: %d pixformat: %s size: %dx%d\n",
1535*4882a593Smuzhiyun __func__, fsize->index, print_fourcc(fsize->pixel_format),
1536*4882a593Smuzhiyun fsize->discrete.width, fsize->discrete.height);
1537*4882a593Smuzhiyun
1538*4882a593Smuzhiyun return 0;
1539*4882a593Smuzhiyun }
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun /*
1542*4882a593Smuzhiyun * vpfe_get_subdev_input_index - Get subdev index and subdev input index for a
1543*4882a593Smuzhiyun * given app input index
1544*4882a593Smuzhiyun */
1545*4882a593Smuzhiyun static int
vpfe_get_subdev_input_index(struct vpfe_device * vpfe,int * subdev_index,int * subdev_input_index,int app_input_index)1546*4882a593Smuzhiyun vpfe_get_subdev_input_index(struct vpfe_device *vpfe,
1547*4882a593Smuzhiyun int *subdev_index,
1548*4882a593Smuzhiyun int *subdev_input_index,
1549*4882a593Smuzhiyun int app_input_index)
1550*4882a593Smuzhiyun {
1551*4882a593Smuzhiyun int i, j = 0;
1552*4882a593Smuzhiyun
1553*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
1554*4882a593Smuzhiyun if (app_input_index < (j + 1)) {
1555*4882a593Smuzhiyun *subdev_index = i;
1556*4882a593Smuzhiyun *subdev_input_index = app_input_index - j;
1557*4882a593Smuzhiyun return 0;
1558*4882a593Smuzhiyun }
1559*4882a593Smuzhiyun j++;
1560*4882a593Smuzhiyun }
1561*4882a593Smuzhiyun return -EINVAL;
1562*4882a593Smuzhiyun }
1563*4882a593Smuzhiyun
1564*4882a593Smuzhiyun /*
1565*4882a593Smuzhiyun * vpfe_get_app_input - Get app input index for a given subdev input index
1566*4882a593Smuzhiyun * driver stores the input index of the current sub device and translate it
1567*4882a593Smuzhiyun * when application request the current input
1568*4882a593Smuzhiyun */
vpfe_get_app_input_index(struct vpfe_device * vpfe,int * app_input_index)1569*4882a593Smuzhiyun static int vpfe_get_app_input_index(struct vpfe_device *vpfe,
1570*4882a593Smuzhiyun int *app_input_index)
1571*4882a593Smuzhiyun {
1572*4882a593Smuzhiyun struct vpfe_config *cfg = vpfe->cfg;
1573*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1574*4882a593Smuzhiyun struct i2c_client *client;
1575*4882a593Smuzhiyun struct i2c_client *curr_client;
1576*4882a593Smuzhiyun int i, j = 0;
1577*4882a593Smuzhiyun
1578*4882a593Smuzhiyun curr_client = v4l2_get_subdevdata(vpfe->current_subdev->sd);
1579*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
1580*4882a593Smuzhiyun sdinfo = &cfg->sub_devs[i];
1581*4882a593Smuzhiyun client = v4l2_get_subdevdata(sdinfo->sd);
1582*4882a593Smuzhiyun if (client->addr == curr_client->addr &&
1583*4882a593Smuzhiyun client->adapter->nr == curr_client->adapter->nr) {
1584*4882a593Smuzhiyun if (vpfe->current_input >= 1)
1585*4882a593Smuzhiyun return -1;
1586*4882a593Smuzhiyun *app_input_index = j + vpfe->current_input;
1587*4882a593Smuzhiyun return 0;
1588*4882a593Smuzhiyun }
1589*4882a593Smuzhiyun j++;
1590*4882a593Smuzhiyun }
1591*4882a593Smuzhiyun return -EINVAL;
1592*4882a593Smuzhiyun }
1593*4882a593Smuzhiyun
vpfe_enum_input(struct file * file,void * priv,struct v4l2_input * inp)1594*4882a593Smuzhiyun static int vpfe_enum_input(struct file *file, void *priv,
1595*4882a593Smuzhiyun struct v4l2_input *inp)
1596*4882a593Smuzhiyun {
1597*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1598*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1599*4882a593Smuzhiyun int subdev, index;
1600*4882a593Smuzhiyun
1601*4882a593Smuzhiyun if (vpfe_get_subdev_input_index(vpfe, &subdev, &index,
1602*4882a593Smuzhiyun inp->index) < 0) {
1603*4882a593Smuzhiyun vpfe_dbg(1, vpfe,
1604*4882a593Smuzhiyun "input information not found for the subdev\n");
1605*4882a593Smuzhiyun return -EINVAL;
1606*4882a593Smuzhiyun }
1607*4882a593Smuzhiyun sdinfo = &vpfe->cfg->sub_devs[subdev];
1608*4882a593Smuzhiyun *inp = sdinfo->inputs[index];
1609*4882a593Smuzhiyun
1610*4882a593Smuzhiyun return 0;
1611*4882a593Smuzhiyun }
1612*4882a593Smuzhiyun
vpfe_g_input(struct file * file,void * priv,unsigned int * index)1613*4882a593Smuzhiyun static int vpfe_g_input(struct file *file, void *priv, unsigned int *index)
1614*4882a593Smuzhiyun {
1615*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1616*4882a593Smuzhiyun
1617*4882a593Smuzhiyun return vpfe_get_app_input_index(vpfe, index);
1618*4882a593Smuzhiyun }
1619*4882a593Smuzhiyun
1620*4882a593Smuzhiyun /* Assumes caller is holding vpfe_dev->lock */
vpfe_set_input(struct vpfe_device * vpfe,unsigned int index)1621*4882a593Smuzhiyun static int vpfe_set_input(struct vpfe_device *vpfe, unsigned int index)
1622*4882a593Smuzhiyun {
1623*4882a593Smuzhiyun int subdev_index = 0, inp_index = 0;
1624*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1625*4882a593Smuzhiyun struct vpfe_route *route;
1626*4882a593Smuzhiyun u32 input, output;
1627*4882a593Smuzhiyun int ret;
1628*4882a593Smuzhiyun
1629*4882a593Smuzhiyun /* If streaming is started, return error */
1630*4882a593Smuzhiyun if (vb2_is_busy(&vpfe->buffer_queue)) {
1631*4882a593Smuzhiyun vpfe_err(vpfe, "%s device busy\n", __func__);
1632*4882a593Smuzhiyun return -EBUSY;
1633*4882a593Smuzhiyun }
1634*4882a593Smuzhiyun ret = vpfe_get_subdev_input_index(vpfe,
1635*4882a593Smuzhiyun &subdev_index,
1636*4882a593Smuzhiyun &inp_index,
1637*4882a593Smuzhiyun index);
1638*4882a593Smuzhiyun if (ret < 0) {
1639*4882a593Smuzhiyun vpfe_err(vpfe, "invalid input index: %d\n", index);
1640*4882a593Smuzhiyun goto get_out;
1641*4882a593Smuzhiyun }
1642*4882a593Smuzhiyun
1643*4882a593Smuzhiyun sdinfo = &vpfe->cfg->sub_devs[subdev_index];
1644*4882a593Smuzhiyun sdinfo->sd = vpfe->sd[subdev_index];
1645*4882a593Smuzhiyun route = &sdinfo->routes[inp_index];
1646*4882a593Smuzhiyun if (route && sdinfo->can_route) {
1647*4882a593Smuzhiyun input = route->input;
1648*4882a593Smuzhiyun output = route->output;
1649*4882a593Smuzhiyun if (sdinfo->sd) {
1650*4882a593Smuzhiyun ret = v4l2_subdev_call(sdinfo->sd, video,
1651*4882a593Smuzhiyun s_routing, input, output, 0);
1652*4882a593Smuzhiyun if (ret) {
1653*4882a593Smuzhiyun vpfe_err(vpfe, "s_routing failed\n");
1654*4882a593Smuzhiyun ret = -EINVAL;
1655*4882a593Smuzhiyun goto get_out;
1656*4882a593Smuzhiyun }
1657*4882a593Smuzhiyun }
1658*4882a593Smuzhiyun
1659*4882a593Smuzhiyun }
1660*4882a593Smuzhiyun
1661*4882a593Smuzhiyun vpfe->current_subdev = sdinfo;
1662*4882a593Smuzhiyun if (sdinfo->sd)
1663*4882a593Smuzhiyun vpfe->v4l2_dev.ctrl_handler = sdinfo->sd->ctrl_handler;
1664*4882a593Smuzhiyun vpfe->current_input = index;
1665*4882a593Smuzhiyun vpfe->std_index = 0;
1666*4882a593Smuzhiyun
1667*4882a593Smuzhiyun /* set the bus/interface parameter for the sub device in ccdc */
1668*4882a593Smuzhiyun ret = vpfe_ccdc_set_hw_if_params(&vpfe->ccdc, &sdinfo->vpfe_param);
1669*4882a593Smuzhiyun if (ret)
1670*4882a593Smuzhiyun return ret;
1671*4882a593Smuzhiyun
1672*4882a593Smuzhiyun /* set the default image parameters in the device */
1673*4882a593Smuzhiyun return vpfe_config_image_format(vpfe,
1674*4882a593Smuzhiyun vpfe_standards[vpfe->std_index].std_id);
1675*4882a593Smuzhiyun
1676*4882a593Smuzhiyun get_out:
1677*4882a593Smuzhiyun return ret;
1678*4882a593Smuzhiyun }
1679*4882a593Smuzhiyun
vpfe_s_input(struct file * file,void * priv,unsigned int index)1680*4882a593Smuzhiyun static int vpfe_s_input(struct file *file, void *priv, unsigned int index)
1681*4882a593Smuzhiyun {
1682*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1683*4882a593Smuzhiyun
1684*4882a593Smuzhiyun return vpfe_set_input(vpfe, index);
1685*4882a593Smuzhiyun }
1686*4882a593Smuzhiyun
vpfe_querystd(struct file * file,void * priv,v4l2_std_id * std_id)1687*4882a593Smuzhiyun static int vpfe_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
1688*4882a593Smuzhiyun {
1689*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1690*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1691*4882a593Smuzhiyun
1692*4882a593Smuzhiyun sdinfo = vpfe->current_subdev;
1693*4882a593Smuzhiyun if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1694*4882a593Smuzhiyun return -ENODATA;
1695*4882a593Smuzhiyun
1696*4882a593Smuzhiyun /* Call querystd function of decoder device */
1697*4882a593Smuzhiyun return v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1698*4882a593Smuzhiyun video, querystd, std_id);
1699*4882a593Smuzhiyun }
1700*4882a593Smuzhiyun
vpfe_s_std(struct file * file,void * priv,v4l2_std_id std_id)1701*4882a593Smuzhiyun static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id std_id)
1702*4882a593Smuzhiyun {
1703*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1704*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1705*4882a593Smuzhiyun int ret;
1706*4882a593Smuzhiyun
1707*4882a593Smuzhiyun sdinfo = vpfe->current_subdev;
1708*4882a593Smuzhiyun if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1709*4882a593Smuzhiyun return -ENODATA;
1710*4882a593Smuzhiyun
1711*4882a593Smuzhiyun /* if trying to set the same std then nothing to do */
1712*4882a593Smuzhiyun if (vpfe_standards[vpfe->std_index].std_id == std_id)
1713*4882a593Smuzhiyun return 0;
1714*4882a593Smuzhiyun
1715*4882a593Smuzhiyun /* If streaming is started, return error */
1716*4882a593Smuzhiyun if (vb2_is_busy(&vpfe->buffer_queue)) {
1717*4882a593Smuzhiyun vpfe_err(vpfe, "%s device busy\n", __func__);
1718*4882a593Smuzhiyun ret = -EBUSY;
1719*4882a593Smuzhiyun return ret;
1720*4882a593Smuzhiyun }
1721*4882a593Smuzhiyun
1722*4882a593Smuzhiyun ret = v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1723*4882a593Smuzhiyun video, s_std, std_id);
1724*4882a593Smuzhiyun if (ret < 0) {
1725*4882a593Smuzhiyun vpfe_err(vpfe, "Failed to set standard\n");
1726*4882a593Smuzhiyun return ret;
1727*4882a593Smuzhiyun }
1728*4882a593Smuzhiyun ret = vpfe_config_image_format(vpfe, std_id);
1729*4882a593Smuzhiyun
1730*4882a593Smuzhiyun return ret;
1731*4882a593Smuzhiyun }
1732*4882a593Smuzhiyun
vpfe_g_std(struct file * file,void * priv,v4l2_std_id * std_id)1733*4882a593Smuzhiyun static int vpfe_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
1734*4882a593Smuzhiyun {
1735*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1736*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1737*4882a593Smuzhiyun
1738*4882a593Smuzhiyun sdinfo = vpfe->current_subdev;
1739*4882a593Smuzhiyun if (sdinfo->inputs[0].capabilities != V4L2_IN_CAP_STD)
1740*4882a593Smuzhiyun return -ENODATA;
1741*4882a593Smuzhiyun
1742*4882a593Smuzhiyun *std_id = vpfe_standards[vpfe->std_index].std_id;
1743*4882a593Smuzhiyun
1744*4882a593Smuzhiyun return 0;
1745*4882a593Smuzhiyun }
1746*4882a593Smuzhiyun
1747*4882a593Smuzhiyun /*
1748*4882a593Smuzhiyun * vpfe_calculate_offsets : This function calculates buffers offset
1749*4882a593Smuzhiyun * for top and bottom field
1750*4882a593Smuzhiyun */
vpfe_calculate_offsets(struct vpfe_device * vpfe)1751*4882a593Smuzhiyun static void vpfe_calculate_offsets(struct vpfe_device *vpfe)
1752*4882a593Smuzhiyun {
1753*4882a593Smuzhiyun struct v4l2_rect image_win;
1754*4882a593Smuzhiyun
1755*4882a593Smuzhiyun vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
1756*4882a593Smuzhiyun vpfe->field_off = image_win.height * image_win.width;
1757*4882a593Smuzhiyun }
1758*4882a593Smuzhiyun
1759*4882a593Smuzhiyun /*
1760*4882a593Smuzhiyun * vpfe_queue_setup - Callback function for buffer setup.
1761*4882a593Smuzhiyun * @vq: vb2_queue ptr
1762*4882a593Smuzhiyun * @nbuffers: ptr to number of buffers requested by application
1763*4882a593Smuzhiyun * @nplanes:: contains number of distinct video planes needed to hold a frame
1764*4882a593Smuzhiyun * @sizes[]: contains the size (in bytes) of each plane.
1765*4882a593Smuzhiyun * @alloc_devs: ptr to allocation context
1766*4882a593Smuzhiyun *
1767*4882a593Smuzhiyun * This callback function is called when reqbuf() is called to adjust
1768*4882a593Smuzhiyun * the buffer count and buffer size
1769*4882a593Smuzhiyun */
vpfe_queue_setup(struct vb2_queue * vq,unsigned int * nbuffers,unsigned int * nplanes,unsigned int sizes[],struct device * alloc_devs[])1770*4882a593Smuzhiyun static int vpfe_queue_setup(struct vb2_queue *vq,
1771*4882a593Smuzhiyun unsigned int *nbuffers, unsigned int *nplanes,
1772*4882a593Smuzhiyun unsigned int sizes[], struct device *alloc_devs[])
1773*4882a593Smuzhiyun {
1774*4882a593Smuzhiyun struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1775*4882a593Smuzhiyun unsigned size = vpfe->fmt.fmt.pix.sizeimage;
1776*4882a593Smuzhiyun
1777*4882a593Smuzhiyun if (vq->num_buffers + *nbuffers < 3)
1778*4882a593Smuzhiyun *nbuffers = 3 - vq->num_buffers;
1779*4882a593Smuzhiyun
1780*4882a593Smuzhiyun if (*nplanes) {
1781*4882a593Smuzhiyun if (sizes[0] < size)
1782*4882a593Smuzhiyun return -EINVAL;
1783*4882a593Smuzhiyun size = sizes[0];
1784*4882a593Smuzhiyun }
1785*4882a593Smuzhiyun
1786*4882a593Smuzhiyun *nplanes = 1;
1787*4882a593Smuzhiyun sizes[0] = size;
1788*4882a593Smuzhiyun
1789*4882a593Smuzhiyun vpfe_dbg(1, vpfe,
1790*4882a593Smuzhiyun "nbuffers=%d, size=%u\n", *nbuffers, sizes[0]);
1791*4882a593Smuzhiyun
1792*4882a593Smuzhiyun /* Calculate field offset */
1793*4882a593Smuzhiyun vpfe_calculate_offsets(vpfe);
1794*4882a593Smuzhiyun
1795*4882a593Smuzhiyun return 0;
1796*4882a593Smuzhiyun }
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun /*
1799*4882a593Smuzhiyun * vpfe_buffer_prepare : callback function for buffer prepare
1800*4882a593Smuzhiyun * @vb: ptr to vb2_buffer
1801*4882a593Smuzhiyun *
1802*4882a593Smuzhiyun * This is the callback function for buffer prepare when vb2_qbuf()
1803*4882a593Smuzhiyun * function is called. The buffer is prepared and user space virtual address
1804*4882a593Smuzhiyun * or user address is converted into physical address
1805*4882a593Smuzhiyun */
vpfe_buffer_prepare(struct vb2_buffer * vb)1806*4882a593Smuzhiyun static int vpfe_buffer_prepare(struct vb2_buffer *vb)
1807*4882a593Smuzhiyun {
1808*4882a593Smuzhiyun struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1809*4882a593Smuzhiyun struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
1810*4882a593Smuzhiyun
1811*4882a593Smuzhiyun vb2_set_plane_payload(vb, 0, vpfe->fmt.fmt.pix.sizeimage);
1812*4882a593Smuzhiyun
1813*4882a593Smuzhiyun if (vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0))
1814*4882a593Smuzhiyun return -EINVAL;
1815*4882a593Smuzhiyun
1816*4882a593Smuzhiyun vbuf->field = vpfe->fmt.fmt.pix.field;
1817*4882a593Smuzhiyun
1818*4882a593Smuzhiyun return 0;
1819*4882a593Smuzhiyun }
1820*4882a593Smuzhiyun
1821*4882a593Smuzhiyun /*
1822*4882a593Smuzhiyun * vpfe_buffer_queue : Callback function to add buffer to DMA queue
1823*4882a593Smuzhiyun * @vb: ptr to vb2_buffer
1824*4882a593Smuzhiyun */
vpfe_buffer_queue(struct vb2_buffer * vb)1825*4882a593Smuzhiyun static void vpfe_buffer_queue(struct vb2_buffer *vb)
1826*4882a593Smuzhiyun {
1827*4882a593Smuzhiyun struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
1828*4882a593Smuzhiyun struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
1829*4882a593Smuzhiyun struct vpfe_cap_buffer *buf = to_vpfe_buffer(vbuf);
1830*4882a593Smuzhiyun unsigned long flags = 0;
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun /* add the buffer to the DMA queue */
1833*4882a593Smuzhiyun spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1834*4882a593Smuzhiyun list_add_tail(&buf->list, &vpfe->dma_queue);
1835*4882a593Smuzhiyun spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1836*4882a593Smuzhiyun }
1837*4882a593Smuzhiyun
vpfe_return_all_buffers(struct vpfe_device * vpfe,enum vb2_buffer_state state)1838*4882a593Smuzhiyun static void vpfe_return_all_buffers(struct vpfe_device *vpfe,
1839*4882a593Smuzhiyun enum vb2_buffer_state state)
1840*4882a593Smuzhiyun {
1841*4882a593Smuzhiyun struct vpfe_cap_buffer *buf, *node;
1842*4882a593Smuzhiyun unsigned long flags;
1843*4882a593Smuzhiyun
1844*4882a593Smuzhiyun spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1845*4882a593Smuzhiyun list_for_each_entry_safe(buf, node, &vpfe->dma_queue, list) {
1846*4882a593Smuzhiyun vb2_buffer_done(&buf->vb.vb2_buf, state);
1847*4882a593Smuzhiyun list_del(&buf->list);
1848*4882a593Smuzhiyun }
1849*4882a593Smuzhiyun
1850*4882a593Smuzhiyun if (vpfe->cur_frm)
1851*4882a593Smuzhiyun vb2_buffer_done(&vpfe->cur_frm->vb.vb2_buf, state);
1852*4882a593Smuzhiyun
1853*4882a593Smuzhiyun if (vpfe->next_frm && vpfe->next_frm != vpfe->cur_frm)
1854*4882a593Smuzhiyun vb2_buffer_done(&vpfe->next_frm->vb.vb2_buf, state);
1855*4882a593Smuzhiyun
1856*4882a593Smuzhiyun vpfe->cur_frm = NULL;
1857*4882a593Smuzhiyun vpfe->next_frm = NULL;
1858*4882a593Smuzhiyun spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1859*4882a593Smuzhiyun }
1860*4882a593Smuzhiyun
1861*4882a593Smuzhiyun /*
1862*4882a593Smuzhiyun * vpfe_start_streaming : Starts the DMA engine for streaming
1863*4882a593Smuzhiyun * @vb: ptr to vb2_buffer
1864*4882a593Smuzhiyun * @count: number of buffers
1865*4882a593Smuzhiyun */
vpfe_start_streaming(struct vb2_queue * vq,unsigned int count)1866*4882a593Smuzhiyun static int vpfe_start_streaming(struct vb2_queue *vq, unsigned int count)
1867*4882a593Smuzhiyun {
1868*4882a593Smuzhiyun struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1869*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1870*4882a593Smuzhiyun unsigned long flags;
1871*4882a593Smuzhiyun unsigned long addr;
1872*4882a593Smuzhiyun int ret;
1873*4882a593Smuzhiyun
1874*4882a593Smuzhiyun spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1875*4882a593Smuzhiyun
1876*4882a593Smuzhiyun vpfe->field = 0;
1877*4882a593Smuzhiyun vpfe->sequence = 0;
1878*4882a593Smuzhiyun
1879*4882a593Smuzhiyun sdinfo = vpfe->current_subdev;
1880*4882a593Smuzhiyun
1881*4882a593Smuzhiyun vpfe_attach_irq(vpfe);
1882*4882a593Smuzhiyun
1883*4882a593Smuzhiyun vpfe->stopping = false;
1884*4882a593Smuzhiyun init_completion(&vpfe->capture_stop);
1885*4882a593Smuzhiyun
1886*4882a593Smuzhiyun if (vpfe->ccdc.ccdc_cfg.if_type == VPFE_RAW_BAYER)
1887*4882a593Smuzhiyun vpfe_ccdc_config_raw(&vpfe->ccdc);
1888*4882a593Smuzhiyun else
1889*4882a593Smuzhiyun vpfe_ccdc_config_ycbcr(&vpfe->ccdc);
1890*4882a593Smuzhiyun
1891*4882a593Smuzhiyun /* Get the next frame from the buffer queue */
1892*4882a593Smuzhiyun vpfe->next_frm = list_entry(vpfe->dma_queue.next,
1893*4882a593Smuzhiyun struct vpfe_cap_buffer, list);
1894*4882a593Smuzhiyun vpfe->cur_frm = vpfe->next_frm;
1895*4882a593Smuzhiyun /* Remove buffer from the buffer queue */
1896*4882a593Smuzhiyun list_del(&vpfe->cur_frm->list);
1897*4882a593Smuzhiyun spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1898*4882a593Smuzhiyun
1899*4882a593Smuzhiyun addr = vb2_dma_contig_plane_dma_addr(&vpfe->cur_frm->vb.vb2_buf, 0);
1900*4882a593Smuzhiyun
1901*4882a593Smuzhiyun vpfe_set_sdr_addr(&vpfe->ccdc, (unsigned long)(addr));
1902*4882a593Smuzhiyun
1903*4882a593Smuzhiyun vpfe_pcr_enable(&vpfe->ccdc, 1);
1904*4882a593Smuzhiyun
1905*4882a593Smuzhiyun ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 1);
1906*4882a593Smuzhiyun if (ret < 0) {
1907*4882a593Smuzhiyun vpfe_err(vpfe, "Error in attaching interrupt handle\n");
1908*4882a593Smuzhiyun goto err;
1909*4882a593Smuzhiyun }
1910*4882a593Smuzhiyun
1911*4882a593Smuzhiyun return 0;
1912*4882a593Smuzhiyun
1913*4882a593Smuzhiyun err:
1914*4882a593Smuzhiyun vpfe_return_all_buffers(vpfe, VB2_BUF_STATE_QUEUED);
1915*4882a593Smuzhiyun vpfe_pcr_enable(&vpfe->ccdc, 0);
1916*4882a593Smuzhiyun return ret;
1917*4882a593Smuzhiyun }
1918*4882a593Smuzhiyun
1919*4882a593Smuzhiyun /*
1920*4882a593Smuzhiyun * vpfe_stop_streaming : Stop the DMA engine
1921*4882a593Smuzhiyun * @vq: ptr to vb2_queue
1922*4882a593Smuzhiyun *
1923*4882a593Smuzhiyun * This callback stops the DMA engine and any remaining buffers
1924*4882a593Smuzhiyun * in the DMA queue are released.
1925*4882a593Smuzhiyun */
vpfe_stop_streaming(struct vb2_queue * vq)1926*4882a593Smuzhiyun static void vpfe_stop_streaming(struct vb2_queue *vq)
1927*4882a593Smuzhiyun {
1928*4882a593Smuzhiyun struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1929*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
1930*4882a593Smuzhiyun int ret;
1931*4882a593Smuzhiyun
1932*4882a593Smuzhiyun vpfe_pcr_enable(&vpfe->ccdc, 0);
1933*4882a593Smuzhiyun
1934*4882a593Smuzhiyun /* Wait for the last frame to be captured */
1935*4882a593Smuzhiyun vpfe->stopping = true;
1936*4882a593Smuzhiyun wait_for_completion_timeout(&vpfe->capture_stop,
1937*4882a593Smuzhiyun msecs_to_jiffies(250));
1938*4882a593Smuzhiyun
1939*4882a593Smuzhiyun vpfe_detach_irq(vpfe);
1940*4882a593Smuzhiyun
1941*4882a593Smuzhiyun sdinfo = vpfe->current_subdev;
1942*4882a593Smuzhiyun ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 0);
1943*4882a593Smuzhiyun if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1944*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "stream off failed in subdev\n");
1945*4882a593Smuzhiyun
1946*4882a593Smuzhiyun /* release all active buffers */
1947*4882a593Smuzhiyun vpfe_return_all_buffers(vpfe, VB2_BUF_STATE_ERROR);
1948*4882a593Smuzhiyun }
1949*4882a593Smuzhiyun
vpfe_g_pixelaspect(struct file * file,void * priv,int type,struct v4l2_fract * f)1950*4882a593Smuzhiyun static int vpfe_g_pixelaspect(struct file *file, void *priv,
1951*4882a593Smuzhiyun int type, struct v4l2_fract *f)
1952*4882a593Smuzhiyun {
1953*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1954*4882a593Smuzhiyun
1955*4882a593Smuzhiyun if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1956*4882a593Smuzhiyun vpfe->std_index >= ARRAY_SIZE(vpfe_standards))
1957*4882a593Smuzhiyun return -EINVAL;
1958*4882a593Smuzhiyun
1959*4882a593Smuzhiyun *f = vpfe_standards[vpfe->std_index].pixelaspect;
1960*4882a593Smuzhiyun
1961*4882a593Smuzhiyun return 0;
1962*4882a593Smuzhiyun }
1963*4882a593Smuzhiyun
1964*4882a593Smuzhiyun static int
vpfe_g_selection(struct file * file,void * fh,struct v4l2_selection * s)1965*4882a593Smuzhiyun vpfe_g_selection(struct file *file, void *fh, struct v4l2_selection *s)
1966*4882a593Smuzhiyun {
1967*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1968*4882a593Smuzhiyun
1969*4882a593Smuzhiyun if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1970*4882a593Smuzhiyun vpfe->std_index >= ARRAY_SIZE(vpfe_standards))
1971*4882a593Smuzhiyun return -EINVAL;
1972*4882a593Smuzhiyun
1973*4882a593Smuzhiyun switch (s->target) {
1974*4882a593Smuzhiyun case V4L2_SEL_TGT_CROP_BOUNDS:
1975*4882a593Smuzhiyun case V4L2_SEL_TGT_CROP_DEFAULT:
1976*4882a593Smuzhiyun s->r.left = 0;
1977*4882a593Smuzhiyun s->r.top = 0;
1978*4882a593Smuzhiyun s->r.width = vpfe_standards[vpfe->std_index].width;
1979*4882a593Smuzhiyun s->r.height = vpfe_standards[vpfe->std_index].height;
1980*4882a593Smuzhiyun break;
1981*4882a593Smuzhiyun
1982*4882a593Smuzhiyun case V4L2_SEL_TGT_CROP:
1983*4882a593Smuzhiyun s->r = vpfe->crop;
1984*4882a593Smuzhiyun break;
1985*4882a593Smuzhiyun
1986*4882a593Smuzhiyun default:
1987*4882a593Smuzhiyun return -EINVAL;
1988*4882a593Smuzhiyun }
1989*4882a593Smuzhiyun
1990*4882a593Smuzhiyun return 0;
1991*4882a593Smuzhiyun }
1992*4882a593Smuzhiyun
1993*4882a593Smuzhiyun static int
vpfe_s_selection(struct file * file,void * fh,struct v4l2_selection * s)1994*4882a593Smuzhiyun vpfe_s_selection(struct file *file, void *fh, struct v4l2_selection *s)
1995*4882a593Smuzhiyun {
1996*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
1997*4882a593Smuzhiyun struct v4l2_rect cr = vpfe->crop;
1998*4882a593Smuzhiyun struct v4l2_rect r = s->r;
1999*4882a593Smuzhiyun u32 bpp;
2000*4882a593Smuzhiyun
2001*4882a593Smuzhiyun /* If streaming is started, return error */
2002*4882a593Smuzhiyun if (vb2_is_busy(&vpfe->buffer_queue)) {
2003*4882a593Smuzhiyun vpfe_err(vpfe, "%s device busy\n", __func__);
2004*4882a593Smuzhiyun return -EBUSY;
2005*4882a593Smuzhiyun }
2006*4882a593Smuzhiyun
2007*4882a593Smuzhiyun if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
2008*4882a593Smuzhiyun s->target != V4L2_SEL_TGT_CROP)
2009*4882a593Smuzhiyun return -EINVAL;
2010*4882a593Smuzhiyun
2011*4882a593Smuzhiyun v4l_bound_align_image(&r.width, 0, cr.width, 0,
2012*4882a593Smuzhiyun &r.height, 0, cr.height, 0, 0);
2013*4882a593Smuzhiyun
2014*4882a593Smuzhiyun r.left = clamp_t(unsigned int, r.left, 0, cr.width - r.width);
2015*4882a593Smuzhiyun r.top = clamp_t(unsigned int, r.top, 0, cr.height - r.height);
2016*4882a593Smuzhiyun
2017*4882a593Smuzhiyun if (s->flags & V4L2_SEL_FLAG_LE && !v4l2_rect_enclosed(&r, &s->r))
2018*4882a593Smuzhiyun return -ERANGE;
2019*4882a593Smuzhiyun
2020*4882a593Smuzhiyun if (s->flags & V4L2_SEL_FLAG_GE && !v4l2_rect_enclosed(&s->r, &r))
2021*4882a593Smuzhiyun return -ERANGE;
2022*4882a593Smuzhiyun
2023*4882a593Smuzhiyun s->r = vpfe->crop = r;
2024*4882a593Smuzhiyun
2025*4882a593Smuzhiyun bpp = __get_bytesperpixel(vpfe, vpfe->current_vpfe_fmt);
2026*4882a593Smuzhiyun vpfe_ccdc_set_image_window(&vpfe->ccdc, &r, bpp);
2027*4882a593Smuzhiyun vpfe->fmt.fmt.pix.width = r.width;
2028*4882a593Smuzhiyun vpfe->fmt.fmt.pix.height = r.height;
2029*4882a593Smuzhiyun vpfe->fmt.fmt.pix.bytesperline =
2030*4882a593Smuzhiyun vpfe_ccdc_get_line_length(&vpfe->ccdc);
2031*4882a593Smuzhiyun vpfe->fmt.fmt.pix.sizeimage = vpfe->fmt.fmt.pix.bytesperline *
2032*4882a593Smuzhiyun vpfe->fmt.fmt.pix.height;
2033*4882a593Smuzhiyun
2034*4882a593Smuzhiyun vpfe_dbg(1, vpfe, "cropped (%d,%d)/%dx%d of %dx%d\n",
2035*4882a593Smuzhiyun r.left, r.top, r.width, r.height, cr.width, cr.height);
2036*4882a593Smuzhiyun
2037*4882a593Smuzhiyun return 0;
2038*4882a593Smuzhiyun }
2039*4882a593Smuzhiyun
vpfe_ioctl_default(struct file * file,void * priv,bool valid_prio,unsigned int cmd,void * param)2040*4882a593Smuzhiyun static long vpfe_ioctl_default(struct file *file, void *priv,
2041*4882a593Smuzhiyun bool valid_prio, unsigned int cmd, void *param)
2042*4882a593Smuzhiyun {
2043*4882a593Smuzhiyun struct vpfe_device *vpfe = video_drvdata(file);
2044*4882a593Smuzhiyun int ret;
2045*4882a593Smuzhiyun
2046*4882a593Smuzhiyun if (!valid_prio) {
2047*4882a593Smuzhiyun vpfe_err(vpfe, "%s device busy\n", __func__);
2048*4882a593Smuzhiyun return -EBUSY;
2049*4882a593Smuzhiyun }
2050*4882a593Smuzhiyun
2051*4882a593Smuzhiyun /* If streaming is started, return error */
2052*4882a593Smuzhiyun if (vb2_is_busy(&vpfe->buffer_queue)) {
2053*4882a593Smuzhiyun vpfe_err(vpfe, "%s device busy\n", __func__);
2054*4882a593Smuzhiyun return -EBUSY;
2055*4882a593Smuzhiyun }
2056*4882a593Smuzhiyun
2057*4882a593Smuzhiyun switch (cmd) {
2058*4882a593Smuzhiyun case VIDIOC_AM437X_CCDC_CFG:
2059*4882a593Smuzhiyun ret = vpfe_ccdc_set_params(&vpfe->ccdc, (void __user *)param);
2060*4882a593Smuzhiyun if (ret) {
2061*4882a593Smuzhiyun vpfe_dbg(2, vpfe,
2062*4882a593Smuzhiyun "Error setting parameters in CCDC\n");
2063*4882a593Smuzhiyun return ret;
2064*4882a593Smuzhiyun }
2065*4882a593Smuzhiyun ret = vpfe_get_ccdc_image_format(vpfe,
2066*4882a593Smuzhiyun &vpfe->fmt);
2067*4882a593Smuzhiyun if (ret < 0) {
2068*4882a593Smuzhiyun vpfe_dbg(2, vpfe,
2069*4882a593Smuzhiyun "Invalid image format at CCDC\n");
2070*4882a593Smuzhiyun return ret;
2071*4882a593Smuzhiyun }
2072*4882a593Smuzhiyun break;
2073*4882a593Smuzhiyun
2074*4882a593Smuzhiyun default:
2075*4882a593Smuzhiyun ret = -ENOTTY;
2076*4882a593Smuzhiyun break;
2077*4882a593Smuzhiyun }
2078*4882a593Smuzhiyun
2079*4882a593Smuzhiyun return ret;
2080*4882a593Smuzhiyun }
2081*4882a593Smuzhiyun
2082*4882a593Smuzhiyun static const struct vb2_ops vpfe_video_qops = {
2083*4882a593Smuzhiyun .wait_prepare = vb2_ops_wait_prepare,
2084*4882a593Smuzhiyun .wait_finish = vb2_ops_wait_finish,
2085*4882a593Smuzhiyun .queue_setup = vpfe_queue_setup,
2086*4882a593Smuzhiyun .buf_prepare = vpfe_buffer_prepare,
2087*4882a593Smuzhiyun .buf_queue = vpfe_buffer_queue,
2088*4882a593Smuzhiyun .start_streaming = vpfe_start_streaming,
2089*4882a593Smuzhiyun .stop_streaming = vpfe_stop_streaming,
2090*4882a593Smuzhiyun };
2091*4882a593Smuzhiyun
2092*4882a593Smuzhiyun /* vpfe capture driver file operations */
2093*4882a593Smuzhiyun static const struct v4l2_file_operations vpfe_fops = {
2094*4882a593Smuzhiyun .owner = THIS_MODULE,
2095*4882a593Smuzhiyun .open = vpfe_open,
2096*4882a593Smuzhiyun .release = vpfe_release,
2097*4882a593Smuzhiyun .read = vb2_fop_read,
2098*4882a593Smuzhiyun .poll = vb2_fop_poll,
2099*4882a593Smuzhiyun .unlocked_ioctl = video_ioctl2,
2100*4882a593Smuzhiyun .mmap = vb2_fop_mmap,
2101*4882a593Smuzhiyun };
2102*4882a593Smuzhiyun
2103*4882a593Smuzhiyun /* vpfe capture ioctl operations */
2104*4882a593Smuzhiyun static const struct v4l2_ioctl_ops vpfe_ioctl_ops = {
2105*4882a593Smuzhiyun .vidioc_querycap = vpfe_querycap,
2106*4882a593Smuzhiyun .vidioc_enum_fmt_vid_cap = vpfe_enum_fmt,
2107*4882a593Smuzhiyun .vidioc_g_fmt_vid_cap = vpfe_g_fmt,
2108*4882a593Smuzhiyun .vidioc_s_fmt_vid_cap = vpfe_s_fmt,
2109*4882a593Smuzhiyun .vidioc_try_fmt_vid_cap = vpfe_try_fmt,
2110*4882a593Smuzhiyun
2111*4882a593Smuzhiyun .vidioc_enum_framesizes = vpfe_enum_size,
2112*4882a593Smuzhiyun
2113*4882a593Smuzhiyun .vidioc_enum_input = vpfe_enum_input,
2114*4882a593Smuzhiyun .vidioc_g_input = vpfe_g_input,
2115*4882a593Smuzhiyun .vidioc_s_input = vpfe_s_input,
2116*4882a593Smuzhiyun
2117*4882a593Smuzhiyun .vidioc_querystd = vpfe_querystd,
2118*4882a593Smuzhiyun .vidioc_s_std = vpfe_s_std,
2119*4882a593Smuzhiyun .vidioc_g_std = vpfe_g_std,
2120*4882a593Smuzhiyun
2121*4882a593Smuzhiyun .vidioc_reqbufs = vb2_ioctl_reqbufs,
2122*4882a593Smuzhiyun .vidioc_create_bufs = vb2_ioctl_create_bufs,
2123*4882a593Smuzhiyun .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
2124*4882a593Smuzhiyun .vidioc_querybuf = vb2_ioctl_querybuf,
2125*4882a593Smuzhiyun .vidioc_qbuf = vb2_ioctl_qbuf,
2126*4882a593Smuzhiyun .vidioc_dqbuf = vb2_ioctl_dqbuf,
2127*4882a593Smuzhiyun .vidioc_expbuf = vb2_ioctl_expbuf,
2128*4882a593Smuzhiyun .vidioc_streamon = vb2_ioctl_streamon,
2129*4882a593Smuzhiyun .vidioc_streamoff = vb2_ioctl_streamoff,
2130*4882a593Smuzhiyun
2131*4882a593Smuzhiyun .vidioc_log_status = v4l2_ctrl_log_status,
2132*4882a593Smuzhiyun .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
2133*4882a593Smuzhiyun .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
2134*4882a593Smuzhiyun
2135*4882a593Smuzhiyun .vidioc_g_pixelaspect = vpfe_g_pixelaspect,
2136*4882a593Smuzhiyun .vidioc_g_selection = vpfe_g_selection,
2137*4882a593Smuzhiyun .vidioc_s_selection = vpfe_s_selection,
2138*4882a593Smuzhiyun
2139*4882a593Smuzhiyun .vidioc_default = vpfe_ioctl_default,
2140*4882a593Smuzhiyun };
2141*4882a593Smuzhiyun
2142*4882a593Smuzhiyun static int
vpfe_async_bound(struct v4l2_async_notifier * notifier,struct v4l2_subdev * subdev,struct v4l2_async_subdev * asd)2143*4882a593Smuzhiyun vpfe_async_bound(struct v4l2_async_notifier *notifier,
2144*4882a593Smuzhiyun struct v4l2_subdev *subdev,
2145*4882a593Smuzhiyun struct v4l2_async_subdev *asd)
2146*4882a593Smuzhiyun {
2147*4882a593Smuzhiyun struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2148*4882a593Smuzhiyun struct vpfe_device, v4l2_dev);
2149*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum mbus_code;
2150*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
2151*4882a593Smuzhiyun struct vpfe_fmt *fmt;
2152*4882a593Smuzhiyun int ret = 0;
2153*4882a593Smuzhiyun bool found = false;
2154*4882a593Smuzhiyun int i, j, k;
2155*4882a593Smuzhiyun
2156*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
2157*4882a593Smuzhiyun if (vpfe->cfg->asd[i]->match.fwnode ==
2158*4882a593Smuzhiyun asd[i].match.fwnode) {
2159*4882a593Smuzhiyun sdinfo = &vpfe->cfg->sub_devs[i];
2160*4882a593Smuzhiyun vpfe->sd[i] = subdev;
2161*4882a593Smuzhiyun vpfe->sd[i]->grp_id = sdinfo->grp_id;
2162*4882a593Smuzhiyun found = true;
2163*4882a593Smuzhiyun break;
2164*4882a593Smuzhiyun }
2165*4882a593Smuzhiyun }
2166*4882a593Smuzhiyun
2167*4882a593Smuzhiyun if (!found) {
2168*4882a593Smuzhiyun vpfe_info(vpfe, "sub device (%s) not matched\n", subdev->name);
2169*4882a593Smuzhiyun return -EINVAL;
2170*4882a593Smuzhiyun }
2171*4882a593Smuzhiyun
2172*4882a593Smuzhiyun vpfe->video_dev.tvnorms |= sdinfo->inputs[0].std;
2173*4882a593Smuzhiyun
2174*4882a593Smuzhiyun vpfe->num_active_fmt = 0;
2175*4882a593Smuzhiyun for (j = 0, i = 0; (ret != -EINVAL); ++j) {
2176*4882a593Smuzhiyun memset(&mbus_code, 0, sizeof(mbus_code));
2177*4882a593Smuzhiyun mbus_code.index = j;
2178*4882a593Smuzhiyun mbus_code.which = V4L2_SUBDEV_FORMAT_ACTIVE;
2179*4882a593Smuzhiyun ret = v4l2_subdev_call(subdev, pad, enum_mbus_code,
2180*4882a593Smuzhiyun NULL, &mbus_code);
2181*4882a593Smuzhiyun if (ret)
2182*4882a593Smuzhiyun continue;
2183*4882a593Smuzhiyun
2184*4882a593Smuzhiyun vpfe_dbg(3, vpfe,
2185*4882a593Smuzhiyun "subdev %s: code: %04x idx: %d\n",
2186*4882a593Smuzhiyun subdev->name, mbus_code.code, j);
2187*4882a593Smuzhiyun
2188*4882a593Smuzhiyun for (k = 0; k < ARRAY_SIZE(formats); k++) {
2189*4882a593Smuzhiyun fmt = &formats[k];
2190*4882a593Smuzhiyun if (mbus_code.code != fmt->code)
2191*4882a593Smuzhiyun continue;
2192*4882a593Smuzhiyun vpfe->active_fmt[i] = fmt;
2193*4882a593Smuzhiyun vpfe_dbg(3, vpfe,
2194*4882a593Smuzhiyun "matched fourcc: %s code: %04x idx: %d\n",
2195*4882a593Smuzhiyun print_fourcc(fmt->fourcc), mbus_code.code, i);
2196*4882a593Smuzhiyun vpfe->num_active_fmt = ++i;
2197*4882a593Smuzhiyun }
2198*4882a593Smuzhiyun }
2199*4882a593Smuzhiyun
2200*4882a593Smuzhiyun if (!i) {
2201*4882a593Smuzhiyun vpfe_err(vpfe, "No suitable format reported by subdev %s\n",
2202*4882a593Smuzhiyun subdev->name);
2203*4882a593Smuzhiyun return -EINVAL;
2204*4882a593Smuzhiyun }
2205*4882a593Smuzhiyun return 0;
2206*4882a593Smuzhiyun }
2207*4882a593Smuzhiyun
vpfe_probe_complete(struct vpfe_device * vpfe)2208*4882a593Smuzhiyun static int vpfe_probe_complete(struct vpfe_device *vpfe)
2209*4882a593Smuzhiyun {
2210*4882a593Smuzhiyun struct video_device *vdev;
2211*4882a593Smuzhiyun struct vb2_queue *q;
2212*4882a593Smuzhiyun int err;
2213*4882a593Smuzhiyun
2214*4882a593Smuzhiyun spin_lock_init(&vpfe->dma_queue_lock);
2215*4882a593Smuzhiyun mutex_init(&vpfe->lock);
2216*4882a593Smuzhiyun
2217*4882a593Smuzhiyun vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2218*4882a593Smuzhiyun
2219*4882a593Smuzhiyun /* set first sub device as current one */
2220*4882a593Smuzhiyun vpfe->current_subdev = &vpfe->cfg->sub_devs[0];
2221*4882a593Smuzhiyun vpfe->v4l2_dev.ctrl_handler = vpfe->sd[0]->ctrl_handler;
2222*4882a593Smuzhiyun
2223*4882a593Smuzhiyun err = vpfe_set_input(vpfe, 0);
2224*4882a593Smuzhiyun if (err)
2225*4882a593Smuzhiyun goto probe_out;
2226*4882a593Smuzhiyun
2227*4882a593Smuzhiyun /* Initialize videobuf2 queue as per the buffer type */
2228*4882a593Smuzhiyun q = &vpfe->buffer_queue;
2229*4882a593Smuzhiyun q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2230*4882a593Smuzhiyun q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ;
2231*4882a593Smuzhiyun q->drv_priv = vpfe;
2232*4882a593Smuzhiyun q->ops = &vpfe_video_qops;
2233*4882a593Smuzhiyun q->mem_ops = &vb2_dma_contig_memops;
2234*4882a593Smuzhiyun q->buf_struct_size = sizeof(struct vpfe_cap_buffer);
2235*4882a593Smuzhiyun q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2236*4882a593Smuzhiyun q->lock = &vpfe->lock;
2237*4882a593Smuzhiyun q->min_buffers_needed = 1;
2238*4882a593Smuzhiyun q->dev = vpfe->pdev;
2239*4882a593Smuzhiyun
2240*4882a593Smuzhiyun err = vb2_queue_init(q);
2241*4882a593Smuzhiyun if (err) {
2242*4882a593Smuzhiyun vpfe_err(vpfe, "vb2_queue_init() failed\n");
2243*4882a593Smuzhiyun goto probe_out;
2244*4882a593Smuzhiyun }
2245*4882a593Smuzhiyun
2246*4882a593Smuzhiyun INIT_LIST_HEAD(&vpfe->dma_queue);
2247*4882a593Smuzhiyun
2248*4882a593Smuzhiyun vdev = &vpfe->video_dev;
2249*4882a593Smuzhiyun strscpy(vdev->name, VPFE_MODULE_NAME, sizeof(vdev->name));
2250*4882a593Smuzhiyun vdev->release = video_device_release_empty;
2251*4882a593Smuzhiyun vdev->fops = &vpfe_fops;
2252*4882a593Smuzhiyun vdev->ioctl_ops = &vpfe_ioctl_ops;
2253*4882a593Smuzhiyun vdev->v4l2_dev = &vpfe->v4l2_dev;
2254*4882a593Smuzhiyun vdev->vfl_dir = VFL_DIR_RX;
2255*4882a593Smuzhiyun vdev->queue = q;
2256*4882a593Smuzhiyun vdev->lock = &vpfe->lock;
2257*4882a593Smuzhiyun vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
2258*4882a593Smuzhiyun V4L2_CAP_READWRITE;
2259*4882a593Smuzhiyun video_set_drvdata(vdev, vpfe);
2260*4882a593Smuzhiyun err = video_register_device(&vpfe->video_dev, VFL_TYPE_VIDEO, -1);
2261*4882a593Smuzhiyun if (err) {
2262*4882a593Smuzhiyun vpfe_err(vpfe,
2263*4882a593Smuzhiyun "Unable to register video device.\n");
2264*4882a593Smuzhiyun goto probe_out;
2265*4882a593Smuzhiyun }
2266*4882a593Smuzhiyun
2267*4882a593Smuzhiyun return 0;
2268*4882a593Smuzhiyun
2269*4882a593Smuzhiyun probe_out:
2270*4882a593Smuzhiyun v4l2_device_unregister(&vpfe->v4l2_dev);
2271*4882a593Smuzhiyun return err;
2272*4882a593Smuzhiyun }
2273*4882a593Smuzhiyun
vpfe_async_complete(struct v4l2_async_notifier * notifier)2274*4882a593Smuzhiyun static int vpfe_async_complete(struct v4l2_async_notifier *notifier)
2275*4882a593Smuzhiyun {
2276*4882a593Smuzhiyun struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2277*4882a593Smuzhiyun struct vpfe_device, v4l2_dev);
2278*4882a593Smuzhiyun
2279*4882a593Smuzhiyun return vpfe_probe_complete(vpfe);
2280*4882a593Smuzhiyun }
2281*4882a593Smuzhiyun
2282*4882a593Smuzhiyun static const struct v4l2_async_notifier_operations vpfe_async_ops = {
2283*4882a593Smuzhiyun .bound = vpfe_async_bound,
2284*4882a593Smuzhiyun .complete = vpfe_async_complete,
2285*4882a593Smuzhiyun };
2286*4882a593Smuzhiyun
2287*4882a593Smuzhiyun static struct vpfe_config *
vpfe_get_pdata(struct vpfe_device * vpfe)2288*4882a593Smuzhiyun vpfe_get_pdata(struct vpfe_device *vpfe)
2289*4882a593Smuzhiyun {
2290*4882a593Smuzhiyun struct device_node *endpoint = NULL;
2291*4882a593Smuzhiyun struct device *dev = vpfe->pdev;
2292*4882a593Smuzhiyun struct vpfe_subdev_info *sdinfo;
2293*4882a593Smuzhiyun struct vpfe_config *pdata;
2294*4882a593Smuzhiyun unsigned int flags;
2295*4882a593Smuzhiyun unsigned int i;
2296*4882a593Smuzhiyun int err;
2297*4882a593Smuzhiyun
2298*4882a593Smuzhiyun dev_dbg(dev, "vpfe_get_pdata\n");
2299*4882a593Smuzhiyun
2300*4882a593Smuzhiyun v4l2_async_notifier_init(&vpfe->notifier);
2301*4882a593Smuzhiyun
2302*4882a593Smuzhiyun if (!IS_ENABLED(CONFIG_OF) || !dev->of_node)
2303*4882a593Smuzhiyun return dev->platform_data;
2304*4882a593Smuzhiyun
2305*4882a593Smuzhiyun pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
2306*4882a593Smuzhiyun if (!pdata)
2307*4882a593Smuzhiyun return NULL;
2308*4882a593Smuzhiyun
2309*4882a593Smuzhiyun for (i = 0; ; i++) {
2310*4882a593Smuzhiyun struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
2311*4882a593Smuzhiyun struct device_node *rem;
2312*4882a593Smuzhiyun
2313*4882a593Smuzhiyun endpoint = of_graph_get_next_endpoint(dev->of_node, endpoint);
2314*4882a593Smuzhiyun if (!endpoint)
2315*4882a593Smuzhiyun break;
2316*4882a593Smuzhiyun
2317*4882a593Smuzhiyun sdinfo = &pdata->sub_devs[i];
2318*4882a593Smuzhiyun sdinfo->grp_id = 0;
2319*4882a593Smuzhiyun
2320*4882a593Smuzhiyun /* we only support camera */
2321*4882a593Smuzhiyun sdinfo->inputs[0].index = i;
2322*4882a593Smuzhiyun strscpy(sdinfo->inputs[0].name, "Camera",
2323*4882a593Smuzhiyun sizeof(sdinfo->inputs[0].name));
2324*4882a593Smuzhiyun sdinfo->inputs[0].type = V4L2_INPUT_TYPE_CAMERA;
2325*4882a593Smuzhiyun sdinfo->inputs[0].std = V4L2_STD_ALL;
2326*4882a593Smuzhiyun sdinfo->inputs[0].capabilities = V4L2_IN_CAP_STD;
2327*4882a593Smuzhiyun
2328*4882a593Smuzhiyun sdinfo->can_route = 0;
2329*4882a593Smuzhiyun sdinfo->routes = NULL;
2330*4882a593Smuzhiyun
2331*4882a593Smuzhiyun of_property_read_u32(endpoint, "ti,am437x-vpfe-interface",
2332*4882a593Smuzhiyun &sdinfo->vpfe_param.if_type);
2333*4882a593Smuzhiyun if (sdinfo->vpfe_param.if_type < 0 ||
2334*4882a593Smuzhiyun sdinfo->vpfe_param.if_type > 4) {
2335*4882a593Smuzhiyun sdinfo->vpfe_param.if_type = VPFE_RAW_BAYER;
2336*4882a593Smuzhiyun }
2337*4882a593Smuzhiyun
2338*4882a593Smuzhiyun err = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
2339*4882a593Smuzhiyun &bus_cfg);
2340*4882a593Smuzhiyun if (err) {
2341*4882a593Smuzhiyun dev_err(dev, "Could not parse the endpoint\n");
2342*4882a593Smuzhiyun goto cleanup;
2343*4882a593Smuzhiyun }
2344*4882a593Smuzhiyun
2345*4882a593Smuzhiyun sdinfo->vpfe_param.bus_width = bus_cfg.bus.parallel.bus_width;
2346*4882a593Smuzhiyun
2347*4882a593Smuzhiyun if (sdinfo->vpfe_param.bus_width < 8 ||
2348*4882a593Smuzhiyun sdinfo->vpfe_param.bus_width > 16) {
2349*4882a593Smuzhiyun dev_err(dev, "Invalid bus width.\n");
2350*4882a593Smuzhiyun goto cleanup;
2351*4882a593Smuzhiyun }
2352*4882a593Smuzhiyun
2353*4882a593Smuzhiyun flags = bus_cfg.bus.parallel.flags;
2354*4882a593Smuzhiyun
2355*4882a593Smuzhiyun if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2356*4882a593Smuzhiyun sdinfo->vpfe_param.hdpol = 1;
2357*4882a593Smuzhiyun
2358*4882a593Smuzhiyun if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
2359*4882a593Smuzhiyun sdinfo->vpfe_param.vdpol = 1;
2360*4882a593Smuzhiyun
2361*4882a593Smuzhiyun rem = of_graph_get_remote_port_parent(endpoint);
2362*4882a593Smuzhiyun if (!rem) {
2363*4882a593Smuzhiyun dev_err(dev, "Remote device at %pOF not found\n",
2364*4882a593Smuzhiyun endpoint);
2365*4882a593Smuzhiyun goto cleanup;
2366*4882a593Smuzhiyun }
2367*4882a593Smuzhiyun
2368*4882a593Smuzhiyun pdata->asd[i] = v4l2_async_notifier_add_fwnode_subdev(
2369*4882a593Smuzhiyun &vpfe->notifier, of_fwnode_handle(rem),
2370*4882a593Smuzhiyun sizeof(struct v4l2_async_subdev));
2371*4882a593Smuzhiyun of_node_put(rem);
2372*4882a593Smuzhiyun if (IS_ERR(pdata->asd[i]))
2373*4882a593Smuzhiyun goto cleanup;
2374*4882a593Smuzhiyun }
2375*4882a593Smuzhiyun
2376*4882a593Smuzhiyun of_node_put(endpoint);
2377*4882a593Smuzhiyun return pdata;
2378*4882a593Smuzhiyun
2379*4882a593Smuzhiyun cleanup:
2380*4882a593Smuzhiyun v4l2_async_notifier_cleanup(&vpfe->notifier);
2381*4882a593Smuzhiyun of_node_put(endpoint);
2382*4882a593Smuzhiyun return NULL;
2383*4882a593Smuzhiyun }
2384*4882a593Smuzhiyun
2385*4882a593Smuzhiyun /*
2386*4882a593Smuzhiyun * vpfe_probe : This function creates device entries by register
2387*4882a593Smuzhiyun * itself to the V4L2 driver and initializes fields of each
2388*4882a593Smuzhiyun * device objects
2389*4882a593Smuzhiyun */
vpfe_probe(struct platform_device * pdev)2390*4882a593Smuzhiyun static int vpfe_probe(struct platform_device *pdev)
2391*4882a593Smuzhiyun {
2392*4882a593Smuzhiyun struct vpfe_config *vpfe_cfg;
2393*4882a593Smuzhiyun struct vpfe_device *vpfe;
2394*4882a593Smuzhiyun struct vpfe_ccdc *ccdc;
2395*4882a593Smuzhiyun struct resource *res;
2396*4882a593Smuzhiyun int ret;
2397*4882a593Smuzhiyun
2398*4882a593Smuzhiyun vpfe = devm_kzalloc(&pdev->dev, sizeof(*vpfe), GFP_KERNEL);
2399*4882a593Smuzhiyun if (!vpfe)
2400*4882a593Smuzhiyun return -ENOMEM;
2401*4882a593Smuzhiyun
2402*4882a593Smuzhiyun vpfe->pdev = &pdev->dev;
2403*4882a593Smuzhiyun
2404*4882a593Smuzhiyun vpfe_cfg = vpfe_get_pdata(vpfe);
2405*4882a593Smuzhiyun if (!vpfe_cfg) {
2406*4882a593Smuzhiyun dev_err(&pdev->dev, "No platform data\n");
2407*4882a593Smuzhiyun return -EINVAL;
2408*4882a593Smuzhiyun }
2409*4882a593Smuzhiyun
2410*4882a593Smuzhiyun vpfe->cfg = vpfe_cfg;
2411*4882a593Smuzhiyun ccdc = &vpfe->ccdc;
2412*4882a593Smuzhiyun
2413*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2414*4882a593Smuzhiyun ccdc->ccdc_cfg.base_addr = devm_ioremap_resource(&pdev->dev, res);
2415*4882a593Smuzhiyun if (IS_ERR(ccdc->ccdc_cfg.base_addr)) {
2416*4882a593Smuzhiyun ret = PTR_ERR(ccdc->ccdc_cfg.base_addr);
2417*4882a593Smuzhiyun goto probe_out_cleanup;
2418*4882a593Smuzhiyun }
2419*4882a593Smuzhiyun
2420*4882a593Smuzhiyun ret = platform_get_irq(pdev, 0);
2421*4882a593Smuzhiyun if (ret <= 0) {
2422*4882a593Smuzhiyun ret = -ENODEV;
2423*4882a593Smuzhiyun goto probe_out_cleanup;
2424*4882a593Smuzhiyun }
2425*4882a593Smuzhiyun vpfe->irq = ret;
2426*4882a593Smuzhiyun
2427*4882a593Smuzhiyun ret = devm_request_irq(vpfe->pdev, vpfe->irq, vpfe_isr, 0,
2428*4882a593Smuzhiyun "vpfe_capture0", vpfe);
2429*4882a593Smuzhiyun if (ret) {
2430*4882a593Smuzhiyun dev_err(&pdev->dev, "Unable to request interrupt\n");
2431*4882a593Smuzhiyun ret = -EINVAL;
2432*4882a593Smuzhiyun goto probe_out_cleanup;
2433*4882a593Smuzhiyun }
2434*4882a593Smuzhiyun
2435*4882a593Smuzhiyun ret = v4l2_device_register(&pdev->dev, &vpfe->v4l2_dev);
2436*4882a593Smuzhiyun if (ret) {
2437*4882a593Smuzhiyun vpfe_err(vpfe,
2438*4882a593Smuzhiyun "Unable to register v4l2 device.\n");
2439*4882a593Smuzhiyun goto probe_out_cleanup;
2440*4882a593Smuzhiyun }
2441*4882a593Smuzhiyun
2442*4882a593Smuzhiyun /* set the driver data in platform device */
2443*4882a593Smuzhiyun platform_set_drvdata(pdev, vpfe);
2444*4882a593Smuzhiyun /* Enabling module functional clock */
2445*4882a593Smuzhiyun pm_runtime_enable(&pdev->dev);
2446*4882a593Smuzhiyun
2447*4882a593Smuzhiyun /* for now just enable it here instead of waiting for the open */
2448*4882a593Smuzhiyun ret = pm_runtime_resume_and_get(&pdev->dev);
2449*4882a593Smuzhiyun if (ret < 0) {
2450*4882a593Smuzhiyun vpfe_err(vpfe, "Unable to resume device.\n");
2451*4882a593Smuzhiyun goto probe_out_v4l2_unregister;
2452*4882a593Smuzhiyun }
2453*4882a593Smuzhiyun
2454*4882a593Smuzhiyun vpfe_ccdc_config_defaults(ccdc);
2455*4882a593Smuzhiyun
2456*4882a593Smuzhiyun pm_runtime_put_sync(&pdev->dev);
2457*4882a593Smuzhiyun
2458*4882a593Smuzhiyun vpfe->sd = devm_kcalloc(&pdev->dev,
2459*4882a593Smuzhiyun ARRAY_SIZE(vpfe->cfg->asd),
2460*4882a593Smuzhiyun sizeof(struct v4l2_subdev *),
2461*4882a593Smuzhiyun GFP_KERNEL);
2462*4882a593Smuzhiyun if (!vpfe->sd) {
2463*4882a593Smuzhiyun ret = -ENOMEM;
2464*4882a593Smuzhiyun goto probe_out_v4l2_unregister;
2465*4882a593Smuzhiyun }
2466*4882a593Smuzhiyun
2467*4882a593Smuzhiyun vpfe->notifier.ops = &vpfe_async_ops;
2468*4882a593Smuzhiyun ret = v4l2_async_notifier_register(&vpfe->v4l2_dev, &vpfe->notifier);
2469*4882a593Smuzhiyun if (ret) {
2470*4882a593Smuzhiyun vpfe_err(vpfe, "Error registering async notifier\n");
2471*4882a593Smuzhiyun ret = -EINVAL;
2472*4882a593Smuzhiyun goto probe_out_v4l2_unregister;
2473*4882a593Smuzhiyun }
2474*4882a593Smuzhiyun
2475*4882a593Smuzhiyun return 0;
2476*4882a593Smuzhiyun
2477*4882a593Smuzhiyun probe_out_v4l2_unregister:
2478*4882a593Smuzhiyun v4l2_device_unregister(&vpfe->v4l2_dev);
2479*4882a593Smuzhiyun probe_out_cleanup:
2480*4882a593Smuzhiyun v4l2_async_notifier_cleanup(&vpfe->notifier);
2481*4882a593Smuzhiyun return ret;
2482*4882a593Smuzhiyun }
2483*4882a593Smuzhiyun
2484*4882a593Smuzhiyun /*
2485*4882a593Smuzhiyun * vpfe_remove : It un-register device from V4L2 driver
2486*4882a593Smuzhiyun */
vpfe_remove(struct platform_device * pdev)2487*4882a593Smuzhiyun static int vpfe_remove(struct platform_device *pdev)
2488*4882a593Smuzhiyun {
2489*4882a593Smuzhiyun struct vpfe_device *vpfe = platform_get_drvdata(pdev);
2490*4882a593Smuzhiyun
2491*4882a593Smuzhiyun pm_runtime_disable(&pdev->dev);
2492*4882a593Smuzhiyun
2493*4882a593Smuzhiyun v4l2_async_notifier_unregister(&vpfe->notifier);
2494*4882a593Smuzhiyun v4l2_async_notifier_cleanup(&vpfe->notifier);
2495*4882a593Smuzhiyun v4l2_device_unregister(&vpfe->v4l2_dev);
2496*4882a593Smuzhiyun video_unregister_device(&vpfe->video_dev);
2497*4882a593Smuzhiyun
2498*4882a593Smuzhiyun return 0;
2499*4882a593Smuzhiyun }
2500*4882a593Smuzhiyun
2501*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
2502*4882a593Smuzhiyun
vpfe_save_context(struct vpfe_ccdc * ccdc)2503*4882a593Smuzhiyun static void vpfe_save_context(struct vpfe_ccdc *ccdc)
2504*4882a593Smuzhiyun {
2505*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_PCR >> 2] = vpfe_reg_read(ccdc, VPFE_PCR);
2506*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_SYNMODE >> 2] = vpfe_reg_read(ccdc, VPFE_SYNMODE);
2507*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_SDOFST >> 2] = vpfe_reg_read(ccdc, VPFE_SDOFST);
2508*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2] = vpfe_reg_read(ccdc, VPFE_SDR_ADDR);
2509*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_CLAMP >> 2] = vpfe_reg_read(ccdc, VPFE_CLAMP);
2510*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_DCSUB >> 2] = vpfe_reg_read(ccdc, VPFE_DCSUB);
2511*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_COLPTN >> 2] = vpfe_reg_read(ccdc, VPFE_COLPTN);
2512*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_BLKCMP >> 2] = vpfe_reg_read(ccdc, VPFE_BLKCMP);
2513*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_VDINT >> 2] = vpfe_reg_read(ccdc, VPFE_VDINT);
2514*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_ALAW >> 2] = vpfe_reg_read(ccdc, VPFE_ALAW);
2515*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_REC656IF >> 2] = vpfe_reg_read(ccdc, VPFE_REC656IF);
2516*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_CCDCFG >> 2] = vpfe_reg_read(ccdc, VPFE_CCDCFG);
2517*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_CULLING >> 2] = vpfe_reg_read(ccdc, VPFE_CULLING);
2518*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2] = vpfe_reg_read(ccdc,
2519*4882a593Smuzhiyun VPFE_HD_VD_WID);
2520*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2] = vpfe_reg_read(ccdc,
2521*4882a593Smuzhiyun VPFE_PIX_LINES);
2522*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2] = vpfe_reg_read(ccdc,
2523*4882a593Smuzhiyun VPFE_HORZ_INFO);
2524*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_VERT_START >> 2] = vpfe_reg_read(ccdc,
2525*4882a593Smuzhiyun VPFE_VERT_START);
2526*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2] = vpfe_reg_read(ccdc,
2527*4882a593Smuzhiyun VPFE_VERT_LINES);
2528*4882a593Smuzhiyun ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2] = vpfe_reg_read(ccdc,
2529*4882a593Smuzhiyun VPFE_HSIZE_OFF);
2530*4882a593Smuzhiyun }
2531*4882a593Smuzhiyun
vpfe_suspend(struct device * dev)2532*4882a593Smuzhiyun static int vpfe_suspend(struct device *dev)
2533*4882a593Smuzhiyun {
2534*4882a593Smuzhiyun struct vpfe_device *vpfe = dev_get_drvdata(dev);
2535*4882a593Smuzhiyun struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2536*4882a593Smuzhiyun
2537*4882a593Smuzhiyun /* only do full suspend if streaming has started */
2538*4882a593Smuzhiyun if (vb2_start_streaming_called(&vpfe->buffer_queue)) {
2539*4882a593Smuzhiyun /*
2540*4882a593Smuzhiyun * ignore RPM resume errors here, as it is already too late.
2541*4882a593Smuzhiyun * A check like that should happen earlier, either at
2542*4882a593Smuzhiyun * open() or just before start streaming.
2543*4882a593Smuzhiyun */
2544*4882a593Smuzhiyun pm_runtime_get_sync(dev);
2545*4882a593Smuzhiyun vpfe_config_enable(ccdc, 1);
2546*4882a593Smuzhiyun
2547*4882a593Smuzhiyun /* Save VPFE context */
2548*4882a593Smuzhiyun vpfe_save_context(ccdc);
2549*4882a593Smuzhiyun
2550*4882a593Smuzhiyun /* Disable CCDC */
2551*4882a593Smuzhiyun vpfe_pcr_enable(ccdc, 0);
2552*4882a593Smuzhiyun vpfe_config_enable(ccdc, 0);
2553*4882a593Smuzhiyun
2554*4882a593Smuzhiyun /* Disable both master and slave clock */
2555*4882a593Smuzhiyun pm_runtime_put_sync(dev);
2556*4882a593Smuzhiyun }
2557*4882a593Smuzhiyun
2558*4882a593Smuzhiyun /* Select sleep pin state */
2559*4882a593Smuzhiyun pinctrl_pm_select_sleep_state(dev);
2560*4882a593Smuzhiyun
2561*4882a593Smuzhiyun return 0;
2562*4882a593Smuzhiyun }
2563*4882a593Smuzhiyun
vpfe_restore_context(struct vpfe_ccdc * ccdc)2564*4882a593Smuzhiyun static void vpfe_restore_context(struct vpfe_ccdc *ccdc)
2565*4882a593Smuzhiyun {
2566*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SYNMODE >> 2], VPFE_SYNMODE);
2567*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CULLING >> 2], VPFE_CULLING);
2568*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDOFST >> 2], VPFE_SDOFST);
2569*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2], VPFE_SDR_ADDR);
2570*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CLAMP >> 2], VPFE_CLAMP);
2571*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_DCSUB >> 2], VPFE_DCSUB);
2572*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_COLPTN >> 2], VPFE_COLPTN);
2573*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_BLKCMP >> 2], VPFE_BLKCMP);
2574*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VDINT >> 2], VPFE_VDINT);
2575*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_ALAW >> 2], VPFE_ALAW);
2576*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_REC656IF >> 2], VPFE_REC656IF);
2577*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CCDCFG >> 2], VPFE_CCDCFG);
2578*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PCR >> 2], VPFE_PCR);
2579*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2],
2580*4882a593Smuzhiyun VPFE_HD_VD_WID);
2581*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2],
2582*4882a593Smuzhiyun VPFE_PIX_LINES);
2583*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2],
2584*4882a593Smuzhiyun VPFE_HORZ_INFO);
2585*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_START >> 2],
2586*4882a593Smuzhiyun VPFE_VERT_START);
2587*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2],
2588*4882a593Smuzhiyun VPFE_VERT_LINES);
2589*4882a593Smuzhiyun vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2],
2590*4882a593Smuzhiyun VPFE_HSIZE_OFF);
2591*4882a593Smuzhiyun }
2592*4882a593Smuzhiyun
vpfe_resume(struct device * dev)2593*4882a593Smuzhiyun static int vpfe_resume(struct device *dev)
2594*4882a593Smuzhiyun {
2595*4882a593Smuzhiyun struct vpfe_device *vpfe = dev_get_drvdata(dev);
2596*4882a593Smuzhiyun struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2597*4882a593Smuzhiyun
2598*4882a593Smuzhiyun /* only do full resume if streaming has started */
2599*4882a593Smuzhiyun if (vb2_start_streaming_called(&vpfe->buffer_queue)) {
2600*4882a593Smuzhiyun /* Enable both master and slave clock */
2601*4882a593Smuzhiyun pm_runtime_get_sync(dev);
2602*4882a593Smuzhiyun vpfe_config_enable(ccdc, 1);
2603*4882a593Smuzhiyun
2604*4882a593Smuzhiyun /* Restore VPFE context */
2605*4882a593Smuzhiyun vpfe_restore_context(ccdc);
2606*4882a593Smuzhiyun
2607*4882a593Smuzhiyun vpfe_config_enable(ccdc, 0);
2608*4882a593Smuzhiyun pm_runtime_put_sync(dev);
2609*4882a593Smuzhiyun }
2610*4882a593Smuzhiyun
2611*4882a593Smuzhiyun /* Select default pin state */
2612*4882a593Smuzhiyun pinctrl_pm_select_default_state(dev);
2613*4882a593Smuzhiyun
2614*4882a593Smuzhiyun return 0;
2615*4882a593Smuzhiyun }
2616*4882a593Smuzhiyun
2617*4882a593Smuzhiyun #endif
2618*4882a593Smuzhiyun
2619*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(vpfe_pm_ops, vpfe_suspend, vpfe_resume);
2620*4882a593Smuzhiyun
2621*4882a593Smuzhiyun static const struct of_device_id vpfe_of_match[] = {
2622*4882a593Smuzhiyun { .compatible = "ti,am437x-vpfe", },
2623*4882a593Smuzhiyun { /* sentinel */ },
2624*4882a593Smuzhiyun };
2625*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, vpfe_of_match);
2626*4882a593Smuzhiyun
2627*4882a593Smuzhiyun static struct platform_driver vpfe_driver = {
2628*4882a593Smuzhiyun .probe = vpfe_probe,
2629*4882a593Smuzhiyun .remove = vpfe_remove,
2630*4882a593Smuzhiyun .driver = {
2631*4882a593Smuzhiyun .name = VPFE_MODULE_NAME,
2632*4882a593Smuzhiyun .pm = &vpfe_pm_ops,
2633*4882a593Smuzhiyun .of_match_table = of_match_ptr(vpfe_of_match),
2634*4882a593Smuzhiyun },
2635*4882a593Smuzhiyun };
2636*4882a593Smuzhiyun
2637*4882a593Smuzhiyun module_platform_driver(vpfe_driver);
2638*4882a593Smuzhiyun
2639*4882a593Smuzhiyun MODULE_AUTHOR("Texas Instruments");
2640*4882a593Smuzhiyun MODULE_DESCRIPTION("TI AM437x VPFE driver");
2641*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2642*4882a593Smuzhiyun MODULE_VERSION(VPFE_VERSION);
2643