xref: /OK3568_Linux_fs/kernel/drivers/media/pci/sta2x11/sta2x11_vip.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * This is the driver for the STA2x11 Video Input Port.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2012       ST Microelectronics
6*4882a593Smuzhiyun  *     author: Federico Vaga <federico.vaga@gmail.com>
7*4882a593Smuzhiyun  * Copyright (C) 2010       WindRiver Systems, Inc.
8*4882a593Smuzhiyun  *     authors: Andreas Kies <andreas.kies@windriver.com>
9*4882a593Smuzhiyun  *              Vlad Lungu   <vlad.lungu@windriver.com>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/videodev2.h>
17*4882a593Smuzhiyun #include <linux/kmod.h>
18*4882a593Smuzhiyun #include <linux/pci.h>
19*4882a593Smuzhiyun #include <linux/interrupt.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun #include <linux/gpio.h>
22*4882a593Smuzhiyun #include <linux/i2c.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <media/v4l2-common.h>
25*4882a593Smuzhiyun #include <media/v4l2-device.h>
26*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
27*4882a593Smuzhiyun #include <media/v4l2-ioctl.h>
28*4882a593Smuzhiyun #include <media/v4l2-fh.h>
29*4882a593Smuzhiyun #include <media/v4l2-event.h>
30*4882a593Smuzhiyun #include <media/videobuf2-dma-contig.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include "sta2x11_vip.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define DRV_VERSION "1.3"
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #ifndef PCI_DEVICE_ID_STMICRO_VIP
37*4882a593Smuzhiyun #define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D
38*4882a593Smuzhiyun #endif
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define MAX_FRAMES 4
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun /*Register offsets*/
43*4882a593Smuzhiyun #define DVP_CTL		0x00
44*4882a593Smuzhiyun #define DVP_TFO		0x04
45*4882a593Smuzhiyun #define DVP_TFS		0x08
46*4882a593Smuzhiyun #define DVP_BFO		0x0C
47*4882a593Smuzhiyun #define DVP_BFS		0x10
48*4882a593Smuzhiyun #define DVP_VTP		0x14
49*4882a593Smuzhiyun #define DVP_VBP		0x18
50*4882a593Smuzhiyun #define DVP_VMP		0x1C
51*4882a593Smuzhiyun #define DVP_ITM		0x98
52*4882a593Smuzhiyun #define DVP_ITS		0x9C
53*4882a593Smuzhiyun #define DVP_STA		0xA0
54*4882a593Smuzhiyun #define DVP_HLFLN	0xA8
55*4882a593Smuzhiyun #define DVP_RGB		0xC0
56*4882a593Smuzhiyun #define DVP_PKZ		0xF0
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun /*Register fields*/
59*4882a593Smuzhiyun #define DVP_CTL_ENA	0x00000001
60*4882a593Smuzhiyun #define DVP_CTL_RST	0x80000000
61*4882a593Smuzhiyun #define DVP_CTL_DIS	(~0x00040001)
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define DVP_IT_VSB	0x00000008
64*4882a593Smuzhiyun #define DVP_IT_VST	0x00000010
65*4882a593Smuzhiyun #define DVP_IT_FIFO	0x00000020
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define DVP_HLFLN_SD	0x00000001
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define SAVE_COUNT 8
70*4882a593Smuzhiyun #define AUX_COUNT 3
71*4882a593Smuzhiyun #define IRQ_COUNT 1
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun struct vip_buffer {
75*4882a593Smuzhiyun 	struct vb2_v4l2_buffer vb;
76*4882a593Smuzhiyun 	struct list_head	list;
77*4882a593Smuzhiyun 	dma_addr_t		dma;
78*4882a593Smuzhiyun };
to_vip_buffer(struct vb2_v4l2_buffer * vb2)79*4882a593Smuzhiyun static inline struct vip_buffer *to_vip_buffer(struct vb2_v4l2_buffer *vb2)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	return container_of(vb2, struct vip_buffer, vb);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /**
85*4882a593Smuzhiyun  * struct sta2x11_vip - All internal data for one instance of device
86*4882a593Smuzhiyun  * @v4l2_dev: device registered in v4l layer
87*4882a593Smuzhiyun  * @video_dev: properties of our device
88*4882a593Smuzhiyun  * @pdev: PCI device
89*4882a593Smuzhiyun  * @adapter: contains I2C adapter information
90*4882a593Smuzhiyun  * @register_save_area: All relevant register are saved here during suspend
91*4882a593Smuzhiyun  * @decoder: contains information about video DAC
92*4882a593Smuzhiyun  * @ctrl_hdl: handler for control framework
93*4882a593Smuzhiyun  * @format: pixel format, fixed UYVY
94*4882a593Smuzhiyun  * @std: video standard (e.g. PAL/NTSC)
95*4882a593Smuzhiyun  * @input: input line for video signal ( 0 or 1 )
96*4882a593Smuzhiyun  * @disabled: Device is in power down state
97*4882a593Smuzhiyun  * @slock: for excluse access of registers
98*4882a593Smuzhiyun  * @vb_vidq: queue maintained by videobuf2 layer
99*4882a593Smuzhiyun  * @buffer_list: list of buffer in use
100*4882a593Smuzhiyun  * @sequence: sequence number of acquired buffer
101*4882a593Smuzhiyun  * @active: current active buffer
102*4882a593Smuzhiyun  * @lock: used in videobuf2 callback
103*4882a593Smuzhiyun  * @v4l_lock: serialize its video4linux ioctls
104*4882a593Smuzhiyun  * @tcount: Number of top frames
105*4882a593Smuzhiyun  * @bcount: Number of bottom frames
106*4882a593Smuzhiyun  * @overflow: Number of FIFO overflows
107*4882a593Smuzhiyun  * @iomem: hardware base address
108*4882a593Smuzhiyun  * @config: I2C and gpio config from platform
109*4882a593Smuzhiyun  *
110*4882a593Smuzhiyun  * All non-local data is accessed via this structure.
111*4882a593Smuzhiyun  */
112*4882a593Smuzhiyun struct sta2x11_vip {
113*4882a593Smuzhiyun 	struct v4l2_device v4l2_dev;
114*4882a593Smuzhiyun 	struct video_device video_dev;
115*4882a593Smuzhiyun 	struct pci_dev *pdev;
116*4882a593Smuzhiyun 	struct i2c_adapter *adapter;
117*4882a593Smuzhiyun 	unsigned int register_save_area[IRQ_COUNT + SAVE_COUNT + AUX_COUNT];
118*4882a593Smuzhiyun 	struct v4l2_subdev *decoder;
119*4882a593Smuzhiyun 	struct v4l2_ctrl_handler ctrl_hdl;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	struct v4l2_pix_format format;
123*4882a593Smuzhiyun 	v4l2_std_id std;
124*4882a593Smuzhiyun 	unsigned int input;
125*4882a593Smuzhiyun 	int disabled;
126*4882a593Smuzhiyun 	spinlock_t slock;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	struct vb2_queue vb_vidq;
129*4882a593Smuzhiyun 	struct list_head buffer_list;
130*4882a593Smuzhiyun 	unsigned int sequence;
131*4882a593Smuzhiyun 	struct vip_buffer *active; /* current active buffer */
132*4882a593Smuzhiyun 	spinlock_t lock; /* Used in videobuf2 callback */
133*4882a593Smuzhiyun 	struct mutex v4l_lock;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	/* Interrupt counters */
136*4882a593Smuzhiyun 	int tcount, bcount;
137*4882a593Smuzhiyun 	int overflow;
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	void __iomem *iomem;	/* I/O Memory */
140*4882a593Smuzhiyun 	struct vip_config *config;
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static const unsigned int registers_to_save[AUX_COUNT] = {
144*4882a593Smuzhiyun 	DVP_HLFLN, DVP_RGB, DVP_PKZ
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun static struct v4l2_pix_format formats_50[] = {
148*4882a593Smuzhiyun 	{			/*PAL interlaced */
149*4882a593Smuzhiyun 	 .width = 720,
150*4882a593Smuzhiyun 	 .height = 576,
151*4882a593Smuzhiyun 	 .pixelformat = V4L2_PIX_FMT_UYVY,
152*4882a593Smuzhiyun 	 .field = V4L2_FIELD_INTERLACED,
153*4882a593Smuzhiyun 	 .bytesperline = 720 * 2,
154*4882a593Smuzhiyun 	 .sizeimage = 720 * 2 * 576,
155*4882a593Smuzhiyun 	 .colorspace = V4L2_COLORSPACE_SMPTE170M},
156*4882a593Smuzhiyun 	{			/*PAL top */
157*4882a593Smuzhiyun 	 .width = 720,
158*4882a593Smuzhiyun 	 .height = 288,
159*4882a593Smuzhiyun 	 .pixelformat = V4L2_PIX_FMT_UYVY,
160*4882a593Smuzhiyun 	 .field = V4L2_FIELD_TOP,
161*4882a593Smuzhiyun 	 .bytesperline = 720 * 2,
162*4882a593Smuzhiyun 	 .sizeimage = 720 * 2 * 288,
163*4882a593Smuzhiyun 	 .colorspace = V4L2_COLORSPACE_SMPTE170M},
164*4882a593Smuzhiyun 	{			/*PAL bottom */
165*4882a593Smuzhiyun 	 .width = 720,
166*4882a593Smuzhiyun 	 .height = 288,
167*4882a593Smuzhiyun 	 .pixelformat = V4L2_PIX_FMT_UYVY,
168*4882a593Smuzhiyun 	 .field = V4L2_FIELD_BOTTOM,
169*4882a593Smuzhiyun 	 .bytesperline = 720 * 2,
170*4882a593Smuzhiyun 	 .sizeimage = 720 * 2 * 288,
171*4882a593Smuzhiyun 	 .colorspace = V4L2_COLORSPACE_SMPTE170M},
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun };
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun static struct v4l2_pix_format formats_60[] = {
176*4882a593Smuzhiyun 	{			/*NTSC interlaced */
177*4882a593Smuzhiyun 	 .width = 720,
178*4882a593Smuzhiyun 	 .height = 480,
179*4882a593Smuzhiyun 	 .pixelformat = V4L2_PIX_FMT_UYVY,
180*4882a593Smuzhiyun 	 .field = V4L2_FIELD_INTERLACED,
181*4882a593Smuzhiyun 	 .bytesperline = 720 * 2,
182*4882a593Smuzhiyun 	 .sizeimage = 720 * 2 * 480,
183*4882a593Smuzhiyun 	 .colorspace = V4L2_COLORSPACE_SMPTE170M},
184*4882a593Smuzhiyun 	{			/*NTSC top */
185*4882a593Smuzhiyun 	 .width = 720,
186*4882a593Smuzhiyun 	 .height = 240,
187*4882a593Smuzhiyun 	 .pixelformat = V4L2_PIX_FMT_UYVY,
188*4882a593Smuzhiyun 	 .field = V4L2_FIELD_TOP,
189*4882a593Smuzhiyun 	 .bytesperline = 720 * 2,
190*4882a593Smuzhiyun 	 .sizeimage = 720 * 2 * 240,
191*4882a593Smuzhiyun 	 .colorspace = V4L2_COLORSPACE_SMPTE170M},
192*4882a593Smuzhiyun 	{			/*NTSC bottom */
193*4882a593Smuzhiyun 	 .width = 720,
194*4882a593Smuzhiyun 	 .height = 240,
195*4882a593Smuzhiyun 	 .pixelformat = V4L2_PIX_FMT_UYVY,
196*4882a593Smuzhiyun 	 .field = V4L2_FIELD_BOTTOM,
197*4882a593Smuzhiyun 	 .bytesperline = 720 * 2,
198*4882a593Smuzhiyun 	 .sizeimage = 720 * 2 * 240,
199*4882a593Smuzhiyun 	 .colorspace = V4L2_COLORSPACE_SMPTE170M},
200*4882a593Smuzhiyun };
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun /* Write VIP register */
reg_write(struct sta2x11_vip * vip,unsigned int reg,u32 val)203*4882a593Smuzhiyun static inline void reg_write(struct sta2x11_vip *vip, unsigned int reg, u32 val)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun 	iowrite32((val), (vip->iomem)+(reg));
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun /* Read VIP register */
reg_read(struct sta2x11_vip * vip,unsigned int reg)208*4882a593Smuzhiyun static inline u32 reg_read(struct sta2x11_vip *vip, unsigned int reg)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	return  ioread32((vip->iomem)+(reg));
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun /* Start DMA acquisition */
start_dma(struct sta2x11_vip * vip,struct vip_buffer * vip_buf)213*4882a593Smuzhiyun static void start_dma(struct sta2x11_vip *vip, struct vip_buffer *vip_buf)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	unsigned long offset = 0;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	if (vip->format.field == V4L2_FIELD_INTERLACED)
218*4882a593Smuzhiyun 		offset = vip->format.width * 2;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	spin_lock_irq(&vip->slock);
221*4882a593Smuzhiyun 	/* Enable acquisition */
222*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) | DVP_CTL_ENA);
223*4882a593Smuzhiyun 	/* Set Top and Bottom Field memory address */
224*4882a593Smuzhiyun 	reg_write(vip, DVP_VTP, (u32)vip_buf->dma);
225*4882a593Smuzhiyun 	reg_write(vip, DVP_VBP, (u32)vip_buf->dma + offset);
226*4882a593Smuzhiyun 	spin_unlock_irq(&vip->slock);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun /* Fetch the next buffer to activate */
vip_active_buf_next(struct sta2x11_vip * vip)230*4882a593Smuzhiyun static void vip_active_buf_next(struct sta2x11_vip *vip)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun 	/* Get the next buffer */
233*4882a593Smuzhiyun 	spin_lock(&vip->lock);
234*4882a593Smuzhiyun 	if (list_empty(&vip->buffer_list)) {/* No available buffer */
235*4882a593Smuzhiyun 		spin_unlock(&vip->lock);
236*4882a593Smuzhiyun 		return;
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 	vip->active = list_first_entry(&vip->buffer_list,
239*4882a593Smuzhiyun 				       struct vip_buffer,
240*4882a593Smuzhiyun 				       list);
241*4882a593Smuzhiyun 	/* Reset Top and Bottom counter */
242*4882a593Smuzhiyun 	vip->tcount = 0;
243*4882a593Smuzhiyun 	vip->bcount = 0;
244*4882a593Smuzhiyun 	spin_unlock(&vip->lock);
245*4882a593Smuzhiyun 	if (vb2_is_streaming(&vip->vb_vidq)) {	/* streaming is on */
246*4882a593Smuzhiyun 		start_dma(vip, vip->active);	/* start dma capture */
247*4882a593Smuzhiyun 	}
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun /* Videobuf2 Operations */
queue_setup(struct vb2_queue * vq,unsigned int * nbuffers,unsigned int * nplanes,unsigned int sizes[],struct device * alloc_devs[])252*4882a593Smuzhiyun static int queue_setup(struct vb2_queue *vq,
253*4882a593Smuzhiyun 		       unsigned int *nbuffers, unsigned int *nplanes,
254*4882a593Smuzhiyun 		       unsigned int sizes[], struct device *alloc_devs[])
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun 	struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	if (!(*nbuffers) || *nbuffers < MAX_FRAMES)
259*4882a593Smuzhiyun 		*nbuffers = MAX_FRAMES;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	*nplanes = 1;
262*4882a593Smuzhiyun 	sizes[0] = vip->format.sizeimage;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	vip->sequence = 0;
265*4882a593Smuzhiyun 	vip->active = NULL;
266*4882a593Smuzhiyun 	vip->tcount = 0;
267*4882a593Smuzhiyun 	vip->bcount = 0;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	return 0;
270*4882a593Smuzhiyun };
buffer_init(struct vb2_buffer * vb)271*4882a593Smuzhiyun static int buffer_init(struct vb2_buffer *vb)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
274*4882a593Smuzhiyun 	struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	vip_buf->dma = vb2_dma_contig_plane_dma_addr(vb, 0);
277*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vip_buf->list);
278*4882a593Smuzhiyun 	return 0;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
buffer_prepare(struct vb2_buffer * vb)281*4882a593Smuzhiyun static int buffer_prepare(struct vb2_buffer *vb)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
284*4882a593Smuzhiyun 	struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
285*4882a593Smuzhiyun 	struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
286*4882a593Smuzhiyun 	unsigned long size;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	size = vip->format.sizeimage;
289*4882a593Smuzhiyun 	if (vb2_plane_size(vb, 0) < size) {
290*4882a593Smuzhiyun 		v4l2_err(&vip->v4l2_dev, "buffer too small (%lu < %lu)\n",
291*4882a593Smuzhiyun 			 vb2_plane_size(vb, 0), size);
292*4882a593Smuzhiyun 		return -EINVAL;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	vb2_set_plane_payload(&vip_buf->vb.vb2_buf, 0, size);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	return 0;
298*4882a593Smuzhiyun }
buffer_queue(struct vb2_buffer * vb)299*4882a593Smuzhiyun static void buffer_queue(struct vb2_buffer *vb)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
302*4882a593Smuzhiyun 	struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
303*4882a593Smuzhiyun 	struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	spin_lock(&vip->lock);
306*4882a593Smuzhiyun 	list_add_tail(&vip_buf->list, &vip->buffer_list);
307*4882a593Smuzhiyun 	if (!vip->active) {	/* No active buffer, active the first one */
308*4882a593Smuzhiyun 		vip->active = list_first_entry(&vip->buffer_list,
309*4882a593Smuzhiyun 					       struct vip_buffer,
310*4882a593Smuzhiyun 					       list);
311*4882a593Smuzhiyun 		if (vb2_is_streaming(&vip->vb_vidq))	/* streaming is on */
312*4882a593Smuzhiyun 			start_dma(vip, vip_buf);	/* start dma capture */
313*4882a593Smuzhiyun 	}
314*4882a593Smuzhiyun 	spin_unlock(&vip->lock);
315*4882a593Smuzhiyun }
buffer_finish(struct vb2_buffer * vb)316*4882a593Smuzhiyun static void buffer_finish(struct vb2_buffer *vb)
317*4882a593Smuzhiyun {
318*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
319*4882a593Smuzhiyun 	struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
320*4882a593Smuzhiyun 	struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	/* Buffer handled, remove it from the list */
323*4882a593Smuzhiyun 	spin_lock(&vip->lock);
324*4882a593Smuzhiyun 	list_del_init(&vip_buf->list);
325*4882a593Smuzhiyun 	spin_unlock(&vip->lock);
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	if (vb2_is_streaming(vb->vb2_queue))
328*4882a593Smuzhiyun 		vip_active_buf_next(vip);
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun 
start_streaming(struct vb2_queue * vq,unsigned int count)331*4882a593Smuzhiyun static int start_streaming(struct vb2_queue *vq, unsigned int count)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun 	struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	spin_lock_irq(&vip->slock);
336*4882a593Smuzhiyun 	/* Enable interrupt VSYNC Top and Bottom*/
337*4882a593Smuzhiyun 	reg_write(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST);
338*4882a593Smuzhiyun 	spin_unlock_irq(&vip->slock);
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	if (count)
341*4882a593Smuzhiyun 		start_dma(vip, vip->active);
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun /* abort streaming and wait for last buffer */
stop_streaming(struct vb2_queue * vq)347*4882a593Smuzhiyun static void stop_streaming(struct vb2_queue *vq)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun 	struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
350*4882a593Smuzhiyun 	struct vip_buffer *vip_buf, *node;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	/* Disable acquisition */
353*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
354*4882a593Smuzhiyun 	/* Disable all interrupts */
355*4882a593Smuzhiyun 	reg_write(vip, DVP_ITM, 0);
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* Release all active buffers */
358*4882a593Smuzhiyun 	spin_lock(&vip->lock);
359*4882a593Smuzhiyun 	list_for_each_entry_safe(vip_buf, node, &vip->buffer_list, list) {
360*4882a593Smuzhiyun 		vb2_buffer_done(&vip_buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
361*4882a593Smuzhiyun 		list_del(&vip_buf->list);
362*4882a593Smuzhiyun 	}
363*4882a593Smuzhiyun 	spin_unlock(&vip->lock);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun static const struct vb2_ops vip_video_qops = {
367*4882a593Smuzhiyun 	.queue_setup		= queue_setup,
368*4882a593Smuzhiyun 	.buf_init		= buffer_init,
369*4882a593Smuzhiyun 	.buf_prepare		= buffer_prepare,
370*4882a593Smuzhiyun 	.buf_finish		= buffer_finish,
371*4882a593Smuzhiyun 	.buf_queue		= buffer_queue,
372*4882a593Smuzhiyun 	.start_streaming	= start_streaming,
373*4882a593Smuzhiyun 	.stop_streaming		= stop_streaming,
374*4882a593Smuzhiyun 	.wait_prepare		= vb2_ops_wait_prepare,
375*4882a593Smuzhiyun 	.wait_finish		= vb2_ops_wait_finish,
376*4882a593Smuzhiyun };
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun /* File Operations */
380*4882a593Smuzhiyun static const struct v4l2_file_operations vip_fops = {
381*4882a593Smuzhiyun 	.owner = THIS_MODULE,
382*4882a593Smuzhiyun 	.open = v4l2_fh_open,
383*4882a593Smuzhiyun 	.release = vb2_fop_release,
384*4882a593Smuzhiyun 	.unlocked_ioctl = video_ioctl2,
385*4882a593Smuzhiyun 	.read = vb2_fop_read,
386*4882a593Smuzhiyun 	.mmap = vb2_fop_mmap,
387*4882a593Smuzhiyun 	.poll = vb2_fop_poll
388*4882a593Smuzhiyun };
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun /**
392*4882a593Smuzhiyun  * vidioc_querycap - return capabilities of device
393*4882a593Smuzhiyun  * @file: descriptor of device
394*4882a593Smuzhiyun  * @cap: contains return values
395*4882a593Smuzhiyun  * @priv: unused
396*4882a593Smuzhiyun  *
397*4882a593Smuzhiyun  * the capabilities of the device are returned
398*4882a593Smuzhiyun  *
399*4882a593Smuzhiyun  * return value: 0, no error.
400*4882a593Smuzhiyun  */
vidioc_querycap(struct file * file,void * priv,struct v4l2_capability * cap)401*4882a593Smuzhiyun static int vidioc_querycap(struct file *file, void *priv,
402*4882a593Smuzhiyun 			   struct v4l2_capability *cap)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	strscpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
407*4882a593Smuzhiyun 	strscpy(cap->card, KBUILD_MODNAME, sizeof(cap->card));
408*4882a593Smuzhiyun 	snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
409*4882a593Smuzhiyun 		 pci_name(vip->pdev));
410*4882a593Smuzhiyun 	return 0;
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun /**
414*4882a593Smuzhiyun  * vidioc_s_std - set video standard
415*4882a593Smuzhiyun  * @file: descriptor of device
416*4882a593Smuzhiyun  * @std: contains standard to be set
417*4882a593Smuzhiyun  * @priv: unused
418*4882a593Smuzhiyun  *
419*4882a593Smuzhiyun  * the video standard is set
420*4882a593Smuzhiyun  *
421*4882a593Smuzhiyun  * return value: 0, no error.
422*4882a593Smuzhiyun  *
423*4882a593Smuzhiyun  * -EIO, no input signal detected
424*4882a593Smuzhiyun  *
425*4882a593Smuzhiyun  * other, returned from video DAC.
426*4882a593Smuzhiyun  */
vidioc_s_std(struct file * file,void * priv,v4l2_std_id std)427*4882a593Smuzhiyun static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id std)
428*4882a593Smuzhiyun {
429*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	/*
432*4882a593Smuzhiyun 	 * This is here for backwards compatibility only.
433*4882a593Smuzhiyun 	 * The use of V4L2_STD_ALL to trigger a querystd is non-standard.
434*4882a593Smuzhiyun 	 */
435*4882a593Smuzhiyun 	if (std == V4L2_STD_ALL) {
436*4882a593Smuzhiyun 		v4l2_subdev_call(vip->decoder, video, querystd, &std);
437*4882a593Smuzhiyun 		if (std == V4L2_STD_UNKNOWN)
438*4882a593Smuzhiyun 			return -EIO;
439*4882a593Smuzhiyun 	}
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	if (vip->std != std) {
442*4882a593Smuzhiyun 		vip->std = std;
443*4882a593Smuzhiyun 		if (V4L2_STD_525_60 & std)
444*4882a593Smuzhiyun 			vip->format = formats_60[0];
445*4882a593Smuzhiyun 		else
446*4882a593Smuzhiyun 			vip->format = formats_50[0];
447*4882a593Smuzhiyun 	}
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	return v4l2_subdev_call(vip->decoder, video, s_std, std);
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun /**
453*4882a593Smuzhiyun  * vidioc_g_std - get video standard
454*4882a593Smuzhiyun  * @file: descriptor of device
455*4882a593Smuzhiyun  * @priv: unused
456*4882a593Smuzhiyun  * @std: contains return values
457*4882a593Smuzhiyun  *
458*4882a593Smuzhiyun  * the current video standard is returned
459*4882a593Smuzhiyun  *
460*4882a593Smuzhiyun  * return value: 0, no error.
461*4882a593Smuzhiyun  */
vidioc_g_std(struct file * file,void * priv,v4l2_std_id * std)462*4882a593Smuzhiyun static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std)
463*4882a593Smuzhiyun {
464*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	*std = vip->std;
467*4882a593Smuzhiyun 	return 0;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun /**
471*4882a593Smuzhiyun  * vidioc_querystd - get possible video standards
472*4882a593Smuzhiyun  * @file: descriptor of device
473*4882a593Smuzhiyun  * @priv: unused
474*4882a593Smuzhiyun  * @std: contains return values
475*4882a593Smuzhiyun  *
476*4882a593Smuzhiyun  * all possible video standards are returned
477*4882a593Smuzhiyun  *
478*4882a593Smuzhiyun  * return value: delivered by video DAC routine.
479*4882a593Smuzhiyun  */
vidioc_querystd(struct file * file,void * priv,v4l2_std_id * std)480*4882a593Smuzhiyun static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	return v4l2_subdev_call(vip->decoder, video, querystd, std);
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun 
vidioc_enum_input(struct file * file,void * priv,struct v4l2_input * inp)487*4882a593Smuzhiyun static int vidioc_enum_input(struct file *file, void *priv,
488*4882a593Smuzhiyun 			     struct v4l2_input *inp)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun 	if (inp->index > 1)
491*4882a593Smuzhiyun 		return -EINVAL;
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun 	inp->type = V4L2_INPUT_TYPE_CAMERA;
494*4882a593Smuzhiyun 	inp->std = V4L2_STD_ALL;
495*4882a593Smuzhiyun 	sprintf(inp->name, "Camera %u", inp->index);
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	return 0;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun /**
501*4882a593Smuzhiyun  * vidioc_s_input - set input line
502*4882a593Smuzhiyun  * @file: descriptor of device
503*4882a593Smuzhiyun  * @priv: unused
504*4882a593Smuzhiyun  * @i: new input line number
505*4882a593Smuzhiyun  *
506*4882a593Smuzhiyun  * the current active input line is set
507*4882a593Smuzhiyun  *
508*4882a593Smuzhiyun  * return value: 0, no error.
509*4882a593Smuzhiyun  *
510*4882a593Smuzhiyun  * -EINVAL, line number out of range
511*4882a593Smuzhiyun  */
vidioc_s_input(struct file * file,void * priv,unsigned int i)512*4882a593Smuzhiyun static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
515*4882a593Smuzhiyun 	int ret;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	if (i > 1)
518*4882a593Smuzhiyun 		return -EINVAL;
519*4882a593Smuzhiyun 	ret = v4l2_subdev_call(vip->decoder, video, s_routing, i, 0, 0);
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	if (!ret)
522*4882a593Smuzhiyun 		vip->input = i;
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	return 0;
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun /**
528*4882a593Smuzhiyun  * vidioc_g_input - return input line
529*4882a593Smuzhiyun  * @file: descriptor of device
530*4882a593Smuzhiyun  * @priv: unused
531*4882a593Smuzhiyun  * @i: returned input line number
532*4882a593Smuzhiyun  *
533*4882a593Smuzhiyun  * the current active input line is returned
534*4882a593Smuzhiyun  *
535*4882a593Smuzhiyun  * return value: always 0.
536*4882a593Smuzhiyun  */
vidioc_g_input(struct file * file,void * priv,unsigned int * i)537*4882a593Smuzhiyun static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	*i = vip->input;
542*4882a593Smuzhiyun 	return 0;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun /**
546*4882a593Smuzhiyun  * vidioc_enum_fmt_vid_cap - return video capture format
547*4882a593Smuzhiyun  * @file: descriptor of device
548*4882a593Smuzhiyun  * @priv: unused
549*4882a593Smuzhiyun  * @f: returned format information
550*4882a593Smuzhiyun  *
551*4882a593Smuzhiyun  * returns name and format of video capture
552*4882a593Smuzhiyun  * Only UYVY is supported by hardware.
553*4882a593Smuzhiyun  *
554*4882a593Smuzhiyun  * return value: always 0.
555*4882a593Smuzhiyun  */
vidioc_enum_fmt_vid_cap(struct file * file,void * priv,struct v4l2_fmtdesc * f)556*4882a593Smuzhiyun static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
557*4882a593Smuzhiyun 				   struct v4l2_fmtdesc *f)
558*4882a593Smuzhiyun {
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 	if (f->index != 0)
561*4882a593Smuzhiyun 		return -EINVAL;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	f->pixelformat = V4L2_PIX_FMT_UYVY;
564*4882a593Smuzhiyun 	return 0;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun /**
568*4882a593Smuzhiyun  * vidioc_try_fmt_vid_cap - set video capture format
569*4882a593Smuzhiyun  * @file: descriptor of device
570*4882a593Smuzhiyun  * @priv: unused
571*4882a593Smuzhiyun  * @f: new format
572*4882a593Smuzhiyun  *
573*4882a593Smuzhiyun  * new video format is set which includes width and
574*4882a593Smuzhiyun  * field type. width is fixed to 720, no scaling.
575*4882a593Smuzhiyun  * Only UYVY is supported by this hardware.
576*4882a593Smuzhiyun  * the minimum height is 200, the maximum is 576 (PAL)
577*4882a593Smuzhiyun  *
578*4882a593Smuzhiyun  * return value: 0, no error
579*4882a593Smuzhiyun  *
580*4882a593Smuzhiyun  * -EINVAL, pixel or field format not supported
581*4882a593Smuzhiyun  *
582*4882a593Smuzhiyun  */
vidioc_try_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)583*4882a593Smuzhiyun static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
584*4882a593Smuzhiyun 				  struct v4l2_format *f)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
587*4882a593Smuzhiyun 	int interlace_lim;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	if (V4L2_PIX_FMT_UYVY != f->fmt.pix.pixelformat) {
590*4882a593Smuzhiyun 		v4l2_warn(&vip->v4l2_dev, "Invalid format, only UYVY supported\n");
591*4882a593Smuzhiyun 		return -EINVAL;
592*4882a593Smuzhiyun 	}
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	if (V4L2_STD_525_60 & vip->std)
595*4882a593Smuzhiyun 		interlace_lim = 240;
596*4882a593Smuzhiyun 	else
597*4882a593Smuzhiyun 		interlace_lim = 288;
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	switch (f->fmt.pix.field) {
600*4882a593Smuzhiyun 	default:
601*4882a593Smuzhiyun 	case V4L2_FIELD_ANY:
602*4882a593Smuzhiyun 		if (interlace_lim < f->fmt.pix.height)
603*4882a593Smuzhiyun 			f->fmt.pix.field = V4L2_FIELD_INTERLACED;
604*4882a593Smuzhiyun 		else
605*4882a593Smuzhiyun 			f->fmt.pix.field = V4L2_FIELD_BOTTOM;
606*4882a593Smuzhiyun 		break;
607*4882a593Smuzhiyun 	case V4L2_FIELD_TOP:
608*4882a593Smuzhiyun 	case V4L2_FIELD_BOTTOM:
609*4882a593Smuzhiyun 		if (interlace_lim < f->fmt.pix.height)
610*4882a593Smuzhiyun 			f->fmt.pix.height = interlace_lim;
611*4882a593Smuzhiyun 		break;
612*4882a593Smuzhiyun 	case V4L2_FIELD_INTERLACED:
613*4882a593Smuzhiyun 		break;
614*4882a593Smuzhiyun 	}
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun 	/* It is the only supported format */
617*4882a593Smuzhiyun 	f->fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
618*4882a593Smuzhiyun 	f->fmt.pix.height &= ~1;
619*4882a593Smuzhiyun 	if (2 * interlace_lim < f->fmt.pix.height)
620*4882a593Smuzhiyun 		f->fmt.pix.height = 2 * interlace_lim;
621*4882a593Smuzhiyun 	if (200 > f->fmt.pix.height)
622*4882a593Smuzhiyun 		f->fmt.pix.height = 200;
623*4882a593Smuzhiyun 	f->fmt.pix.width = 720;
624*4882a593Smuzhiyun 	f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
625*4882a593Smuzhiyun 	f->fmt.pix.sizeimage = f->fmt.pix.width * 2 * f->fmt.pix.height;
626*4882a593Smuzhiyun 	f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
627*4882a593Smuzhiyun 	return 0;
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun /**
631*4882a593Smuzhiyun  * vidioc_s_fmt_vid_cap - set current video format parameters
632*4882a593Smuzhiyun  * @file: descriptor of device
633*4882a593Smuzhiyun  * @priv: unused
634*4882a593Smuzhiyun  * @f: returned format information
635*4882a593Smuzhiyun  *
636*4882a593Smuzhiyun  * set new capture format
637*4882a593Smuzhiyun  * return value: 0, no error
638*4882a593Smuzhiyun  *
639*4882a593Smuzhiyun  * other, delivered by video DAC routine.
640*4882a593Smuzhiyun  */
vidioc_s_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)641*4882a593Smuzhiyun static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
642*4882a593Smuzhiyun 				struct v4l2_format *f)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
645*4882a593Smuzhiyun 	unsigned int t_stop, b_stop, pitch;
646*4882a593Smuzhiyun 	int ret;
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	ret = vidioc_try_fmt_vid_cap(file, priv, f);
649*4882a593Smuzhiyun 	if (ret)
650*4882a593Smuzhiyun 		return ret;
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	if (vb2_is_busy(&vip->vb_vidq)) {
653*4882a593Smuzhiyun 		/* Can't change format during acquisition */
654*4882a593Smuzhiyun 		v4l2_err(&vip->v4l2_dev, "device busy\n");
655*4882a593Smuzhiyun 		return -EBUSY;
656*4882a593Smuzhiyun 	}
657*4882a593Smuzhiyun 	vip->format = f->fmt.pix;
658*4882a593Smuzhiyun 	switch (vip->format.field) {
659*4882a593Smuzhiyun 	case V4L2_FIELD_INTERLACED:
660*4882a593Smuzhiyun 		t_stop = ((vip->format.height / 2 - 1) << 16) |
661*4882a593Smuzhiyun 			 (2 * vip->format.width - 1);
662*4882a593Smuzhiyun 		b_stop = t_stop;
663*4882a593Smuzhiyun 		pitch = 4 * vip->format.width;
664*4882a593Smuzhiyun 		break;
665*4882a593Smuzhiyun 	case V4L2_FIELD_TOP:
666*4882a593Smuzhiyun 		t_stop = ((vip->format.height - 1) << 16) |
667*4882a593Smuzhiyun 			 (2 * vip->format.width - 1);
668*4882a593Smuzhiyun 		b_stop = (0 << 16) | (2 * vip->format.width - 1);
669*4882a593Smuzhiyun 		pitch = 2 * vip->format.width;
670*4882a593Smuzhiyun 		break;
671*4882a593Smuzhiyun 	case V4L2_FIELD_BOTTOM:
672*4882a593Smuzhiyun 		t_stop = (0 << 16) | (2 * vip->format.width - 1);
673*4882a593Smuzhiyun 		b_stop = (vip->format.height << 16) |
674*4882a593Smuzhiyun 			 (2 * vip->format.width - 1);
675*4882a593Smuzhiyun 		pitch = 2 * vip->format.width;
676*4882a593Smuzhiyun 		break;
677*4882a593Smuzhiyun 	default:
678*4882a593Smuzhiyun 		v4l2_err(&vip->v4l2_dev, "unknown field format\n");
679*4882a593Smuzhiyun 		return -EINVAL;
680*4882a593Smuzhiyun 	}
681*4882a593Smuzhiyun 
682*4882a593Smuzhiyun 	spin_lock_irq(&vip->slock);
683*4882a593Smuzhiyun 	/* Y-X Top Field Offset */
684*4882a593Smuzhiyun 	reg_write(vip, DVP_TFO, 0);
685*4882a593Smuzhiyun 	/* Y-X Bottom Field Offset */
686*4882a593Smuzhiyun 	reg_write(vip, DVP_BFO, 0);
687*4882a593Smuzhiyun 	/* Y-X Top Field Stop*/
688*4882a593Smuzhiyun 	reg_write(vip, DVP_TFS, t_stop);
689*4882a593Smuzhiyun 	/* Y-X Bottom Field Stop */
690*4882a593Smuzhiyun 	reg_write(vip, DVP_BFS, b_stop);
691*4882a593Smuzhiyun 	/* Video Memory Pitch */
692*4882a593Smuzhiyun 	reg_write(vip, DVP_VMP, pitch);
693*4882a593Smuzhiyun 	spin_unlock_irq(&vip->slock);
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	return 0;
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun /**
699*4882a593Smuzhiyun  * vidioc_g_fmt_vid_cap - get current video format parameters
700*4882a593Smuzhiyun  * @file: descriptor of device
701*4882a593Smuzhiyun  * @priv: unused
702*4882a593Smuzhiyun  * @f: contains format information
703*4882a593Smuzhiyun  *
704*4882a593Smuzhiyun  * returns current video format parameters
705*4882a593Smuzhiyun  *
706*4882a593Smuzhiyun  * return value: 0, always successful
707*4882a593Smuzhiyun  */
vidioc_g_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)708*4882a593Smuzhiyun static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
709*4882a593Smuzhiyun 				struct v4l2_format *f)
710*4882a593Smuzhiyun {
711*4882a593Smuzhiyun 	struct sta2x11_vip *vip = video_drvdata(file);
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 	f->fmt.pix = vip->format;
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	return 0;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun static const struct v4l2_ioctl_ops vip_ioctl_ops = {
719*4882a593Smuzhiyun 	.vidioc_querycap = vidioc_querycap,
720*4882a593Smuzhiyun 	/* FMT handling */
721*4882a593Smuzhiyun 	.vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
722*4882a593Smuzhiyun 	.vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
723*4882a593Smuzhiyun 	.vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
724*4882a593Smuzhiyun 	.vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
725*4882a593Smuzhiyun 	/* Buffer handlers */
726*4882a593Smuzhiyun 	.vidioc_create_bufs = vb2_ioctl_create_bufs,
727*4882a593Smuzhiyun 	.vidioc_prepare_buf = vb2_ioctl_prepare_buf,
728*4882a593Smuzhiyun 	.vidioc_reqbufs = vb2_ioctl_reqbufs,
729*4882a593Smuzhiyun 	.vidioc_querybuf = vb2_ioctl_querybuf,
730*4882a593Smuzhiyun 	.vidioc_qbuf = vb2_ioctl_qbuf,
731*4882a593Smuzhiyun 	.vidioc_dqbuf = vb2_ioctl_dqbuf,
732*4882a593Smuzhiyun 	/* Stream on/off */
733*4882a593Smuzhiyun 	.vidioc_streamon = vb2_ioctl_streamon,
734*4882a593Smuzhiyun 	.vidioc_streamoff = vb2_ioctl_streamoff,
735*4882a593Smuzhiyun 	/* Standard handling */
736*4882a593Smuzhiyun 	.vidioc_g_std = vidioc_g_std,
737*4882a593Smuzhiyun 	.vidioc_s_std = vidioc_s_std,
738*4882a593Smuzhiyun 	.vidioc_querystd = vidioc_querystd,
739*4882a593Smuzhiyun 	/* Input handling */
740*4882a593Smuzhiyun 	.vidioc_enum_input = vidioc_enum_input,
741*4882a593Smuzhiyun 	.vidioc_g_input = vidioc_g_input,
742*4882a593Smuzhiyun 	.vidioc_s_input = vidioc_s_input,
743*4882a593Smuzhiyun 	/* Log status ioctl */
744*4882a593Smuzhiyun 	.vidioc_log_status = v4l2_ctrl_log_status,
745*4882a593Smuzhiyun 	/* Event handling */
746*4882a593Smuzhiyun 	.vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
747*4882a593Smuzhiyun 	.vidioc_unsubscribe_event = v4l2_event_unsubscribe,
748*4882a593Smuzhiyun };
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun static const struct video_device video_dev_template = {
751*4882a593Smuzhiyun 	.name = KBUILD_MODNAME,
752*4882a593Smuzhiyun 	.release = video_device_release_empty,
753*4882a593Smuzhiyun 	.fops = &vip_fops,
754*4882a593Smuzhiyun 	.ioctl_ops = &vip_ioctl_ops,
755*4882a593Smuzhiyun 	.tvnorms = V4L2_STD_ALL,
756*4882a593Smuzhiyun 	.device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
757*4882a593Smuzhiyun 		       V4L2_CAP_STREAMING,
758*4882a593Smuzhiyun };
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun /**
761*4882a593Smuzhiyun  * vip_irq - interrupt routine
762*4882a593Smuzhiyun  * @irq: Number of interrupt ( not used, correct number is assumed )
763*4882a593Smuzhiyun  * @vip: local data structure containing all information
764*4882a593Smuzhiyun  *
765*4882a593Smuzhiyun  * check for both frame interrupts set ( top and bottom ).
766*4882a593Smuzhiyun  * check FIFO overflow, but limit number of log messages after open.
767*4882a593Smuzhiyun  * signal a complete buffer if done
768*4882a593Smuzhiyun  *
769*4882a593Smuzhiyun  * return value: IRQ_NONE, interrupt was not generated by VIP
770*4882a593Smuzhiyun  *
771*4882a593Smuzhiyun  * IRQ_HANDLED, interrupt done.
772*4882a593Smuzhiyun  */
vip_irq(int irq,struct sta2x11_vip * vip)773*4882a593Smuzhiyun static irqreturn_t vip_irq(int irq, struct sta2x11_vip *vip)
774*4882a593Smuzhiyun {
775*4882a593Smuzhiyun 	unsigned int status;
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 	status = reg_read(vip, DVP_ITS);
778*4882a593Smuzhiyun 
779*4882a593Smuzhiyun 	if (!status)		/* No interrupt to handle */
780*4882a593Smuzhiyun 		return IRQ_NONE;
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	if (status & DVP_IT_FIFO)
783*4882a593Smuzhiyun 		if (vip->overflow++ > 5)
784*4882a593Smuzhiyun 			pr_info("VIP: fifo overflow\n");
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	if ((status & DVP_IT_VST) && (status & DVP_IT_VSB)) {
787*4882a593Smuzhiyun 		/* this is bad, we are too slow, hope the condition is gone
788*4882a593Smuzhiyun 		 * on the next frame */
789*4882a593Smuzhiyun 		return IRQ_HANDLED;
790*4882a593Smuzhiyun 	}
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun 	if (status & DVP_IT_VST)
793*4882a593Smuzhiyun 		if ((++vip->tcount) < 2)
794*4882a593Smuzhiyun 			return IRQ_HANDLED;
795*4882a593Smuzhiyun 	if (status & DVP_IT_VSB) {
796*4882a593Smuzhiyun 		vip->bcount++;
797*4882a593Smuzhiyun 		return IRQ_HANDLED;
798*4882a593Smuzhiyun 	}
799*4882a593Smuzhiyun 
800*4882a593Smuzhiyun 	if (vip->active) { /* Acquisition is over on this buffer */
801*4882a593Smuzhiyun 		/* Disable acquisition */
802*4882a593Smuzhiyun 		reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
803*4882a593Smuzhiyun 		/* Remove the active buffer from the list */
804*4882a593Smuzhiyun 		vip->active->vb.vb2_buf.timestamp = ktime_get_ns();
805*4882a593Smuzhiyun 		vip->active->vb.sequence = vip->sequence++;
806*4882a593Smuzhiyun 		vb2_buffer_done(&vip->active->vb.vb2_buf, VB2_BUF_STATE_DONE);
807*4882a593Smuzhiyun 	}
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 	return IRQ_HANDLED;
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun 
sta2x11_vip_init_register(struct sta2x11_vip * vip)812*4882a593Smuzhiyun static void sta2x11_vip_init_register(struct sta2x11_vip *vip)
813*4882a593Smuzhiyun {
814*4882a593Smuzhiyun 	/* Register initialization */
815*4882a593Smuzhiyun 	spin_lock_irq(&vip->slock);
816*4882a593Smuzhiyun 	/* Clean interrupt */
817*4882a593Smuzhiyun 	reg_read(vip, DVP_ITS);
818*4882a593Smuzhiyun 	/* Enable Half Line per vertical */
819*4882a593Smuzhiyun 	reg_write(vip, DVP_HLFLN, DVP_HLFLN_SD);
820*4882a593Smuzhiyun 	/* Reset VIP control */
821*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, DVP_CTL_RST);
822*4882a593Smuzhiyun 	/* Clear VIP control */
823*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, 0);
824*4882a593Smuzhiyun 	spin_unlock_irq(&vip->slock);
825*4882a593Smuzhiyun }
sta2x11_vip_clear_register(struct sta2x11_vip * vip)826*4882a593Smuzhiyun static void sta2x11_vip_clear_register(struct sta2x11_vip *vip)
827*4882a593Smuzhiyun {
828*4882a593Smuzhiyun 	spin_lock_irq(&vip->slock);
829*4882a593Smuzhiyun 	/* Disable interrupt */
830*4882a593Smuzhiyun 	reg_write(vip, DVP_ITM, 0);
831*4882a593Smuzhiyun 	/* Reset VIP Control */
832*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, DVP_CTL_RST);
833*4882a593Smuzhiyun 	/* Clear VIP Control */
834*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, 0);
835*4882a593Smuzhiyun 	/* Clean VIP Interrupt */
836*4882a593Smuzhiyun 	reg_read(vip, DVP_ITS);
837*4882a593Smuzhiyun 	spin_unlock_irq(&vip->slock);
838*4882a593Smuzhiyun }
sta2x11_vip_init_buffer(struct sta2x11_vip * vip)839*4882a593Smuzhiyun static int sta2x11_vip_init_buffer(struct sta2x11_vip *vip)
840*4882a593Smuzhiyun {
841*4882a593Smuzhiyun 	int err;
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 	err = dma_set_coherent_mask(&vip->pdev->dev, DMA_BIT_MASK(29));
844*4882a593Smuzhiyun 	if (err) {
845*4882a593Smuzhiyun 		v4l2_err(&vip->v4l2_dev, "Cannot configure coherent mask");
846*4882a593Smuzhiyun 		return err;
847*4882a593Smuzhiyun 	}
848*4882a593Smuzhiyun 	memset(&vip->vb_vidq, 0, sizeof(struct vb2_queue));
849*4882a593Smuzhiyun 	vip->vb_vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
850*4882a593Smuzhiyun 	vip->vb_vidq.io_modes = VB2_MMAP | VB2_READ;
851*4882a593Smuzhiyun 	vip->vb_vidq.drv_priv = vip;
852*4882a593Smuzhiyun 	vip->vb_vidq.buf_struct_size = sizeof(struct vip_buffer);
853*4882a593Smuzhiyun 	vip->vb_vidq.ops = &vip_video_qops;
854*4882a593Smuzhiyun 	vip->vb_vidq.mem_ops = &vb2_dma_contig_memops;
855*4882a593Smuzhiyun 	vip->vb_vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
856*4882a593Smuzhiyun 	vip->vb_vidq.dev = &vip->pdev->dev;
857*4882a593Smuzhiyun 	vip->vb_vidq.lock = &vip->v4l_lock;
858*4882a593Smuzhiyun 	err = vb2_queue_init(&vip->vb_vidq);
859*4882a593Smuzhiyun 	if (err)
860*4882a593Smuzhiyun 		return err;
861*4882a593Smuzhiyun 	INIT_LIST_HEAD(&vip->buffer_list);
862*4882a593Smuzhiyun 	spin_lock_init(&vip->lock);
863*4882a593Smuzhiyun 	return 0;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun 
sta2x11_vip_init_controls(struct sta2x11_vip * vip)866*4882a593Smuzhiyun static int sta2x11_vip_init_controls(struct sta2x11_vip *vip)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun 	/*
869*4882a593Smuzhiyun 	 * Inititialize an empty control so VIP can inerithing controls
870*4882a593Smuzhiyun 	 * from ADV7180
871*4882a593Smuzhiyun 	 */
872*4882a593Smuzhiyun 	v4l2_ctrl_handler_init(&vip->ctrl_hdl, 0);
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun 	vip->v4l2_dev.ctrl_handler = &vip->ctrl_hdl;
875*4882a593Smuzhiyun 	if (vip->ctrl_hdl.error) {
876*4882a593Smuzhiyun 		int err = vip->ctrl_hdl.error;
877*4882a593Smuzhiyun 
878*4882a593Smuzhiyun 		v4l2_ctrl_handler_free(&vip->ctrl_hdl);
879*4882a593Smuzhiyun 		return err;
880*4882a593Smuzhiyun 	}
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	return 0;
883*4882a593Smuzhiyun }
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun /**
886*4882a593Smuzhiyun  * vip_gpio_reserve - reserve gpio pin
887*4882a593Smuzhiyun  * @dev: device
888*4882a593Smuzhiyun  * @pin: GPIO pin number
889*4882a593Smuzhiyun  * @dir: direction, input or output
890*4882a593Smuzhiyun  * @name: GPIO pin name
891*4882a593Smuzhiyun  *
892*4882a593Smuzhiyun  */
vip_gpio_reserve(struct device * dev,int pin,int dir,const char * name)893*4882a593Smuzhiyun static int vip_gpio_reserve(struct device *dev, int pin, int dir,
894*4882a593Smuzhiyun 			    const char *name)
895*4882a593Smuzhiyun {
896*4882a593Smuzhiyun 	int ret = -ENODEV;
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	if (!gpio_is_valid(pin))
899*4882a593Smuzhiyun 		return ret;
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	ret = gpio_request(pin, name);
902*4882a593Smuzhiyun 	if (ret) {
903*4882a593Smuzhiyun 		dev_err(dev, "Failed to allocate pin %d (%s)\n", pin, name);
904*4882a593Smuzhiyun 		return ret;
905*4882a593Smuzhiyun 	}
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 	ret = gpio_direction_output(pin, dir);
908*4882a593Smuzhiyun 	if (ret) {
909*4882a593Smuzhiyun 		dev_err(dev, "Failed to set direction for pin %d (%s)\n",
910*4882a593Smuzhiyun 			pin, name);
911*4882a593Smuzhiyun 		gpio_free(pin);
912*4882a593Smuzhiyun 		return ret;
913*4882a593Smuzhiyun 	}
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 	ret = gpio_export(pin, false);
916*4882a593Smuzhiyun 	if (ret) {
917*4882a593Smuzhiyun 		dev_err(dev, "Failed to export pin %d (%s)\n", pin, name);
918*4882a593Smuzhiyun 		gpio_free(pin);
919*4882a593Smuzhiyun 		return ret;
920*4882a593Smuzhiyun 	}
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	return 0;
923*4882a593Smuzhiyun }
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun /**
926*4882a593Smuzhiyun  * vip_gpio_release - release gpio pin
927*4882a593Smuzhiyun  * @dev: device
928*4882a593Smuzhiyun  * @pin: GPIO pin number
929*4882a593Smuzhiyun  * @name: GPIO pin name
930*4882a593Smuzhiyun  *
931*4882a593Smuzhiyun  */
vip_gpio_release(struct device * dev,int pin,const char * name)932*4882a593Smuzhiyun static void vip_gpio_release(struct device *dev, int pin, const char *name)
933*4882a593Smuzhiyun {
934*4882a593Smuzhiyun 	if (gpio_is_valid(pin)) {
935*4882a593Smuzhiyun 		dev_dbg(dev, "releasing pin %d (%s)\n",	pin, name);
936*4882a593Smuzhiyun 		gpio_unexport(pin);
937*4882a593Smuzhiyun 		gpio_free(pin);
938*4882a593Smuzhiyun 	}
939*4882a593Smuzhiyun }
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun /**
942*4882a593Smuzhiyun  * sta2x11_vip_init_one - init one instance of video device
943*4882a593Smuzhiyun  * @pdev: PCI device
944*4882a593Smuzhiyun  * @ent: (not used)
945*4882a593Smuzhiyun  *
946*4882a593Smuzhiyun  * allocate reset pins for DAC.
947*4882a593Smuzhiyun  * Reset video DAC, this is done via reset line.
948*4882a593Smuzhiyun  * allocate memory for managing device
949*4882a593Smuzhiyun  * request interrupt
950*4882a593Smuzhiyun  * map IO region
951*4882a593Smuzhiyun  * register device
952*4882a593Smuzhiyun  * find and initialize video DAC
953*4882a593Smuzhiyun  *
954*4882a593Smuzhiyun  * return value: 0, no error
955*4882a593Smuzhiyun  *
956*4882a593Smuzhiyun  * -ENOMEM, no memory
957*4882a593Smuzhiyun  *
958*4882a593Smuzhiyun  * -ENODEV, device could not be detected or registered
959*4882a593Smuzhiyun  */
sta2x11_vip_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)960*4882a593Smuzhiyun static int sta2x11_vip_init_one(struct pci_dev *pdev,
961*4882a593Smuzhiyun 				const struct pci_device_id *ent)
962*4882a593Smuzhiyun {
963*4882a593Smuzhiyun 	int ret;
964*4882a593Smuzhiyun 	struct sta2x11_vip *vip;
965*4882a593Smuzhiyun 	struct vip_config *config;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	/* Check if hardware support 26-bit DMA */
968*4882a593Smuzhiyun 	if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(26))) {
969*4882a593Smuzhiyun 		dev_err(&pdev->dev, "26-bit DMA addressing not available\n");
970*4882a593Smuzhiyun 		return -EINVAL;
971*4882a593Smuzhiyun 	}
972*4882a593Smuzhiyun 	/* Enable PCI */
973*4882a593Smuzhiyun 	ret = pci_enable_device(pdev);
974*4882a593Smuzhiyun 	if (ret)
975*4882a593Smuzhiyun 		return ret;
976*4882a593Smuzhiyun 
977*4882a593Smuzhiyun 	/* Get VIP platform data */
978*4882a593Smuzhiyun 	config = dev_get_platdata(&pdev->dev);
979*4882a593Smuzhiyun 	if (!config) {
980*4882a593Smuzhiyun 		dev_info(&pdev->dev, "VIP slot disabled\n");
981*4882a593Smuzhiyun 		ret = -EINVAL;
982*4882a593Smuzhiyun 		goto disable;
983*4882a593Smuzhiyun 	}
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	/* Power configuration */
986*4882a593Smuzhiyun 	ret = vip_gpio_reserve(&pdev->dev, config->pwr_pin, 0,
987*4882a593Smuzhiyun 			       config->pwr_name);
988*4882a593Smuzhiyun 	if (ret)
989*4882a593Smuzhiyun 		goto disable;
990*4882a593Smuzhiyun 
991*4882a593Smuzhiyun 	ret = vip_gpio_reserve(&pdev->dev, config->reset_pin, 0,
992*4882a593Smuzhiyun 			       config->reset_name);
993*4882a593Smuzhiyun 	if (ret) {
994*4882a593Smuzhiyun 		vip_gpio_release(&pdev->dev, config->pwr_pin,
995*4882a593Smuzhiyun 				 config->pwr_name);
996*4882a593Smuzhiyun 		goto disable;
997*4882a593Smuzhiyun 	}
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 	if (gpio_is_valid(config->pwr_pin)) {
1000*4882a593Smuzhiyun 		/* Datasheet says 5ms between PWR and RST */
1001*4882a593Smuzhiyun 		usleep_range(5000, 25000);
1002*4882a593Smuzhiyun 		gpio_direction_output(config->pwr_pin, 1);
1003*4882a593Smuzhiyun 	}
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun 	if (gpio_is_valid(config->reset_pin)) {
1006*4882a593Smuzhiyun 		/* Datasheet says 5ms between PWR and RST */
1007*4882a593Smuzhiyun 		usleep_range(5000, 25000);
1008*4882a593Smuzhiyun 		gpio_direction_output(config->reset_pin, 1);
1009*4882a593Smuzhiyun 	}
1010*4882a593Smuzhiyun 	usleep_range(5000, 25000);
1011*4882a593Smuzhiyun 
1012*4882a593Smuzhiyun 	/* Allocate a new VIP instance */
1013*4882a593Smuzhiyun 	vip = kzalloc(sizeof(struct sta2x11_vip), GFP_KERNEL);
1014*4882a593Smuzhiyun 	if (!vip) {
1015*4882a593Smuzhiyun 		ret = -ENOMEM;
1016*4882a593Smuzhiyun 		goto release_gpios;
1017*4882a593Smuzhiyun 	}
1018*4882a593Smuzhiyun 	vip->pdev = pdev;
1019*4882a593Smuzhiyun 	vip->std = V4L2_STD_PAL;
1020*4882a593Smuzhiyun 	vip->format = formats_50[0];
1021*4882a593Smuzhiyun 	vip->config = config;
1022*4882a593Smuzhiyun 	mutex_init(&vip->v4l_lock);
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun 	ret = sta2x11_vip_init_controls(vip);
1025*4882a593Smuzhiyun 	if (ret)
1026*4882a593Smuzhiyun 		goto free_mem;
1027*4882a593Smuzhiyun 	ret = v4l2_device_register(&pdev->dev, &vip->v4l2_dev);
1028*4882a593Smuzhiyun 	if (ret)
1029*4882a593Smuzhiyun 		goto free_mem;
1030*4882a593Smuzhiyun 
1031*4882a593Smuzhiyun 	dev_dbg(&pdev->dev, "BAR #0 at 0x%lx 0x%lx irq %d\n",
1032*4882a593Smuzhiyun 		(unsigned long)pci_resource_start(pdev, 0),
1033*4882a593Smuzhiyun 		(unsigned long)pci_resource_len(pdev, 0), pdev->irq);
1034*4882a593Smuzhiyun 
1035*4882a593Smuzhiyun 	pci_set_master(pdev);
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun 	ret = pci_request_regions(pdev, KBUILD_MODNAME);
1038*4882a593Smuzhiyun 	if (ret)
1039*4882a593Smuzhiyun 		goto unreg;
1040*4882a593Smuzhiyun 
1041*4882a593Smuzhiyun 	vip->iomem = pci_iomap(pdev, 0, 0x100);
1042*4882a593Smuzhiyun 	if (!vip->iomem) {
1043*4882a593Smuzhiyun 		ret = -ENOMEM;
1044*4882a593Smuzhiyun 		goto release;
1045*4882a593Smuzhiyun 	}
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun 	pci_enable_msi(pdev);
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun 	/* Initialize buffer */
1050*4882a593Smuzhiyun 	ret = sta2x11_vip_init_buffer(vip);
1051*4882a593Smuzhiyun 	if (ret)
1052*4882a593Smuzhiyun 		goto unmap;
1053*4882a593Smuzhiyun 
1054*4882a593Smuzhiyun 	spin_lock_init(&vip->slock);
1055*4882a593Smuzhiyun 
1056*4882a593Smuzhiyun 	ret = request_irq(pdev->irq,
1057*4882a593Smuzhiyun 			  (irq_handler_t) vip_irq,
1058*4882a593Smuzhiyun 			  IRQF_SHARED, KBUILD_MODNAME, vip);
1059*4882a593Smuzhiyun 	if (ret) {
1060*4882a593Smuzhiyun 		dev_err(&pdev->dev, "request_irq failed\n");
1061*4882a593Smuzhiyun 		ret = -ENODEV;
1062*4882a593Smuzhiyun 		goto release_buf;
1063*4882a593Smuzhiyun 	}
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 	/* Initialize and register video device */
1066*4882a593Smuzhiyun 	vip->video_dev = video_dev_template;
1067*4882a593Smuzhiyun 	vip->video_dev.v4l2_dev = &vip->v4l2_dev;
1068*4882a593Smuzhiyun 	vip->video_dev.queue = &vip->vb_vidq;
1069*4882a593Smuzhiyun 	vip->video_dev.lock = &vip->v4l_lock;
1070*4882a593Smuzhiyun 	video_set_drvdata(&vip->video_dev, vip);
1071*4882a593Smuzhiyun 
1072*4882a593Smuzhiyun 	ret = video_register_device(&vip->video_dev, VFL_TYPE_VIDEO, -1);
1073*4882a593Smuzhiyun 	if (ret)
1074*4882a593Smuzhiyun 		goto vrelease;
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	/* Get ADV7180 subdevice */
1077*4882a593Smuzhiyun 	vip->adapter = i2c_get_adapter(vip->config->i2c_id);
1078*4882a593Smuzhiyun 	if (!vip->adapter) {
1079*4882a593Smuzhiyun 		ret = -ENODEV;
1080*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no I2C adapter found\n");
1081*4882a593Smuzhiyun 		goto vunreg;
1082*4882a593Smuzhiyun 	}
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	vip->decoder = v4l2_i2c_new_subdev(&vip->v4l2_dev, vip->adapter,
1085*4882a593Smuzhiyun 					   "adv7180", vip->config->i2c_addr,
1086*4882a593Smuzhiyun 					   NULL);
1087*4882a593Smuzhiyun 	if (!vip->decoder) {
1088*4882a593Smuzhiyun 		ret = -ENODEV;
1089*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no decoder found\n");
1090*4882a593Smuzhiyun 		goto vunreg;
1091*4882a593Smuzhiyun 	}
1092*4882a593Smuzhiyun 
1093*4882a593Smuzhiyun 	i2c_put_adapter(vip->adapter);
1094*4882a593Smuzhiyun 	v4l2_subdev_call(vip->decoder, core, init, 0);
1095*4882a593Smuzhiyun 
1096*4882a593Smuzhiyun 	sta2x11_vip_init_register(vip);
1097*4882a593Smuzhiyun 
1098*4882a593Smuzhiyun 	dev_info(&pdev->dev, "STA2X11 Video Input Port (VIP) loaded\n");
1099*4882a593Smuzhiyun 	return 0;
1100*4882a593Smuzhiyun 
1101*4882a593Smuzhiyun vunreg:
1102*4882a593Smuzhiyun 	video_set_drvdata(&vip->video_dev, NULL);
1103*4882a593Smuzhiyun vrelease:
1104*4882a593Smuzhiyun 	vb2_video_unregister_device(&vip->video_dev);
1105*4882a593Smuzhiyun 	free_irq(pdev->irq, vip);
1106*4882a593Smuzhiyun release_buf:
1107*4882a593Smuzhiyun 	pci_disable_msi(pdev);
1108*4882a593Smuzhiyun unmap:
1109*4882a593Smuzhiyun 	pci_iounmap(pdev, vip->iomem);
1110*4882a593Smuzhiyun release:
1111*4882a593Smuzhiyun 	pci_release_regions(pdev);
1112*4882a593Smuzhiyun unreg:
1113*4882a593Smuzhiyun 	v4l2_device_unregister(&vip->v4l2_dev);
1114*4882a593Smuzhiyun free_mem:
1115*4882a593Smuzhiyun 	kfree(vip);
1116*4882a593Smuzhiyun release_gpios:
1117*4882a593Smuzhiyun 	vip_gpio_release(&pdev->dev, config->reset_pin, config->reset_name);
1118*4882a593Smuzhiyun 	vip_gpio_release(&pdev->dev, config->pwr_pin, config->pwr_name);
1119*4882a593Smuzhiyun disable:
1120*4882a593Smuzhiyun 	/*
1121*4882a593Smuzhiyun 	 * do not call pci_disable_device on sta2x11 because it break all
1122*4882a593Smuzhiyun 	 * other Bus masters on this EP
1123*4882a593Smuzhiyun 	 */
1124*4882a593Smuzhiyun 	return ret;
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun /**
1128*4882a593Smuzhiyun  * sta2x11_vip_remove_one - release device
1129*4882a593Smuzhiyun  * @pdev: PCI device
1130*4882a593Smuzhiyun  *
1131*4882a593Smuzhiyun  * Undo everything done in .._init_one
1132*4882a593Smuzhiyun  *
1133*4882a593Smuzhiyun  * unregister video device
1134*4882a593Smuzhiyun  * free interrupt
1135*4882a593Smuzhiyun  * unmap ioadresses
1136*4882a593Smuzhiyun  * free memory
1137*4882a593Smuzhiyun  * free GPIO pins
1138*4882a593Smuzhiyun  */
sta2x11_vip_remove_one(struct pci_dev * pdev)1139*4882a593Smuzhiyun static void sta2x11_vip_remove_one(struct pci_dev *pdev)
1140*4882a593Smuzhiyun {
1141*4882a593Smuzhiyun 	struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1142*4882a593Smuzhiyun 	struct sta2x11_vip *vip =
1143*4882a593Smuzhiyun 	    container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	sta2x11_vip_clear_register(vip);
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	video_set_drvdata(&vip->video_dev, NULL);
1148*4882a593Smuzhiyun 	vb2_video_unregister_device(&vip->video_dev);
1149*4882a593Smuzhiyun 	free_irq(pdev->irq, vip);
1150*4882a593Smuzhiyun 	pci_disable_msi(pdev);
1151*4882a593Smuzhiyun 	pci_iounmap(pdev, vip->iomem);
1152*4882a593Smuzhiyun 	pci_release_regions(pdev);
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	v4l2_device_unregister(&vip->v4l2_dev);
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	vip_gpio_release(&pdev->dev, vip->config->pwr_pin,
1157*4882a593Smuzhiyun 			 vip->config->pwr_name);
1158*4882a593Smuzhiyun 	vip_gpio_release(&pdev->dev, vip->config->reset_pin,
1159*4882a593Smuzhiyun 			 vip->config->reset_name);
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun 	kfree(vip);
1162*4882a593Smuzhiyun 	/*
1163*4882a593Smuzhiyun 	 * do not call pci_disable_device on sta2x11 because it break all
1164*4882a593Smuzhiyun 	 * other Bus masters on this EP
1165*4882a593Smuzhiyun 	 */
1166*4882a593Smuzhiyun }
1167*4882a593Smuzhiyun 
1168*4882a593Smuzhiyun /**
1169*4882a593Smuzhiyun  * sta2x11_vip_suspend - set device into power save mode
1170*4882a593Smuzhiyun  * @dev_d: PCI device
1171*4882a593Smuzhiyun  *
1172*4882a593Smuzhiyun  * all relevant registers are saved and an attempt to set a new state is made.
1173*4882a593Smuzhiyun  *
1174*4882a593Smuzhiyun  * return value: 0 always indicate success,
1175*4882a593Smuzhiyun  * even if device could not be disabled. (workaround for hardware problem)
1176*4882a593Smuzhiyun  */
sta2x11_vip_suspend(struct device * dev_d)1177*4882a593Smuzhiyun static int __maybe_unused sta2x11_vip_suspend(struct device *dev_d)
1178*4882a593Smuzhiyun {
1179*4882a593Smuzhiyun 	struct v4l2_device *v4l2_dev = dev_get_drvdata(dev_d);
1180*4882a593Smuzhiyun 	struct sta2x11_vip *vip =
1181*4882a593Smuzhiyun 	    container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1182*4882a593Smuzhiyun 	unsigned long flags;
1183*4882a593Smuzhiyun 	int i;
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun 	spin_lock_irqsave(&vip->slock, flags);
1186*4882a593Smuzhiyun 	vip->register_save_area[0] = reg_read(vip, DVP_CTL);
1187*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, vip->register_save_area[0] & DVP_CTL_DIS);
1188*4882a593Smuzhiyun 	vip->register_save_area[SAVE_COUNT] = reg_read(vip, DVP_ITM);
1189*4882a593Smuzhiyun 	reg_write(vip, DVP_ITM, 0);
1190*4882a593Smuzhiyun 	for (i = 1; i < SAVE_COUNT; i++)
1191*4882a593Smuzhiyun 		vip->register_save_area[i] = reg_read(vip, 4 * i);
1192*4882a593Smuzhiyun 	for (i = 0; i < AUX_COUNT; i++)
1193*4882a593Smuzhiyun 		vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i] =
1194*4882a593Smuzhiyun 		    reg_read(vip, registers_to_save[i]);
1195*4882a593Smuzhiyun 	spin_unlock_irqrestore(&vip->slock, flags);
1196*4882a593Smuzhiyun 
1197*4882a593Smuzhiyun 	vip->disabled = 1;
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 	pr_info("VIP: suspend\n");
1200*4882a593Smuzhiyun 	return 0;
1201*4882a593Smuzhiyun }
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun /**
1204*4882a593Smuzhiyun  * sta2x11_vip_resume - resume device operation
1205*4882a593Smuzhiyun  * @dev_d : PCI device
1206*4882a593Smuzhiyun  *
1207*4882a593Smuzhiyun  * return value: 0, no error.
1208*4882a593Smuzhiyun  *
1209*4882a593Smuzhiyun  * other, could not set device to power on state.
1210*4882a593Smuzhiyun  */
sta2x11_vip_resume(struct device * dev_d)1211*4882a593Smuzhiyun static int __maybe_unused sta2x11_vip_resume(struct device *dev_d)
1212*4882a593Smuzhiyun {
1213*4882a593Smuzhiyun 	struct v4l2_device *v4l2_dev = dev_get_drvdata(dev_d);
1214*4882a593Smuzhiyun 	struct sta2x11_vip *vip =
1215*4882a593Smuzhiyun 	    container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1216*4882a593Smuzhiyun 	unsigned long flags;
1217*4882a593Smuzhiyun 	int i;
1218*4882a593Smuzhiyun 
1219*4882a593Smuzhiyun 	pr_info("VIP: resume\n");
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun 	vip->disabled = 0;
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 	spin_lock_irqsave(&vip->slock, flags);
1224*4882a593Smuzhiyun 	for (i = 1; i < SAVE_COUNT; i++)
1225*4882a593Smuzhiyun 		reg_write(vip, 4 * i, vip->register_save_area[i]);
1226*4882a593Smuzhiyun 	for (i = 0; i < AUX_COUNT; i++)
1227*4882a593Smuzhiyun 		reg_write(vip, registers_to_save[i],
1228*4882a593Smuzhiyun 			  vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i]);
1229*4882a593Smuzhiyun 	reg_write(vip, DVP_CTL, vip->register_save_area[0]);
1230*4882a593Smuzhiyun 	reg_write(vip, DVP_ITM, vip->register_save_area[SAVE_COUNT]);
1231*4882a593Smuzhiyun 	spin_unlock_irqrestore(&vip->slock, flags);
1232*4882a593Smuzhiyun 	return 0;
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun static const struct pci_device_id sta2x11_vip_pci_tbl[] = {
1236*4882a593Smuzhiyun 	{PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIP)},
1237*4882a593Smuzhiyun 	{0,}
1238*4882a593Smuzhiyun };
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(sta2x11_vip_pm_ops,
1241*4882a593Smuzhiyun 			 sta2x11_vip_suspend,
1242*4882a593Smuzhiyun 			 sta2x11_vip_resume);
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun static struct pci_driver sta2x11_vip_driver = {
1245*4882a593Smuzhiyun 	.name = KBUILD_MODNAME,
1246*4882a593Smuzhiyun 	.probe = sta2x11_vip_init_one,
1247*4882a593Smuzhiyun 	.remove = sta2x11_vip_remove_one,
1248*4882a593Smuzhiyun 	.id_table = sta2x11_vip_pci_tbl,
1249*4882a593Smuzhiyun 	.driver.pm = &sta2x11_vip_pm_ops,
1250*4882a593Smuzhiyun };
1251*4882a593Smuzhiyun 
sta2x11_vip_init_module(void)1252*4882a593Smuzhiyun static int __init sta2x11_vip_init_module(void)
1253*4882a593Smuzhiyun {
1254*4882a593Smuzhiyun 	return pci_register_driver(&sta2x11_vip_driver);
1255*4882a593Smuzhiyun }
1256*4882a593Smuzhiyun 
sta2x11_vip_exit_module(void)1257*4882a593Smuzhiyun static void __exit sta2x11_vip_exit_module(void)
1258*4882a593Smuzhiyun {
1259*4882a593Smuzhiyun 	pci_unregister_driver(&sta2x11_vip_driver);
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun #ifdef MODULE
1263*4882a593Smuzhiyun module_init(sta2x11_vip_init_module);
1264*4882a593Smuzhiyun module_exit(sta2x11_vip_exit_module);
1265*4882a593Smuzhiyun #else
1266*4882a593Smuzhiyun late_initcall_sync(sta2x11_vip_init_module);
1267*4882a593Smuzhiyun #endif
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun MODULE_DESCRIPTION("STA2X11 Video Input Port driver");
1270*4882a593Smuzhiyun MODULE_AUTHOR("Wind River");
1271*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1272*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("sta2x11 video input");
1273*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
1274*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, sta2x11_vip_pci_tbl);
1275