xref: /OK3568_Linux_fs/kernel/drivers/media/pci/solo6x10/solo6x10-eeprom.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Original author:
6*4882a593Smuzhiyun  * Ben Collins <bcollins@ubuntu.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Additional work by:
9*4882a593Smuzhiyun  * John Brooks <john.brooks@bluecherry.net>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include "solo6x10.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun /* Control */
18*4882a593Smuzhiyun #define EE_SHIFT_CLK	0x04
19*4882a593Smuzhiyun #define EE_CS		0x08
20*4882a593Smuzhiyun #define EE_DATA_WRITE	0x02
21*4882a593Smuzhiyun #define EE_DATA_READ	0x01
22*4882a593Smuzhiyun #define EE_ENB		(0x80 | EE_CS)
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define eeprom_delay()	udelay(100)
25*4882a593Smuzhiyun #if 0
26*4882a593Smuzhiyun #define eeprom_delay()	solo_reg_read(solo_dev, SOLO_EEPROM_CTRL)
27*4882a593Smuzhiyun #define eeprom_delay()	({				\
28*4882a593Smuzhiyun 	int i, ret;					\
29*4882a593Smuzhiyun 	udelay(100);					\
30*4882a593Smuzhiyun 	for (i = ret = 0; i < 1000 && !ret; i++)	\
31*4882a593Smuzhiyun 		ret = solo_eeprom_reg_read(solo_dev);	\
32*4882a593Smuzhiyun })
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun #define ADDR_LEN	6
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* Commands */
37*4882a593Smuzhiyun #define EE_EWEN_CMD	4
38*4882a593Smuzhiyun #define EE_EWDS_CMD	4
39*4882a593Smuzhiyun #define EE_WRITE_CMD	5
40*4882a593Smuzhiyun #define EE_READ_CMD	6
41*4882a593Smuzhiyun #define EE_ERASE_CMD	7
42*4882a593Smuzhiyun 
solo_eeprom_reg_read(struct solo_dev * solo_dev)43*4882a593Smuzhiyun static unsigned int solo_eeprom_reg_read(struct solo_dev *solo_dev)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	return solo_reg_read(solo_dev, SOLO_EEPROM_CTRL) & EE_DATA_READ;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
solo_eeprom_reg_write(struct solo_dev * solo_dev,u32 data)48*4882a593Smuzhiyun static void solo_eeprom_reg_write(struct solo_dev *solo_dev, u32 data)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_EEPROM_CTRL, data);
51*4882a593Smuzhiyun 	eeprom_delay();
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
solo_eeprom_cmd(struct solo_dev * solo_dev,int cmd)54*4882a593Smuzhiyun static void solo_eeprom_cmd(struct solo_dev *solo_dev, int cmd)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	int i;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ACCESS_EN);
59*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	for (i = 4 + ADDR_LEN; i >= 0; i--) {
62*4882a593Smuzhiyun 		int dataval = (cmd & (1 << i)) ? EE_DATA_WRITE : 0;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE | dataval);
65*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE |
66*4882a593Smuzhiyun 				      EE_SHIFT_CLK | dataval);
67*4882a593Smuzhiyun 	}
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun 
solo_eeprom_ewen(struct solo_dev * solo_dev,int w_en)72*4882a593Smuzhiyun unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	int ewen_cmd = (w_en ? 0x3f : 0) | (EE_EWEN_CMD << ADDR_LEN);
75*4882a593Smuzhiyun 	unsigned int retval = 0;
76*4882a593Smuzhiyun 	int i;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	solo_eeprom_cmd(solo_dev, ewen_cmd);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	for (i = 0; i < 16; i++) {
81*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE |
82*4882a593Smuzhiyun 				      EE_SHIFT_CLK);
83*4882a593Smuzhiyun 		retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
84*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
85*4882a593Smuzhiyun 		retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
89*4882a593Smuzhiyun 	retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	return retval;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun 
solo_eeprom_read(struct solo_dev * solo_dev,int loc)94*4882a593Smuzhiyun __be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	int read_cmd = loc | (EE_READ_CMD << ADDR_LEN);
97*4882a593Smuzhiyun 	u16 retval = 0;
98*4882a593Smuzhiyun 	int i;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	solo_eeprom_cmd(solo_dev, read_cmd);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	for (i = 0; i < 16; i++) {
103*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE |
104*4882a593Smuzhiyun 				      EE_SHIFT_CLK);
105*4882a593Smuzhiyun 		retval = (retval << 1) | solo_eeprom_reg_read(solo_dev);
106*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev, SOLO_EEPROM_ENABLE);
107*4882a593Smuzhiyun 	}
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	return (__force __be16)retval;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
solo_eeprom_write(struct solo_dev * solo_dev,int loc,__be16 data)114*4882a593Smuzhiyun int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
115*4882a593Smuzhiyun 		      __be16 data)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	int write_cmd = loc | (EE_WRITE_CMD << ADDR_LEN);
118*4882a593Smuzhiyun 	unsigned int retval;
119*4882a593Smuzhiyun 	int i;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	solo_eeprom_cmd(solo_dev, write_cmd);
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	for (i = 15; i >= 0; i--) {
124*4882a593Smuzhiyun 		unsigned int dataval = ((__force unsigned)data >> i) & 1;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev, EE_ENB);
127*4882a593Smuzhiyun 		solo_eeprom_reg_write(solo_dev,
128*4882a593Smuzhiyun 				      EE_ENB | (dataval << 1) | EE_SHIFT_CLK);
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, EE_ENB);
132*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
133*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, EE_ENB);
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	for (i = retval = 0; i < 10000 && !retval; i++)
136*4882a593Smuzhiyun 		retval = solo_eeprom_reg_read(solo_dev);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	solo_eeprom_reg_write(solo_dev, ~EE_CS);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	return !retval;
141*4882a593Smuzhiyun }
142