xref: /OK3568_Linux_fs/kernel/drivers/media/pci/solo6x10/solo6x10-disp.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2010-2013 Bluecherry, LLC <https://www.bluecherrydvr.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Original author:
6*4882a593Smuzhiyun  * Ben Collins <bcollins@ubuntu.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Additional work by:
9*4882a593Smuzhiyun  * John Brooks <john.brooks@bluecherry.net>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/videodev2.h>
15*4882a593Smuzhiyun #include <media/v4l2-ioctl.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include "solo6x10.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define SOLO_VCLK_DELAY			3
20*4882a593Smuzhiyun #define SOLO_PROGRESSIVE_VSIZE		1024
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define SOLO_MOT_THRESH_W		64
23*4882a593Smuzhiyun #define SOLO_MOT_THRESH_H		64
24*4882a593Smuzhiyun #define SOLO_MOT_THRESH_SIZE		8192
25*4882a593Smuzhiyun #define SOLO_MOT_THRESH_REAL		(SOLO_MOT_THRESH_W * SOLO_MOT_THRESH_H)
26*4882a593Smuzhiyun #define SOLO_MOT_FLAG_SIZE		1024
27*4882a593Smuzhiyun #define SOLO_MOT_FLAG_AREA		(SOLO_MOT_FLAG_SIZE * 16)
28*4882a593Smuzhiyun 
solo_vin_config(struct solo_dev * solo_dev)29*4882a593Smuzhiyun static void solo_vin_config(struct solo_dev *solo_dev)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	solo_dev->vin_hstart = 8;
32*4882a593Smuzhiyun 	solo_dev->vin_vstart = 2;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_SYS_VCLK,
35*4882a593Smuzhiyun 		       SOLO_VCLK_SELECT(2) |
36*4882a593Smuzhiyun 		       SOLO_VCLK_VIN1415_DELAY(SOLO_VCLK_DELAY) |
37*4882a593Smuzhiyun 		       SOLO_VCLK_VIN1213_DELAY(SOLO_VCLK_DELAY) |
38*4882a593Smuzhiyun 		       SOLO_VCLK_VIN1011_DELAY(SOLO_VCLK_DELAY) |
39*4882a593Smuzhiyun 		       SOLO_VCLK_VIN0809_DELAY(SOLO_VCLK_DELAY) |
40*4882a593Smuzhiyun 		       SOLO_VCLK_VIN0607_DELAY(SOLO_VCLK_DELAY) |
41*4882a593Smuzhiyun 		       SOLO_VCLK_VIN0405_DELAY(SOLO_VCLK_DELAY) |
42*4882a593Smuzhiyun 		       SOLO_VCLK_VIN0203_DELAY(SOLO_VCLK_DELAY) |
43*4882a593Smuzhiyun 		       SOLO_VCLK_VIN0001_DELAY(SOLO_VCLK_DELAY));
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_ACT_I_P,
46*4882a593Smuzhiyun 		       SOLO_VI_H_START(solo_dev->vin_hstart) |
47*4882a593Smuzhiyun 		       SOLO_VI_V_START(solo_dev->vin_vstart) |
48*4882a593Smuzhiyun 		       SOLO_VI_V_STOP(solo_dev->vin_vstart +
49*4882a593Smuzhiyun 				      solo_dev->video_vsize));
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_ACT_I_S,
52*4882a593Smuzhiyun 		       SOLO_VI_H_START(solo_dev->vout_hstart) |
53*4882a593Smuzhiyun 		       SOLO_VI_V_START(solo_dev->vout_vstart) |
54*4882a593Smuzhiyun 		       SOLO_VI_V_STOP(solo_dev->vout_vstart +
55*4882a593Smuzhiyun 				      solo_dev->video_vsize));
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_ACT_P,
58*4882a593Smuzhiyun 		       SOLO_VI_H_START(0) |
59*4882a593Smuzhiyun 		       SOLO_VI_V_START(1) |
60*4882a593Smuzhiyun 		       SOLO_VI_V_STOP(SOLO_PROGRESSIVE_VSIZE));
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_CH_FORMAT,
63*4882a593Smuzhiyun 		       SOLO_VI_FD_SEL_MASK(0) | SOLO_VI_PROG_MASK(0));
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	/* On 6110, initialize mozaic darkness strength */
66*4882a593Smuzhiyun 	if (solo_dev->type == SOLO_DEV_6010)
67*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_FMT_CFG, 0);
68*4882a593Smuzhiyun 	else
69*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_FMT_CFG, 16 << 22);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_PAGE_SW, 2);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC) {
74*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_PB_CONFIG,
75*4882a593Smuzhiyun 			       SOLO_VI_PB_USER_MODE);
76*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_PB_RANGE_HV,
77*4882a593Smuzhiyun 			       SOLO_VI_PB_HSIZE(858) | SOLO_VI_PB_VSIZE(246));
78*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_PB_ACT_V,
79*4882a593Smuzhiyun 			       SOLO_VI_PB_VSTART(4) |
80*4882a593Smuzhiyun 			       SOLO_VI_PB_VSTOP(4 + 240));
81*4882a593Smuzhiyun 	} else {
82*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_PB_CONFIG,
83*4882a593Smuzhiyun 			       SOLO_VI_PB_USER_MODE | SOLO_VI_PB_PAL);
84*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_PB_RANGE_HV,
85*4882a593Smuzhiyun 			       SOLO_VI_PB_HSIZE(864) | SOLO_VI_PB_VSIZE(294));
86*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_PB_ACT_V,
87*4882a593Smuzhiyun 			       SOLO_VI_PB_VSTART(4) |
88*4882a593Smuzhiyun 			       SOLO_VI_PB_VSTOP(4 + 288));
89*4882a593Smuzhiyun 	}
90*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_PB_ACT_H, SOLO_VI_PB_HSTART(16) |
91*4882a593Smuzhiyun 		       SOLO_VI_PB_HSTOP(16 + 720));
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun 
solo_vout_config_cursor(struct solo_dev * dev)94*4882a593Smuzhiyun static void solo_vout_config_cursor(struct solo_dev *dev)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	int i;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	/* Load (blank) cursor bitmap mask (2bpp) */
99*4882a593Smuzhiyun 	for (i = 0; i < 20; i++)
100*4882a593Smuzhiyun 		solo_reg_write(dev, SOLO_VO_CURSOR_MASK(i), 0);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	solo_reg_write(dev, SOLO_VO_CURSOR_POS, 0);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	solo_reg_write(dev, SOLO_VO_CURSOR_CLR,
105*4882a593Smuzhiyun 		       (0x80 << 24) | (0x80 << 16) | (0x10 << 8) | 0x80);
106*4882a593Smuzhiyun 	solo_reg_write(dev, SOLO_VO_CURSOR_CLR2, (0xe0 << 8) | 0x80);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
solo_vout_config(struct solo_dev * solo_dev)109*4882a593Smuzhiyun static void solo_vout_config(struct solo_dev *solo_dev)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	solo_dev->vout_hstart = 6;
112*4882a593Smuzhiyun 	solo_dev->vout_vstart = 8;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_FMT_ENC,
115*4882a593Smuzhiyun 		       solo_dev->video_type |
116*4882a593Smuzhiyun 		       SOLO_VO_USER_COLOR_SET_NAV |
117*4882a593Smuzhiyun 		       SOLO_VO_USER_COLOR_SET_NAH |
118*4882a593Smuzhiyun 		       SOLO_VO_NA_COLOR_Y(0) |
119*4882a593Smuzhiyun 		       SOLO_VO_NA_COLOR_CB(0) |
120*4882a593Smuzhiyun 		       SOLO_VO_NA_COLOR_CR(0));
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_ACT_H,
123*4882a593Smuzhiyun 		       SOLO_VO_H_START(solo_dev->vout_hstart) |
124*4882a593Smuzhiyun 		       SOLO_VO_H_STOP(solo_dev->vout_hstart +
125*4882a593Smuzhiyun 				      solo_dev->video_hsize));
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_ACT_V,
128*4882a593Smuzhiyun 		       SOLO_VO_V_START(solo_dev->vout_vstart) |
129*4882a593Smuzhiyun 		       SOLO_VO_V_STOP(solo_dev->vout_vstart +
130*4882a593Smuzhiyun 				      solo_dev->video_vsize));
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_RANGE_HV,
133*4882a593Smuzhiyun 		       SOLO_VO_H_LEN(solo_dev->video_hsize) |
134*4882a593Smuzhiyun 		       SOLO_VO_V_LEN(solo_dev->video_vsize));
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	/* Border & background colors */
137*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_BORDER_LINE_COLOR,
138*4882a593Smuzhiyun 		       (0xa0 << 24) | (0x88 << 16) | (0xa0 << 8) | 0x88);
139*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_BORDER_FILL_COLOR,
140*4882a593Smuzhiyun 		       (0x10 << 24) | (0x8f << 16) | (0x10 << 8) | 0x8f);
141*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_BKG_COLOR,
142*4882a593Smuzhiyun 		       (16 << 24) | (128 << 16) | (16 << 8) | 128);
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_DISP_ERASE, SOLO_VO_DISP_ERASE_ON);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_WIN_SW, 0);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_ZOOM_CTRL, 0);
149*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_FREEZE_CTRL, 0);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_DISP_CTRL, SOLO_VO_DISP_ON |
152*4882a593Smuzhiyun 		       SOLO_VO_DISP_ERASE_COUNT(8) |
153*4882a593Smuzhiyun 		       SOLO_VO_DISP_BASE(SOLO_DISP_EXT_ADDR));
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	solo_vout_config_cursor(solo_dev);
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	/* Enable channels we support */
159*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_CH_ENA,
160*4882a593Smuzhiyun 		       (1 << solo_dev->nr_chans) - 1);
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun 
solo_dma_vin_region(struct solo_dev * solo_dev,u32 off,u16 val,int reg_size)163*4882a593Smuzhiyun static int solo_dma_vin_region(struct solo_dev *solo_dev, u32 off,
164*4882a593Smuzhiyun 			       u16 val, int reg_size)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	__le16 *buf;
167*4882a593Smuzhiyun 	const int n = 64, size = n * sizeof(*buf);
168*4882a593Smuzhiyun 	int i, ret = 0;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	buf = kmalloc(size, GFP_KERNEL);
171*4882a593Smuzhiyun 	if (!buf)
172*4882a593Smuzhiyun 		return -ENOMEM;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	for (i = 0; i < n; i++)
175*4882a593Smuzhiyun 		buf[i] = cpu_to_le16(val);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	for (i = 0; i < reg_size; i += size) {
178*4882a593Smuzhiyun 		ret = solo_p2m_dma(solo_dev, 1, buf,
179*4882a593Smuzhiyun 				   SOLO_MOTION_EXT_ADDR(solo_dev) + off + i,
180*4882a593Smuzhiyun 				   size, 0, 0);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 		if (ret)
183*4882a593Smuzhiyun 			break;
184*4882a593Smuzhiyun 	}
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	kfree(buf);
187*4882a593Smuzhiyun 	return ret;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
solo_set_motion_threshold(struct solo_dev * solo_dev,u8 ch,u16 val)190*4882a593Smuzhiyun int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	if (ch > solo_dev->nr_chans)
193*4882a593Smuzhiyun 		return -EINVAL;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	return solo_dma_vin_region(solo_dev, SOLO_MOT_FLAG_AREA +
196*4882a593Smuzhiyun 				   (ch * SOLO_MOT_THRESH_SIZE * 2),
197*4882a593Smuzhiyun 				   val, SOLO_MOT_THRESH_SIZE);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
solo_set_motion_block(struct solo_dev * solo_dev,u8 ch,const u16 * thresholds)200*4882a593Smuzhiyun int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
201*4882a593Smuzhiyun 		const u16 *thresholds)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	const unsigned size = sizeof(u16) * 64;
204*4882a593Smuzhiyun 	u32 off = SOLO_MOT_FLAG_AREA + ch * SOLO_MOT_THRESH_SIZE * 2;
205*4882a593Smuzhiyun 	__le16 *buf;
206*4882a593Smuzhiyun 	int x, y;
207*4882a593Smuzhiyun 	int ret = 0;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	buf = kzalloc(size, GFP_KERNEL);
210*4882a593Smuzhiyun 	if (buf == NULL)
211*4882a593Smuzhiyun 		return -ENOMEM;
212*4882a593Smuzhiyun 	for (y = 0; y < SOLO_MOTION_SZ; y++) {
213*4882a593Smuzhiyun 		for (x = 0; x < SOLO_MOTION_SZ; x++)
214*4882a593Smuzhiyun 			buf[x] = cpu_to_le16(thresholds[y * SOLO_MOTION_SZ + x]);
215*4882a593Smuzhiyun 		ret |= solo_p2m_dma(solo_dev, 1, buf,
216*4882a593Smuzhiyun 			SOLO_MOTION_EXT_ADDR(solo_dev) + off + y * size,
217*4882a593Smuzhiyun 			size, 0, 0);
218*4882a593Smuzhiyun 	}
219*4882a593Smuzhiyun 	kfree(buf);
220*4882a593Smuzhiyun 	return ret;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun /* First 8k is motion flag (512 bytes * 16). Following that is an 8k+8k
224*4882a593Smuzhiyun  * threshold and working table for each channel. At least that's what the
225*4882a593Smuzhiyun  * spec says. However, this code (taken from rdk) has some mystery 8k
226*4882a593Smuzhiyun  * block right after the flag area, before the first thresh table. */
solo_motion_config(struct solo_dev * solo_dev)227*4882a593Smuzhiyun static void solo_motion_config(struct solo_dev *solo_dev)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	int i;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	for (i = 0; i < solo_dev->nr_chans; i++) {
232*4882a593Smuzhiyun 		/* Clear motion flag area */
233*4882a593Smuzhiyun 		solo_dma_vin_region(solo_dev, i * SOLO_MOT_FLAG_SIZE, 0x0000,
234*4882a593Smuzhiyun 				    SOLO_MOT_FLAG_SIZE);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 		/* Clear working cache table */
237*4882a593Smuzhiyun 		solo_dma_vin_region(solo_dev, SOLO_MOT_FLAG_AREA +
238*4882a593Smuzhiyun 				    (i * SOLO_MOT_THRESH_SIZE * 2) +
239*4882a593Smuzhiyun 				    SOLO_MOT_THRESH_SIZE, 0x0000,
240*4882a593Smuzhiyun 				    SOLO_MOT_THRESH_SIZE);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 		/* Set default threshold table */
243*4882a593Smuzhiyun 		solo_set_motion_threshold(solo_dev, i, SOLO_DEF_MOT_THRESH);
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	/* Default motion settings */
247*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_MOT_ADR, SOLO_VI_MOTION_EN(0) |
248*4882a593Smuzhiyun 		       (SOLO_MOTION_EXT_ADDR(solo_dev) >> 16));
249*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_MOT_CTRL,
250*4882a593Smuzhiyun 		       SOLO_VI_MOTION_FRAME_COUNT(3) |
251*4882a593Smuzhiyun 		       SOLO_VI_MOTION_SAMPLE_LENGTH(solo_dev->video_hsize / 16)
252*4882a593Smuzhiyun 		       /* | SOLO_VI_MOTION_INTR_START_STOP */
253*4882a593Smuzhiyun 		       | SOLO_VI_MOTION_SAMPLE_COUNT(10));
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_MOTION_BORDER, 0);
256*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VI_MOTION_BAR, 0);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun 
solo_disp_init(struct solo_dev * solo_dev)259*4882a593Smuzhiyun int solo_disp_init(struct solo_dev *solo_dev)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun 	int i;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	solo_dev->video_hsize = 704;
264*4882a593Smuzhiyun 	if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC) {
265*4882a593Smuzhiyun 		solo_dev->video_vsize = 240;
266*4882a593Smuzhiyun 		solo_dev->fps = 30;
267*4882a593Smuzhiyun 	} else {
268*4882a593Smuzhiyun 		solo_dev->video_vsize = 288;
269*4882a593Smuzhiyun 		solo_dev->fps = 25;
270*4882a593Smuzhiyun 	}
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun 	solo_vin_config(solo_dev);
273*4882a593Smuzhiyun 	solo_motion_config(solo_dev);
274*4882a593Smuzhiyun 	solo_vout_config(solo_dev);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	for (i = 0; i < solo_dev->nr_chans; i++)
277*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_WIN_ON(i), 1);
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	return 0;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun 
solo_disp_exit(struct solo_dev * solo_dev)282*4882a593Smuzhiyun void solo_disp_exit(struct solo_dev *solo_dev)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun 	int i;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_DISP_CTRL, 0);
287*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_ZOOM_CTRL, 0);
288*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_FREEZE_CTRL, 0);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	for (i = 0; i < solo_dev->nr_chans; i++) {
291*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_WIN_CTRL0(i), 0);
292*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_WIN_CTRL1(i), 0);
293*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VI_WIN_ON(i), 0);
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	/* Set default border */
297*4882a593Smuzhiyun 	for (i = 0; i < 5; i++)
298*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VO_BORDER_X(i), 0);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	for (i = 0; i < 5; i++)
301*4882a593Smuzhiyun 		solo_reg_write(solo_dev, SOLO_VO_BORDER_Y(i), 0);
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_BORDER_LINE_MASK, 0);
304*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_BORDER_FILL_MASK, 0);
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_CTRL(0), 0);
307*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_START(0), 0);
308*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_STOP(0), 0);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_CTRL(1), 0);
311*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_START(1), 0);
312*4882a593Smuzhiyun 	solo_reg_write(solo_dev, SOLO_VO_RECTANGLE_STOP(1), 0);
313*4882a593Smuzhiyun }
314