xref: /OK3568_Linux_fs/kernel/drivers/media/pci/saa7164/saa7164.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Driver for the NXP SAA7164 PCIe bridge
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun /*
9*4882a593Smuzhiyun 	Driver architecture
10*4882a593Smuzhiyun 	*******************
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun 	saa7164_core.c/buffer.c/cards.c/i2c.c/dvb.c
13*4882a593Smuzhiyun 		|	: Standard Linux driver framework for creating
14*4882a593Smuzhiyun 		|	: exposing and managing interfaces to the rest
15*4882a593Smuzhiyun 		|	: of the kernel or userland. Also uses _fw.c to load
16*4882a593Smuzhiyun 		|	: firmware direct into the PCIe bus, bypassing layers.
17*4882a593Smuzhiyun 		V
18*4882a593Smuzhiyun 	saa7164_api..()	: Translate kernel specific functions/features
19*4882a593Smuzhiyun 		|	: into command buffers.
20*4882a593Smuzhiyun 		V
21*4882a593Smuzhiyun 	saa7164_cmd..()	: Manages the flow of command packets on/off,
22*4882a593Smuzhiyun 		|	: the bus. Deal with bus errors, timeouts etc.
23*4882a593Smuzhiyun 		V
24*4882a593Smuzhiyun 	saa7164_bus..() : Manage a read/write memory ring buffer in the
25*4882a593Smuzhiyun 		|	: PCIe Address space.
26*4882a593Smuzhiyun 		|
27*4882a593Smuzhiyun 		|		saa7164_fw...()	: Load any frimware
28*4882a593Smuzhiyun 		|			|	: direct into the device
29*4882a593Smuzhiyun 		V			V
30*4882a593Smuzhiyun 	<- ----------------- PCIe address space -------------------- ->
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include <linux/pci.h>
34*4882a593Smuzhiyun #include <linux/i2c.h>
35*4882a593Smuzhiyun #include <linux/kdev_t.h>
36*4882a593Smuzhiyun #include <linux/mutex.h>
37*4882a593Smuzhiyun #include <linux/crc32.h>
38*4882a593Smuzhiyun #include <linux/kthread.h>
39*4882a593Smuzhiyun #include <linux/freezer.h>
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #include <media/tuner.h>
42*4882a593Smuzhiyun #include <media/tveeprom.h>
43*4882a593Smuzhiyun #include <media/dvb_demux.h>
44*4882a593Smuzhiyun #include <media/dvb_frontend.h>
45*4882a593Smuzhiyun #include <media/dvb_net.h>
46*4882a593Smuzhiyun #include <media/dvbdev.h>
47*4882a593Smuzhiyun #include <media/dmxdev.h>
48*4882a593Smuzhiyun #include <media/v4l2-common.h>
49*4882a593Smuzhiyun #include <media/v4l2-ioctl.h>
50*4882a593Smuzhiyun #include <media/v4l2-device.h>
51*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
52*4882a593Smuzhiyun #include <media/v4l2-event.h>
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #include "saa7164-reg.h"
55*4882a593Smuzhiyun #include "saa7164-types.h"
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define SAA7164_MAXBOARDS 8
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #define UNSET (-1U)
60*4882a593Smuzhiyun #define SAA7164_BOARD_NOAUTO			UNSET
61*4882a593Smuzhiyun #define SAA7164_BOARD_UNKNOWN			0
62*4882a593Smuzhiyun #define SAA7164_BOARD_UNKNOWN_REV2		1
63*4882a593Smuzhiyun #define SAA7164_BOARD_UNKNOWN_REV3		2
64*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2250		3
65*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2200		4
66*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2200_2	5
67*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2200_3	6
68*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2250_2	7
69*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2250_3	8
70*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2200_4	9
71*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2200_5	10
72*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2255proto	11
73*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2255		12
74*4882a593Smuzhiyun #define SAA7164_BOARD_HAUPPAUGE_HVR2205		13
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define SAA7164_MAX_UNITS		8
77*4882a593Smuzhiyun #define SAA7164_TS_NUMBER_OF_LINES	312
78*4882a593Smuzhiyun #define SAA7164_PS_NUMBER_OF_LINES	256
79*4882a593Smuzhiyun #define SAA7164_PT_ENTRIES		16 /* (312 * 188) / 4096 */
80*4882a593Smuzhiyun #define SAA7164_MAX_ENCODER_BUFFERS	64 /* max 5secs of latency at 6Mbps */
81*4882a593Smuzhiyun #define SAA7164_MAX_VBI_BUFFERS		64
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /* Port related defines */
84*4882a593Smuzhiyun #define SAA7164_PORT_TS1	(0)
85*4882a593Smuzhiyun #define SAA7164_PORT_TS2	(SAA7164_PORT_TS1 + 1)
86*4882a593Smuzhiyun #define SAA7164_PORT_ENC1	(SAA7164_PORT_TS2 + 1)
87*4882a593Smuzhiyun #define SAA7164_PORT_ENC2	(SAA7164_PORT_ENC1 + 1)
88*4882a593Smuzhiyun #define SAA7164_PORT_VBI1	(SAA7164_PORT_ENC2 + 1)
89*4882a593Smuzhiyun #define SAA7164_PORT_VBI2	(SAA7164_PORT_VBI1 + 1)
90*4882a593Smuzhiyun #define SAA7164_MAX_PORTS	(SAA7164_PORT_VBI2 + 1)
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun #define DBGLVL_FW    4
93*4882a593Smuzhiyun #define DBGLVL_DVB   8
94*4882a593Smuzhiyun #define DBGLVL_I2C  16
95*4882a593Smuzhiyun #define DBGLVL_API  32
96*4882a593Smuzhiyun #define DBGLVL_CMD  64
97*4882a593Smuzhiyun #define DBGLVL_BUS 128
98*4882a593Smuzhiyun #define DBGLVL_IRQ 256
99*4882a593Smuzhiyun #define DBGLVL_BUF 512
100*4882a593Smuzhiyun #define DBGLVL_ENC 1024
101*4882a593Smuzhiyun #define DBGLVL_VBI 2048
102*4882a593Smuzhiyun #define DBGLVL_THR 4096
103*4882a593Smuzhiyun #define DBGLVL_CPU 8192
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun #define SAA7164_NORMS \
106*4882a593Smuzhiyun 	(V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP)
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /* TV frequency range copied from tuner-core.c */
109*4882a593Smuzhiyun #define SAA7164_TV_MIN_FREQ (44U * 16U)
110*4882a593Smuzhiyun #define SAA7164_TV_MAX_FREQ (958U * 16U)
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun enum port_t {
113*4882a593Smuzhiyun 	SAA7164_MPEG_UNDEFINED = 0,
114*4882a593Smuzhiyun 	SAA7164_MPEG_DVB,
115*4882a593Smuzhiyun 	SAA7164_MPEG_ENCODER,
116*4882a593Smuzhiyun 	SAA7164_MPEG_VBI,
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun enum saa7164_i2c_bus_nr {
120*4882a593Smuzhiyun 	SAA7164_I2C_BUS_0 = 0,
121*4882a593Smuzhiyun 	SAA7164_I2C_BUS_1,
122*4882a593Smuzhiyun 	SAA7164_I2C_BUS_2,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun enum saa7164_buffer_flags {
126*4882a593Smuzhiyun 	SAA7164_BUFFER_UNDEFINED = 0,
127*4882a593Smuzhiyun 	SAA7164_BUFFER_FREE,
128*4882a593Smuzhiyun 	SAA7164_BUFFER_BUSY,
129*4882a593Smuzhiyun 	SAA7164_BUFFER_FULL
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun enum saa7164_unit_type {
133*4882a593Smuzhiyun 	SAA7164_UNIT_UNDEFINED = 0,
134*4882a593Smuzhiyun 	SAA7164_UNIT_DIGITAL_DEMODULATOR,
135*4882a593Smuzhiyun 	SAA7164_UNIT_ANALOG_DEMODULATOR,
136*4882a593Smuzhiyun 	SAA7164_UNIT_TUNER,
137*4882a593Smuzhiyun 	SAA7164_UNIT_EEPROM,
138*4882a593Smuzhiyun 	SAA7164_UNIT_ZILOG_IRBLASTER,
139*4882a593Smuzhiyun 	SAA7164_UNIT_ENCODER,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /* The PCIe bridge doesn't grant direct access to i2c.
143*4882a593Smuzhiyun  * Instead, you address i2c devices using a uniqely
144*4882a593Smuzhiyun  * allocated 'unitid' value via a messaging API. This
145*4882a593Smuzhiyun  * is a problem. The kernel and existing demod/tuner
146*4882a593Smuzhiyun  * drivers expect to talk 'i2c', so we have to maintain
147*4882a593Smuzhiyun  * a translation layer, and a series of functions to
148*4882a593Smuzhiyun  * convert i2c bus + device address into a unit id.
149*4882a593Smuzhiyun  */
150*4882a593Smuzhiyun struct saa7164_unit {
151*4882a593Smuzhiyun 	enum saa7164_unit_type type;
152*4882a593Smuzhiyun 	u8	id;
153*4882a593Smuzhiyun 	char	*name;
154*4882a593Smuzhiyun 	enum saa7164_i2c_bus_nr i2c_bus_nr;
155*4882a593Smuzhiyun 	u8	i2c_bus_addr;
156*4882a593Smuzhiyun 	u8	i2c_reg_len;
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun struct saa7164_board {
160*4882a593Smuzhiyun 	char	*name;
161*4882a593Smuzhiyun 	enum port_t porta, portb, portc,
162*4882a593Smuzhiyun 		portd, porte, portf;
163*4882a593Smuzhiyun 	enum {
164*4882a593Smuzhiyun 		SAA7164_CHIP_UNDEFINED = 0,
165*4882a593Smuzhiyun 		SAA7164_CHIP_REV2,
166*4882a593Smuzhiyun 		SAA7164_CHIP_REV3,
167*4882a593Smuzhiyun 	} chiprev;
168*4882a593Smuzhiyun 	struct	saa7164_unit unit[SAA7164_MAX_UNITS];
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun struct saa7164_subid {
172*4882a593Smuzhiyun 	u16     subvendor;
173*4882a593Smuzhiyun 	u16     subdevice;
174*4882a593Smuzhiyun 	u32     card;
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun struct saa7164_encoder_fh {
178*4882a593Smuzhiyun 	struct v4l2_fh fh;
179*4882a593Smuzhiyun 	struct saa7164_port *port;
180*4882a593Smuzhiyun 	atomic_t v4l_reading;
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun struct saa7164_vbi_fh {
184*4882a593Smuzhiyun 	struct v4l2_fh fh;
185*4882a593Smuzhiyun 	struct saa7164_port *port;
186*4882a593Smuzhiyun 	atomic_t v4l_reading;
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun struct saa7164_histogram_bucket {
190*4882a593Smuzhiyun 	u32 val;
191*4882a593Smuzhiyun 	u32 count;
192*4882a593Smuzhiyun 	u64 update_time;
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun struct saa7164_histogram {
196*4882a593Smuzhiyun 	char name[32];
197*4882a593Smuzhiyun 	struct saa7164_histogram_bucket counter1[64];
198*4882a593Smuzhiyun };
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun struct saa7164_user_buffer {
201*4882a593Smuzhiyun 	struct list_head list;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	/* Attributes */
204*4882a593Smuzhiyun 	u8  *data;
205*4882a593Smuzhiyun 	u32 pos;
206*4882a593Smuzhiyun 	u32 actual_size;
207*4882a593Smuzhiyun 
208*4882a593Smuzhiyun 	u32 crc;
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun struct saa7164_fw_status {
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	/* RISC Core details */
214*4882a593Smuzhiyun 	u32	status;
215*4882a593Smuzhiyun 	u32	mode;
216*4882a593Smuzhiyun 	u32	spec;
217*4882a593Smuzhiyun 	u32	inst;
218*4882a593Smuzhiyun 	u32	cpuload;
219*4882a593Smuzhiyun 	u32	remainheap;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	/* Firmware version */
222*4882a593Smuzhiyun 	u32	version;
223*4882a593Smuzhiyun 	u32	major;
224*4882a593Smuzhiyun 	u32	sub;
225*4882a593Smuzhiyun 	u32	rel;
226*4882a593Smuzhiyun 	u32	buildnr;
227*4882a593Smuzhiyun };
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun struct saa7164_dvb {
230*4882a593Smuzhiyun 	struct mutex lock;
231*4882a593Smuzhiyun 	struct dvb_adapter adapter;
232*4882a593Smuzhiyun 	struct dvb_frontend *frontend;
233*4882a593Smuzhiyun 	struct dvb_demux demux;
234*4882a593Smuzhiyun 	struct dmxdev dmxdev;
235*4882a593Smuzhiyun 	struct dmx_frontend fe_hw;
236*4882a593Smuzhiyun 	struct dmx_frontend fe_mem;
237*4882a593Smuzhiyun 	struct dvb_net net;
238*4882a593Smuzhiyun 	int feeding;
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun struct saa7164_i2c {
242*4882a593Smuzhiyun 	struct saa7164_dev		*dev;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	enum saa7164_i2c_bus_nr		nr;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	/* I2C I/O */
247*4882a593Smuzhiyun 	struct i2c_adapter		i2c_adap;
248*4882a593Smuzhiyun 	struct i2c_client		i2c_client;
249*4882a593Smuzhiyun 	u32				i2c_rc;
250*4882a593Smuzhiyun };
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun struct saa7164_tvnorm {
253*4882a593Smuzhiyun 	char		*name;
254*4882a593Smuzhiyun 	v4l2_std_id	id;
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun struct saa7164_encoder_params {
258*4882a593Smuzhiyun 	struct saa7164_tvnorm encodernorm;
259*4882a593Smuzhiyun 	u32 height;
260*4882a593Smuzhiyun 	u32 width;
261*4882a593Smuzhiyun 	u32 is_50hz;
262*4882a593Smuzhiyun 	u32 bitrate; /* bps */
263*4882a593Smuzhiyun 	u32 bitrate_peak; /* bps */
264*4882a593Smuzhiyun 	u32 bitrate_mode;
265*4882a593Smuzhiyun 	u32 stream_type; /* V4L2_MPEG_STREAM_TYPE_MPEG2_TS */
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	u32 audio_sampling_freq;
268*4882a593Smuzhiyun 	u32 ctl_mute;
269*4882a593Smuzhiyun 	u32 ctl_aspect;
270*4882a593Smuzhiyun 	u32 refdist;
271*4882a593Smuzhiyun 	u32 gop_size;
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun struct saa7164_vbi_params {
275*4882a593Smuzhiyun 	struct saa7164_tvnorm encodernorm;
276*4882a593Smuzhiyun 	u32 height;
277*4882a593Smuzhiyun 	u32 width;
278*4882a593Smuzhiyun 	u32 is_50hz;
279*4882a593Smuzhiyun 	u32 bitrate; /* bps */
280*4882a593Smuzhiyun 	u32 bitrate_peak; /* bps */
281*4882a593Smuzhiyun 	u32 bitrate_mode;
282*4882a593Smuzhiyun 	u32 stream_type; /* V4L2_MPEG_STREAM_TYPE_MPEG2_TS */
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	u32 audio_sampling_freq;
285*4882a593Smuzhiyun 	u32 ctl_mute;
286*4882a593Smuzhiyun 	u32 ctl_aspect;
287*4882a593Smuzhiyun 	u32 refdist;
288*4882a593Smuzhiyun 	u32 gop_size;
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun struct saa7164_port;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun struct saa7164_buffer {
294*4882a593Smuzhiyun 	struct list_head list;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	/* Note of which h/w buffer list index position we occupy */
297*4882a593Smuzhiyun 	int idx;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	struct saa7164_port *port;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	/* Hardware Specific */
302*4882a593Smuzhiyun 	/* PCI Memory allocations */
303*4882a593Smuzhiyun 	enum saa7164_buffer_flags flags; /* Free, Busy, Full */
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	/* A block of page align PCI memory */
306*4882a593Smuzhiyun 	u32 pci_size;	/* PCI allocation size in bytes */
307*4882a593Smuzhiyun 	u64 *cpu;	/* Virtual address */
308*4882a593Smuzhiyun 	dma_addr_t dma;	/* Physical address */
309*4882a593Smuzhiyun 	u32 crc;	/* Checksum for the entire buffer data */
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	/* A page table that splits the block into a number of entries */
312*4882a593Smuzhiyun 	u32 pt_size;		/* PCI allocation size in bytes */
313*4882a593Smuzhiyun 	u64 *pt_cpu;		/* Virtual address */
314*4882a593Smuzhiyun 	dma_addr_t pt_dma;	/* Physical address */
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	/* Encoder fops */
317*4882a593Smuzhiyun 	u32 pos;
318*4882a593Smuzhiyun 	u32 actual_size;
319*4882a593Smuzhiyun };
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun struct saa7164_port {
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	struct saa7164_dev *dev;
324*4882a593Smuzhiyun 	enum port_t type;
325*4882a593Smuzhiyun 	int nr;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	/* --- Generic port attributes --- */
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 	/* HW stream parameters */
330*4882a593Smuzhiyun 	struct tmHWStreamParameters hw_streamingparams;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	/* DMA configuration values, is seeded during initialization */
333*4882a593Smuzhiyun 	struct tmComResDMATermDescrHeader hwcfg;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	/* hardware specific registers */
336*4882a593Smuzhiyun 	u32 bufcounter;
337*4882a593Smuzhiyun 	u32 pitch;
338*4882a593Smuzhiyun 	u32 bufsize;
339*4882a593Smuzhiyun 	u32 bufoffset;
340*4882a593Smuzhiyun 	u32 bufptr32l;
341*4882a593Smuzhiyun 	u32 bufptr32h;
342*4882a593Smuzhiyun 	u64 bufptr64;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	u32 numpte;	/* Number of entries in array, only valid in head */
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	struct mutex dmaqueue_lock;
347*4882a593Smuzhiyun 	struct saa7164_buffer dmaqueue;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	u64 last_irq_msecs, last_svc_msecs;
350*4882a593Smuzhiyun 	u64 last_irq_msecs_diff, last_svc_msecs_diff;
351*4882a593Smuzhiyun 	u32 last_svc_wp;
352*4882a593Smuzhiyun 	u32 last_svc_rp;
353*4882a593Smuzhiyun 	u64 last_irq_svc_msecs_diff;
354*4882a593Smuzhiyun 	u64 last_read_msecs, last_read_msecs_diff;
355*4882a593Smuzhiyun 	u64 last_poll_msecs, last_poll_msecs_diff;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	struct saa7164_histogram irq_interval;
358*4882a593Smuzhiyun 	struct saa7164_histogram svc_interval;
359*4882a593Smuzhiyun 	struct saa7164_histogram irq_svc_interval;
360*4882a593Smuzhiyun 	struct saa7164_histogram read_interval;
361*4882a593Smuzhiyun 	struct saa7164_histogram poll_interval;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	/* --- DVB Transport Specific --- */
364*4882a593Smuzhiyun 	struct saa7164_dvb dvb;
365*4882a593Smuzhiyun 	struct i2c_client *i2c_client_demod;
366*4882a593Smuzhiyun 	struct i2c_client *i2c_client_tuner;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	/* --- Encoder/V4L related attributes --- */
369*4882a593Smuzhiyun 	/* Encoder */
370*4882a593Smuzhiyun 	/* Defaults established in saa7164-encoder.c */
371*4882a593Smuzhiyun 	struct saa7164_tvnorm encodernorm;
372*4882a593Smuzhiyun 	struct v4l2_ctrl_handler ctrl_handler;
373*4882a593Smuzhiyun 	v4l2_std_id std;
374*4882a593Smuzhiyun 	u32 height;
375*4882a593Smuzhiyun 	u32 width;
376*4882a593Smuzhiyun 	u32 freq;
377*4882a593Smuzhiyun 	u8 mux_input;
378*4882a593Smuzhiyun 	u8 encoder_profile;
379*4882a593Smuzhiyun 	u8 video_format;
380*4882a593Smuzhiyun 	u8 audio_format;
381*4882a593Smuzhiyun 	u8 video_resolution;
382*4882a593Smuzhiyun 	u16 ctl_brightness;
383*4882a593Smuzhiyun 	u16 ctl_contrast;
384*4882a593Smuzhiyun 	u16 ctl_hue;
385*4882a593Smuzhiyun 	u16 ctl_saturation;
386*4882a593Smuzhiyun 	u16 ctl_sharpness;
387*4882a593Smuzhiyun 	s8 ctl_volume;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	struct tmComResAFeatureDescrHeader audfeat;
390*4882a593Smuzhiyun 	struct tmComResEncoderDescrHeader encunit;
391*4882a593Smuzhiyun 	struct tmComResProcDescrHeader vidproc;
392*4882a593Smuzhiyun 	struct tmComResExtDevDescrHeader ifunit;
393*4882a593Smuzhiyun 	struct tmComResTunerDescrHeader tunerunit;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	struct work_struct workenc;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	/* V4L Encoder Video */
398*4882a593Smuzhiyun 	struct saa7164_encoder_params encoder_params;
399*4882a593Smuzhiyun 	struct video_device *v4l_device;
400*4882a593Smuzhiyun 	atomic_t v4l_reader_count;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	struct saa7164_buffer list_buf_used;
403*4882a593Smuzhiyun 	struct saa7164_buffer list_buf_free;
404*4882a593Smuzhiyun 	wait_queue_head_t wait_read;
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	/* V4L VBI */
407*4882a593Smuzhiyun 	struct tmComResVBIFormatDescrHeader vbi_fmt_ntsc;
408*4882a593Smuzhiyun 	struct saa7164_vbi_params vbi_params;
409*4882a593Smuzhiyun 	struct saa7164_port *enc_port;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	/* Debug */
412*4882a593Smuzhiyun 	u32 sync_errors;
413*4882a593Smuzhiyun 	u32 v_cc_errors;
414*4882a593Smuzhiyun 	u32 a_cc_errors;
415*4882a593Smuzhiyun 	u8 last_v_cc;
416*4882a593Smuzhiyun 	u8 last_a_cc;
417*4882a593Smuzhiyun 	u32 done_first_interrupt;
418*4882a593Smuzhiyun };
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun struct saa7164_dev {
421*4882a593Smuzhiyun 	struct list_head	devlist;
422*4882a593Smuzhiyun 	atomic_t		refcount;
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	struct v4l2_device v4l2_dev;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	/* pci stuff */
427*4882a593Smuzhiyun 	struct pci_dev	*pci;
428*4882a593Smuzhiyun 	unsigned char	pci_rev, pci_lat;
429*4882a593Smuzhiyun 	int		pci_bus, pci_slot;
430*4882a593Smuzhiyun 	u32		__iomem *lmmio;
431*4882a593Smuzhiyun 	u8		__iomem *bmmio;
432*4882a593Smuzhiyun 	u32		__iomem *lmmio2;
433*4882a593Smuzhiyun 	u8		__iomem *bmmio2;
434*4882a593Smuzhiyun 	int		pci_irqmask;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	/* board details */
437*4882a593Smuzhiyun 	int	nr;
438*4882a593Smuzhiyun 	int	hwrevision;
439*4882a593Smuzhiyun 	u32	board;
440*4882a593Smuzhiyun 	char	name[16];
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	/* firmware status */
443*4882a593Smuzhiyun 	struct saa7164_fw_status	fw_status;
444*4882a593Smuzhiyun 	u32				firmwareloaded;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	struct tmComResHWDescr		hwdesc;
447*4882a593Smuzhiyun 	struct tmComResInterfaceDescr	intfdesc;
448*4882a593Smuzhiyun 	struct tmComResBusDescr		busdesc;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	struct tmComResBusInfo		bus;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	/* Interrupt status and ack registers */
453*4882a593Smuzhiyun 	u32 int_status;
454*4882a593Smuzhiyun 	u32 int_ack;
455*4882a593Smuzhiyun 	bool msi;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	struct cmd			cmds[SAA_CMD_MAX_MSG_UNITS];
458*4882a593Smuzhiyun 	struct mutex			lock;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	/* I2c related */
461*4882a593Smuzhiyun 	struct saa7164_i2c i2c_bus[3];
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	/* Transport related */
464*4882a593Smuzhiyun 	struct saa7164_port ports[SAA7164_MAX_PORTS];
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	/* Deferred command/api interrupts handling */
467*4882a593Smuzhiyun 	struct work_struct workcmd;
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	/* A kernel thread to monitor the firmware log, used
470*4882a593Smuzhiyun 	 * only in debug mode.
471*4882a593Smuzhiyun 	 */
472*4882a593Smuzhiyun 	struct task_struct *kthread;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun };
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun extern struct list_head saa7164_devlist;
477*4882a593Smuzhiyun extern unsigned int waitsecs;
478*4882a593Smuzhiyun extern unsigned int encoder_buffers;
479*4882a593Smuzhiyun extern unsigned int vbi_buffers;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun /* ----------------------------------------------------------- */
482*4882a593Smuzhiyun /* saa7164-core.c                                              */
483*4882a593Smuzhiyun void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr);
484*4882a593Smuzhiyun void saa7164_getfirmwarestatus(struct saa7164_dev *dev);
485*4882a593Smuzhiyun u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev);
486*4882a593Smuzhiyun void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val);
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun /* ----------------------------------------------------------- */
489*4882a593Smuzhiyun /* saa7164-fw.c                                                */
490*4882a593Smuzhiyun int saa7164_downloadfirmware(struct saa7164_dev *dev);
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun /* ----------------------------------------------------------- */
493*4882a593Smuzhiyun /* saa7164-i2c.c                                               */
494*4882a593Smuzhiyun extern int saa7164_i2c_register(struct saa7164_i2c *bus);
495*4882a593Smuzhiyun extern int saa7164_i2c_unregister(struct saa7164_i2c *bus);
496*4882a593Smuzhiyun extern void saa7164_call_i2c_clients(struct saa7164_i2c *bus,
497*4882a593Smuzhiyun 	unsigned int cmd, void *arg);
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun /* ----------------------------------------------------------- */
500*4882a593Smuzhiyun /* saa7164-bus.c                                               */
501*4882a593Smuzhiyun int saa7164_bus_setup(struct saa7164_dev *dev);
502*4882a593Smuzhiyun void saa7164_bus_dump(struct saa7164_dev *dev);
503*4882a593Smuzhiyun int saa7164_bus_set(struct saa7164_dev *dev, struct tmComResInfo* msg,
504*4882a593Smuzhiyun 	void *buf);
505*4882a593Smuzhiyun int saa7164_bus_get(struct saa7164_dev *dev, struct tmComResInfo* msg,
506*4882a593Smuzhiyun 	void *buf, int peekonly);
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun /* ----------------------------------------------------------- */
509*4882a593Smuzhiyun /* saa7164-cmd.c                                               */
510*4882a593Smuzhiyun int saa7164_cmd_send(struct saa7164_dev *dev,
511*4882a593Smuzhiyun 	u8 id, enum tmComResCmd command, u16 controlselector,
512*4882a593Smuzhiyun 	u16 size, void *buf);
513*4882a593Smuzhiyun void saa7164_cmd_signal(struct saa7164_dev *dev, u8 seqno);
514*4882a593Smuzhiyun int saa7164_irq_dequeue(struct saa7164_dev *dev);
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun /* ----------------------------------------------------------- */
517*4882a593Smuzhiyun /* saa7164-api.c                                               */
518*4882a593Smuzhiyun int saa7164_api_get_fw_version(struct saa7164_dev *dev, u32 *version);
519*4882a593Smuzhiyun int saa7164_api_enum_subdevs(struct saa7164_dev *dev);
520*4882a593Smuzhiyun int saa7164_api_i2c_read(struct saa7164_i2c *bus, u8 addr, u32 reglen, u8 *reg,
521*4882a593Smuzhiyun 	u32 datalen, u8 *data);
522*4882a593Smuzhiyun int saa7164_api_i2c_write(struct saa7164_i2c *bus, u8 addr,
523*4882a593Smuzhiyun 	u32 datalen, u8 *data);
524*4882a593Smuzhiyun int saa7164_api_dif_write(struct saa7164_i2c *bus, u8 addr,
525*4882a593Smuzhiyun 	u32 datalen, u8 *data);
526*4882a593Smuzhiyun int saa7164_api_read_eeprom(struct saa7164_dev *dev, u8 *buf, int buflen);
527*4882a593Smuzhiyun int saa7164_api_set_gpiobit(struct saa7164_dev *dev, u8 unitid, u8 pin);
528*4882a593Smuzhiyun int saa7164_api_clear_gpiobit(struct saa7164_dev *dev, u8 unitid, u8 pin);
529*4882a593Smuzhiyun int saa7164_api_transition_port(struct saa7164_port *port, u8 mode);
530*4882a593Smuzhiyun int saa7164_api_initialize_dif(struct saa7164_port *port);
531*4882a593Smuzhiyun int saa7164_api_configure_dif(struct saa7164_port *port, u32 std);
532*4882a593Smuzhiyun int saa7164_api_set_encoder(struct saa7164_port *port);
533*4882a593Smuzhiyun int saa7164_api_get_encoder(struct saa7164_port *port);
534*4882a593Smuzhiyun int saa7164_api_set_aspect_ratio(struct saa7164_port *port);
535*4882a593Smuzhiyun int saa7164_api_set_usercontrol(struct saa7164_port *port, u8 ctl);
536*4882a593Smuzhiyun int saa7164_api_get_usercontrol(struct saa7164_port *port, u8 ctl);
537*4882a593Smuzhiyun int saa7164_api_set_videomux(struct saa7164_port *port);
538*4882a593Smuzhiyun int saa7164_api_audio_mute(struct saa7164_port *port, int mute);
539*4882a593Smuzhiyun int saa7164_api_set_audio_volume(struct saa7164_port *port, s8 level);
540*4882a593Smuzhiyun int saa7164_api_set_audio_std(struct saa7164_port *port);
541*4882a593Smuzhiyun int saa7164_api_set_audio_detection(struct saa7164_port *port, int autodetect);
542*4882a593Smuzhiyun int saa7164_api_get_videomux(struct saa7164_port *port);
543*4882a593Smuzhiyun int saa7164_api_set_vbi_format(struct saa7164_port *port);
544*4882a593Smuzhiyun int saa7164_api_set_debug(struct saa7164_dev *dev, u8 level);
545*4882a593Smuzhiyun int saa7164_api_collect_debug(struct saa7164_dev *dev);
546*4882a593Smuzhiyun int saa7164_api_get_load_info(struct saa7164_dev *dev,
547*4882a593Smuzhiyun 	struct tmFwInfoStruct *i);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun /* ----------------------------------------------------------- */
550*4882a593Smuzhiyun /* saa7164-cards.c                                             */
551*4882a593Smuzhiyun extern struct saa7164_board saa7164_boards[];
552*4882a593Smuzhiyun extern const unsigned int saa7164_bcount;
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun extern struct saa7164_subid saa7164_subids[];
555*4882a593Smuzhiyun extern const unsigned int saa7164_idcount;
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun extern void saa7164_card_list(struct saa7164_dev *dev);
558*4882a593Smuzhiyun extern void saa7164_gpio_setup(struct saa7164_dev *dev);
559*4882a593Smuzhiyun extern void saa7164_card_setup(struct saa7164_dev *dev);
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun extern int saa7164_i2caddr_to_reglen(struct saa7164_i2c *bus, int addr);
562*4882a593Smuzhiyun extern int saa7164_i2caddr_to_unitid(struct saa7164_i2c *bus, int addr);
563*4882a593Smuzhiyun extern char *saa7164_unitid_name(struct saa7164_dev *dev, u8 unitid);
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun /* ----------------------------------------------------------- */
566*4882a593Smuzhiyun /* saa7164-dvb.c                                               */
567*4882a593Smuzhiyun extern int saa7164_dvb_register(struct saa7164_port *port);
568*4882a593Smuzhiyun extern int saa7164_dvb_unregister(struct saa7164_port *port);
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun /* ----------------------------------------------------------- */
571*4882a593Smuzhiyun /* saa7164-buffer.c                                            */
572*4882a593Smuzhiyun extern struct saa7164_buffer *saa7164_buffer_alloc(
573*4882a593Smuzhiyun 	struct saa7164_port *port, u32 len);
574*4882a593Smuzhiyun extern int saa7164_buffer_dealloc(struct saa7164_buffer *buf);
575*4882a593Smuzhiyun extern void saa7164_buffer_display(struct saa7164_buffer *buf);
576*4882a593Smuzhiyun extern int saa7164_buffer_activate(struct saa7164_buffer *buf, int i);
577*4882a593Smuzhiyun extern int saa7164_buffer_cfg_port(struct saa7164_port *port);
578*4882a593Smuzhiyun extern struct saa7164_user_buffer *saa7164_buffer_alloc_user(
579*4882a593Smuzhiyun 	struct saa7164_dev *dev, u32 len);
580*4882a593Smuzhiyun extern void saa7164_buffer_dealloc_user(struct saa7164_user_buffer *buf);
581*4882a593Smuzhiyun extern int saa7164_buffer_zero_offsets(struct saa7164_port *port, int i);
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun /* ----------------------------------------------------------- */
584*4882a593Smuzhiyun /* saa7164-encoder.c                                            */
585*4882a593Smuzhiyun int saa7164_s_std(struct saa7164_port *port, v4l2_std_id id);
586*4882a593Smuzhiyun int saa7164_g_std(struct saa7164_port *port, v4l2_std_id *id);
587*4882a593Smuzhiyun int saa7164_enum_input(struct file *file, void *priv, struct v4l2_input *i);
588*4882a593Smuzhiyun int saa7164_g_input(struct saa7164_port *port, unsigned int *i);
589*4882a593Smuzhiyun int saa7164_s_input(struct saa7164_port *port, unsigned int i);
590*4882a593Smuzhiyun int saa7164_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t);
591*4882a593Smuzhiyun int saa7164_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t);
592*4882a593Smuzhiyun int saa7164_g_frequency(struct saa7164_port *port, struct v4l2_frequency *f);
593*4882a593Smuzhiyun int saa7164_s_frequency(struct saa7164_port *port,
594*4882a593Smuzhiyun 			const struct v4l2_frequency *f);
595*4882a593Smuzhiyun int saa7164_encoder_register(struct saa7164_port *port);
596*4882a593Smuzhiyun void saa7164_encoder_unregister(struct saa7164_port *port);
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun /* ----------------------------------------------------------- */
599*4882a593Smuzhiyun /* saa7164-vbi.c                                            */
600*4882a593Smuzhiyun int saa7164_vbi_register(struct saa7164_port *port);
601*4882a593Smuzhiyun void saa7164_vbi_unregister(struct saa7164_port *port);
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun /* ----------------------------------------------------------- */
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun extern unsigned int crc_checking;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun extern unsigned int saa_debug;
608*4882a593Smuzhiyun #define dprintk(level, fmt, arg...)\
609*4882a593Smuzhiyun 	do { if (saa_debug & level)\
610*4882a593Smuzhiyun 		printk(KERN_DEBUG "%s: " fmt, dev->name, ## arg);\
611*4882a593Smuzhiyun 	} while (0)
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun #define log_warn(fmt, arg...)\
614*4882a593Smuzhiyun 	do { \
615*4882a593Smuzhiyun 		printk(KERN_WARNING "%s: " fmt, dev->name, ## arg);\
616*4882a593Smuzhiyun 	} while (0)
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun #define saa7164_readl(reg) readl(dev->lmmio + ((reg) >> 2))
619*4882a593Smuzhiyun #define saa7164_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun #define saa7164_readb(reg)             readl(dev->bmmio + (reg))
622*4882a593Smuzhiyun #define saa7164_writeb(reg, value)     writel((value), dev->bmmio + (reg))
623*4882a593Smuzhiyun 
624