1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the NXP SAA7164 PCIe bridge
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/slab.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "saa7164.h"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /* The PCI address space for buffer handling looks like this:
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * +-u32 wide-------------+
15*4882a593Smuzhiyun * | +
16*4882a593Smuzhiyun * +-u64 wide------------------------------------+
17*4882a593Smuzhiyun * + +
18*4882a593Smuzhiyun * +----------------------+
19*4882a593Smuzhiyun * | CurrentBufferPtr + Pointer to current PCI buffer >-+
20*4882a593Smuzhiyun * +----------------------+ |
21*4882a593Smuzhiyun * | Unused + |
22*4882a593Smuzhiyun * +----------------------+ |
23*4882a593Smuzhiyun * | Pitch + = 188 (bytes) |
24*4882a593Smuzhiyun * +----------------------+ |
25*4882a593Smuzhiyun * | PCI buffer size + = pitch * number of lines (312) |
26*4882a593Smuzhiyun * +----------------------+ |
27*4882a593Smuzhiyun * |0| Buf0 Write Offset + |
28*4882a593Smuzhiyun * +----------------------+ v
29*4882a593Smuzhiyun * |1| Buf1 Write Offset + |
30*4882a593Smuzhiyun * +----------------------+ |
31*4882a593Smuzhiyun * |2| Buf2 Write Offset + |
32*4882a593Smuzhiyun * +----------------------+ |
33*4882a593Smuzhiyun * |3| Buf3 Write Offset + |
34*4882a593Smuzhiyun * +----------------------+ |
35*4882a593Smuzhiyun * ... More write offsets |
36*4882a593Smuzhiyun * +---------------------------------------------+ |
37*4882a593Smuzhiyun * +0| set of ptrs to PCI pagetables + |
38*4882a593Smuzhiyun * +---------------------------------------------+ |
39*4882a593Smuzhiyun * +1| set of ptrs to PCI pagetables + <--------+
40*4882a593Smuzhiyun * +---------------------------------------------+
41*4882a593Smuzhiyun * +2| set of ptrs to PCI pagetables +
42*4882a593Smuzhiyun * +---------------------------------------------+
43*4882a593Smuzhiyun * +3| set of ptrs to PCI pagetables + >--+
44*4882a593Smuzhiyun * +---------------------------------------------+ |
45*4882a593Smuzhiyun * ... More buffer pointers | +----------------+
46*4882a593Smuzhiyun * +->| pt[0] TS data |
47*4882a593Smuzhiyun * | +----------------+
48*4882a593Smuzhiyun * |
49*4882a593Smuzhiyun * | +----------------+
50*4882a593Smuzhiyun * +->| pt[1] TS data |
51*4882a593Smuzhiyun * | +----------------+
52*4882a593Smuzhiyun * | etc
53*4882a593Smuzhiyun */
54*4882a593Smuzhiyun
saa7164_buffer_display(struct saa7164_buffer * buf)55*4882a593Smuzhiyun void saa7164_buffer_display(struct saa7164_buffer *buf)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun struct saa7164_dev *dev = buf->port->dev;
58*4882a593Smuzhiyun int i;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun dprintk(DBGLVL_BUF, "%s() buffer @ 0x%p nr=%d\n",
61*4882a593Smuzhiyun __func__, buf, buf->idx);
62*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " pci_cpu @ 0x%p dma @ 0x%08llx len = 0x%x\n",
63*4882a593Smuzhiyun buf->cpu, (long long)buf->dma, buf->pci_size);
64*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " pt_cpu @ 0x%p pt_dma @ 0x%08llx len = 0x%x\n",
65*4882a593Smuzhiyun buf->pt_cpu, (long long)buf->pt_dma, buf->pt_size);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* Format the Page Table Entries to point into the data buffer */
68*4882a593Smuzhiyun for (i = 0 ; i < SAA7164_PT_ENTRIES; i++) {
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " pt[%02d] = 0x%p -> 0x%llx\n",
71*4882a593Smuzhiyun i, buf->pt_cpu, (u64)*(buf->pt_cpu));
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun /* Allocate a new buffer structure and associated PCI space in bytes.
76*4882a593Smuzhiyun * len must be a multiple of sizeof(u64)
77*4882a593Smuzhiyun */
saa7164_buffer_alloc(struct saa7164_port * port,u32 len)78*4882a593Smuzhiyun struct saa7164_buffer *saa7164_buffer_alloc(struct saa7164_port *port,
79*4882a593Smuzhiyun u32 len)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun struct tmHWStreamParameters *params = &port->hw_streamingparams;
82*4882a593Smuzhiyun struct saa7164_buffer *buf = NULL;
83*4882a593Smuzhiyun struct saa7164_dev *dev = port->dev;
84*4882a593Smuzhiyun int i;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun if ((len == 0) || (len >= 65536) || (len % sizeof(u64))) {
87*4882a593Smuzhiyun log_warn("%s() SAA_ERR_BAD_PARAMETER\n", __func__);
88*4882a593Smuzhiyun goto ret;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun buf = kzalloc(sizeof(*buf), GFP_KERNEL);
92*4882a593Smuzhiyun if (!buf)
93*4882a593Smuzhiyun goto ret;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun buf->idx = -1;
96*4882a593Smuzhiyun buf->port = port;
97*4882a593Smuzhiyun buf->flags = SAA7164_BUFFER_FREE;
98*4882a593Smuzhiyun buf->pos = 0;
99*4882a593Smuzhiyun buf->actual_size = params->pitch * params->numberoflines;
100*4882a593Smuzhiyun buf->crc = 0;
101*4882a593Smuzhiyun /* TODO: arg len is being ignored */
102*4882a593Smuzhiyun buf->pci_size = SAA7164_PT_ENTRIES * 0x1000;
103*4882a593Smuzhiyun buf->pt_size = (SAA7164_PT_ENTRIES * sizeof(u64)) + 0x1000;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* Allocate contiguous memory */
106*4882a593Smuzhiyun buf->cpu = pci_alloc_consistent(port->dev->pci, buf->pci_size,
107*4882a593Smuzhiyun &buf->dma);
108*4882a593Smuzhiyun if (!buf->cpu)
109*4882a593Smuzhiyun goto fail1;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun buf->pt_cpu = pci_alloc_consistent(port->dev->pci, buf->pt_size,
112*4882a593Smuzhiyun &buf->pt_dma);
113*4882a593Smuzhiyun if (!buf->pt_cpu)
114*4882a593Smuzhiyun goto fail2;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* init the buffers to a known pattern, easier during debugging */
117*4882a593Smuzhiyun memset(buf->cpu, 0xff, buf->pci_size);
118*4882a593Smuzhiyun buf->crc = crc32(0, buf->cpu, buf->actual_size);
119*4882a593Smuzhiyun memset(buf->pt_cpu, 0xff, buf->pt_size);
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun dprintk(DBGLVL_BUF, "%s() allocated buffer @ 0x%p (%d pageptrs)\n",
122*4882a593Smuzhiyun __func__, buf, params->numpagetables);
123*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " pci_cpu @ 0x%p dma @ 0x%08lx len = 0x%x\n",
124*4882a593Smuzhiyun buf->cpu, (long)buf->dma, buf->pci_size);
125*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " pt_cpu @ 0x%p pt_dma @ 0x%08lx len = 0x%x\n",
126*4882a593Smuzhiyun buf->pt_cpu, (long)buf->pt_dma, buf->pt_size);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /* Format the Page Table Entries to point into the data buffer */
129*4882a593Smuzhiyun for (i = 0 ; i < params->numpagetables; i++) {
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun *(buf->pt_cpu + i) = buf->dma + (i * 0x1000); /* TODO */
132*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " pt[%02d] = 0x%p -> 0x%llx\n",
133*4882a593Smuzhiyun i, buf->pt_cpu, (u64)*(buf->pt_cpu));
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun goto ret;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun fail2:
140*4882a593Smuzhiyun pci_free_consistent(port->dev->pci, buf->pci_size, buf->cpu, buf->dma);
141*4882a593Smuzhiyun fail1:
142*4882a593Smuzhiyun kfree(buf);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun buf = NULL;
145*4882a593Smuzhiyun ret:
146*4882a593Smuzhiyun return buf;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
saa7164_buffer_dealloc(struct saa7164_buffer * buf)149*4882a593Smuzhiyun int saa7164_buffer_dealloc(struct saa7164_buffer *buf)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun struct saa7164_dev *dev;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (!buf || !buf->port)
154*4882a593Smuzhiyun return SAA_ERR_BAD_PARAMETER;
155*4882a593Smuzhiyun dev = buf->port->dev;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun dprintk(DBGLVL_BUF, "%s() deallocating buffer @ 0x%p\n",
158*4882a593Smuzhiyun __func__, buf);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun if (buf->flags != SAA7164_BUFFER_FREE)
161*4882a593Smuzhiyun log_warn(" freeing a non-free buffer\n");
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun pci_free_consistent(dev->pci, buf->pci_size, buf->cpu, buf->dma);
164*4882a593Smuzhiyun pci_free_consistent(dev->pci, buf->pt_size, buf->pt_cpu, buf->pt_dma);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun kfree(buf);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return SAA_OK;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
saa7164_buffer_zero_offsets(struct saa7164_port * port,int i)171*4882a593Smuzhiyun int saa7164_buffer_zero_offsets(struct saa7164_port *port, int i)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun struct saa7164_dev *dev = port->dev;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if ((i < 0) || (i >= port->hwcfg.buffercount))
176*4882a593Smuzhiyun return -EINVAL;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun dprintk(DBGLVL_BUF, "%s(idx = %d)\n", __func__, i);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun saa7164_writel(port->bufoffset + (sizeof(u32) * i), 0);
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun return 0;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* Write a buffer into the hardware */
saa7164_buffer_activate(struct saa7164_buffer * buf,int i)186*4882a593Smuzhiyun int saa7164_buffer_activate(struct saa7164_buffer *buf, int i)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun struct saa7164_port *port = buf->port;
189*4882a593Smuzhiyun struct saa7164_dev *dev = port->dev;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if ((i < 0) || (i >= port->hwcfg.buffercount))
192*4882a593Smuzhiyun return -EINVAL;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun dprintk(DBGLVL_BUF, "%s(idx = %d)\n", __func__, i);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun buf->idx = i; /* Note of which buffer list index position we occupy */
197*4882a593Smuzhiyun buf->flags = SAA7164_BUFFER_BUSY;
198*4882a593Smuzhiyun buf->pos = 0;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun /* TODO: Review this in light of 32v64 assignments */
201*4882a593Smuzhiyun saa7164_writel(port->bufoffset + (sizeof(u32) * i), 0);
202*4882a593Smuzhiyun saa7164_writel(port->bufptr32h + ((sizeof(u32) * 2) * i), buf->pt_dma);
203*4882a593Smuzhiyun saa7164_writel(port->bufptr32l + ((sizeof(u32) * 2) * i), 0);
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " buf[%d] offset 0x%llx (0x%x) buf 0x%llx/%llx (0x%x/%x) nr=%d\n",
206*4882a593Smuzhiyun buf->idx,
207*4882a593Smuzhiyun (u64)port->bufoffset + (i * sizeof(u32)),
208*4882a593Smuzhiyun saa7164_readl(port->bufoffset + (sizeof(u32) * i)),
209*4882a593Smuzhiyun (u64)port->bufptr32h + ((sizeof(u32) * 2) * i),
210*4882a593Smuzhiyun (u64)port->bufptr32l + ((sizeof(u32) * 2) * i),
211*4882a593Smuzhiyun saa7164_readl(port->bufptr32h + ((sizeof(u32) * i) * 2)),
212*4882a593Smuzhiyun saa7164_readl(port->bufptr32l + ((sizeof(u32) * i) * 2)),
213*4882a593Smuzhiyun buf->idx);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun return 0;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
saa7164_buffer_cfg_port(struct saa7164_port * port)218*4882a593Smuzhiyun int saa7164_buffer_cfg_port(struct saa7164_port *port)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun struct tmHWStreamParameters *params = &port->hw_streamingparams;
221*4882a593Smuzhiyun struct saa7164_dev *dev = port->dev;
222*4882a593Smuzhiyun struct saa7164_buffer *buf;
223*4882a593Smuzhiyun struct list_head *c, *n;
224*4882a593Smuzhiyun int i = 0;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun dprintk(DBGLVL_BUF, "%s(port=%d)\n", __func__, port->nr);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun saa7164_writel(port->bufcounter, 0);
229*4882a593Smuzhiyun saa7164_writel(port->pitch, params->pitch);
230*4882a593Smuzhiyun saa7164_writel(port->bufsize, params->pitch * params->numberoflines);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " configured:\n");
233*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " lmmio 0x%p\n", dev->lmmio);
234*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " bufcounter 0x%x = 0x%x\n", port->bufcounter,
235*4882a593Smuzhiyun saa7164_readl(port->bufcounter));
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " pitch 0x%x = %d\n", port->pitch,
238*4882a593Smuzhiyun saa7164_readl(port->pitch));
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " bufsize 0x%x = %d\n", port->bufsize,
241*4882a593Smuzhiyun saa7164_readl(port->bufsize));
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " buffercount = %d\n", port->hwcfg.buffercount);
244*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " bufoffset = 0x%x\n", port->bufoffset);
245*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " bufptr32h = 0x%x\n", port->bufptr32h);
246*4882a593Smuzhiyun dprintk(DBGLVL_BUF, " bufptr32l = 0x%x\n", port->bufptr32l);
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun /* Poke the buffers and offsets into PCI space */
249*4882a593Smuzhiyun mutex_lock(&port->dmaqueue_lock);
250*4882a593Smuzhiyun list_for_each_safe(c, n, &port->dmaqueue.list) {
251*4882a593Smuzhiyun buf = list_entry(c, struct saa7164_buffer, list);
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun BUG_ON(buf->flags != SAA7164_BUFFER_FREE);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* Place the buffer in the h/w queue */
256*4882a593Smuzhiyun saa7164_buffer_activate(buf, i);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /* Don't exceed the device maximum # bufs */
259*4882a593Smuzhiyun BUG_ON(i > port->hwcfg.buffercount);
260*4882a593Smuzhiyun i++;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun mutex_unlock(&port->dmaqueue_lock);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun return 0;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
saa7164_buffer_alloc_user(struct saa7164_dev * dev,u32 len)268*4882a593Smuzhiyun struct saa7164_user_buffer *saa7164_buffer_alloc_user(struct saa7164_dev *dev,
269*4882a593Smuzhiyun u32 len)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun struct saa7164_user_buffer *buf;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun buf = kzalloc(sizeof(*buf), GFP_KERNEL);
274*4882a593Smuzhiyun if (!buf)
275*4882a593Smuzhiyun return NULL;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun buf->data = kzalloc(len, GFP_KERNEL);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (!buf->data) {
280*4882a593Smuzhiyun kfree(buf);
281*4882a593Smuzhiyun return NULL;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun buf->actual_size = len;
285*4882a593Smuzhiyun buf->pos = 0;
286*4882a593Smuzhiyun buf->crc = 0;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun dprintk(DBGLVL_BUF, "%s() allocated user buffer @ 0x%p\n",
289*4882a593Smuzhiyun __func__, buf);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun return buf;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
saa7164_buffer_dealloc_user(struct saa7164_user_buffer * buf)294*4882a593Smuzhiyun void saa7164_buffer_dealloc_user(struct saa7164_user_buffer *buf)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun if (!buf)
297*4882a593Smuzhiyun return;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun kfree(buf->data);
300*4882a593Smuzhiyun buf->data = NULL;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun kfree(buf);
303*4882a593Smuzhiyun }
304