xref: /OK3568_Linux_fs/kernel/drivers/media/pci/saa7146/hexium_gemini.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun     hexium_gemini.c - v4l2 driver for Hexium Gemini frame grabber cards
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun     Visit http://www.mihu.de/linux/saa7146/ and follow the link
6*4882a593Smuzhiyun     to "hexium" for further details about this card.
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun     Copyright (C) 2003 Michael Hunold <michael@mihu.de>
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #define DEBUG_VARIABLE debug
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <media/drv-intf/saa7146_vv.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun static int debug;
21*4882a593Smuzhiyun module_param(debug, int, 0);
22*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "debug verbosity");
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* global variables */
25*4882a593Smuzhiyun static int hexium_num;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define HEXIUM_GEMINI			4
28*4882a593Smuzhiyun #define HEXIUM_GEMINI_DUAL		5
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define HEXIUM_INPUTS	9
31*4882a593Smuzhiyun static struct v4l2_input hexium_inputs[HEXIUM_INPUTS] = {
32*4882a593Smuzhiyun 	{ 0, "CVBS 1",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
33*4882a593Smuzhiyun 	{ 1, "CVBS 2",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
34*4882a593Smuzhiyun 	{ 2, "CVBS 3",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
35*4882a593Smuzhiyun 	{ 3, "CVBS 4",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
36*4882a593Smuzhiyun 	{ 4, "CVBS 5",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
37*4882a593Smuzhiyun 	{ 5, "CVBS 6",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
38*4882a593Smuzhiyun 	{ 6, "Y/C 1",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
39*4882a593Smuzhiyun 	{ 7, "Y/C 2",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
40*4882a593Smuzhiyun 	{ 8, "Y/C 3",	V4L2_INPUT_TYPE_CAMERA,	0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #define HEXIUM_AUDIOS	0
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun struct hexium_data
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	s8 adr;
48*4882a593Smuzhiyun 	u8 byte;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define HEXIUM_GEMINI_V_1_0		1
52*4882a593Smuzhiyun #define HEXIUM_GEMINI_DUAL_V_1_0	2
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun struct hexium
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	int type;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	struct video_device	video_dev;
59*4882a593Smuzhiyun 	struct i2c_adapter	i2c_adapter;
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	int		cur_input;	/* current input */
62*4882a593Smuzhiyun 	v4l2_std_id	cur_std;	/* current standard */
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* Samsung KS0127B decoder default registers */
66*4882a593Smuzhiyun static u8 hexium_ks0127b[0x100]={
67*4882a593Smuzhiyun /*00*/ 0x00,0x52,0x30,0x40,0x01,0x0C,0x2A,0x10,
68*4882a593Smuzhiyun /*08*/ 0x00,0x00,0x00,0x60,0x00,0x00,0x0F,0x06,
69*4882a593Smuzhiyun /*10*/ 0x00,0x00,0xE4,0xC0,0x00,0x00,0x00,0x00,
70*4882a593Smuzhiyun /*18*/ 0x14,0x9B,0xFE,0xFF,0xFC,0xFF,0x03,0x22,
71*4882a593Smuzhiyun /*20*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
72*4882a593Smuzhiyun /*28*/ 0x00,0x00,0x00,0x00,0x00,0x2C,0x9B,0x00,
73*4882a593Smuzhiyun /*30*/ 0x00,0x00,0x10,0x80,0x80,0x10,0x80,0x80,
74*4882a593Smuzhiyun /*38*/ 0x01,0x04,0x00,0x00,0x00,0x29,0xC0,0x00,
75*4882a593Smuzhiyun /*40*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
76*4882a593Smuzhiyun /*48*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
77*4882a593Smuzhiyun /*50*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
78*4882a593Smuzhiyun /*58*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
79*4882a593Smuzhiyun /*60*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
80*4882a593Smuzhiyun /*68*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
81*4882a593Smuzhiyun /*70*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
82*4882a593Smuzhiyun /*78*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
83*4882a593Smuzhiyun /*80*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
84*4882a593Smuzhiyun /*88*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
85*4882a593Smuzhiyun /*90*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
86*4882a593Smuzhiyun /*98*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
87*4882a593Smuzhiyun /*A0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
88*4882a593Smuzhiyun /*A8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
89*4882a593Smuzhiyun /*B0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
90*4882a593Smuzhiyun /*B8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
91*4882a593Smuzhiyun /*C0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
92*4882a593Smuzhiyun /*C8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
93*4882a593Smuzhiyun /*D0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
94*4882a593Smuzhiyun /*D8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
95*4882a593Smuzhiyun /*E0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
96*4882a593Smuzhiyun /*E8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
97*4882a593Smuzhiyun /*F0*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
98*4882a593Smuzhiyun /*F8*/ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun static struct hexium_data hexium_pal[] = {
102*4882a593Smuzhiyun 	{ 0x01, 0x52 }, { 0x12, 0x64 }, { 0x2D, 0x2C }, { 0x2E, 0x9B }, { -1 , 0xFF }
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun static struct hexium_data hexium_ntsc[] = {
106*4882a593Smuzhiyun 	{ 0x01, 0x53 }, { 0x12, 0x04 }, { 0x2D, 0x23 }, { 0x2E, 0x81 }, { -1 , 0xFF }
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static struct hexium_data hexium_secam[] = {
110*4882a593Smuzhiyun 	{ 0x01, 0x52 }, { 0x12, 0x64 }, { 0x2D, 0x2C }, { 0x2E, 0x9B }, { -1 , 0xFF }
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun static struct hexium_data hexium_input_select[] = {
114*4882a593Smuzhiyun 	{ 0x02, 0x60 },
115*4882a593Smuzhiyun 	{ 0x02, 0x64 },
116*4882a593Smuzhiyun 	{ 0x02, 0x61 },
117*4882a593Smuzhiyun 	{ 0x02, 0x65 },
118*4882a593Smuzhiyun 	{ 0x02, 0x62 },
119*4882a593Smuzhiyun 	{ 0x02, 0x66 },
120*4882a593Smuzhiyun 	{ 0x02, 0x68 },
121*4882a593Smuzhiyun 	{ 0x02, 0x69 },
122*4882a593Smuzhiyun 	{ 0x02, 0x6A },
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun /* fixme: h_offset = 0 for Hexium Gemini *Dual*, which
126*4882a593Smuzhiyun    are currently *not* supported*/
127*4882a593Smuzhiyun static struct saa7146_standard hexium_standards[] = {
128*4882a593Smuzhiyun 	{
129*4882a593Smuzhiyun 		.name	= "PAL",	.id	= V4L2_STD_PAL,
130*4882a593Smuzhiyun 		.v_offset	= 28,	.v_field	= 288,
131*4882a593Smuzhiyun 		.h_offset	= 1,	.h_pixels	= 680,
132*4882a593Smuzhiyun 		.v_max_out	= 576,	.h_max_out	= 768,
133*4882a593Smuzhiyun 	}, {
134*4882a593Smuzhiyun 		.name	= "NTSC",	.id	= V4L2_STD_NTSC,
135*4882a593Smuzhiyun 		.v_offset	= 28,	.v_field	= 240,
136*4882a593Smuzhiyun 		.h_offset	= 1,	.h_pixels	= 640,
137*4882a593Smuzhiyun 		.v_max_out	= 480,	.h_max_out	= 640,
138*4882a593Smuzhiyun 	}, {
139*4882a593Smuzhiyun 		.name	= "SECAM",	.id	= V4L2_STD_SECAM,
140*4882a593Smuzhiyun 		.v_offset	= 28,	.v_field	= 288,
141*4882a593Smuzhiyun 		.h_offset	= 1,	.h_pixels	= 720,
142*4882a593Smuzhiyun 		.v_max_out	= 576,	.h_max_out	= 768,
143*4882a593Smuzhiyun 	}
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /* bring hardware to a sane state. this has to be done, just in case someone
147*4882a593Smuzhiyun    wants to capture from this device before it has been properly initialized.
148*4882a593Smuzhiyun    the capture engine would badly fail, because no valid signal arrives on the
149*4882a593Smuzhiyun    saa7146, thus leading to timeouts and stuff. */
hexium_init_done(struct saa7146_dev * dev)150*4882a593Smuzhiyun static int hexium_init_done(struct saa7146_dev *dev)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	struct hexium *hexium = (struct hexium *) dev->ext_priv;
153*4882a593Smuzhiyun 	union i2c_smbus_data data;
154*4882a593Smuzhiyun 	int i = 0;
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	DEB_D("hexium_init_done called\n");
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	/* initialize the helper ics to useful values */
159*4882a593Smuzhiyun 	for (i = 0; i < sizeof(hexium_ks0127b); i++) {
160*4882a593Smuzhiyun 		data.byte = hexium_ks0127b[i];
161*4882a593Smuzhiyun 		if (0 != i2c_smbus_xfer(&hexium->i2c_adapter, 0x6c, 0, I2C_SMBUS_WRITE, i, I2C_SMBUS_BYTE_DATA, &data)) {
162*4882a593Smuzhiyun 			pr_err("hexium_init_done() failed for address 0x%02x\n",
163*4882a593Smuzhiyun 			       i);
164*4882a593Smuzhiyun 		}
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	return 0;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
hexium_set_input(struct hexium * hexium,int input)170*4882a593Smuzhiyun static int hexium_set_input(struct hexium *hexium, int input)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun 	union i2c_smbus_data data;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	DEB_D("\n");
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	data.byte = hexium_input_select[input].byte;
177*4882a593Smuzhiyun 	if (0 != i2c_smbus_xfer(&hexium->i2c_adapter, 0x6c, 0, I2C_SMBUS_WRITE, hexium_input_select[input].adr, I2C_SMBUS_BYTE_DATA, &data)) {
178*4882a593Smuzhiyun 		return -1;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	return 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun 
hexium_set_standard(struct hexium * hexium,struct hexium_data * vdec)184*4882a593Smuzhiyun static int hexium_set_standard(struct hexium *hexium, struct hexium_data *vdec)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	union i2c_smbus_data data;
187*4882a593Smuzhiyun 	int i = 0;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	DEB_D("\n");
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	while (vdec[i].adr != -1) {
192*4882a593Smuzhiyun 		data.byte = vdec[i].byte;
193*4882a593Smuzhiyun 		if (0 != i2c_smbus_xfer(&hexium->i2c_adapter, 0x6c, 0, I2C_SMBUS_WRITE, vdec[i].adr, I2C_SMBUS_BYTE_DATA, &data)) {
194*4882a593Smuzhiyun 			pr_err("hexium_init_done: hexium_set_standard() failed for address 0x%02x\n",
195*4882a593Smuzhiyun 			       i);
196*4882a593Smuzhiyun 			return -1;
197*4882a593Smuzhiyun 		}
198*4882a593Smuzhiyun 		i++;
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun 	return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
vidioc_enum_input(struct file * file,void * fh,struct v4l2_input * i)203*4882a593Smuzhiyun static int vidioc_enum_input(struct file *file, void *fh, struct v4l2_input *i)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun 	DEB_EE("VIDIOC_ENUMINPUT %d\n", i->index);
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	if (i->index >= HEXIUM_INPUTS)
208*4882a593Smuzhiyun 		return -EINVAL;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	memcpy(i, &hexium_inputs[i->index], sizeof(struct v4l2_input));
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	DEB_D("v4l2_ioctl: VIDIOC_ENUMINPUT %d\n", i->index);
213*4882a593Smuzhiyun 	return 0;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
vidioc_g_input(struct file * file,void * fh,unsigned int * input)216*4882a593Smuzhiyun static int vidioc_g_input(struct file *file, void *fh, unsigned int *input)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)->dev;
219*4882a593Smuzhiyun 	struct hexium *hexium = (struct hexium *) dev->ext_priv;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	*input = hexium->cur_input;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	DEB_D("VIDIOC_G_INPUT: %d\n", *input);
224*4882a593Smuzhiyun 	return 0;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
vidioc_s_input(struct file * file,void * fh,unsigned int input)227*4882a593Smuzhiyun static int vidioc_s_input(struct file *file, void *fh, unsigned int input)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun 	struct saa7146_dev *dev = ((struct saa7146_fh *)fh)->dev;
230*4882a593Smuzhiyun 	struct hexium *hexium = (struct hexium *) dev->ext_priv;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	DEB_EE("VIDIOC_S_INPUT %d\n", input);
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	if (input >= HEXIUM_INPUTS)
235*4882a593Smuzhiyun 		return -EINVAL;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	hexium->cur_input = input;
238*4882a593Smuzhiyun 	hexium_set_input(hexium, input);
239*4882a593Smuzhiyun 	return 0;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun static struct saa7146_ext_vv vv_data;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun /* this function only gets called when the probing was successful */
hexium_attach(struct saa7146_dev * dev,struct saa7146_pci_extension_data * info)245*4882a593Smuzhiyun static int hexium_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	struct hexium *hexium;
248*4882a593Smuzhiyun 	int ret;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	DEB_EE("\n");
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	hexium = kzalloc(sizeof(*hexium), GFP_KERNEL);
253*4882a593Smuzhiyun 	if (!hexium)
254*4882a593Smuzhiyun 		return -ENOMEM;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	dev->ext_priv = hexium;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	/* enable i2c-port pins */
259*4882a593Smuzhiyun 	saa7146_write(dev, MC1, (MASK_08 | MASK_24 | MASK_10 | MASK_26));
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	strscpy(hexium->i2c_adapter.name, "hexium gemini",
262*4882a593Smuzhiyun 		sizeof(hexium->i2c_adapter.name));
263*4882a593Smuzhiyun 	saa7146_i2c_adapter_prepare(dev, &hexium->i2c_adapter, SAA7146_I2C_BUS_BIT_RATE_480);
264*4882a593Smuzhiyun 	if (i2c_add_adapter(&hexium->i2c_adapter) < 0) {
265*4882a593Smuzhiyun 		DEB_S("cannot register i2c-device. skipping.\n");
266*4882a593Smuzhiyun 		kfree(hexium);
267*4882a593Smuzhiyun 		return -EFAULT;
268*4882a593Smuzhiyun 	}
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	/*  set HWControl GPIO number 2 */
271*4882a593Smuzhiyun 	saa7146_setgpio(dev, 2, SAA7146_GPIO_OUTHI);
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	saa7146_write(dev, DD1_INIT, 0x07000700);
274*4882a593Smuzhiyun 	saa7146_write(dev, DD1_STREAM_B, 0x00000000);
275*4882a593Smuzhiyun 	saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	/* the rest */
278*4882a593Smuzhiyun 	hexium->cur_input = 0;
279*4882a593Smuzhiyun 	hexium_init_done(dev);
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	hexium_set_standard(hexium, hexium_pal);
282*4882a593Smuzhiyun 	hexium->cur_std = V4L2_STD_PAL;
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	hexium_set_input(hexium, 0);
285*4882a593Smuzhiyun 	hexium->cur_input = 0;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	ret = saa7146_vv_init(dev, &vv_data);
288*4882a593Smuzhiyun 	if (ret) {
289*4882a593Smuzhiyun 		i2c_del_adapter(&hexium->i2c_adapter);
290*4882a593Smuzhiyun 		kfree(hexium);
291*4882a593Smuzhiyun 		return ret;
292*4882a593Smuzhiyun 	}
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	vv_data.vid_ops.vidioc_enum_input = vidioc_enum_input;
295*4882a593Smuzhiyun 	vv_data.vid_ops.vidioc_g_input = vidioc_g_input;
296*4882a593Smuzhiyun 	vv_data.vid_ops.vidioc_s_input = vidioc_s_input;
297*4882a593Smuzhiyun 	ret = saa7146_register_device(&hexium->video_dev, dev, "hexium gemini", VFL_TYPE_VIDEO);
298*4882a593Smuzhiyun 	if (ret < 0) {
299*4882a593Smuzhiyun 		pr_err("cannot register capture v4l2 device. skipping.\n");
300*4882a593Smuzhiyun 		saa7146_vv_release(dev);
301*4882a593Smuzhiyun 		i2c_del_adapter(&hexium->i2c_adapter);
302*4882a593Smuzhiyun 		kfree(hexium);
303*4882a593Smuzhiyun 		return ret;
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	pr_info("found 'hexium gemini' frame grabber-%d\n", hexium_num);
307*4882a593Smuzhiyun 	hexium_num++;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun 
hexium_detach(struct saa7146_dev * dev)312*4882a593Smuzhiyun static int hexium_detach(struct saa7146_dev *dev)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun 	struct hexium *hexium = (struct hexium *) dev->ext_priv;
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	DEB_EE("dev:%p\n", dev);
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	saa7146_unregister_device(&hexium->video_dev, dev);
319*4882a593Smuzhiyun 	saa7146_vv_release(dev);
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	hexium_num--;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	i2c_del_adapter(&hexium->i2c_adapter);
324*4882a593Smuzhiyun 	kfree(hexium);
325*4882a593Smuzhiyun 	return 0;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun 
std_callback(struct saa7146_dev * dev,struct saa7146_standard * std)328*4882a593Smuzhiyun static int std_callback(struct saa7146_dev *dev, struct saa7146_standard *std)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun 	struct hexium *hexium = (struct hexium *) dev->ext_priv;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	if (V4L2_STD_PAL == std->id) {
333*4882a593Smuzhiyun 		hexium_set_standard(hexium, hexium_pal);
334*4882a593Smuzhiyun 		hexium->cur_std = V4L2_STD_PAL;
335*4882a593Smuzhiyun 		return 0;
336*4882a593Smuzhiyun 	} else if (V4L2_STD_NTSC == std->id) {
337*4882a593Smuzhiyun 		hexium_set_standard(hexium, hexium_ntsc);
338*4882a593Smuzhiyun 		hexium->cur_std = V4L2_STD_NTSC;
339*4882a593Smuzhiyun 		return 0;
340*4882a593Smuzhiyun 	} else if (V4L2_STD_SECAM == std->id) {
341*4882a593Smuzhiyun 		hexium_set_standard(hexium, hexium_secam);
342*4882a593Smuzhiyun 		hexium->cur_std = V4L2_STD_SECAM;
343*4882a593Smuzhiyun 		return 0;
344*4882a593Smuzhiyun 	}
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	return -1;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun static struct saa7146_extension hexium_extension;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun static struct saa7146_pci_extension_data hexium_gemini_4bnc = {
352*4882a593Smuzhiyun 	.ext_priv = "Hexium Gemini (4 BNC)",
353*4882a593Smuzhiyun 	.ext = &hexium_extension,
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun static struct saa7146_pci_extension_data hexium_gemini_dual_4bnc = {
357*4882a593Smuzhiyun 	.ext_priv = "Hexium Gemini Dual (4 BNC)",
358*4882a593Smuzhiyun 	.ext = &hexium_extension,
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun static const struct pci_device_id pci_tbl[] = {
362*4882a593Smuzhiyun 	{
363*4882a593Smuzhiyun 	 .vendor = PCI_VENDOR_ID_PHILIPS,
364*4882a593Smuzhiyun 	 .device = PCI_DEVICE_ID_PHILIPS_SAA7146,
365*4882a593Smuzhiyun 	 .subvendor = 0x17c8,
366*4882a593Smuzhiyun 	 .subdevice = 0x2401,
367*4882a593Smuzhiyun 	 .driver_data = (unsigned long) &hexium_gemini_4bnc,
368*4882a593Smuzhiyun 	 },
369*4882a593Smuzhiyun 	{
370*4882a593Smuzhiyun 	 .vendor = PCI_VENDOR_ID_PHILIPS,
371*4882a593Smuzhiyun 	 .device = PCI_DEVICE_ID_PHILIPS_SAA7146,
372*4882a593Smuzhiyun 	 .subvendor = 0x17c8,
373*4882a593Smuzhiyun 	 .subdevice = 0x2402,
374*4882a593Smuzhiyun 	 .driver_data = (unsigned long) &hexium_gemini_dual_4bnc,
375*4882a593Smuzhiyun 	 },
376*4882a593Smuzhiyun 	{
377*4882a593Smuzhiyun 	 .vendor = 0,
378*4882a593Smuzhiyun 	 }
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, pci_tbl);
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun static struct saa7146_ext_vv vv_data = {
384*4882a593Smuzhiyun 	.inputs = HEXIUM_INPUTS,
385*4882a593Smuzhiyun 	.capabilities = 0,
386*4882a593Smuzhiyun 	.stds = &hexium_standards[0],
387*4882a593Smuzhiyun 	.num_stds = ARRAY_SIZE(hexium_standards),
388*4882a593Smuzhiyun 	.std_callback = &std_callback,
389*4882a593Smuzhiyun };
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun static struct saa7146_extension hexium_extension = {
392*4882a593Smuzhiyun 	.name = "hexium gemini",
393*4882a593Smuzhiyun 	.flags = SAA7146_USE_I2C_IRQ,
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	.pci_tbl = &pci_tbl[0],
396*4882a593Smuzhiyun 	.module = THIS_MODULE,
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	.attach = hexium_attach,
399*4882a593Smuzhiyun 	.detach = hexium_detach,
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	.irq_mask = 0,
402*4882a593Smuzhiyun 	.irq_func = NULL,
403*4882a593Smuzhiyun };
404*4882a593Smuzhiyun 
hexium_init_module(void)405*4882a593Smuzhiyun static int __init hexium_init_module(void)
406*4882a593Smuzhiyun {
407*4882a593Smuzhiyun 	if (0 != saa7146_register_extension(&hexium_extension)) {
408*4882a593Smuzhiyun 		DEB_S("failed to register extension\n");
409*4882a593Smuzhiyun 		return -ENODEV;
410*4882a593Smuzhiyun 	}
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	return 0;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
hexium_cleanup_module(void)415*4882a593Smuzhiyun static void __exit hexium_cleanup_module(void)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	saa7146_unregister_extension(&hexium_extension);
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun module_init(hexium_init_module);
421*4882a593Smuzhiyun module_exit(hexium_cleanup_module);
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun MODULE_DESCRIPTION("video4linux-2 driver for Hexium Gemini frame grabber cards");
424*4882a593Smuzhiyun MODULE_AUTHOR("Michael Hunold <michael@mihu.de>");
425*4882a593Smuzhiyun MODULE_LICENSE("GPL");
426