1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * device driver for philips saa7134 based TV cards
5*4882a593Smuzhiyun * video4linux video interface
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "saa7134.h"
11*4882a593Smuzhiyun #include "saa7134-reg.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/list.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun static unsigned int vbi_debug;
21*4882a593Smuzhiyun module_param(vbi_debug, int, 0644);
22*4882a593Smuzhiyun MODULE_PARM_DESC(vbi_debug,"enable debug messages [vbi]");
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static unsigned int vbibufs = 4;
25*4882a593Smuzhiyun module_param(vbibufs, int, 0444);
26*4882a593Smuzhiyun MODULE_PARM_DESC(vbibufs,"number of vbi buffers, range 2-32");
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define vbi_dbg(fmt, arg...) do { \
29*4882a593Smuzhiyun if (vbi_debug) \
30*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("vbi: " fmt), ## arg); \
31*4882a593Smuzhiyun } while (0)
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define VBI_LINE_COUNT 17
36*4882a593Smuzhiyun #define VBI_LINE_LENGTH 2048
37*4882a593Smuzhiyun #define VBI_SCALE 0x200
38*4882a593Smuzhiyun
task_init(struct saa7134_dev * dev,struct saa7134_buf * buf,int task)39*4882a593Smuzhiyun static void task_init(struct saa7134_dev *dev, struct saa7134_buf *buf,
40*4882a593Smuzhiyun int task)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun struct saa7134_tvnorm *norm = dev->tvnorm;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* setup video scaler */
45*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_START1(task), norm->h_start & 0xff);
46*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_START2(task), norm->h_start >> 8);
47*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_STOP1(task), norm->h_stop & 0xff);
48*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_STOP2(task), norm->h_stop >> 8);
49*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_V_START1(task), norm->vbi_v_start_0 & 0xff);
50*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_V_START2(task), norm->vbi_v_start_0 >> 8);
51*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_V_STOP1(task), norm->vbi_v_stop_0 & 0xff);
52*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_V_STOP2(task), norm->vbi_v_stop_0 >> 8);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_SCALE_INC1(task), VBI_SCALE & 0xff);
55*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_SCALE_INC2(task), VBI_SCALE >> 8);
56*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_PHASE_OFFSET_LUMA(task), 0x00);
57*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_PHASE_OFFSET_CHROMA(task), 0x00);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_LEN1(task), dev->vbi_hlen & 0xff);
60*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_H_LEN2(task), dev->vbi_hlen >> 8);
61*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_V_LEN1(task), dev->vbi_vlen & 0xff);
62*4882a593Smuzhiyun saa_writeb(SAA7134_VBI_V_LEN2(task), dev->vbi_vlen >> 8);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun saa_andorb(SAA7134_DATA_PATH(task), 0xc0, 0x00);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
68*4882a593Smuzhiyun
buffer_activate(struct saa7134_dev * dev,struct saa7134_buf * buf,struct saa7134_buf * next)69*4882a593Smuzhiyun static int buffer_activate(struct saa7134_dev *dev,
70*4882a593Smuzhiyun struct saa7134_buf *buf,
71*4882a593Smuzhiyun struct saa7134_buf *next)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun struct saa7134_dmaqueue *dmaq = buf->vb2.vb2_buf.vb2_queue->drv_priv;
74*4882a593Smuzhiyun unsigned long control, base;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun vbi_dbg("buffer_activate [%p]\n", buf);
77*4882a593Smuzhiyun buf->top_seen = 0;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun task_init(dev, buf, TASK_A);
80*4882a593Smuzhiyun task_init(dev, buf, TASK_B);
81*4882a593Smuzhiyun saa_writeb(SAA7134_OFMT_DATA_A, 0x06);
82*4882a593Smuzhiyun saa_writeb(SAA7134_OFMT_DATA_B, 0x06);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* DMA: setup channel 2+3 (= VBI Task A+B) */
85*4882a593Smuzhiyun base = saa7134_buffer_base(buf);
86*4882a593Smuzhiyun control = SAA7134_RS_CONTROL_BURST_16 |
87*4882a593Smuzhiyun SAA7134_RS_CONTROL_ME |
88*4882a593Smuzhiyun (dmaq->pt.dma >> 12);
89*4882a593Smuzhiyun saa_writel(SAA7134_RS_BA1(2), base);
90*4882a593Smuzhiyun saa_writel(SAA7134_RS_BA2(2), base + dev->vbi_hlen * dev->vbi_vlen);
91*4882a593Smuzhiyun saa_writel(SAA7134_RS_PITCH(2), dev->vbi_hlen);
92*4882a593Smuzhiyun saa_writel(SAA7134_RS_CONTROL(2), control);
93*4882a593Smuzhiyun saa_writel(SAA7134_RS_BA1(3), base);
94*4882a593Smuzhiyun saa_writel(SAA7134_RS_BA2(3), base + dev->vbi_hlen * dev->vbi_vlen);
95*4882a593Smuzhiyun saa_writel(SAA7134_RS_PITCH(3), dev->vbi_hlen);
96*4882a593Smuzhiyun saa_writel(SAA7134_RS_CONTROL(3), control);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* start DMA */
99*4882a593Smuzhiyun saa7134_set_dmabits(dev);
100*4882a593Smuzhiyun mod_timer(&dmaq->timeout, jiffies + BUFFER_TIMEOUT);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
buffer_prepare(struct vb2_buffer * vb2)105*4882a593Smuzhiyun static int buffer_prepare(struct vb2_buffer *vb2)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
108*4882a593Smuzhiyun struct saa7134_dev *dev = dmaq->dev;
109*4882a593Smuzhiyun struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
110*4882a593Smuzhiyun struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
111*4882a593Smuzhiyun struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0);
112*4882a593Smuzhiyun unsigned int size;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (dma->sgl->offset) {
115*4882a593Smuzhiyun pr_err("The buffer is not page-aligned\n");
116*4882a593Smuzhiyun return -EINVAL;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun size = dev->vbi_hlen * dev->vbi_vlen * 2;
119*4882a593Smuzhiyun if (vb2_plane_size(vb2, 0) < size)
120*4882a593Smuzhiyun return -EINVAL;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun vb2_set_plane_payload(vb2, 0, size);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents,
125*4882a593Smuzhiyun saa7134_buffer_startpage(buf));
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
queue_setup(struct vb2_queue * q,unsigned int * nbuffers,unsigned int * nplanes,unsigned int sizes[],struct device * alloc_devs[])128*4882a593Smuzhiyun static int queue_setup(struct vb2_queue *q,
129*4882a593Smuzhiyun unsigned int *nbuffers, unsigned int *nplanes,
130*4882a593Smuzhiyun unsigned int sizes[], struct device *alloc_devs[])
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun struct saa7134_dmaqueue *dmaq = q->drv_priv;
133*4882a593Smuzhiyun struct saa7134_dev *dev = dmaq->dev;
134*4882a593Smuzhiyun unsigned int size;
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun dev->vbi_vlen = dev->tvnorm->vbi_v_stop_0 - dev->tvnorm->vbi_v_start_0 + 1;
137*4882a593Smuzhiyun if (dev->vbi_vlen > VBI_LINE_COUNT)
138*4882a593Smuzhiyun dev->vbi_vlen = VBI_LINE_COUNT;
139*4882a593Smuzhiyun dev->vbi_hlen = VBI_LINE_LENGTH;
140*4882a593Smuzhiyun size = dev->vbi_hlen * dev->vbi_vlen * 2;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun *nbuffers = saa7134_buffer_count(size, *nbuffers);
143*4882a593Smuzhiyun *nplanes = 1;
144*4882a593Smuzhiyun sizes[0] = size;
145*4882a593Smuzhiyun return 0;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
buffer_init(struct vb2_buffer * vb2)148*4882a593Smuzhiyun static int buffer_init(struct vb2_buffer *vb2)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv;
151*4882a593Smuzhiyun struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2);
152*4882a593Smuzhiyun struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun dmaq->curr = NULL;
155*4882a593Smuzhiyun buf->activate = buffer_activate;
156*4882a593Smuzhiyun return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun const struct vb2_ops saa7134_vbi_qops = {
160*4882a593Smuzhiyun .queue_setup = queue_setup,
161*4882a593Smuzhiyun .buf_init = buffer_init,
162*4882a593Smuzhiyun .buf_prepare = buffer_prepare,
163*4882a593Smuzhiyun .buf_queue = saa7134_vb2_buffer_queue,
164*4882a593Smuzhiyun .wait_prepare = vb2_ops_wait_prepare,
165*4882a593Smuzhiyun .wait_finish = vb2_ops_wait_finish,
166*4882a593Smuzhiyun .start_streaming = saa7134_vb2_start_streaming,
167*4882a593Smuzhiyun .stop_streaming = saa7134_vb2_stop_streaming,
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
171*4882a593Smuzhiyun
saa7134_vbi_init1(struct saa7134_dev * dev)172*4882a593Smuzhiyun int saa7134_vbi_init1(struct saa7134_dev *dev)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun INIT_LIST_HEAD(&dev->vbi_q.queue);
175*4882a593Smuzhiyun timer_setup(&dev->vbi_q.timeout, saa7134_buffer_timeout, 0);
176*4882a593Smuzhiyun dev->vbi_q.dev = dev;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun if (vbibufs < 2)
179*4882a593Smuzhiyun vbibufs = 2;
180*4882a593Smuzhiyun if (vbibufs > VIDEO_MAX_FRAME)
181*4882a593Smuzhiyun vbibufs = VIDEO_MAX_FRAME;
182*4882a593Smuzhiyun return 0;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
saa7134_vbi_fini(struct saa7134_dev * dev)185*4882a593Smuzhiyun int saa7134_vbi_fini(struct saa7134_dev *dev)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun /* nothing */
188*4882a593Smuzhiyun return 0;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
saa7134_irq_vbi_done(struct saa7134_dev * dev,unsigned long status)191*4882a593Smuzhiyun void saa7134_irq_vbi_done(struct saa7134_dev *dev, unsigned long status)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun spin_lock(&dev->slock);
194*4882a593Smuzhiyun if (dev->vbi_q.curr) {
195*4882a593Smuzhiyun /* make sure we have seen both fields */
196*4882a593Smuzhiyun if ((status & 0x10) == 0x00) {
197*4882a593Smuzhiyun dev->vbi_q.curr->top_seen = 1;
198*4882a593Smuzhiyun goto done;
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun if (!dev->vbi_q.curr->top_seen)
201*4882a593Smuzhiyun goto done;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun saa7134_buffer_finish(dev, &dev->vbi_q, VB2_BUF_STATE_DONE);
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun saa7134_buffer_next(dev, &dev->vbi_q);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun done:
208*4882a593Smuzhiyun spin_unlock(&dev->slock);
209*4882a593Smuzhiyun }
210