1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include "saa7134.h"
8*4882a593Smuzhiyun #include "saa7134-reg.h"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/list.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <media/v4l2-common.h>
17*4882a593Smuzhiyun #include <media/v4l2-event.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
22*4882a593Smuzhiyun MODULE_LICENSE("GPL");
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static unsigned int empress_nr[] = {[0 ... (SAA7134_MAXBOARDS - 1)] = UNSET };
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun module_param_array(empress_nr, int, NULL, 0444);
27*4882a593Smuzhiyun MODULE_PARM_DESC(empress_nr,"ts device number");
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
30*4882a593Smuzhiyun
start_streaming(struct vb2_queue * vq,unsigned int count)31*4882a593Smuzhiyun static int start_streaming(struct vb2_queue *vq, unsigned int count)
32*4882a593Smuzhiyun {
33*4882a593Smuzhiyun struct saa7134_dmaqueue *dmaq = vq->drv_priv;
34*4882a593Smuzhiyun struct saa7134_dev *dev = dmaq->dev;
35*4882a593Smuzhiyun u32 leading_null_bytes = 0;
36*4882a593Smuzhiyun int err;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun err = saa7134_ts_start_streaming(vq, count);
39*4882a593Smuzhiyun if (err)
40*4882a593Smuzhiyun return err;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* If more cards start to need this, then this
43*4882a593Smuzhiyun should probably be added to the card definitions. */
44*4882a593Smuzhiyun switch (dev->board) {
45*4882a593Smuzhiyun case SAA7134_BOARD_BEHOLD_M6:
46*4882a593Smuzhiyun case SAA7134_BOARD_BEHOLD_M63:
47*4882a593Smuzhiyun case SAA7134_BOARD_BEHOLD_M6_EXTRA:
48*4882a593Smuzhiyun leading_null_bytes = 1;
49*4882a593Smuzhiyun break;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun saa_call_all(dev, core, init, leading_null_bytes);
52*4882a593Smuzhiyun /* Unmute audio */
53*4882a593Smuzhiyun saa_writeb(SAA7134_AUDIO_MUTE_CTRL,
54*4882a593Smuzhiyun saa_readb(SAA7134_AUDIO_MUTE_CTRL) & ~(1 << 6));
55*4882a593Smuzhiyun dev->empress_started = 1;
56*4882a593Smuzhiyun return 0;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
stop_streaming(struct vb2_queue * vq)59*4882a593Smuzhiyun static void stop_streaming(struct vb2_queue *vq)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun struct saa7134_dmaqueue *dmaq = vq->drv_priv;
62*4882a593Smuzhiyun struct saa7134_dev *dev = dmaq->dev;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun saa7134_ts_stop_streaming(vq);
65*4882a593Smuzhiyun saa_writeb(SAA7134_SPECIAL_MODE, 0x00);
66*4882a593Smuzhiyun msleep(20);
67*4882a593Smuzhiyun saa_writeb(SAA7134_SPECIAL_MODE, 0x01);
68*4882a593Smuzhiyun msleep(100);
69*4882a593Smuzhiyun /* Mute audio */
70*4882a593Smuzhiyun saa_writeb(SAA7134_AUDIO_MUTE_CTRL,
71*4882a593Smuzhiyun saa_readb(SAA7134_AUDIO_MUTE_CTRL) | (1 << 6));
72*4882a593Smuzhiyun dev->empress_started = 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static const struct vb2_ops saa7134_empress_qops = {
76*4882a593Smuzhiyun .queue_setup = saa7134_ts_queue_setup,
77*4882a593Smuzhiyun .buf_init = saa7134_ts_buffer_init,
78*4882a593Smuzhiyun .buf_prepare = saa7134_ts_buffer_prepare,
79*4882a593Smuzhiyun .buf_queue = saa7134_vb2_buffer_queue,
80*4882a593Smuzhiyun .wait_prepare = vb2_ops_wait_prepare,
81*4882a593Smuzhiyun .wait_finish = vb2_ops_wait_finish,
82*4882a593Smuzhiyun .start_streaming = start_streaming,
83*4882a593Smuzhiyun .stop_streaming = stop_streaming,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
87*4882a593Smuzhiyun
empress_enum_fmt_vid_cap(struct file * file,void * priv,struct v4l2_fmtdesc * f)88*4882a593Smuzhiyun static int empress_enum_fmt_vid_cap(struct file *file, void *priv,
89*4882a593Smuzhiyun struct v4l2_fmtdesc *f)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun if (f->index != 0)
92*4882a593Smuzhiyun return -EINVAL;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun f->pixelformat = V4L2_PIX_FMT_MPEG;
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
empress_g_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)98*4882a593Smuzhiyun static int empress_g_fmt_vid_cap(struct file *file, void *priv,
99*4882a593Smuzhiyun struct v4l2_format *f)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun struct saa7134_dev *dev = video_drvdata(file);
102*4882a593Smuzhiyun struct v4l2_subdev_format fmt = {
103*4882a593Smuzhiyun .which = V4L2_SUBDEV_FORMAT_ACTIVE,
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun struct v4l2_mbus_framefmt *mbus_fmt = &fmt.format;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun saa_call_all(dev, pad, get_fmt, NULL, &fmt);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun v4l2_fill_pix_format(&f->fmt.pix, mbus_fmt);
110*4882a593Smuzhiyun f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
111*4882a593Smuzhiyun f->fmt.pix.sizeimage = TS_PACKET_SIZE * dev->ts.nr_packets;
112*4882a593Smuzhiyun f->fmt.pix.bytesperline = 0;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
empress_s_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)117*4882a593Smuzhiyun static int empress_s_fmt_vid_cap(struct file *file, void *priv,
118*4882a593Smuzhiyun struct v4l2_format *f)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct saa7134_dev *dev = video_drvdata(file);
121*4882a593Smuzhiyun struct v4l2_subdev_format format = {
122*4882a593Smuzhiyun .which = V4L2_SUBDEV_FORMAT_ACTIVE,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun v4l2_fill_mbus_format(&format.format, &f->fmt.pix, MEDIA_BUS_FMT_FIXED);
126*4882a593Smuzhiyun saa_call_all(dev, pad, set_fmt, NULL, &format);
127*4882a593Smuzhiyun v4l2_fill_pix_format(&f->fmt.pix, &format.format);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
130*4882a593Smuzhiyun f->fmt.pix.sizeimage = TS_PACKET_SIZE * dev->ts.nr_packets;
131*4882a593Smuzhiyun f->fmt.pix.bytesperline = 0;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
empress_try_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)136*4882a593Smuzhiyun static int empress_try_fmt_vid_cap(struct file *file, void *priv,
137*4882a593Smuzhiyun struct v4l2_format *f)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun struct saa7134_dev *dev = video_drvdata(file);
140*4882a593Smuzhiyun struct v4l2_subdev_pad_config pad_cfg;
141*4882a593Smuzhiyun struct v4l2_subdev_format format = {
142*4882a593Smuzhiyun .which = V4L2_SUBDEV_FORMAT_TRY,
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun v4l2_fill_mbus_format(&format.format, &f->fmt.pix, MEDIA_BUS_FMT_FIXED);
146*4882a593Smuzhiyun saa_call_all(dev, pad, set_fmt, &pad_cfg, &format);
147*4882a593Smuzhiyun v4l2_fill_pix_format(&f->fmt.pix, &format.format);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
150*4882a593Smuzhiyun f->fmt.pix.sizeimage = TS_PACKET_SIZE * dev->ts.nr_packets;
151*4882a593Smuzhiyun f->fmt.pix.bytesperline = 0;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun static const struct v4l2_file_operations ts_fops =
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun .owner = THIS_MODULE,
159*4882a593Smuzhiyun .open = v4l2_fh_open,
160*4882a593Smuzhiyun .release = vb2_fop_release,
161*4882a593Smuzhiyun .read = vb2_fop_read,
162*4882a593Smuzhiyun .poll = vb2_fop_poll,
163*4882a593Smuzhiyun .mmap = vb2_fop_mmap,
164*4882a593Smuzhiyun .unlocked_ioctl = video_ioctl2,
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun static const struct v4l2_ioctl_ops ts_ioctl_ops = {
168*4882a593Smuzhiyun .vidioc_querycap = saa7134_querycap,
169*4882a593Smuzhiyun .vidioc_enum_fmt_vid_cap = empress_enum_fmt_vid_cap,
170*4882a593Smuzhiyun .vidioc_try_fmt_vid_cap = empress_try_fmt_vid_cap,
171*4882a593Smuzhiyun .vidioc_s_fmt_vid_cap = empress_s_fmt_vid_cap,
172*4882a593Smuzhiyun .vidioc_g_fmt_vid_cap = empress_g_fmt_vid_cap,
173*4882a593Smuzhiyun .vidioc_reqbufs = vb2_ioctl_reqbufs,
174*4882a593Smuzhiyun .vidioc_querybuf = vb2_ioctl_querybuf,
175*4882a593Smuzhiyun .vidioc_qbuf = vb2_ioctl_qbuf,
176*4882a593Smuzhiyun .vidioc_dqbuf = vb2_ioctl_dqbuf,
177*4882a593Smuzhiyun .vidioc_expbuf = vb2_ioctl_expbuf,
178*4882a593Smuzhiyun .vidioc_streamon = vb2_ioctl_streamon,
179*4882a593Smuzhiyun .vidioc_streamoff = vb2_ioctl_streamoff,
180*4882a593Smuzhiyun .vidioc_g_frequency = saa7134_g_frequency,
181*4882a593Smuzhiyun .vidioc_s_frequency = saa7134_s_frequency,
182*4882a593Smuzhiyun .vidioc_g_tuner = saa7134_g_tuner,
183*4882a593Smuzhiyun .vidioc_s_tuner = saa7134_s_tuner,
184*4882a593Smuzhiyun .vidioc_enum_input = saa7134_enum_input,
185*4882a593Smuzhiyun .vidioc_g_input = saa7134_g_input,
186*4882a593Smuzhiyun .vidioc_s_input = saa7134_s_input,
187*4882a593Smuzhiyun .vidioc_s_std = saa7134_s_std,
188*4882a593Smuzhiyun .vidioc_g_std = saa7134_g_std,
189*4882a593Smuzhiyun .vidioc_querystd = saa7134_querystd,
190*4882a593Smuzhiyun .vidioc_log_status = v4l2_ctrl_log_status,
191*4882a593Smuzhiyun .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
192*4882a593Smuzhiyun .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun /* ----------------------------------------------------------- */
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun static const struct video_device saa7134_empress_template = {
198*4882a593Smuzhiyun .name = "saa7134-empress",
199*4882a593Smuzhiyun .fops = &ts_fops,
200*4882a593Smuzhiyun .ioctl_ops = &ts_ioctl_ops,
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun .tvnorms = SAA7134_NORMS,
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
empress_signal_update(struct work_struct * work)205*4882a593Smuzhiyun static void empress_signal_update(struct work_struct *work)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun struct saa7134_dev* dev =
208*4882a593Smuzhiyun container_of(work, struct saa7134_dev, empress_workqueue);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun if (dev->nosignal) {
211*4882a593Smuzhiyun pr_debug("no video signal\n");
212*4882a593Smuzhiyun } else {
213*4882a593Smuzhiyun pr_debug("video signal acquired\n");
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
empress_signal_change(struct saa7134_dev * dev)217*4882a593Smuzhiyun static void empress_signal_change(struct saa7134_dev *dev)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun schedule_work(&dev->empress_workqueue);
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
empress_ctrl_filter(const struct v4l2_ctrl * ctrl)222*4882a593Smuzhiyun static bool empress_ctrl_filter(const struct v4l2_ctrl *ctrl)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun switch (ctrl->id) {
225*4882a593Smuzhiyun case V4L2_CID_BRIGHTNESS:
226*4882a593Smuzhiyun case V4L2_CID_HUE:
227*4882a593Smuzhiyun case V4L2_CID_CONTRAST:
228*4882a593Smuzhiyun case V4L2_CID_SATURATION:
229*4882a593Smuzhiyun case V4L2_CID_AUDIO_MUTE:
230*4882a593Smuzhiyun case V4L2_CID_AUDIO_VOLUME:
231*4882a593Smuzhiyun case V4L2_CID_PRIVATE_INVERT:
232*4882a593Smuzhiyun case V4L2_CID_PRIVATE_AUTOMUTE:
233*4882a593Smuzhiyun return true;
234*4882a593Smuzhiyun default:
235*4882a593Smuzhiyun return false;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
empress_init(struct saa7134_dev * dev)239*4882a593Smuzhiyun static int empress_init(struct saa7134_dev *dev)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun struct v4l2_ctrl_handler *hdl = &dev->empress_ctrl_handler;
242*4882a593Smuzhiyun struct vb2_queue *q;
243*4882a593Smuzhiyun int err;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun pr_debug("%s: %s\n", dev->name, __func__);
246*4882a593Smuzhiyun dev->empress_dev = video_device_alloc();
247*4882a593Smuzhiyun if (NULL == dev->empress_dev)
248*4882a593Smuzhiyun return -ENOMEM;
249*4882a593Smuzhiyun *(dev->empress_dev) = saa7134_empress_template;
250*4882a593Smuzhiyun dev->empress_dev->v4l2_dev = &dev->v4l2_dev;
251*4882a593Smuzhiyun dev->empress_dev->release = video_device_release;
252*4882a593Smuzhiyun dev->empress_dev->lock = &dev->lock;
253*4882a593Smuzhiyun snprintf(dev->empress_dev->name, sizeof(dev->empress_dev->name),
254*4882a593Smuzhiyun "%s empress (%s)", dev->name,
255*4882a593Smuzhiyun saa7134_boards[dev->board].name);
256*4882a593Smuzhiyun v4l2_ctrl_handler_init(hdl, 21);
257*4882a593Smuzhiyun v4l2_ctrl_add_handler(hdl, &dev->ctrl_handler, empress_ctrl_filter, false);
258*4882a593Smuzhiyun if (dev->empress_sd)
259*4882a593Smuzhiyun v4l2_ctrl_add_handler(hdl, dev->empress_sd->ctrl_handler, NULL, true);
260*4882a593Smuzhiyun if (hdl->error) {
261*4882a593Smuzhiyun video_device_release(dev->empress_dev);
262*4882a593Smuzhiyun return hdl->error;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun dev->empress_dev->ctrl_handler = hdl;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun INIT_WORK(&dev->empress_workqueue, empress_signal_update);
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun q = &dev->empress_vbq;
269*4882a593Smuzhiyun q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
270*4882a593Smuzhiyun /*
271*4882a593Smuzhiyun * Do not add VB2_USERPTR: the saa7134 DMA engine cannot handle
272*4882a593Smuzhiyun * transfers that do not start at the beginning of a page. A USERPTR
273*4882a593Smuzhiyun * can start anywhere in a page, so USERPTR support is a no-go.
274*4882a593Smuzhiyun */
275*4882a593Smuzhiyun q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ;
276*4882a593Smuzhiyun q->drv_priv = &dev->ts_q;
277*4882a593Smuzhiyun q->ops = &saa7134_empress_qops;
278*4882a593Smuzhiyun q->gfp_flags = GFP_DMA32;
279*4882a593Smuzhiyun q->mem_ops = &vb2_dma_sg_memops;
280*4882a593Smuzhiyun q->buf_struct_size = sizeof(struct saa7134_buf);
281*4882a593Smuzhiyun q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
282*4882a593Smuzhiyun q->lock = &dev->lock;
283*4882a593Smuzhiyun q->dev = &dev->pci->dev;
284*4882a593Smuzhiyun err = vb2_queue_init(q);
285*4882a593Smuzhiyun if (err) {
286*4882a593Smuzhiyun video_device_release(dev->empress_dev);
287*4882a593Smuzhiyun dev->empress_dev = NULL;
288*4882a593Smuzhiyun return err;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun dev->empress_dev->queue = q;
291*4882a593Smuzhiyun dev->empress_dev->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
292*4882a593Smuzhiyun V4L2_CAP_VIDEO_CAPTURE;
293*4882a593Smuzhiyun if (dev->tuner_type != TUNER_ABSENT && dev->tuner_type != UNSET)
294*4882a593Smuzhiyun dev->empress_dev->device_caps |= V4L2_CAP_TUNER;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun video_set_drvdata(dev->empress_dev, dev);
297*4882a593Smuzhiyun err = video_register_device(dev->empress_dev,VFL_TYPE_VIDEO,
298*4882a593Smuzhiyun empress_nr[dev->nr]);
299*4882a593Smuzhiyun if (err < 0) {
300*4882a593Smuzhiyun pr_info("%s: can't register video device\n",
301*4882a593Smuzhiyun dev->name);
302*4882a593Smuzhiyun video_device_release(dev->empress_dev);
303*4882a593Smuzhiyun dev->empress_dev = NULL;
304*4882a593Smuzhiyun return err;
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun pr_info("%s: registered device %s [mpeg]\n",
307*4882a593Smuzhiyun dev->name, video_device_node_name(dev->empress_dev));
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun empress_signal_update(&dev->empress_workqueue);
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
empress_fini(struct saa7134_dev * dev)313*4882a593Smuzhiyun static int empress_fini(struct saa7134_dev *dev)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun pr_debug("%s: %s\n", dev->name, __func__);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun if (NULL == dev->empress_dev)
318*4882a593Smuzhiyun return 0;
319*4882a593Smuzhiyun flush_work(&dev->empress_workqueue);
320*4882a593Smuzhiyun vb2_video_unregister_device(dev->empress_dev);
321*4882a593Smuzhiyun v4l2_ctrl_handler_free(&dev->empress_ctrl_handler);
322*4882a593Smuzhiyun dev->empress_dev = NULL;
323*4882a593Smuzhiyun return 0;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun static struct saa7134_mpeg_ops empress_ops = {
327*4882a593Smuzhiyun .type = SAA7134_MPEG_EMPRESS,
328*4882a593Smuzhiyun .init = empress_init,
329*4882a593Smuzhiyun .fini = empress_fini,
330*4882a593Smuzhiyun .signal_change = empress_signal_change,
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun
empress_register(void)333*4882a593Smuzhiyun static int __init empress_register(void)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun return saa7134_ts_register(&empress_ops);
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun
empress_unregister(void)338*4882a593Smuzhiyun static void __exit empress_unregister(void)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun saa7134_ts_unregister(&empress_ops);
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun module_init(empress_register);
344*4882a593Smuzhiyun module_exit(empress_unregister);
345