1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Earthsoft PT3 driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <linux/dma-mapping.h>
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/pci.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "pt3.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define PT3_ACCESS_UNIT (TS_PACKET_SZ * 128)
14*4882a593Smuzhiyun #define PT3_BUF_CANARY (0x74)
15*4882a593Smuzhiyun
get_dma_base(int idx)16*4882a593Smuzhiyun static u32 get_dma_base(int idx)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun int i;
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun i = (idx == 1 || idx == 2) ? 3 - idx : idx;
21*4882a593Smuzhiyun return REG_DMA_BASE + 0x18 * i;
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
pt3_stop_dma(struct pt3_adapter * adap)24*4882a593Smuzhiyun int pt3_stop_dma(struct pt3_adapter *adap)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun struct pt3_board *pt3 = adap->dvb_adap.priv;
27*4882a593Smuzhiyun u32 base;
28*4882a593Smuzhiyun u32 stat;
29*4882a593Smuzhiyun int retry;
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun base = get_dma_base(adap->adap_idx);
32*4882a593Smuzhiyun stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
33*4882a593Smuzhiyun if (!(stat & 0x01))
34*4882a593Smuzhiyun return 0;
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
37*4882a593Smuzhiyun for (retry = 0; retry < 5; retry++) {
38*4882a593Smuzhiyun stat = ioread32(pt3->regs[0] + base + OFST_STATUS);
39*4882a593Smuzhiyun if (!(stat & 0x01))
40*4882a593Smuzhiyun return 0;
41*4882a593Smuzhiyun msleep(50);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun return -EIO;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
pt3_start_dma(struct pt3_adapter * adap)46*4882a593Smuzhiyun int pt3_start_dma(struct pt3_adapter *adap)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct pt3_board *pt3 = adap->dvb_adap.priv;
49*4882a593Smuzhiyun u32 base = get_dma_base(adap->adap_idx);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun iowrite32(0x02, pt3->regs[0] + base + OFST_DMA_CTL);
52*4882a593Smuzhiyun iowrite32(lower_32_bits(adap->desc_buf[0].b_addr),
53*4882a593Smuzhiyun pt3->regs[0] + base + OFST_DMA_DESC_L);
54*4882a593Smuzhiyun iowrite32(upper_32_bits(adap->desc_buf[0].b_addr),
55*4882a593Smuzhiyun pt3->regs[0] + base + OFST_DMA_DESC_H);
56*4882a593Smuzhiyun iowrite32(0x01, pt3->regs[0] + base + OFST_DMA_CTL);
57*4882a593Smuzhiyun return 0;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun
next_unit(struct pt3_adapter * adap,int * idx,int * ofs)61*4882a593Smuzhiyun static u8 *next_unit(struct pt3_adapter *adap, int *idx, int *ofs)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun *ofs += PT3_ACCESS_UNIT;
64*4882a593Smuzhiyun if (*ofs >= DATA_BUF_SZ) {
65*4882a593Smuzhiyun *ofs -= DATA_BUF_SZ;
66*4882a593Smuzhiyun (*idx)++;
67*4882a593Smuzhiyun if (*idx == adap->num_bufs)
68*4882a593Smuzhiyun *idx = 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun return &adap->buffer[*idx].data[*ofs];
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
pt3_proc_dma(struct pt3_adapter * adap)73*4882a593Smuzhiyun int pt3_proc_dma(struct pt3_adapter *adap)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun int idx, ofs;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun idx = adap->buf_idx;
78*4882a593Smuzhiyun ofs = adap->buf_ofs;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun if (adap->buffer[idx].data[ofs] == PT3_BUF_CANARY)
81*4882a593Smuzhiyun return 0;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun while (*next_unit(adap, &idx, &ofs) != PT3_BUF_CANARY) {
84*4882a593Smuzhiyun u8 *p;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun p = &adap->buffer[adap->buf_idx].data[adap->buf_ofs];
87*4882a593Smuzhiyun if (adap->num_discard > 0)
88*4882a593Smuzhiyun adap->num_discard--;
89*4882a593Smuzhiyun else if (adap->buf_ofs + PT3_ACCESS_UNIT > DATA_BUF_SZ) {
90*4882a593Smuzhiyun dvb_dmx_swfilter_packets(&adap->demux, p,
91*4882a593Smuzhiyun (DATA_BUF_SZ - adap->buf_ofs) / TS_PACKET_SZ);
92*4882a593Smuzhiyun dvb_dmx_swfilter_packets(&adap->demux,
93*4882a593Smuzhiyun adap->buffer[idx].data, ofs / TS_PACKET_SZ);
94*4882a593Smuzhiyun } else
95*4882a593Smuzhiyun dvb_dmx_swfilter_packets(&adap->demux, p,
96*4882a593Smuzhiyun PT3_ACCESS_UNIT / TS_PACKET_SZ);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun *p = PT3_BUF_CANARY;
99*4882a593Smuzhiyun adap->buf_idx = idx;
100*4882a593Smuzhiyun adap->buf_ofs = ofs;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
pt3_init_dmabuf(struct pt3_adapter * adap)105*4882a593Smuzhiyun void pt3_init_dmabuf(struct pt3_adapter *adap)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun int idx, ofs;
108*4882a593Smuzhiyun u8 *p;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun idx = 0;
111*4882a593Smuzhiyun ofs = 0;
112*4882a593Smuzhiyun p = adap->buffer[0].data;
113*4882a593Smuzhiyun /* mark the whole buffers as "not written yet" */
114*4882a593Smuzhiyun while (idx < adap->num_bufs) {
115*4882a593Smuzhiyun p[ofs] = PT3_BUF_CANARY;
116*4882a593Smuzhiyun ofs += PT3_ACCESS_UNIT;
117*4882a593Smuzhiyun if (ofs >= DATA_BUF_SZ) {
118*4882a593Smuzhiyun ofs -= DATA_BUF_SZ;
119*4882a593Smuzhiyun idx++;
120*4882a593Smuzhiyun p = adap->buffer[idx].data;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun adap->buf_idx = 0;
124*4882a593Smuzhiyun adap->buf_ofs = 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
pt3_free_dmabuf(struct pt3_adapter * adap)127*4882a593Smuzhiyun void pt3_free_dmabuf(struct pt3_adapter *adap)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun struct pt3_board *pt3;
130*4882a593Smuzhiyun int i;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun pt3 = adap->dvb_adap.priv;
133*4882a593Smuzhiyun for (i = 0; i < adap->num_bufs; i++)
134*4882a593Smuzhiyun dma_free_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
135*4882a593Smuzhiyun adap->buffer[i].data, adap->buffer[i].b_addr);
136*4882a593Smuzhiyun adap->num_bufs = 0;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun for (i = 0; i < adap->num_desc_bufs; i++)
139*4882a593Smuzhiyun dma_free_coherent(&pt3->pdev->dev, PAGE_SIZE,
140*4882a593Smuzhiyun adap->desc_buf[i].descs, adap->desc_buf[i].b_addr);
141*4882a593Smuzhiyun adap->num_desc_bufs = 0;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun
pt3_alloc_dmabuf(struct pt3_adapter * adap)145*4882a593Smuzhiyun int pt3_alloc_dmabuf(struct pt3_adapter *adap)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct pt3_board *pt3;
148*4882a593Smuzhiyun void *p;
149*4882a593Smuzhiyun int i, j;
150*4882a593Smuzhiyun int idx, ofs;
151*4882a593Smuzhiyun int num_desc_bufs;
152*4882a593Smuzhiyun dma_addr_t data_addr, desc_addr;
153*4882a593Smuzhiyun struct xfer_desc *d;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun pt3 = adap->dvb_adap.priv;
156*4882a593Smuzhiyun adap->num_bufs = 0;
157*4882a593Smuzhiyun adap->num_desc_bufs = 0;
158*4882a593Smuzhiyun for (i = 0; i < pt3->num_bufs; i++) {
159*4882a593Smuzhiyun p = dma_alloc_coherent(&pt3->pdev->dev, DATA_BUF_SZ,
160*4882a593Smuzhiyun &adap->buffer[i].b_addr, GFP_KERNEL);
161*4882a593Smuzhiyun if (p == NULL)
162*4882a593Smuzhiyun goto failed;
163*4882a593Smuzhiyun adap->buffer[i].data = p;
164*4882a593Smuzhiyun adap->num_bufs++;
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun pt3_init_dmabuf(adap);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* build circular-linked pointers (xfer_desc) to the data buffers*/
169*4882a593Smuzhiyun idx = 0;
170*4882a593Smuzhiyun ofs = 0;
171*4882a593Smuzhiyun num_desc_bufs =
172*4882a593Smuzhiyun DIV_ROUND_UP(adap->num_bufs * DATA_BUF_XFERS, DESCS_IN_PAGE);
173*4882a593Smuzhiyun for (i = 0; i < num_desc_bufs; i++) {
174*4882a593Smuzhiyun p = dma_alloc_coherent(&pt3->pdev->dev, PAGE_SIZE,
175*4882a593Smuzhiyun &desc_addr, GFP_KERNEL);
176*4882a593Smuzhiyun if (p == NULL)
177*4882a593Smuzhiyun goto failed;
178*4882a593Smuzhiyun adap->num_desc_bufs++;
179*4882a593Smuzhiyun adap->desc_buf[i].descs = p;
180*4882a593Smuzhiyun adap->desc_buf[i].b_addr = desc_addr;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun if (i > 0) {
183*4882a593Smuzhiyun d = &adap->desc_buf[i - 1].descs[DESCS_IN_PAGE - 1];
184*4882a593Smuzhiyun d->next_l = lower_32_bits(desc_addr);
185*4882a593Smuzhiyun d->next_h = upper_32_bits(desc_addr);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun for (j = 0; j < DESCS_IN_PAGE; j++) {
188*4882a593Smuzhiyun data_addr = adap->buffer[idx].b_addr + ofs;
189*4882a593Smuzhiyun d = &adap->desc_buf[i].descs[j];
190*4882a593Smuzhiyun d->addr_l = lower_32_bits(data_addr);
191*4882a593Smuzhiyun d->addr_h = upper_32_bits(data_addr);
192*4882a593Smuzhiyun d->size = DATA_XFER_SZ;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun desc_addr += sizeof(struct xfer_desc);
195*4882a593Smuzhiyun d->next_l = lower_32_bits(desc_addr);
196*4882a593Smuzhiyun d->next_h = upper_32_bits(desc_addr);
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun ofs += DATA_XFER_SZ;
199*4882a593Smuzhiyun if (ofs >= DATA_BUF_SZ) {
200*4882a593Smuzhiyun ofs -= DATA_BUF_SZ;
201*4882a593Smuzhiyun idx++;
202*4882a593Smuzhiyun if (idx >= adap->num_bufs) {
203*4882a593Smuzhiyun desc_addr = adap->desc_buf[0].b_addr;
204*4882a593Smuzhiyun d->next_l = lower_32_bits(desc_addr);
205*4882a593Smuzhiyun d->next_h = upper_32_bits(desc_addr);
206*4882a593Smuzhiyun return 0;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun return 0;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun failed:
214*4882a593Smuzhiyun pt3_free_dmabuf(adap);
215*4882a593Smuzhiyun return -ENOMEM;
216*4882a593Smuzhiyun }
217