xref: /OK3568_Linux_fs/kernel/drivers/media/pci/pt3/pt3.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Earthsoft PT3 driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef PT3_H
9*4882a593Smuzhiyun #define PT3_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/atomic.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <media/dvb_demux.h>
15*4882a593Smuzhiyun #include <media/dvb_frontend.h>
16*4882a593Smuzhiyun #include <media/dmxdev.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include "tc90522.h"
19*4882a593Smuzhiyun #include "mxl301rf.h"
20*4882a593Smuzhiyun #include "qm1d1c0042.h"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define DRV_NAME KBUILD_MODNAME
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define PT3_NUM_FE 4
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /*
27*4882a593Smuzhiyun  * register index of the FPGA chip
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun #define REG_VERSION	0x00
30*4882a593Smuzhiyun #define REG_BUS		0x04
31*4882a593Smuzhiyun #define REG_SYSTEM_W	0x08
32*4882a593Smuzhiyun #define REG_SYSTEM_R	0x0c
33*4882a593Smuzhiyun #define REG_I2C_W	0x10
34*4882a593Smuzhiyun #define REG_I2C_R	0x14
35*4882a593Smuzhiyun #define REG_RAM_W	0x18
36*4882a593Smuzhiyun #define REG_RAM_R	0x1c
37*4882a593Smuzhiyun #define REG_DMA_BASE	0x40	/* regs for FE[i] = REG_DMA_BASE + 0x18 * i */
38*4882a593Smuzhiyun #define OFST_DMA_DESC_L	0x00
39*4882a593Smuzhiyun #define OFST_DMA_DESC_H	0x04
40*4882a593Smuzhiyun #define OFST_DMA_CTL	0x08
41*4882a593Smuzhiyun #define OFST_TS_CTL	0x0c
42*4882a593Smuzhiyun #define OFST_STATUS	0x10
43*4882a593Smuzhiyun #define OFST_TS_ERR	0x14
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /*
46*4882a593Smuzhiyun  * internal buffer for I2C
47*4882a593Smuzhiyun  */
48*4882a593Smuzhiyun #define PT3_I2C_MAX 4091
49*4882a593Smuzhiyun struct pt3_i2cbuf {
50*4882a593Smuzhiyun 	u8  data[PT3_I2C_MAX];
51*4882a593Smuzhiyun 	u8  tmp;
52*4882a593Smuzhiyun 	u32 num_cmds;
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /*
56*4882a593Smuzhiyun  * DMA things
57*4882a593Smuzhiyun  */
58*4882a593Smuzhiyun #define TS_PACKET_SZ  188
59*4882a593Smuzhiyun /* DMA transfers must not cross 4GiB, so use one page / transfer */
60*4882a593Smuzhiyun #define DATA_XFER_SZ   4096
61*4882a593Smuzhiyun #define DATA_BUF_XFERS 47
62*4882a593Smuzhiyun /* (num_bufs * DATA_BUF_SZ) % TS_PACKET_SZ must be 0 */
63*4882a593Smuzhiyun #define DATA_BUF_SZ    (DATA_BUF_XFERS * DATA_XFER_SZ)
64*4882a593Smuzhiyun #define MAX_DATA_BUFS  16
65*4882a593Smuzhiyun #define MIN_DATA_BUFS   2
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define DESCS_IN_PAGE (PAGE_SIZE / sizeof(struct xfer_desc))
68*4882a593Smuzhiyun #define MAX_NUM_XFERS (MAX_DATA_BUFS * DATA_BUF_XFERS)
69*4882a593Smuzhiyun #define MAX_DESC_BUFS DIV_ROUND_UP(MAX_NUM_XFERS, DESCS_IN_PAGE)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* DMA transfer description.
72*4882a593Smuzhiyun  * device is passed a pointer to this struct, dma-reads it,
73*4882a593Smuzhiyun  * and gets the DMA buffer ring for storing TS data.
74*4882a593Smuzhiyun  */
75*4882a593Smuzhiyun struct xfer_desc {
76*4882a593Smuzhiyun 	u32 addr_l; /* bus address of target data buffer */
77*4882a593Smuzhiyun 	u32 addr_h;
78*4882a593Smuzhiyun 	u32 size;
79*4882a593Smuzhiyun 	u32 next_l; /* bus address of the next xfer_desc */
80*4882a593Smuzhiyun 	u32 next_h;
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /* A DMA mapping of a page containing xfer_desc's */
84*4882a593Smuzhiyun struct xfer_desc_buffer {
85*4882a593Smuzhiyun 	dma_addr_t b_addr;
86*4882a593Smuzhiyun 	struct xfer_desc *descs; /* PAGE_SIZE (xfer_desc[DESCS_IN_PAGE]) */
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun /* A DMA mapping of a data buffer */
90*4882a593Smuzhiyun struct dma_data_buffer {
91*4882a593Smuzhiyun 	dma_addr_t b_addr;
92*4882a593Smuzhiyun 	u8 *data; /* size: u8[PAGE_SIZE] */
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun  * device things
97*4882a593Smuzhiyun  */
98*4882a593Smuzhiyun struct pt3_adap_config {
99*4882a593Smuzhiyun 	struct i2c_board_info demod_info;
100*4882a593Smuzhiyun 	struct tc90522_config demod_cfg;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	struct i2c_board_info tuner_info;
103*4882a593Smuzhiyun 	union tuner_config {
104*4882a593Smuzhiyun 		struct qm1d1c0042_config qm1d1c0042;
105*4882a593Smuzhiyun 		struct mxl301rf_config   mxl301rf;
106*4882a593Smuzhiyun 	} tuner_cfg;
107*4882a593Smuzhiyun 	u32 init_freq;
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun struct pt3_adapter {
111*4882a593Smuzhiyun 	struct dvb_adapter  dvb_adap;  /* dvb_adap.priv => struct pt3_board */
112*4882a593Smuzhiyun 	int adap_idx;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	struct dvb_demux    demux;
115*4882a593Smuzhiyun 	struct dmxdev       dmxdev;
116*4882a593Smuzhiyun 	struct dvb_frontend *fe;
117*4882a593Smuzhiyun 	struct i2c_client   *i2c_demod;
118*4882a593Smuzhiyun 	struct i2c_client   *i2c_tuner;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	/* data fetch thread */
121*4882a593Smuzhiyun 	struct task_struct *thread;
122*4882a593Smuzhiyun 	int num_feeds;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	bool cur_lna;
125*4882a593Smuzhiyun 	bool cur_lnb; /* current LNB power status (on/off) */
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/* items below are for DMA */
128*4882a593Smuzhiyun 	struct dma_data_buffer buffer[MAX_DATA_BUFS];
129*4882a593Smuzhiyun 	int buf_idx;
130*4882a593Smuzhiyun 	int buf_ofs;
131*4882a593Smuzhiyun 	int num_bufs;  /* == pt3_board->num_bufs */
132*4882a593Smuzhiyun 	int num_discard; /* how many access units to discard initially */
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	struct xfer_desc_buffer desc_buf[MAX_DESC_BUFS];
135*4882a593Smuzhiyun 	int num_desc_bufs;  /* == num_bufs * DATA_BUF_XFERS / DESCS_IN_PAGE */
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun struct pt3_board {
140*4882a593Smuzhiyun 	struct pci_dev *pdev;
141*4882a593Smuzhiyun 	void __iomem *regs[2];
142*4882a593Smuzhiyun 	/* regs[0]: registers, regs[1]: internal memory, used for I2C */
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	struct mutex lock;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	/* LNB power shared among sat-FEs */
147*4882a593Smuzhiyun 	int lnb_on_cnt; /* LNB power on count */
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	/* LNA shared among terr-FEs */
150*4882a593Smuzhiyun 	int lna_on_cnt; /* booster enabled count */
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	int num_bufs;  /* number of DMA buffers allocated/mapped per FE */
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	struct i2c_adapter i2c_adap;
155*4882a593Smuzhiyun 	struct pt3_i2cbuf *i2c_buf;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	struct pt3_adapter *adaps[PT3_NUM_FE];
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun /*
162*4882a593Smuzhiyun  * prototypes
163*4882a593Smuzhiyun  */
164*4882a593Smuzhiyun extern int  pt3_alloc_dmabuf(struct pt3_adapter *adap);
165*4882a593Smuzhiyun extern void pt3_init_dmabuf(struct pt3_adapter *adap);
166*4882a593Smuzhiyun extern void pt3_free_dmabuf(struct pt3_adapter *adap);
167*4882a593Smuzhiyun extern int  pt3_start_dma(struct pt3_adapter *adap);
168*4882a593Smuzhiyun extern int  pt3_stop_dma(struct pt3_adapter *adap);
169*4882a593Smuzhiyun extern int  pt3_proc_dma(struct pt3_adapter *adap);
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun extern int  pt3_i2c_master_xfer(struct i2c_adapter *adap,
172*4882a593Smuzhiyun 				struct i2c_msg *msgs, int num);
173*4882a593Smuzhiyun extern u32  pt3_i2c_functionality(struct i2c_adapter *adap);
174*4882a593Smuzhiyun extern void pt3_i2c_reset(struct pt3_board *pt3);
175*4882a593Smuzhiyun extern int  pt3_init_all_demods(struct pt3_board *pt3);
176*4882a593Smuzhiyun extern int  pt3_init_all_mxl301rf(struct pt3_board *pt3);
177*4882a593Smuzhiyun #endif /* PT3_H */
178