xref: /OK3568_Linux_fs/kernel/drivers/media/pci/pt3/pt3.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Earthsoft PT3 driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/freezer.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/kthread.h>
11*4882a593Smuzhiyun #include <linux/mutex.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <linux/string.h>
15*4882a593Smuzhiyun #include <linux/sched/signal.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <media/dmxdev.h>
18*4882a593Smuzhiyun #include <media/dvbdev.h>
19*4882a593Smuzhiyun #include <media/dvb_demux.h>
20*4882a593Smuzhiyun #include <media/dvb_frontend.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include "pt3.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun static bool one_adapter;
27*4882a593Smuzhiyun module_param(one_adapter, bool, 0444);
28*4882a593Smuzhiyun MODULE_PARM_DESC(one_adapter, "Place FE's together under one adapter.");
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun static int num_bufs = 4;
31*4882a593Smuzhiyun module_param(num_bufs, int, 0444);
32*4882a593Smuzhiyun MODULE_PARM_DESC(num_bufs, "Number of DMA buffer (188KiB) per FE.");
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun static const struct i2c_algorithm pt3_i2c_algo = {
36*4882a593Smuzhiyun 	.master_xfer   = &pt3_i2c_master_xfer,
37*4882a593Smuzhiyun 	.functionality = &pt3_i2c_functionality,
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun static const struct pt3_adap_config adap_conf[PT3_NUM_FE] = {
41*4882a593Smuzhiyun 	{
42*4882a593Smuzhiyun 		.demod_info = {
43*4882a593Smuzhiyun 			I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x11),
44*4882a593Smuzhiyun 		},
45*4882a593Smuzhiyun 		.tuner_info = {
46*4882a593Smuzhiyun 			I2C_BOARD_INFO("qm1d1c0042", 0x63),
47*4882a593Smuzhiyun 		},
48*4882a593Smuzhiyun 		.tuner_cfg.qm1d1c0042 = {
49*4882a593Smuzhiyun 			.lpf = 1,
50*4882a593Smuzhiyun 		},
51*4882a593Smuzhiyun 		.init_freq = 1049480 - 300,
52*4882a593Smuzhiyun 	},
53*4882a593Smuzhiyun 	{
54*4882a593Smuzhiyun 		.demod_info = {
55*4882a593Smuzhiyun 			I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x10),
56*4882a593Smuzhiyun 		},
57*4882a593Smuzhiyun 		.tuner_info = {
58*4882a593Smuzhiyun 			I2C_BOARD_INFO("mxl301rf", 0x62),
59*4882a593Smuzhiyun 		},
60*4882a593Smuzhiyun 		.init_freq = 515142857,
61*4882a593Smuzhiyun 	},
62*4882a593Smuzhiyun 	{
63*4882a593Smuzhiyun 		.demod_info = {
64*4882a593Smuzhiyun 			I2C_BOARD_INFO(TC90522_I2C_DEV_SAT, 0x13),
65*4882a593Smuzhiyun 		},
66*4882a593Smuzhiyun 		.tuner_info = {
67*4882a593Smuzhiyun 			I2C_BOARD_INFO("qm1d1c0042", 0x60),
68*4882a593Smuzhiyun 		},
69*4882a593Smuzhiyun 		.tuner_cfg.qm1d1c0042 = {
70*4882a593Smuzhiyun 			.lpf = 1,
71*4882a593Smuzhiyun 		},
72*4882a593Smuzhiyun 		.init_freq = 1049480 + 300,
73*4882a593Smuzhiyun 	},
74*4882a593Smuzhiyun 	{
75*4882a593Smuzhiyun 		.demod_info = {
76*4882a593Smuzhiyun 			I2C_BOARD_INFO(TC90522_I2C_DEV_TER, 0x12),
77*4882a593Smuzhiyun 		},
78*4882a593Smuzhiyun 		.tuner_info = {
79*4882a593Smuzhiyun 			I2C_BOARD_INFO("mxl301rf", 0x61),
80*4882a593Smuzhiyun 		},
81*4882a593Smuzhiyun 		.init_freq = 521142857,
82*4882a593Smuzhiyun 	},
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun struct reg_val {
87*4882a593Smuzhiyun 	u8 reg;
88*4882a593Smuzhiyun 	u8 val;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun static int
pt3_demod_write(struct pt3_adapter * adap,const struct reg_val * data,int num)92*4882a593Smuzhiyun pt3_demod_write(struct pt3_adapter *adap, const struct reg_val *data, int num)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	struct i2c_msg msg;
95*4882a593Smuzhiyun 	int i, ret;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	ret = 0;
98*4882a593Smuzhiyun 	msg.addr = adap->i2c_demod->addr;
99*4882a593Smuzhiyun 	msg.flags = 0;
100*4882a593Smuzhiyun 	msg.len = 2;
101*4882a593Smuzhiyun 	for (i = 0; i < num; i++) {
102*4882a593Smuzhiyun 		msg.buf = (u8 *)&data[i];
103*4882a593Smuzhiyun 		ret = i2c_transfer(adap->i2c_demod->adapter, &msg, 1);
104*4882a593Smuzhiyun 		if (ret == 0)
105*4882a593Smuzhiyun 			ret = -EREMOTE;
106*4882a593Smuzhiyun 		if (ret < 0)
107*4882a593Smuzhiyun 			return ret;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 	return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
pt3_lnb_ctrl(struct pt3_board * pt3,bool on)112*4882a593Smuzhiyun static inline void pt3_lnb_ctrl(struct pt3_board *pt3, bool on)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	iowrite32((on ? 0x0f : 0x0c), pt3->regs[0] + REG_SYSTEM_W);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
pt3_find_adapter(struct dvb_frontend * fe)117*4882a593Smuzhiyun static inline struct pt3_adapter *pt3_find_adapter(struct dvb_frontend *fe)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	struct pt3_board *pt3;
120*4882a593Smuzhiyun 	int i;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	if (one_adapter) {
123*4882a593Smuzhiyun 		pt3 = fe->dvb->priv;
124*4882a593Smuzhiyun 		for (i = 0; i < PT3_NUM_FE; i++)
125*4882a593Smuzhiyun 			if (pt3->adaps[i]->fe == fe)
126*4882a593Smuzhiyun 				return pt3->adaps[i];
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 	return container_of(fe->dvb, struct pt3_adapter, dvb_adap);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /*
132*4882a593Smuzhiyun  * all 4 tuners in PT3 are packaged in a can module (Sharp VA4M6JC2103).
133*4882a593Smuzhiyun  * it seems that they share the power lines and Amp power line and
134*4882a593Smuzhiyun  * adaps[3] controls those powers.
135*4882a593Smuzhiyun  */
136*4882a593Smuzhiyun static int
pt3_set_tuner_power(struct pt3_board * pt3,bool tuner_on,bool amp_on)137*4882a593Smuzhiyun pt3_set_tuner_power(struct pt3_board *pt3, bool tuner_on, bool amp_on)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	struct reg_val rv = { 0x1e, 0x99 };
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	if (tuner_on)
142*4882a593Smuzhiyun 		rv.val |= 0x40;
143*4882a593Smuzhiyun 	if (amp_on)
144*4882a593Smuzhiyun 		rv.val |= 0x04;
145*4882a593Smuzhiyun 	return pt3_demod_write(pt3->adaps[PT3_NUM_FE - 1], &rv, 1);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
pt3_set_lna(struct dvb_frontend * fe)148*4882a593Smuzhiyun static int pt3_set_lna(struct dvb_frontend *fe)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	struct pt3_adapter *adap;
151*4882a593Smuzhiyun 	struct pt3_board *pt3;
152*4882a593Smuzhiyun 	u32 val;
153*4882a593Smuzhiyun 	int ret;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	/* LNA is shared btw. 2 TERR-tuners */
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	adap = pt3_find_adapter(fe);
158*4882a593Smuzhiyun 	val = fe->dtv_property_cache.lna;
159*4882a593Smuzhiyun 	if (val == LNA_AUTO || val == adap->cur_lna)
160*4882a593Smuzhiyun 		return 0;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	pt3 = adap->dvb_adap.priv;
163*4882a593Smuzhiyun 	if (mutex_lock_interruptible(&pt3->lock))
164*4882a593Smuzhiyun 		return -ERESTARTSYS;
165*4882a593Smuzhiyun 	if (val)
166*4882a593Smuzhiyun 		pt3->lna_on_cnt++;
167*4882a593Smuzhiyun 	else
168*4882a593Smuzhiyun 		pt3->lna_on_cnt--;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	if (val && pt3->lna_on_cnt <= 1) {
171*4882a593Smuzhiyun 		pt3->lna_on_cnt = 1;
172*4882a593Smuzhiyun 		ret = pt3_set_tuner_power(pt3, true, true);
173*4882a593Smuzhiyun 	} else if (!val && pt3->lna_on_cnt <= 0) {
174*4882a593Smuzhiyun 		pt3->lna_on_cnt = 0;
175*4882a593Smuzhiyun 		ret = pt3_set_tuner_power(pt3, true, false);
176*4882a593Smuzhiyun 	} else
177*4882a593Smuzhiyun 		ret = 0;
178*4882a593Smuzhiyun 	mutex_unlock(&pt3->lock);
179*4882a593Smuzhiyun 	adap->cur_lna = (val != 0);
180*4882a593Smuzhiyun 	return ret;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
pt3_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage volt)183*4882a593Smuzhiyun static int pt3_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage volt)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	struct pt3_adapter *adap;
186*4882a593Smuzhiyun 	struct pt3_board *pt3;
187*4882a593Smuzhiyun 	bool on;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	/* LNB power is shared btw. 2 SAT-tuners */
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	adap = pt3_find_adapter(fe);
192*4882a593Smuzhiyun 	on = (volt != SEC_VOLTAGE_OFF);
193*4882a593Smuzhiyun 	if (on == adap->cur_lnb)
194*4882a593Smuzhiyun 		return 0;
195*4882a593Smuzhiyun 	adap->cur_lnb = on;
196*4882a593Smuzhiyun 	pt3 = adap->dvb_adap.priv;
197*4882a593Smuzhiyun 	if (mutex_lock_interruptible(&pt3->lock))
198*4882a593Smuzhiyun 		return -ERESTARTSYS;
199*4882a593Smuzhiyun 	if (on)
200*4882a593Smuzhiyun 		pt3->lnb_on_cnt++;
201*4882a593Smuzhiyun 	else
202*4882a593Smuzhiyun 		pt3->lnb_on_cnt--;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (on && pt3->lnb_on_cnt <= 1) {
205*4882a593Smuzhiyun 		pt3->lnb_on_cnt = 1;
206*4882a593Smuzhiyun 		pt3_lnb_ctrl(pt3, true);
207*4882a593Smuzhiyun 	} else if (!on && pt3->lnb_on_cnt <= 0) {
208*4882a593Smuzhiyun 		pt3->lnb_on_cnt = 0;
209*4882a593Smuzhiyun 		pt3_lnb_ctrl(pt3, false);
210*4882a593Smuzhiyun 	}
211*4882a593Smuzhiyun 	mutex_unlock(&pt3->lock);
212*4882a593Smuzhiyun 	return 0;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun /* register values used in pt3_fe_init() */
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun static const struct reg_val init0_sat[] = {
218*4882a593Smuzhiyun 	{ 0x03, 0x01 },
219*4882a593Smuzhiyun 	{ 0x1e, 0x10 },
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun static const struct reg_val init0_ter[] = {
222*4882a593Smuzhiyun 	{ 0x01, 0x40 },
223*4882a593Smuzhiyun 	{ 0x1c, 0x10 },
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun static const struct reg_val cfg_sat[] = {
226*4882a593Smuzhiyun 	{ 0x1c, 0x15 },
227*4882a593Smuzhiyun 	{ 0x1f, 0x04 },
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun static const struct reg_val cfg_ter[] = {
230*4882a593Smuzhiyun 	{ 0x1d, 0x01 },
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun /*
234*4882a593Smuzhiyun  * pt3_fe_init: initialize demod sub modules and ISDB-T tuners all at once.
235*4882a593Smuzhiyun  *
236*4882a593Smuzhiyun  * As for demod IC (TC90522) and ISDB-T tuners (MxL301RF),
237*4882a593Smuzhiyun  * the i2c sequences for init'ing them are not public and hidden in a ROM,
238*4882a593Smuzhiyun  * and include the board specific configurations as well.
239*4882a593Smuzhiyun  * They are stored in a lump and cannot be taken out / accessed separately,
240*4882a593Smuzhiyun  * thus cannot be moved to the FE/tuner driver.
241*4882a593Smuzhiyun  */
pt3_fe_init(struct pt3_board * pt3)242*4882a593Smuzhiyun static int pt3_fe_init(struct pt3_board *pt3)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	int i, ret;
245*4882a593Smuzhiyun 	struct dvb_frontend *fe;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	pt3_i2c_reset(pt3);
248*4882a593Smuzhiyun 	ret = pt3_init_all_demods(pt3);
249*4882a593Smuzhiyun 	if (ret < 0) {
250*4882a593Smuzhiyun 		dev_warn(&pt3->pdev->dev, "Failed to init demod chips\n");
251*4882a593Smuzhiyun 		return ret;
252*4882a593Smuzhiyun 	}
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	/* additional config? */
255*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
256*4882a593Smuzhiyun 		fe = pt3->adaps[i]->fe;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 		if (fe->ops.delsys[0] == SYS_ISDBS)
259*4882a593Smuzhiyun 			ret = pt3_demod_write(pt3->adaps[i],
260*4882a593Smuzhiyun 					      init0_sat, ARRAY_SIZE(init0_sat));
261*4882a593Smuzhiyun 		else
262*4882a593Smuzhiyun 			ret = pt3_demod_write(pt3->adaps[i],
263*4882a593Smuzhiyun 					      init0_ter, ARRAY_SIZE(init0_ter));
264*4882a593Smuzhiyun 		if (ret < 0) {
265*4882a593Smuzhiyun 			dev_warn(&pt3->pdev->dev,
266*4882a593Smuzhiyun 				 "demod[%d] failed in init sequence0\n", i);
267*4882a593Smuzhiyun 			return ret;
268*4882a593Smuzhiyun 		}
269*4882a593Smuzhiyun 		ret = fe->ops.init(fe);
270*4882a593Smuzhiyun 		if (ret < 0)
271*4882a593Smuzhiyun 			return ret;
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	usleep_range(2000, 4000);
275*4882a593Smuzhiyun 	ret = pt3_set_tuner_power(pt3, true, false);
276*4882a593Smuzhiyun 	if (ret < 0) {
277*4882a593Smuzhiyun 		dev_warn(&pt3->pdev->dev, "Failed to control tuner module\n");
278*4882a593Smuzhiyun 		return ret;
279*4882a593Smuzhiyun 	}
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	/* output pin configuration */
282*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
283*4882a593Smuzhiyun 		fe = pt3->adaps[i]->fe;
284*4882a593Smuzhiyun 		if (fe->ops.delsys[0] == SYS_ISDBS)
285*4882a593Smuzhiyun 			ret = pt3_demod_write(pt3->adaps[i],
286*4882a593Smuzhiyun 						cfg_sat, ARRAY_SIZE(cfg_sat));
287*4882a593Smuzhiyun 		else
288*4882a593Smuzhiyun 			ret = pt3_demod_write(pt3->adaps[i],
289*4882a593Smuzhiyun 						cfg_ter, ARRAY_SIZE(cfg_ter));
290*4882a593Smuzhiyun 		if (ret < 0) {
291*4882a593Smuzhiyun 			dev_warn(&pt3->pdev->dev,
292*4882a593Smuzhiyun 				 "demod[%d] failed in init sequence1\n", i);
293*4882a593Smuzhiyun 			return ret;
294*4882a593Smuzhiyun 		}
295*4882a593Smuzhiyun 	}
296*4882a593Smuzhiyun 	usleep_range(4000, 6000);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
299*4882a593Smuzhiyun 		fe = pt3->adaps[i]->fe;
300*4882a593Smuzhiyun 		if (fe->ops.delsys[0] != SYS_ISDBS)
301*4882a593Smuzhiyun 			continue;
302*4882a593Smuzhiyun 		/* init and wake-up ISDB-S tuners */
303*4882a593Smuzhiyun 		ret = fe->ops.tuner_ops.init(fe);
304*4882a593Smuzhiyun 		if (ret < 0) {
305*4882a593Smuzhiyun 			dev_warn(&pt3->pdev->dev,
306*4882a593Smuzhiyun 				 "Failed to init SAT-tuner[%d]\n", i);
307*4882a593Smuzhiyun 			return ret;
308*4882a593Smuzhiyun 		}
309*4882a593Smuzhiyun 	}
310*4882a593Smuzhiyun 	ret = pt3_init_all_mxl301rf(pt3);
311*4882a593Smuzhiyun 	if (ret < 0) {
312*4882a593Smuzhiyun 		dev_warn(&pt3->pdev->dev, "Failed to init TERR-tuners\n");
313*4882a593Smuzhiyun 		return ret;
314*4882a593Smuzhiyun 	}
315*4882a593Smuzhiyun 
316*4882a593Smuzhiyun 	ret = pt3_set_tuner_power(pt3, true, true);
317*4882a593Smuzhiyun 	if (ret < 0) {
318*4882a593Smuzhiyun 		dev_warn(&pt3->pdev->dev, "Failed to control tuner module\n");
319*4882a593Smuzhiyun 		return ret;
320*4882a593Smuzhiyun 	}
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun 	/* Wake up all tuners and make an initial tuning,
323*4882a593Smuzhiyun 	 * in order to avoid interference among the tuners in the module,
324*4882a593Smuzhiyun 	 * according to the doc from the manufacturer.
325*4882a593Smuzhiyun 	 */
326*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
327*4882a593Smuzhiyun 		fe = pt3->adaps[i]->fe;
328*4882a593Smuzhiyun 		ret = 0;
329*4882a593Smuzhiyun 		if (fe->ops.delsys[0] == SYS_ISDBT)
330*4882a593Smuzhiyun 			ret = fe->ops.tuner_ops.init(fe);
331*4882a593Smuzhiyun 		/* set only when called from pt3_probe(), not resume() */
332*4882a593Smuzhiyun 		if (ret == 0 && fe->dtv_property_cache.frequency == 0) {
333*4882a593Smuzhiyun 			fe->dtv_property_cache.frequency =
334*4882a593Smuzhiyun 						adap_conf[i].init_freq;
335*4882a593Smuzhiyun 			ret = fe->ops.tuner_ops.set_params(fe);
336*4882a593Smuzhiyun 		}
337*4882a593Smuzhiyun 		if (ret < 0) {
338*4882a593Smuzhiyun 			dev_warn(&pt3->pdev->dev,
339*4882a593Smuzhiyun 				 "Failed in initial tuning of tuner[%d]\n", i);
340*4882a593Smuzhiyun 			return ret;
341*4882a593Smuzhiyun 		}
342*4882a593Smuzhiyun 	}
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	/* and sleep again, waiting to be opened by users. */
345*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
346*4882a593Smuzhiyun 		fe = pt3->adaps[i]->fe;
347*4882a593Smuzhiyun 		if (fe->ops.tuner_ops.sleep)
348*4882a593Smuzhiyun 			ret = fe->ops.tuner_ops.sleep(fe);
349*4882a593Smuzhiyun 		if (ret < 0)
350*4882a593Smuzhiyun 			break;
351*4882a593Smuzhiyun 		if (fe->ops.sleep)
352*4882a593Smuzhiyun 			ret = fe->ops.sleep(fe);
353*4882a593Smuzhiyun 		if (ret < 0)
354*4882a593Smuzhiyun 			break;
355*4882a593Smuzhiyun 		if (fe->ops.delsys[0] == SYS_ISDBS)
356*4882a593Smuzhiyun 			fe->ops.set_voltage = &pt3_set_voltage;
357*4882a593Smuzhiyun 		else
358*4882a593Smuzhiyun 			fe->ops.set_lna = &pt3_set_lna;
359*4882a593Smuzhiyun 	}
360*4882a593Smuzhiyun 	if (i < PT3_NUM_FE) {
361*4882a593Smuzhiyun 		dev_warn(&pt3->pdev->dev, "FE[%d] failed to standby\n", i);
362*4882a593Smuzhiyun 		return ret;
363*4882a593Smuzhiyun 	}
364*4882a593Smuzhiyun 	return 0;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 
pt3_attach_fe(struct pt3_board * pt3,int i)368*4882a593Smuzhiyun static int pt3_attach_fe(struct pt3_board *pt3, int i)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun 	const struct i2c_board_info *info;
371*4882a593Smuzhiyun 	struct tc90522_config cfg;
372*4882a593Smuzhiyun 	struct i2c_client *cl;
373*4882a593Smuzhiyun 	struct dvb_adapter *dvb_adap;
374*4882a593Smuzhiyun 	int ret;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	info = &adap_conf[i].demod_info;
377*4882a593Smuzhiyun 	cfg = adap_conf[i].demod_cfg;
378*4882a593Smuzhiyun 	cfg.tuner_i2c = NULL;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	ret = -ENODEV;
381*4882a593Smuzhiyun 	cl = dvb_module_probe("tc90522", info->type, &pt3->i2c_adap,
382*4882a593Smuzhiyun 			      info->addr, &cfg);
383*4882a593Smuzhiyun 	if (!cl)
384*4882a593Smuzhiyun 		return -ENODEV;
385*4882a593Smuzhiyun 	pt3->adaps[i]->i2c_demod = cl;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	if (!strncmp(cl->name, TC90522_I2C_DEV_SAT,
388*4882a593Smuzhiyun 		     strlen(TC90522_I2C_DEV_SAT))) {
389*4882a593Smuzhiyun 		struct qm1d1c0042_config tcfg;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 		tcfg = adap_conf[i].tuner_cfg.qm1d1c0042;
392*4882a593Smuzhiyun 		tcfg.fe = cfg.fe;
393*4882a593Smuzhiyun 		info = &adap_conf[i].tuner_info;
394*4882a593Smuzhiyun 		cl = dvb_module_probe("qm1d1c0042", info->type, cfg.tuner_i2c,
395*4882a593Smuzhiyun 				      info->addr, &tcfg);
396*4882a593Smuzhiyun 	} else {
397*4882a593Smuzhiyun 		struct mxl301rf_config tcfg;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 		tcfg = adap_conf[i].tuner_cfg.mxl301rf;
400*4882a593Smuzhiyun 		tcfg.fe = cfg.fe;
401*4882a593Smuzhiyun 		info = &adap_conf[i].tuner_info;
402*4882a593Smuzhiyun 		cl = dvb_module_probe("mxl301rf", info->type, cfg.tuner_i2c,
403*4882a593Smuzhiyun 				      info->addr, &tcfg);
404*4882a593Smuzhiyun 	}
405*4882a593Smuzhiyun 	if (!cl)
406*4882a593Smuzhiyun 		goto err_demod_module_release;
407*4882a593Smuzhiyun 	pt3->adaps[i]->i2c_tuner = cl;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	dvb_adap = &pt3->adaps[one_adapter ? 0 : i]->dvb_adap;
410*4882a593Smuzhiyun 	ret = dvb_register_frontend(dvb_adap, cfg.fe);
411*4882a593Smuzhiyun 	if (ret < 0)
412*4882a593Smuzhiyun 		goto err_tuner_module_release;
413*4882a593Smuzhiyun 	pt3->adaps[i]->fe = cfg.fe;
414*4882a593Smuzhiyun 	return 0;
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun err_tuner_module_release:
417*4882a593Smuzhiyun 	dvb_module_release(pt3->adaps[i]->i2c_tuner);
418*4882a593Smuzhiyun err_demod_module_release:
419*4882a593Smuzhiyun 	dvb_module_release(pt3->adaps[i]->i2c_demod);
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	return ret;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 
pt3_fetch_thread(void * data)425*4882a593Smuzhiyun static int pt3_fetch_thread(void *data)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	struct pt3_adapter *adap = data;
428*4882a593Smuzhiyun 	ktime_t delay;
429*4882a593Smuzhiyun 	bool was_frozen;
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun #define PT3_INITIAL_BUF_DROPS 4
432*4882a593Smuzhiyun #define PT3_FETCH_DELAY 10
433*4882a593Smuzhiyun #define PT3_FETCH_DELAY_DELTA 2
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun 	pt3_init_dmabuf(adap);
436*4882a593Smuzhiyun 	adap->num_discard = PT3_INITIAL_BUF_DROPS;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	dev_dbg(adap->dvb_adap.device, "PT3: [%s] started\n",
439*4882a593Smuzhiyun 		adap->thread->comm);
440*4882a593Smuzhiyun 	set_freezable();
441*4882a593Smuzhiyun 	while (!kthread_freezable_should_stop(&was_frozen)) {
442*4882a593Smuzhiyun 		if (was_frozen)
443*4882a593Smuzhiyun 			adap->num_discard = PT3_INITIAL_BUF_DROPS;
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 		pt3_proc_dma(adap);
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 		delay = ktime_set(0, PT3_FETCH_DELAY * NSEC_PER_MSEC);
448*4882a593Smuzhiyun 		set_current_state(TASK_UNINTERRUPTIBLE);
449*4882a593Smuzhiyun 		freezable_schedule_hrtimeout_range(&delay,
450*4882a593Smuzhiyun 					PT3_FETCH_DELAY_DELTA * NSEC_PER_MSEC,
451*4882a593Smuzhiyun 					HRTIMER_MODE_REL);
452*4882a593Smuzhiyun 	}
453*4882a593Smuzhiyun 	dev_dbg(adap->dvb_adap.device, "PT3: [%s] exited\n",
454*4882a593Smuzhiyun 		adap->thread->comm);
455*4882a593Smuzhiyun 	return 0;
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun 
pt3_start_streaming(struct pt3_adapter * adap)458*4882a593Smuzhiyun static int pt3_start_streaming(struct pt3_adapter *adap)
459*4882a593Smuzhiyun {
460*4882a593Smuzhiyun 	struct task_struct *thread;
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	/* start fetching thread */
463*4882a593Smuzhiyun 	thread = kthread_run(pt3_fetch_thread, adap, "pt3-ad%i-dmx%i",
464*4882a593Smuzhiyun 				adap->dvb_adap.num, adap->dmxdev.dvbdev->id);
465*4882a593Smuzhiyun 	if (IS_ERR(thread)) {
466*4882a593Smuzhiyun 		int ret = PTR_ERR(thread);
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 		adap->thread = NULL;
469*4882a593Smuzhiyun 		dev_warn(adap->dvb_adap.device,
470*4882a593Smuzhiyun 			 "PT3 (adap:%d, dmx:%d): failed to start kthread\n",
471*4882a593Smuzhiyun 			 adap->dvb_adap.num, adap->dmxdev.dvbdev->id);
472*4882a593Smuzhiyun 		return ret;
473*4882a593Smuzhiyun 	}
474*4882a593Smuzhiyun 	adap->thread = thread;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	return pt3_start_dma(adap);
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun 
pt3_stop_streaming(struct pt3_adapter * adap)479*4882a593Smuzhiyun static int pt3_stop_streaming(struct pt3_adapter *adap)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun 	int ret;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	ret = pt3_stop_dma(adap);
484*4882a593Smuzhiyun 	if (ret)
485*4882a593Smuzhiyun 		dev_warn(adap->dvb_adap.device,
486*4882a593Smuzhiyun 			 "PT3: failed to stop streaming of adap:%d/FE:%d\n",
487*4882a593Smuzhiyun 			 adap->dvb_adap.num, adap->fe->id);
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	/* kill the fetching thread */
490*4882a593Smuzhiyun 	ret = kthread_stop(adap->thread);
491*4882a593Smuzhiyun 	adap->thread = NULL;
492*4882a593Smuzhiyun 	return ret;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun 
pt3_start_feed(struct dvb_demux_feed * feed)495*4882a593Smuzhiyun static int pt3_start_feed(struct dvb_demux_feed *feed)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun 	struct pt3_adapter *adap;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	if (signal_pending(current))
500*4882a593Smuzhiyun 		return -EINTR;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	adap = container_of(feed->demux, struct pt3_adapter, demux);
503*4882a593Smuzhiyun 	adap->num_feeds++;
504*4882a593Smuzhiyun 	if (adap->num_feeds > 1)
505*4882a593Smuzhiyun 		return 0;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	return pt3_start_streaming(adap);
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun 
pt3_stop_feed(struct dvb_demux_feed * feed)511*4882a593Smuzhiyun static int pt3_stop_feed(struct dvb_demux_feed *feed)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun 	struct pt3_adapter *adap;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	adap = container_of(feed->demux, struct pt3_adapter, demux);
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	adap->num_feeds--;
518*4882a593Smuzhiyun 	if (adap->num_feeds > 0 || !adap->thread)
519*4882a593Smuzhiyun 		return 0;
520*4882a593Smuzhiyun 	adap->num_feeds = 0;
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun 	return pt3_stop_streaming(adap);
523*4882a593Smuzhiyun }
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 
pt3_alloc_adapter(struct pt3_board * pt3,int index)526*4882a593Smuzhiyun static int pt3_alloc_adapter(struct pt3_board *pt3, int index)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun 	int ret;
529*4882a593Smuzhiyun 	struct pt3_adapter *adap;
530*4882a593Smuzhiyun 	struct dvb_adapter *da;
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	adap = kzalloc(sizeof(*adap), GFP_KERNEL);
533*4882a593Smuzhiyun 	if (!adap)
534*4882a593Smuzhiyun 		return -ENOMEM;
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	pt3->adaps[index] = adap;
537*4882a593Smuzhiyun 	adap->adap_idx = index;
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	if (index == 0 || !one_adapter) {
540*4882a593Smuzhiyun 		ret = dvb_register_adapter(&adap->dvb_adap, "PT3 DVB",
541*4882a593Smuzhiyun 				THIS_MODULE, &pt3->pdev->dev, adapter_nr);
542*4882a593Smuzhiyun 		if (ret < 0) {
543*4882a593Smuzhiyun 			dev_err(&pt3->pdev->dev,
544*4882a593Smuzhiyun 				"failed to register adapter dev\n");
545*4882a593Smuzhiyun 			goto err_mem;
546*4882a593Smuzhiyun 		}
547*4882a593Smuzhiyun 		da = &adap->dvb_adap;
548*4882a593Smuzhiyun 	} else
549*4882a593Smuzhiyun 		da = &pt3->adaps[0]->dvb_adap;
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	adap->dvb_adap.priv = pt3;
552*4882a593Smuzhiyun 	adap->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
553*4882a593Smuzhiyun 	adap->demux.priv = adap;
554*4882a593Smuzhiyun 	adap->demux.feednum = 256;
555*4882a593Smuzhiyun 	adap->demux.filternum = 256;
556*4882a593Smuzhiyun 	adap->demux.start_feed = pt3_start_feed;
557*4882a593Smuzhiyun 	adap->demux.stop_feed = pt3_stop_feed;
558*4882a593Smuzhiyun 	ret = dvb_dmx_init(&adap->demux);
559*4882a593Smuzhiyun 	if (ret < 0) {
560*4882a593Smuzhiyun 		dev_err(&pt3->pdev->dev, "failed to init dmx dev\n");
561*4882a593Smuzhiyun 		goto err_adap;
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	adap->dmxdev.filternum = 256;
565*4882a593Smuzhiyun 	adap->dmxdev.demux = &adap->demux.dmx;
566*4882a593Smuzhiyun 	ret = dvb_dmxdev_init(&adap->dmxdev, da);
567*4882a593Smuzhiyun 	if (ret < 0) {
568*4882a593Smuzhiyun 		dev_err(&pt3->pdev->dev, "failed to init dmxdev\n");
569*4882a593Smuzhiyun 		goto err_demux;
570*4882a593Smuzhiyun 	}
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	ret = pt3_alloc_dmabuf(adap);
573*4882a593Smuzhiyun 	if (ret) {
574*4882a593Smuzhiyun 		dev_err(&pt3->pdev->dev, "failed to alloc DMA buffers\n");
575*4882a593Smuzhiyun 		goto err_dmabuf;
576*4882a593Smuzhiyun 	}
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	return 0;
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun err_dmabuf:
581*4882a593Smuzhiyun 	pt3_free_dmabuf(adap);
582*4882a593Smuzhiyun 	dvb_dmxdev_release(&adap->dmxdev);
583*4882a593Smuzhiyun err_demux:
584*4882a593Smuzhiyun 	dvb_dmx_release(&adap->demux);
585*4882a593Smuzhiyun err_adap:
586*4882a593Smuzhiyun 	if (index == 0 || !one_adapter)
587*4882a593Smuzhiyun 		dvb_unregister_adapter(da);
588*4882a593Smuzhiyun err_mem:
589*4882a593Smuzhiyun 	kfree(adap);
590*4882a593Smuzhiyun 	pt3->adaps[index] = NULL;
591*4882a593Smuzhiyun 	return ret;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun 
pt3_cleanup_adapter(struct pt3_board * pt3,int index)594*4882a593Smuzhiyun static void pt3_cleanup_adapter(struct pt3_board *pt3, int index)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun 	struct pt3_adapter *adap;
597*4882a593Smuzhiyun 	struct dmx_demux *dmx;
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	adap = pt3->adaps[index];
600*4882a593Smuzhiyun 	if (adap == NULL)
601*4882a593Smuzhiyun 		return;
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	/* stop demux kthread */
604*4882a593Smuzhiyun 	if (adap->thread)
605*4882a593Smuzhiyun 		pt3_stop_streaming(adap);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	dmx = &adap->demux.dmx;
608*4882a593Smuzhiyun 	dmx->close(dmx);
609*4882a593Smuzhiyun 	if (adap->fe) {
610*4882a593Smuzhiyun 		adap->fe->callback = NULL;
611*4882a593Smuzhiyun 		if (adap->fe->frontend_priv)
612*4882a593Smuzhiyun 			dvb_unregister_frontend(adap->fe);
613*4882a593Smuzhiyun 		dvb_module_release(adap->i2c_tuner);
614*4882a593Smuzhiyun 		dvb_module_release(adap->i2c_demod);
615*4882a593Smuzhiyun 	}
616*4882a593Smuzhiyun 	pt3_free_dmabuf(adap);
617*4882a593Smuzhiyun 	dvb_dmxdev_release(&adap->dmxdev);
618*4882a593Smuzhiyun 	dvb_dmx_release(&adap->demux);
619*4882a593Smuzhiyun 	if (index == 0 || !one_adapter)
620*4882a593Smuzhiyun 		dvb_unregister_adapter(&adap->dvb_adap);
621*4882a593Smuzhiyun 	kfree(adap);
622*4882a593Smuzhiyun 	pt3->adaps[index] = NULL;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
626*4882a593Smuzhiyun 
pt3_suspend(struct device * dev)627*4882a593Smuzhiyun static int pt3_suspend(struct device *dev)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun 	struct pt3_board *pt3 = dev_get_drvdata(dev);
630*4882a593Smuzhiyun 	int i;
631*4882a593Smuzhiyun 	struct pt3_adapter *adap;
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
634*4882a593Smuzhiyun 		adap = pt3->adaps[i];
635*4882a593Smuzhiyun 		if (adap->num_feeds > 0)
636*4882a593Smuzhiyun 			pt3_stop_dma(adap);
637*4882a593Smuzhiyun 		dvb_frontend_suspend(adap->fe);
638*4882a593Smuzhiyun 		pt3_free_dmabuf(adap);
639*4882a593Smuzhiyun 	}
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	pt3_lnb_ctrl(pt3, false);
642*4882a593Smuzhiyun 	pt3_set_tuner_power(pt3, false, false);
643*4882a593Smuzhiyun 	return 0;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun 
pt3_resume(struct device * dev)646*4882a593Smuzhiyun static int pt3_resume(struct device *dev)
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun 	struct pt3_board *pt3 = dev_get_drvdata(dev);
649*4882a593Smuzhiyun 	int i, ret;
650*4882a593Smuzhiyun 	struct pt3_adapter *adap;
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	ret = pt3_fe_init(pt3);
653*4882a593Smuzhiyun 	if (ret)
654*4882a593Smuzhiyun 		return ret;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	if (pt3->lna_on_cnt > 0)
657*4882a593Smuzhiyun 		pt3_set_tuner_power(pt3, true, true);
658*4882a593Smuzhiyun 	if (pt3->lnb_on_cnt > 0)
659*4882a593Smuzhiyun 		pt3_lnb_ctrl(pt3, true);
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
662*4882a593Smuzhiyun 		adap = pt3->adaps[i];
663*4882a593Smuzhiyun 		dvb_frontend_resume(adap->fe);
664*4882a593Smuzhiyun 		ret = pt3_alloc_dmabuf(adap);
665*4882a593Smuzhiyun 		if (ret) {
666*4882a593Smuzhiyun 			dev_err(&pt3->pdev->dev, "failed to alloc DMA bufs\n");
667*4882a593Smuzhiyun 			continue;
668*4882a593Smuzhiyun 		}
669*4882a593Smuzhiyun 		if (adap->num_feeds > 0)
670*4882a593Smuzhiyun 			pt3_start_dma(adap);
671*4882a593Smuzhiyun 	}
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	return 0;
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 
pt3_remove(struct pci_dev * pdev)679*4882a593Smuzhiyun static void pt3_remove(struct pci_dev *pdev)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun 	struct pt3_board *pt3;
682*4882a593Smuzhiyun 	int i;
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 	pt3 = pci_get_drvdata(pdev);
685*4882a593Smuzhiyun 	for (i = PT3_NUM_FE - 1; i >= 0; i--)
686*4882a593Smuzhiyun 		pt3_cleanup_adapter(pt3, i);
687*4882a593Smuzhiyun 	i2c_del_adapter(&pt3->i2c_adap);
688*4882a593Smuzhiyun 	kfree(pt3->i2c_buf);
689*4882a593Smuzhiyun 	pci_iounmap(pt3->pdev, pt3->regs[0]);
690*4882a593Smuzhiyun 	pci_iounmap(pt3->pdev, pt3->regs[1]);
691*4882a593Smuzhiyun 	pci_release_regions(pdev);
692*4882a593Smuzhiyun 	pci_disable_device(pdev);
693*4882a593Smuzhiyun 	kfree(pt3);
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun 
pt3_probe(struct pci_dev * pdev,const struct pci_device_id * ent)696*4882a593Smuzhiyun static int pt3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
697*4882a593Smuzhiyun {
698*4882a593Smuzhiyun 	u8 rev;
699*4882a593Smuzhiyun 	u32 ver;
700*4882a593Smuzhiyun 	int i, ret;
701*4882a593Smuzhiyun 	struct pt3_board *pt3;
702*4882a593Smuzhiyun 	struct i2c_adapter *i2c;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	if (pci_read_config_byte(pdev, PCI_REVISION_ID, &rev) || rev != 1)
705*4882a593Smuzhiyun 		return -ENODEV;
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	ret = pci_enable_device(pdev);
708*4882a593Smuzhiyun 	if (ret < 0)
709*4882a593Smuzhiyun 		return -ENODEV;
710*4882a593Smuzhiyun 	pci_set_master(pdev);
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 	ret = pci_request_regions(pdev, DRV_NAME);
713*4882a593Smuzhiyun 	if (ret < 0)
714*4882a593Smuzhiyun 		goto err_disable_device;
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun 	ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
717*4882a593Smuzhiyun 	if (ret == 0)
718*4882a593Smuzhiyun 		dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
719*4882a593Smuzhiyun 	else {
720*4882a593Smuzhiyun 		ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
721*4882a593Smuzhiyun 		if (ret == 0)
722*4882a593Smuzhiyun 			dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
723*4882a593Smuzhiyun 		else {
724*4882a593Smuzhiyun 			dev_err(&pdev->dev, "Failed to set DMA mask\n");
725*4882a593Smuzhiyun 			goto err_release_regions;
726*4882a593Smuzhiyun 		}
727*4882a593Smuzhiyun 		dev_info(&pdev->dev, "Use 32bit DMA\n");
728*4882a593Smuzhiyun 	}
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	pt3 = kzalloc(sizeof(*pt3), GFP_KERNEL);
731*4882a593Smuzhiyun 	if (!pt3) {
732*4882a593Smuzhiyun 		ret = -ENOMEM;
733*4882a593Smuzhiyun 		goto err_release_regions;
734*4882a593Smuzhiyun 	}
735*4882a593Smuzhiyun 	pci_set_drvdata(pdev, pt3);
736*4882a593Smuzhiyun 	pt3->pdev = pdev;
737*4882a593Smuzhiyun 	mutex_init(&pt3->lock);
738*4882a593Smuzhiyun 	pt3->regs[0] = pci_ioremap_bar(pdev, 0);
739*4882a593Smuzhiyun 	pt3->regs[1] = pci_ioremap_bar(pdev, 2);
740*4882a593Smuzhiyun 	if (pt3->regs[0] == NULL || pt3->regs[1] == NULL) {
741*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to ioremap\n");
742*4882a593Smuzhiyun 		ret = -ENOMEM;
743*4882a593Smuzhiyun 		goto err_kfree;
744*4882a593Smuzhiyun 	}
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun 	ver = ioread32(pt3->regs[0] + REG_VERSION);
747*4882a593Smuzhiyun 	if ((ver >> 16) != 0x0301) {
748*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "PT%d, I/F-ver.:%d not supported\n",
749*4882a593Smuzhiyun 			 ver >> 24, (ver & 0x00ff0000) >> 16);
750*4882a593Smuzhiyun 		ret = -ENODEV;
751*4882a593Smuzhiyun 		goto err_iounmap;
752*4882a593Smuzhiyun 	}
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	pt3->num_bufs = clamp_val(num_bufs, MIN_DATA_BUFS, MAX_DATA_BUFS);
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun 	pt3->i2c_buf = kmalloc(sizeof(*pt3->i2c_buf), GFP_KERNEL);
757*4882a593Smuzhiyun 	if (pt3->i2c_buf == NULL) {
758*4882a593Smuzhiyun 		ret = -ENOMEM;
759*4882a593Smuzhiyun 		goto err_iounmap;
760*4882a593Smuzhiyun 	}
761*4882a593Smuzhiyun 	i2c = &pt3->i2c_adap;
762*4882a593Smuzhiyun 	i2c->owner = THIS_MODULE;
763*4882a593Smuzhiyun 	i2c->algo = &pt3_i2c_algo;
764*4882a593Smuzhiyun 	i2c->algo_data = NULL;
765*4882a593Smuzhiyun 	i2c->dev.parent = &pdev->dev;
766*4882a593Smuzhiyun 	strscpy(i2c->name, DRV_NAME, sizeof(i2c->name));
767*4882a593Smuzhiyun 	i2c_set_adapdata(i2c, pt3);
768*4882a593Smuzhiyun 	ret = i2c_add_adapter(i2c);
769*4882a593Smuzhiyun 	if (ret < 0)
770*4882a593Smuzhiyun 		goto err_i2cbuf;
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun 	for (i = 0; i < PT3_NUM_FE; i++) {
773*4882a593Smuzhiyun 		ret = pt3_alloc_adapter(pt3, i);
774*4882a593Smuzhiyun 		if (ret < 0)
775*4882a593Smuzhiyun 			break;
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 		ret = pt3_attach_fe(pt3, i);
778*4882a593Smuzhiyun 		if (ret < 0)
779*4882a593Smuzhiyun 			break;
780*4882a593Smuzhiyun 	}
781*4882a593Smuzhiyun 	if (i < PT3_NUM_FE) {
782*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to create FE%d\n", i);
783*4882a593Smuzhiyun 		goto err_cleanup_adapters;
784*4882a593Smuzhiyun 	}
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	ret = pt3_fe_init(pt3);
787*4882a593Smuzhiyun 	if (ret < 0) {
788*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to init frontends\n");
789*4882a593Smuzhiyun 		i = PT3_NUM_FE - 1;
790*4882a593Smuzhiyun 		goto err_cleanup_adapters;
791*4882a593Smuzhiyun 	}
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	dev_info(&pdev->dev,
794*4882a593Smuzhiyun 		 "successfully init'ed PT%d (fw:0x%02x, I/F:0x%02x)\n",
795*4882a593Smuzhiyun 		 ver >> 24, (ver >> 8) & 0xff, (ver >> 16) & 0xff);
796*4882a593Smuzhiyun 	return 0;
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun err_cleanup_adapters:
799*4882a593Smuzhiyun 	while (i >= 0)
800*4882a593Smuzhiyun 		pt3_cleanup_adapter(pt3, i--);
801*4882a593Smuzhiyun 	i2c_del_adapter(i2c);
802*4882a593Smuzhiyun err_i2cbuf:
803*4882a593Smuzhiyun 	kfree(pt3->i2c_buf);
804*4882a593Smuzhiyun err_iounmap:
805*4882a593Smuzhiyun 	if (pt3->regs[0])
806*4882a593Smuzhiyun 		pci_iounmap(pdev, pt3->regs[0]);
807*4882a593Smuzhiyun 	if (pt3->regs[1])
808*4882a593Smuzhiyun 		pci_iounmap(pdev, pt3->regs[1]);
809*4882a593Smuzhiyun err_kfree:
810*4882a593Smuzhiyun 	kfree(pt3);
811*4882a593Smuzhiyun err_release_regions:
812*4882a593Smuzhiyun 	pci_release_regions(pdev);
813*4882a593Smuzhiyun err_disable_device:
814*4882a593Smuzhiyun 	pci_disable_device(pdev);
815*4882a593Smuzhiyun 	return ret;
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun static const struct pci_device_id pt3_id_table[] = {
820*4882a593Smuzhiyun 	{ PCI_DEVICE_SUB(0x1172, 0x4c15, 0xee8d, 0x0368) },
821*4882a593Smuzhiyun 	{ },
822*4882a593Smuzhiyun };
823*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, pt3_id_table);
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(pt3_pm_ops, pt3_suspend, pt3_resume);
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun static struct pci_driver pt3_driver = {
828*4882a593Smuzhiyun 	.name		= DRV_NAME,
829*4882a593Smuzhiyun 	.probe		= pt3_probe,
830*4882a593Smuzhiyun 	.remove		= pt3_remove,
831*4882a593Smuzhiyun 	.id_table	= pt3_id_table,
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	.driver.pm	= &pt3_pm_ops,
834*4882a593Smuzhiyun };
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun module_pci_driver(pt3_driver);
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun MODULE_DESCRIPTION("Earthsoft PT3 Driver");
839*4882a593Smuzhiyun MODULE_AUTHOR("Akihiro TSUKADA");
840*4882a593Smuzhiyun MODULE_LICENSE("GPL");
841