1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun Mantis PCI bridge driver 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun Copyright (C) Manu Abraham (abraham.manu@gmail.com) 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifndef __MANTIS_UART_H 10*4882a593Smuzhiyun #define __MANTIS_UART_H 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define MANTIS_UART_CTL 0xe0 13*4882a593Smuzhiyun #define MANTIS_UART_RXINT (1 << 4) 14*4882a593Smuzhiyun #define MANTIS_UART_RXFLUSH (1 << 2) 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define MANTIS_UART_RXD 0xe8 17*4882a593Smuzhiyun #define MANTIS_UART_BAUD 0xec 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define MANTIS_UART_STAT 0xf0 20*4882a593Smuzhiyun #define MANTIS_UART_RXFIFO_DATA (1 << 7) 21*4882a593Smuzhiyun #define MANTIS_UART_RXFIFO_EMPTY (1 << 6) 22*4882a593Smuzhiyun #define MANTIS_UART_RXFIFO_FULL (1 << 3) 23*4882a593Smuzhiyun #define MANTIS_UART_FRAME_ERR (1 << 2) 24*4882a593Smuzhiyun #define MANTIS_UART_PARITY_ERR (1 << 1) 25*4882a593Smuzhiyun #define MANTIS_UART_RXTHRESH_INT (1 << 0) 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun enum mantis_baud { 28*4882a593Smuzhiyun MANTIS_BAUD_9600 = 0, 29*4882a593Smuzhiyun MANTIS_BAUD_19200, 30*4882a593Smuzhiyun MANTIS_BAUD_38400, 31*4882a593Smuzhiyun MANTIS_BAUD_57600, 32*4882a593Smuzhiyun MANTIS_BAUD_115200 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun enum mantis_parity { 36*4882a593Smuzhiyun MANTIS_PARITY_NONE = 0, 37*4882a593Smuzhiyun MANTIS_PARITY_EVEN, 38*4882a593Smuzhiyun MANTIS_PARITY_ODD, 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun struct mantis_pci; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun extern int mantis_uart_init(struct mantis_pci *mantis); 44*4882a593Smuzhiyun extern void mantis_uart_exit(struct mantis_pci *mantis); 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #endif /* __MANTIS_UART_H */ 47