xref: /OK3568_Linux_fs/kernel/drivers/media/pci/ddbridge/ddbridge-sx8.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * ddbridge-sx8.c: Digital Devices MAX SX8 driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2018 Digital Devices GmbH
6*4882a593Smuzhiyun  *                    Marcus Metzler <mocm@metzlerbros.de>
7*4882a593Smuzhiyun  *                    Ralph Metzler <rjkm@metzlerbros.de>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
10*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License
11*4882a593Smuzhiyun  * version 2 only, as published by the Free Software Foundation.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful,
14*4882a593Smuzhiyun  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15*4882a593Smuzhiyun  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16*4882a593Smuzhiyun  * GNU General Public License for more details.
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "ddbridge.h"
20*4882a593Smuzhiyun #include "ddbridge-io.h"
21*4882a593Smuzhiyun #include "ddbridge-mci.h"
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun static const u32 MCLK = (1550000000 / 12);
24*4882a593Smuzhiyun static const u32 MAX_LDPC_BITRATE = (720000000);
25*4882a593Smuzhiyun static const u32 MAX_DEMOD_LDPC_BITRATE = (1550000000 / 6);
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #define SX8_TUNER_NUM 4
28*4882a593Smuzhiyun #define SX8_DEMOD_NUM 8
29*4882a593Smuzhiyun #define SX8_DEMOD_NONE 0xff
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun struct sx8_base {
32*4882a593Smuzhiyun 	struct mci_base      mci_base;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	u8                   tuner_use_count[SX8_TUNER_NUM];
35*4882a593Smuzhiyun 	u32                  gain_mode[SX8_TUNER_NUM];
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	u32                  used_ldpc_bitrate[SX8_DEMOD_NUM];
38*4882a593Smuzhiyun 	u8                   demod_in_use[SX8_DEMOD_NUM];
39*4882a593Smuzhiyun 	u32                  iq_mode;
40*4882a593Smuzhiyun 	u32                  burst_size;
41*4882a593Smuzhiyun 	u32                  direct_mode;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun struct sx8 {
45*4882a593Smuzhiyun 	struct mci           mci;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	int                  first_time_lock;
48*4882a593Smuzhiyun 	int                  started;
49*4882a593Smuzhiyun 	struct mci_result    signal_info;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	u32                  bb_mode;
52*4882a593Smuzhiyun 	u32                  local_frequency;
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
release(struct dvb_frontend * fe)55*4882a593Smuzhiyun static void release(struct dvb_frontend *fe)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
58*4882a593Smuzhiyun 	struct mci_base *mci_base = state->mci.base;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	mci_base->count--;
61*4882a593Smuzhiyun 	if (mci_base->count == 0) {
62*4882a593Smuzhiyun 		list_del(&mci_base->mci_list);
63*4882a593Smuzhiyun 		kfree(mci_base);
64*4882a593Smuzhiyun 	}
65*4882a593Smuzhiyun 	kfree(state);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
get_info(struct dvb_frontend * fe)68*4882a593Smuzhiyun static int get_info(struct dvb_frontend *fe)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	int stat;
71*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
72*4882a593Smuzhiyun 	struct mci_command cmd;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	memset(&cmd, 0, sizeof(cmd));
75*4882a593Smuzhiyun 	cmd.command = MCI_CMD_GETSIGNALINFO;
76*4882a593Smuzhiyun 	cmd.demod = state->mci.demod;
77*4882a593Smuzhiyun 	stat = ddb_mci_cmd(&state->mci, &cmd, &state->signal_info);
78*4882a593Smuzhiyun 	return stat;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
get_snr(struct dvb_frontend * fe)81*4882a593Smuzhiyun static int get_snr(struct dvb_frontend *fe)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
84*4882a593Smuzhiyun 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	p->cnr.len = 1;
87*4882a593Smuzhiyun 	p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
88*4882a593Smuzhiyun 	p->cnr.stat[0].svalue =
89*4882a593Smuzhiyun 		(s64)state->signal_info.dvbs2_signal_info.signal_to_noise
90*4882a593Smuzhiyun 		     * 10;
91*4882a593Smuzhiyun 	return 0;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun 
get_strength(struct dvb_frontend * fe)94*4882a593Smuzhiyun static int get_strength(struct dvb_frontend *fe)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
97*4882a593Smuzhiyun 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
98*4882a593Smuzhiyun 	s32 str;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	str = 100000 -
101*4882a593Smuzhiyun 	      (state->signal_info.dvbs2_signal_info.channel_power
102*4882a593Smuzhiyun 	       * 10 + 108750);
103*4882a593Smuzhiyun 	p->strength.len = 1;
104*4882a593Smuzhiyun 	p->strength.stat[0].scale = FE_SCALE_DECIBEL;
105*4882a593Smuzhiyun 	p->strength.stat[0].svalue = str;
106*4882a593Smuzhiyun 	return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
read_status(struct dvb_frontend * fe,enum fe_status * status)109*4882a593Smuzhiyun static int read_status(struct dvb_frontend *fe, enum fe_status *status)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	int stat;
112*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
113*4882a593Smuzhiyun 	struct mci_command cmd;
114*4882a593Smuzhiyun 	struct mci_result res;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	cmd.command = MCI_CMD_GETSTATUS;
117*4882a593Smuzhiyun 	cmd.demod = state->mci.demod;
118*4882a593Smuzhiyun 	stat = ddb_mci_cmd(&state->mci, &cmd, &res);
119*4882a593Smuzhiyun 	if (stat)
120*4882a593Smuzhiyun 		return stat;
121*4882a593Smuzhiyun 	*status = 0x00;
122*4882a593Smuzhiyun 	get_info(fe);
123*4882a593Smuzhiyun 	get_strength(fe);
124*4882a593Smuzhiyun 	if (res.status == SX8_DEMOD_WAIT_MATYPE)
125*4882a593Smuzhiyun 		*status = 0x0f;
126*4882a593Smuzhiyun 	if (res.status == SX8_DEMOD_LOCKED) {
127*4882a593Smuzhiyun 		*status = 0x1f;
128*4882a593Smuzhiyun 		get_snr(fe);
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 	return stat;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun 
mci_set_tuner(struct dvb_frontend * fe,u32 tuner,u32 on)133*4882a593Smuzhiyun static int mci_set_tuner(struct dvb_frontend *fe, u32 tuner, u32 on)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
136*4882a593Smuzhiyun 	struct mci_base *mci_base = state->mci.base;
137*4882a593Smuzhiyun 	struct sx8_base *sx8_base = (struct sx8_base *)mci_base;
138*4882a593Smuzhiyun 	struct mci_command cmd;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	memset(&cmd, 0, sizeof(cmd));
141*4882a593Smuzhiyun 	cmd.tuner = state->mci.tuner;
142*4882a593Smuzhiyun 	cmd.command = on ? SX8_CMD_INPUT_ENABLE : SX8_CMD_INPUT_DISABLE;
143*4882a593Smuzhiyun 	cmd.sx8_input_enable.flags = sx8_base->gain_mode[state->mci.tuner];
144*4882a593Smuzhiyun 	return ddb_mci_cmd(&state->mci, &cmd, NULL);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
stop(struct dvb_frontend * fe)147*4882a593Smuzhiyun static int stop(struct dvb_frontend *fe)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
150*4882a593Smuzhiyun 	struct mci_base *mci_base = state->mci.base;
151*4882a593Smuzhiyun 	struct sx8_base *sx8_base = (struct sx8_base *)mci_base;
152*4882a593Smuzhiyun 	struct mci_command cmd;
153*4882a593Smuzhiyun 	u32 input = state->mci.tuner;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	memset(&cmd, 0, sizeof(cmd));
156*4882a593Smuzhiyun 	if (state->mci.demod != SX8_DEMOD_NONE) {
157*4882a593Smuzhiyun 		cmd.command = MCI_CMD_STOP;
158*4882a593Smuzhiyun 		cmd.demod = state->mci.demod;
159*4882a593Smuzhiyun 		ddb_mci_cmd(&state->mci, &cmd, NULL);
160*4882a593Smuzhiyun 		if (sx8_base->iq_mode) {
161*4882a593Smuzhiyun 			cmd.command = SX8_CMD_DISABLE_IQOUTPUT;
162*4882a593Smuzhiyun 			cmd.demod = state->mci.demod;
163*4882a593Smuzhiyun 			cmd.output = 0;
164*4882a593Smuzhiyun 			ddb_mci_cmd(&state->mci, &cmd, NULL);
165*4882a593Smuzhiyun 			ddb_mci_config(&state->mci, SX8_TSCONFIG_MODE_NORMAL);
166*4882a593Smuzhiyun 		}
167*4882a593Smuzhiyun 	}
168*4882a593Smuzhiyun 	mutex_lock(&mci_base->tuner_lock);
169*4882a593Smuzhiyun 	sx8_base->tuner_use_count[input]--;
170*4882a593Smuzhiyun 	if (!sx8_base->tuner_use_count[input])
171*4882a593Smuzhiyun 		mci_set_tuner(fe, input, 0);
172*4882a593Smuzhiyun 	if (state->mci.demod < SX8_DEMOD_NUM) {
173*4882a593Smuzhiyun 		sx8_base->demod_in_use[state->mci.demod] = 0;
174*4882a593Smuzhiyun 		state->mci.demod = SX8_DEMOD_NONE;
175*4882a593Smuzhiyun 	}
176*4882a593Smuzhiyun 	sx8_base->used_ldpc_bitrate[state->mci.nr] = 0;
177*4882a593Smuzhiyun 	sx8_base->iq_mode = 0;
178*4882a593Smuzhiyun 	mutex_unlock(&mci_base->tuner_lock);
179*4882a593Smuzhiyun 	state->started = 0;
180*4882a593Smuzhiyun 	return 0;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
start(struct dvb_frontend * fe,u32 flags,u32 modmask,u32 ts_config)183*4882a593Smuzhiyun static int start(struct dvb_frontend *fe, u32 flags, u32 modmask, u32 ts_config)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
186*4882a593Smuzhiyun 	struct mci_base *mci_base = state->mci.base;
187*4882a593Smuzhiyun 	struct sx8_base *sx8_base = (struct sx8_base *)mci_base;
188*4882a593Smuzhiyun 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
189*4882a593Smuzhiyun 	u32 used_ldpc_bitrate = 0, free_ldpc_bitrate;
190*4882a593Smuzhiyun 	u32 used_demods = 0;
191*4882a593Smuzhiyun 	struct mci_command cmd;
192*4882a593Smuzhiyun 	u32 input = state->mci.tuner;
193*4882a593Smuzhiyun 	u32 bits_per_symbol = 0;
194*4882a593Smuzhiyun 	int i = -1, stat = 0;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	if (p->symbol_rate >= (MCLK / 2))
197*4882a593Smuzhiyun 		flags &= ~1;
198*4882a593Smuzhiyun 	if ((flags & 3) == 0)
199*4882a593Smuzhiyun 		return -EINVAL;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (flags & 2) {
202*4882a593Smuzhiyun 		u32 tmp = modmask;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 		bits_per_symbol = 1;
205*4882a593Smuzhiyun 		while (tmp & 1) {
206*4882a593Smuzhiyun 			tmp >>= 1;
207*4882a593Smuzhiyun 			bits_per_symbol++;
208*4882a593Smuzhiyun 		}
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	mutex_lock(&mci_base->tuner_lock);
212*4882a593Smuzhiyun 	if (sx8_base->iq_mode) {
213*4882a593Smuzhiyun 		stat = -EBUSY;
214*4882a593Smuzhiyun 		goto unlock;
215*4882a593Smuzhiyun 	}
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	if (sx8_base->direct_mode) {
218*4882a593Smuzhiyun 		if (p->symbol_rate >= MCLK / 2) {
219*4882a593Smuzhiyun 			if (state->mci.nr < 4)
220*4882a593Smuzhiyun 				i = state->mci.nr;
221*4882a593Smuzhiyun 		} else {
222*4882a593Smuzhiyun 			i = state->mci.nr;
223*4882a593Smuzhiyun 		}
224*4882a593Smuzhiyun 	} else {
225*4882a593Smuzhiyun 		for (i = 0; i < SX8_DEMOD_NUM; i++) {
226*4882a593Smuzhiyun 			used_ldpc_bitrate += sx8_base->used_ldpc_bitrate[i];
227*4882a593Smuzhiyun 			if (sx8_base->demod_in_use[i])
228*4882a593Smuzhiyun 				used_demods++;
229*4882a593Smuzhiyun 		}
230*4882a593Smuzhiyun 		if (used_ldpc_bitrate >= MAX_LDPC_BITRATE ||
231*4882a593Smuzhiyun 		    ((ts_config & SX8_TSCONFIG_MODE_MASK) >
232*4882a593Smuzhiyun 		     SX8_TSCONFIG_MODE_NORMAL && used_demods > 0)) {
233*4882a593Smuzhiyun 			stat = -EBUSY;
234*4882a593Smuzhiyun 			goto unlock;
235*4882a593Smuzhiyun 		}
236*4882a593Smuzhiyun 		free_ldpc_bitrate = MAX_LDPC_BITRATE - used_ldpc_bitrate;
237*4882a593Smuzhiyun 		if (free_ldpc_bitrate > MAX_DEMOD_LDPC_BITRATE)
238*4882a593Smuzhiyun 			free_ldpc_bitrate = MAX_DEMOD_LDPC_BITRATE;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 		while (p->symbol_rate * bits_per_symbol > free_ldpc_bitrate)
241*4882a593Smuzhiyun 			bits_per_symbol--;
242*4882a593Smuzhiyun 		if (bits_per_symbol < 2) {
243*4882a593Smuzhiyun 			stat = -EBUSY;
244*4882a593Smuzhiyun 			goto unlock;
245*4882a593Smuzhiyun 		}
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 		modmask &= ((1 << (bits_per_symbol - 1)) - 1);
248*4882a593Smuzhiyun 		if (((flags & 0x02) != 0) && modmask == 0) {
249*4882a593Smuzhiyun 			stat = -EBUSY;
250*4882a593Smuzhiyun 			goto unlock;
251*4882a593Smuzhiyun 		}
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 		i = (p->symbol_rate > (MCLK / 2)) ? 3 : 7;
254*4882a593Smuzhiyun 		while (i >= 0 && sx8_base->demod_in_use[i])
255*4882a593Smuzhiyun 			i--;
256*4882a593Smuzhiyun 	}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	if (i < 0) {
259*4882a593Smuzhiyun 		stat = -EBUSY;
260*4882a593Smuzhiyun 		goto unlock;
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 	sx8_base->demod_in_use[i] = 1;
263*4882a593Smuzhiyun 	sx8_base->used_ldpc_bitrate[state->mci.nr] = p->symbol_rate
264*4882a593Smuzhiyun 						     * bits_per_symbol;
265*4882a593Smuzhiyun 	state->mci.demod = i;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	if (!sx8_base->tuner_use_count[input])
268*4882a593Smuzhiyun 		mci_set_tuner(fe, input, 1);
269*4882a593Smuzhiyun 	sx8_base->tuner_use_count[input]++;
270*4882a593Smuzhiyun 	sx8_base->iq_mode = (ts_config > 1);
271*4882a593Smuzhiyun unlock:
272*4882a593Smuzhiyun 	mutex_unlock(&mci_base->tuner_lock);
273*4882a593Smuzhiyun 	if (stat)
274*4882a593Smuzhiyun 		return stat;
275*4882a593Smuzhiyun 	memset(&cmd, 0, sizeof(cmd));
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	if (sx8_base->iq_mode) {
278*4882a593Smuzhiyun 		cmd.command = SX8_CMD_ENABLE_IQOUTPUT;
279*4882a593Smuzhiyun 		cmd.demod = state->mci.demod;
280*4882a593Smuzhiyun 		cmd.output = 0;
281*4882a593Smuzhiyun 		ddb_mci_cmd(&state->mci, &cmd, NULL);
282*4882a593Smuzhiyun 		ddb_mci_config(&state->mci, ts_config);
283*4882a593Smuzhiyun 	}
284*4882a593Smuzhiyun 	if (p->stream_id != NO_STREAM_ID_FILTER && p->stream_id != 0x80000000)
285*4882a593Smuzhiyun 		flags |= 0x80;
286*4882a593Smuzhiyun 	dev_dbg(mci_base->dev, "MCI-%d: tuner=%d demod=%d\n",
287*4882a593Smuzhiyun 		state->mci.nr, state->mci.tuner, state->mci.demod);
288*4882a593Smuzhiyun 	cmd.command = MCI_CMD_SEARCH_DVBS;
289*4882a593Smuzhiyun 	cmd.dvbs2_search.flags = flags;
290*4882a593Smuzhiyun 	cmd.dvbs2_search.s2_modulation_mask = modmask;
291*4882a593Smuzhiyun 	cmd.dvbs2_search.retry = 2;
292*4882a593Smuzhiyun 	cmd.dvbs2_search.frequency = p->frequency * 1000;
293*4882a593Smuzhiyun 	cmd.dvbs2_search.symbol_rate = p->symbol_rate;
294*4882a593Smuzhiyun 	cmd.dvbs2_search.scrambling_sequence_index =
295*4882a593Smuzhiyun 		p->scrambling_sequence_index | 0x80000000;
296*4882a593Smuzhiyun 	cmd.dvbs2_search.input_stream_id =
297*4882a593Smuzhiyun 		(p->stream_id != NO_STREAM_ID_FILTER) ? p->stream_id : 0;
298*4882a593Smuzhiyun 	cmd.tuner = state->mci.tuner;
299*4882a593Smuzhiyun 	cmd.demod = state->mci.demod;
300*4882a593Smuzhiyun 	cmd.output = state->mci.nr;
301*4882a593Smuzhiyun 	if (p->stream_id == 0x80000000)
302*4882a593Smuzhiyun 		cmd.output |= 0x80;
303*4882a593Smuzhiyun 	stat = ddb_mci_cmd(&state->mci, &cmd, NULL);
304*4882a593Smuzhiyun 	if (stat)
305*4882a593Smuzhiyun 		stop(fe);
306*4882a593Smuzhiyun 	return stat;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun 
start_iq(struct dvb_frontend * fe,u32 flags,u32 roll_off,u32 ts_config)309*4882a593Smuzhiyun static int start_iq(struct dvb_frontend *fe, u32 flags, u32 roll_off,
310*4882a593Smuzhiyun 		    u32 ts_config)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
313*4882a593Smuzhiyun 	struct mci_base *mci_base = state->mci.base;
314*4882a593Smuzhiyun 	struct sx8_base *sx8_base = (struct sx8_base *)mci_base;
315*4882a593Smuzhiyun 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
316*4882a593Smuzhiyun 	u32 used_demods = 0;
317*4882a593Smuzhiyun 	struct mci_command cmd;
318*4882a593Smuzhiyun 	u32 input = state->mci.tuner;
319*4882a593Smuzhiyun 	int i, stat = 0;
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	mutex_lock(&mci_base->tuner_lock);
322*4882a593Smuzhiyun 	if (sx8_base->iq_mode) {
323*4882a593Smuzhiyun 		stat = -EBUSY;
324*4882a593Smuzhiyun 		goto unlock;
325*4882a593Smuzhiyun 	}
326*4882a593Smuzhiyun 	for (i = 0; i < SX8_DEMOD_NUM; i++)
327*4882a593Smuzhiyun 		if (sx8_base->demod_in_use[i])
328*4882a593Smuzhiyun 			used_demods++;
329*4882a593Smuzhiyun 	if (used_demods > 0) {
330*4882a593Smuzhiyun 		stat = -EBUSY;
331*4882a593Smuzhiyun 		goto unlock;
332*4882a593Smuzhiyun 	}
333*4882a593Smuzhiyun 	state->mci.demod = 0;
334*4882a593Smuzhiyun 	if (!sx8_base->tuner_use_count[input])
335*4882a593Smuzhiyun 		mci_set_tuner(fe, input, 1);
336*4882a593Smuzhiyun 	sx8_base->tuner_use_count[input]++;
337*4882a593Smuzhiyun 	sx8_base->iq_mode = (ts_config > 1);
338*4882a593Smuzhiyun unlock:
339*4882a593Smuzhiyun 	mutex_unlock(&mci_base->tuner_lock);
340*4882a593Smuzhiyun 	if (stat)
341*4882a593Smuzhiyun 		return stat;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	memset(&cmd, 0, sizeof(cmd));
344*4882a593Smuzhiyun 	cmd.command = SX8_CMD_START_IQ;
345*4882a593Smuzhiyun 	cmd.sx8_start_iq.flags = flags;
346*4882a593Smuzhiyun 	cmd.sx8_start_iq.roll_off = roll_off;
347*4882a593Smuzhiyun 	cmd.sx8_start_iq.frequency = p->frequency * 1000;
348*4882a593Smuzhiyun 	cmd.sx8_start_iq.symbol_rate = p->symbol_rate;
349*4882a593Smuzhiyun 	cmd.tuner = state->mci.tuner;
350*4882a593Smuzhiyun 	cmd.demod = state->mci.demod;
351*4882a593Smuzhiyun 	stat = ddb_mci_cmd(&state->mci, &cmd, NULL);
352*4882a593Smuzhiyun 	if (stat)
353*4882a593Smuzhiyun 		stop(fe);
354*4882a593Smuzhiyun 	ddb_mci_config(&state->mci, ts_config);
355*4882a593Smuzhiyun 	return stat;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun 
set_parameters(struct dvb_frontend * fe)358*4882a593Smuzhiyun static int set_parameters(struct dvb_frontend *fe)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun 	int stat = 0;
361*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
362*4882a593Smuzhiyun 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
363*4882a593Smuzhiyun 	u32 ts_config = SX8_TSCONFIG_MODE_NORMAL, iq_mode = 0, isi;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	if (state->started)
366*4882a593Smuzhiyun 		stop(fe);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	isi = p->stream_id;
369*4882a593Smuzhiyun 	if (isi != NO_STREAM_ID_FILTER)
370*4882a593Smuzhiyun 		iq_mode = (isi & 0x30000000) >> 28;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	if (iq_mode)
373*4882a593Smuzhiyun 		ts_config = (SX8_TSCONFIG_TSHEADER | SX8_TSCONFIG_MODE_IQ);
374*4882a593Smuzhiyun 	if (iq_mode < 3) {
375*4882a593Smuzhiyun 		u32 mask;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 		switch (p->modulation) {
378*4882a593Smuzhiyun 		/* uncomment whenever these modulations hit the DVB API
379*4882a593Smuzhiyun 		 *	case APSK_256:
380*4882a593Smuzhiyun 		 *		mask = 0x7f;
381*4882a593Smuzhiyun 		 *		break;
382*4882a593Smuzhiyun 		 *	case APSK_128:
383*4882a593Smuzhiyun 		 *		mask = 0x3f;
384*4882a593Smuzhiyun 		 *		break;
385*4882a593Smuzhiyun 		 *	case APSK_64:
386*4882a593Smuzhiyun 		 *		mask = 0x1f;
387*4882a593Smuzhiyun 		 *		break;
388*4882a593Smuzhiyun 		 */
389*4882a593Smuzhiyun 		case APSK_32:
390*4882a593Smuzhiyun 			mask = 0x0f;
391*4882a593Smuzhiyun 			break;
392*4882a593Smuzhiyun 		case APSK_16:
393*4882a593Smuzhiyun 			mask = 0x07;
394*4882a593Smuzhiyun 			break;
395*4882a593Smuzhiyun 		default:
396*4882a593Smuzhiyun 			mask = 0x03;
397*4882a593Smuzhiyun 			break;
398*4882a593Smuzhiyun 		}
399*4882a593Smuzhiyun 		stat = start(fe, 3, mask, ts_config);
400*4882a593Smuzhiyun 	} else {
401*4882a593Smuzhiyun 		stat = start_iq(fe, 0, 4, ts_config);
402*4882a593Smuzhiyun 	}
403*4882a593Smuzhiyun 	if (!stat) {
404*4882a593Smuzhiyun 		state->started = 1;
405*4882a593Smuzhiyun 		state->first_time_lock = 1;
406*4882a593Smuzhiyun 		state->signal_info.status = SX8_DEMOD_WAIT_SIGNAL;
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	return stat;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun 
tune(struct dvb_frontend * fe,bool re_tune,unsigned int mode_flags,unsigned int * delay,enum fe_status * status)412*4882a593Smuzhiyun static int tune(struct dvb_frontend *fe, bool re_tune,
413*4882a593Smuzhiyun 		unsigned int mode_flags,
414*4882a593Smuzhiyun 		unsigned int *delay, enum fe_status *status)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun 	int r;
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	if (re_tune) {
419*4882a593Smuzhiyun 		r = set_parameters(fe);
420*4882a593Smuzhiyun 		if (r)
421*4882a593Smuzhiyun 			return r;
422*4882a593Smuzhiyun 	}
423*4882a593Smuzhiyun 	r = read_status(fe, status);
424*4882a593Smuzhiyun 	if (r)
425*4882a593Smuzhiyun 		return r;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	if (*status & FE_HAS_LOCK)
428*4882a593Smuzhiyun 		return 0;
429*4882a593Smuzhiyun 	*delay = HZ / 10;
430*4882a593Smuzhiyun 	return 0;
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun 
get_algo(struct dvb_frontend * fe)433*4882a593Smuzhiyun static enum dvbfe_algo get_algo(struct dvb_frontend *fe)
434*4882a593Smuzhiyun {
435*4882a593Smuzhiyun 	return DVBFE_ALGO_HW;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun 
set_input(struct dvb_frontend * fe,int input)438*4882a593Smuzhiyun static int set_input(struct dvb_frontend *fe, int input)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun 	struct sx8 *state = fe->demodulator_priv;
441*4882a593Smuzhiyun 	struct mci_base *mci_base = state->mci.base;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	if (input >= SX8_TUNER_NUM)
444*4882a593Smuzhiyun 		return -EINVAL;
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	state->mci.tuner = input;
447*4882a593Smuzhiyun 	dev_dbg(mci_base->dev, "MCI-%d: input=%d\n", state->mci.nr, input);
448*4882a593Smuzhiyun 	return 0;
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun static struct dvb_frontend_ops sx8_ops = {
452*4882a593Smuzhiyun 	.delsys = { SYS_DVBS, SYS_DVBS2 },
453*4882a593Smuzhiyun 	.info = {
454*4882a593Smuzhiyun 		.name			= "Digital Devices MaxSX8 MCI DVB-S/S2/S2X",
455*4882a593Smuzhiyun 		.frequency_min_hz	=  950 * MHz,
456*4882a593Smuzhiyun 		.frequency_max_hz	= 2150 * MHz,
457*4882a593Smuzhiyun 		.symbol_rate_min	= 100000,
458*4882a593Smuzhiyun 		.symbol_rate_max	= 100000000,
459*4882a593Smuzhiyun 		.caps			= FE_CAN_INVERSION_AUTO |
460*4882a593Smuzhiyun 					  FE_CAN_FEC_AUTO       |
461*4882a593Smuzhiyun 					  FE_CAN_QPSK           |
462*4882a593Smuzhiyun 					  FE_CAN_2G_MODULATION  |
463*4882a593Smuzhiyun 					  FE_CAN_MULTISTREAM,
464*4882a593Smuzhiyun 	},
465*4882a593Smuzhiyun 	.get_frontend_algo		= get_algo,
466*4882a593Smuzhiyun 	.tune				= tune,
467*4882a593Smuzhiyun 	.release			= release,
468*4882a593Smuzhiyun 	.read_status			= read_status,
469*4882a593Smuzhiyun };
470*4882a593Smuzhiyun 
init(struct mci * mci)471*4882a593Smuzhiyun static int init(struct mci *mci)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun 	struct sx8 *state = (struct sx8 *)mci;
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	state->mci.demod = SX8_DEMOD_NONE;
476*4882a593Smuzhiyun 	return 0;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun const struct mci_cfg ddb_max_sx8_cfg = {
480*4882a593Smuzhiyun 	.type = 0,
481*4882a593Smuzhiyun 	.fe_ops = &sx8_ops,
482*4882a593Smuzhiyun 	.base_size = sizeof(struct sx8_base),
483*4882a593Smuzhiyun 	.state_size = sizeof(struct sx8),
484*4882a593Smuzhiyun 	.init = init,
485*4882a593Smuzhiyun 	.set_input = set_input,
486*4882a593Smuzhiyun };
487