1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ddbridge-hw.c: Digital Devices bridge hardware maps
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2010-2017 Digital Devices GmbH
6*4882a593Smuzhiyun * Ralph Metzler <rjkm@metzlerbros.de>
7*4882a593Smuzhiyun * Marcus Metzler <mocm@metzlerbros.de>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License
11*4882a593Smuzhiyun * version 2 only, as published by the Free Software Foundation.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful,
14*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of
15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16*4882a593Smuzhiyun * GNU General Public License for more details.
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "ddbridge.h"
20*4882a593Smuzhiyun #include "ddbridge-hw.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /******************************************************************************/
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static const struct ddb_regset octopus_input = {
25*4882a593Smuzhiyun .base = 0x200,
26*4882a593Smuzhiyun .num = 0x08,
27*4882a593Smuzhiyun .size = 0x10,
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun static const struct ddb_regset octopus_output = {
31*4882a593Smuzhiyun .base = 0x280,
32*4882a593Smuzhiyun .num = 0x08,
33*4882a593Smuzhiyun .size = 0x10,
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static const struct ddb_regset octopus_idma = {
37*4882a593Smuzhiyun .base = 0x300,
38*4882a593Smuzhiyun .num = 0x08,
39*4882a593Smuzhiyun .size = 0x10,
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun static const struct ddb_regset octopus_idma_buf = {
43*4882a593Smuzhiyun .base = 0x2000,
44*4882a593Smuzhiyun .num = 0x08,
45*4882a593Smuzhiyun .size = 0x100,
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static const struct ddb_regset octopus_odma = {
49*4882a593Smuzhiyun .base = 0x380,
50*4882a593Smuzhiyun .num = 0x04,
51*4882a593Smuzhiyun .size = 0x10,
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static const struct ddb_regset octopus_odma_buf = {
55*4882a593Smuzhiyun .base = 0x2800,
56*4882a593Smuzhiyun .num = 0x04,
57*4882a593Smuzhiyun .size = 0x100,
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static const struct ddb_regset octopus_i2c = {
61*4882a593Smuzhiyun .base = 0x80,
62*4882a593Smuzhiyun .num = 0x04,
63*4882a593Smuzhiyun .size = 0x20,
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static const struct ddb_regset octopus_i2c_buf = {
67*4882a593Smuzhiyun .base = 0x1000,
68*4882a593Smuzhiyun .num = 0x04,
69*4882a593Smuzhiyun .size = 0x200,
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /****************************************************************************/
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static const struct ddb_regmap octopus_map = {
75*4882a593Smuzhiyun .irq_base_i2c = 0,
76*4882a593Smuzhiyun .irq_base_idma = 8,
77*4882a593Smuzhiyun .irq_base_odma = 16,
78*4882a593Smuzhiyun .i2c = &octopus_i2c,
79*4882a593Smuzhiyun .i2c_buf = &octopus_i2c_buf,
80*4882a593Smuzhiyun .idma = &octopus_idma,
81*4882a593Smuzhiyun .idma_buf = &octopus_idma_buf,
82*4882a593Smuzhiyun .odma = &octopus_odma,
83*4882a593Smuzhiyun .odma_buf = &octopus_odma_buf,
84*4882a593Smuzhiyun .input = &octopus_input,
85*4882a593Smuzhiyun .output = &octopus_output,
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /****************************************************************************/
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun static const struct ddb_info ddb_none = {
91*4882a593Smuzhiyun .type = DDB_NONE,
92*4882a593Smuzhiyun .name = "unknown Digital Devices PCIe card, install newer driver",
93*4882a593Smuzhiyun .regmap = &octopus_map,
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun static const struct ddb_info ddb_octopus = {
97*4882a593Smuzhiyun .type = DDB_OCTOPUS,
98*4882a593Smuzhiyun .name = "Digital Devices Octopus DVB adapter",
99*4882a593Smuzhiyun .regmap = &octopus_map,
100*4882a593Smuzhiyun .port_num = 4,
101*4882a593Smuzhiyun .i2c_mask = 0x0f,
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun static const struct ddb_info ddb_octopusv3 = {
105*4882a593Smuzhiyun .type = DDB_OCTOPUS,
106*4882a593Smuzhiyun .name = "Digital Devices Octopus V3 DVB adapter",
107*4882a593Smuzhiyun .regmap = &octopus_map,
108*4882a593Smuzhiyun .port_num = 4,
109*4882a593Smuzhiyun .i2c_mask = 0x0f,
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun static const struct ddb_info ddb_octopus_le = {
113*4882a593Smuzhiyun .type = DDB_OCTOPUS,
114*4882a593Smuzhiyun .name = "Digital Devices Octopus LE DVB adapter",
115*4882a593Smuzhiyun .regmap = &octopus_map,
116*4882a593Smuzhiyun .port_num = 2,
117*4882a593Smuzhiyun .i2c_mask = 0x03,
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun static const struct ddb_info ddb_octopus_oem = {
121*4882a593Smuzhiyun .type = DDB_OCTOPUS,
122*4882a593Smuzhiyun .name = "Digital Devices Octopus OEM",
123*4882a593Smuzhiyun .regmap = &octopus_map,
124*4882a593Smuzhiyun .port_num = 4,
125*4882a593Smuzhiyun .i2c_mask = 0x0f,
126*4882a593Smuzhiyun .led_num = 1,
127*4882a593Smuzhiyun .fan_num = 1,
128*4882a593Smuzhiyun .temp_num = 1,
129*4882a593Smuzhiyun .temp_bus = 0,
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun static const struct ddb_info ddb_octopus_mini = {
133*4882a593Smuzhiyun .type = DDB_OCTOPUS,
134*4882a593Smuzhiyun .name = "Digital Devices Octopus Mini",
135*4882a593Smuzhiyun .regmap = &octopus_map,
136*4882a593Smuzhiyun .port_num = 4,
137*4882a593Smuzhiyun .i2c_mask = 0x0f,
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun static const struct ddb_info ddb_v6 = {
141*4882a593Smuzhiyun .type = DDB_OCTOPUS,
142*4882a593Smuzhiyun .name = "Digital Devices Cine S2 V6 DVB adapter",
143*4882a593Smuzhiyun .regmap = &octopus_map,
144*4882a593Smuzhiyun .port_num = 3,
145*4882a593Smuzhiyun .i2c_mask = 0x07,
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static const struct ddb_info ddb_v6_5 = {
149*4882a593Smuzhiyun .type = DDB_OCTOPUS,
150*4882a593Smuzhiyun .name = "Digital Devices Cine S2 V6.5 DVB adapter",
151*4882a593Smuzhiyun .regmap = &octopus_map,
152*4882a593Smuzhiyun .port_num = 4,
153*4882a593Smuzhiyun .i2c_mask = 0x0f,
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun static const struct ddb_info ddb_v7 = {
157*4882a593Smuzhiyun .type = DDB_OCTOPUS,
158*4882a593Smuzhiyun .name = "Digital Devices Cine S2 V7 DVB adapter",
159*4882a593Smuzhiyun .regmap = &octopus_map,
160*4882a593Smuzhiyun .port_num = 4,
161*4882a593Smuzhiyun .i2c_mask = 0x0f,
162*4882a593Smuzhiyun .board_control = 2,
163*4882a593Smuzhiyun .board_control_2 = 4,
164*4882a593Smuzhiyun .ts_quirks = TS_QUIRK_REVERSED,
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun static const struct ddb_info ddb_v7a = {
168*4882a593Smuzhiyun .type = DDB_OCTOPUS,
169*4882a593Smuzhiyun .name = "Digital Devices Cine S2 V7 Advanced DVB adapter",
170*4882a593Smuzhiyun .regmap = &octopus_map,
171*4882a593Smuzhiyun .port_num = 4,
172*4882a593Smuzhiyun .i2c_mask = 0x0f,
173*4882a593Smuzhiyun .board_control = 2,
174*4882a593Smuzhiyun .board_control_2 = 4,
175*4882a593Smuzhiyun .ts_quirks = TS_QUIRK_REVERSED,
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun static const struct ddb_info ddb_ctv7 = {
179*4882a593Smuzhiyun .type = DDB_OCTOPUS,
180*4882a593Smuzhiyun .name = "Digital Devices Cine CT V7 DVB adapter",
181*4882a593Smuzhiyun .regmap = &octopus_map,
182*4882a593Smuzhiyun .port_num = 4,
183*4882a593Smuzhiyun .i2c_mask = 0x0f,
184*4882a593Smuzhiyun .board_control = 3,
185*4882a593Smuzhiyun .board_control_2 = 4,
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun static const struct ddb_info ddb_satixs2v3 = {
189*4882a593Smuzhiyun .type = DDB_OCTOPUS,
190*4882a593Smuzhiyun .name = "Mystique SaTiX-S2 V3 DVB adapter",
191*4882a593Smuzhiyun .regmap = &octopus_map,
192*4882a593Smuzhiyun .port_num = 3,
193*4882a593Smuzhiyun .i2c_mask = 0x07,
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun static const struct ddb_info ddb_ci = {
197*4882a593Smuzhiyun .type = DDB_OCTOPUS_CI,
198*4882a593Smuzhiyun .name = "Digital Devices Octopus CI",
199*4882a593Smuzhiyun .regmap = &octopus_map,
200*4882a593Smuzhiyun .port_num = 4,
201*4882a593Smuzhiyun .i2c_mask = 0x03,
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun static const struct ddb_info ddb_cis = {
205*4882a593Smuzhiyun .type = DDB_OCTOPUS_CI,
206*4882a593Smuzhiyun .name = "Digital Devices Octopus CI single",
207*4882a593Smuzhiyun .regmap = &octopus_map,
208*4882a593Smuzhiyun .port_num = 3,
209*4882a593Smuzhiyun .i2c_mask = 0x03,
210*4882a593Smuzhiyun };
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun static const struct ddb_info ddb_ci_s2_pro = {
213*4882a593Smuzhiyun .type = DDB_OCTOPUS_CI,
214*4882a593Smuzhiyun .name = "Digital Devices Octopus CI S2 Pro",
215*4882a593Smuzhiyun .regmap = &octopus_map,
216*4882a593Smuzhiyun .port_num = 4,
217*4882a593Smuzhiyun .i2c_mask = 0x01,
218*4882a593Smuzhiyun .board_control = 2,
219*4882a593Smuzhiyun .board_control_2 = 4,
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun static const struct ddb_info ddb_ci_s2_pro_a = {
223*4882a593Smuzhiyun .type = DDB_OCTOPUS_CI,
224*4882a593Smuzhiyun .name = "Digital Devices Octopus CI S2 Pro Advanced",
225*4882a593Smuzhiyun .regmap = &octopus_map,
226*4882a593Smuzhiyun .port_num = 4,
227*4882a593Smuzhiyun .i2c_mask = 0x01,
228*4882a593Smuzhiyun .board_control = 2,
229*4882a593Smuzhiyun .board_control_2 = 4,
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun static const struct ddb_info ddb_dvbct = {
233*4882a593Smuzhiyun .type = DDB_OCTOPUS,
234*4882a593Smuzhiyun .name = "Digital Devices DVBCT V6.1 DVB adapter",
235*4882a593Smuzhiyun .regmap = &octopus_map,
236*4882a593Smuzhiyun .port_num = 3,
237*4882a593Smuzhiyun .i2c_mask = 0x07,
238*4882a593Smuzhiyun };
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun /****************************************************************************/
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun static const struct ddb_info ddb_ct2_8 = {
243*4882a593Smuzhiyun .type = DDB_OCTOPUS_MAX_CT,
244*4882a593Smuzhiyun .name = "Digital Devices MAX A8 CT2",
245*4882a593Smuzhiyun .regmap = &octopus_map,
246*4882a593Smuzhiyun .port_num = 4,
247*4882a593Smuzhiyun .i2c_mask = 0x0f,
248*4882a593Smuzhiyun .board_control = 0x0ff,
249*4882a593Smuzhiyun .board_control_2 = 0xf00,
250*4882a593Smuzhiyun .ts_quirks = TS_QUIRK_SERIAL,
251*4882a593Smuzhiyun .tempmon_irq = 24,
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static const struct ddb_info ddb_c2t2_8 = {
255*4882a593Smuzhiyun .type = DDB_OCTOPUS_MAX_CT,
256*4882a593Smuzhiyun .name = "Digital Devices MAX A8 C2T2",
257*4882a593Smuzhiyun .regmap = &octopus_map,
258*4882a593Smuzhiyun .port_num = 4,
259*4882a593Smuzhiyun .i2c_mask = 0x0f,
260*4882a593Smuzhiyun .board_control = 0x0ff,
261*4882a593Smuzhiyun .board_control_2 = 0xf00,
262*4882a593Smuzhiyun .ts_quirks = TS_QUIRK_SERIAL,
263*4882a593Smuzhiyun .tempmon_irq = 24,
264*4882a593Smuzhiyun };
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun static const struct ddb_info ddb_isdbt_8 = {
267*4882a593Smuzhiyun .type = DDB_OCTOPUS_MAX_CT,
268*4882a593Smuzhiyun .name = "Digital Devices MAX A8 ISDBT",
269*4882a593Smuzhiyun .regmap = &octopus_map,
270*4882a593Smuzhiyun .port_num = 4,
271*4882a593Smuzhiyun .i2c_mask = 0x0f,
272*4882a593Smuzhiyun .board_control = 0x0ff,
273*4882a593Smuzhiyun .board_control_2 = 0xf00,
274*4882a593Smuzhiyun .ts_quirks = TS_QUIRK_SERIAL,
275*4882a593Smuzhiyun .tempmon_irq = 24,
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun static const struct ddb_info ddb_c2t2i_v0_8 = {
279*4882a593Smuzhiyun .type = DDB_OCTOPUS_MAX_CT,
280*4882a593Smuzhiyun .name = "Digital Devices MAX A8 C2T2I V0",
281*4882a593Smuzhiyun .regmap = &octopus_map,
282*4882a593Smuzhiyun .port_num = 4,
283*4882a593Smuzhiyun .i2c_mask = 0x0f,
284*4882a593Smuzhiyun .board_control = 0x0ff,
285*4882a593Smuzhiyun .board_control_2 = 0xf00,
286*4882a593Smuzhiyun .ts_quirks = TS_QUIRK_SERIAL | TS_QUIRK_ALT_OSC,
287*4882a593Smuzhiyun .tempmon_irq = 24,
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun static const struct ddb_info ddb_c2t2i_8 = {
291*4882a593Smuzhiyun .type = DDB_OCTOPUS_MAX_CT,
292*4882a593Smuzhiyun .name = "Digital Devices MAX A8 C2T2I",
293*4882a593Smuzhiyun .regmap = &octopus_map,
294*4882a593Smuzhiyun .port_num = 4,
295*4882a593Smuzhiyun .i2c_mask = 0x0f,
296*4882a593Smuzhiyun .board_control = 0x0ff,
297*4882a593Smuzhiyun .board_control_2 = 0xf00,
298*4882a593Smuzhiyun .ts_quirks = TS_QUIRK_SERIAL,
299*4882a593Smuzhiyun .tempmon_irq = 24,
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /****************************************************************************/
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun static const struct ddb_info ddb_s2_48 = {
305*4882a593Smuzhiyun .type = DDB_OCTOPUS_MAX,
306*4882a593Smuzhiyun .name = "Digital Devices MAX S8 4/8",
307*4882a593Smuzhiyun .regmap = &octopus_map,
308*4882a593Smuzhiyun .port_num = 4,
309*4882a593Smuzhiyun .i2c_mask = 0x01,
310*4882a593Smuzhiyun .board_control = 1,
311*4882a593Smuzhiyun .tempmon_irq = 24,
312*4882a593Smuzhiyun };
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun static const struct ddb_info ddb_s2x_48 = {
315*4882a593Smuzhiyun .type = DDB_OCTOPUS_MCI,
316*4882a593Smuzhiyun .name = "Digital Devices MAX SX8",
317*4882a593Smuzhiyun .regmap = &octopus_map,
318*4882a593Smuzhiyun .port_num = 4,
319*4882a593Smuzhiyun .i2c_mask = 0x00,
320*4882a593Smuzhiyun .tempmon_irq = 24,
321*4882a593Smuzhiyun .mci_ports = 4,
322*4882a593Smuzhiyun .mci_type = 0,
323*4882a593Smuzhiyun };
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun /****************************************************************************/
326*4882a593Smuzhiyun /****************************************************************************/
327*4882a593Smuzhiyun /****************************************************************************/
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun #define DDB_DEVID(_device, _subdevice, _info) { \
330*4882a593Smuzhiyun .vendor = DDVID, \
331*4882a593Smuzhiyun .device = _device, \
332*4882a593Smuzhiyun .subvendor = DDVID, \
333*4882a593Smuzhiyun .subdevice = _subdevice, \
334*4882a593Smuzhiyun .info = &_info }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun static const struct ddb_device_id ddb_device_ids[] = {
337*4882a593Smuzhiyun /* PCIe devices */
338*4882a593Smuzhiyun DDB_DEVID(0x0002, 0x0001, ddb_octopus),
339*4882a593Smuzhiyun DDB_DEVID(0x0003, 0x0001, ddb_octopus),
340*4882a593Smuzhiyun DDB_DEVID(0x0005, 0x0004, ddb_octopusv3),
341*4882a593Smuzhiyun DDB_DEVID(0x0003, 0x0002, ddb_octopus_le),
342*4882a593Smuzhiyun DDB_DEVID(0x0003, 0x0003, ddb_octopus_oem),
343*4882a593Smuzhiyun DDB_DEVID(0x0003, 0x0010, ddb_octopus_mini),
344*4882a593Smuzhiyun DDB_DEVID(0x0005, 0x0011, ddb_octopus_mini),
345*4882a593Smuzhiyun DDB_DEVID(0x0003, 0x0020, ddb_v6),
346*4882a593Smuzhiyun DDB_DEVID(0x0003, 0x0021, ddb_v6_5),
347*4882a593Smuzhiyun DDB_DEVID(0x0006, 0x0022, ddb_v7),
348*4882a593Smuzhiyun DDB_DEVID(0x0006, 0x0024, ddb_v7a),
349*4882a593Smuzhiyun DDB_DEVID(0x0003, 0x0030, ddb_dvbct),
350*4882a593Smuzhiyun DDB_DEVID(0x0003, 0xdb03, ddb_satixs2v3),
351*4882a593Smuzhiyun DDB_DEVID(0x0006, 0x0031, ddb_ctv7),
352*4882a593Smuzhiyun DDB_DEVID(0x0006, 0x0032, ddb_ctv7),
353*4882a593Smuzhiyun DDB_DEVID(0x0006, 0x0033, ddb_ctv7),
354*4882a593Smuzhiyun DDB_DEVID(0x0007, 0x0023, ddb_s2_48),
355*4882a593Smuzhiyun DDB_DEVID(0x0008, 0x0034, ddb_ct2_8),
356*4882a593Smuzhiyun DDB_DEVID(0x0008, 0x0035, ddb_c2t2_8),
357*4882a593Smuzhiyun DDB_DEVID(0x0008, 0x0036, ddb_isdbt_8),
358*4882a593Smuzhiyun DDB_DEVID(0x0008, 0x0037, ddb_c2t2i_v0_8),
359*4882a593Smuzhiyun DDB_DEVID(0x0008, 0x0038, ddb_c2t2i_8),
360*4882a593Smuzhiyun DDB_DEVID(0x0009, 0x0025, ddb_s2x_48),
361*4882a593Smuzhiyun DDB_DEVID(0x0006, 0x0039, ddb_ctv7),
362*4882a593Smuzhiyun DDB_DEVID(0x0011, 0x0040, ddb_ci),
363*4882a593Smuzhiyun DDB_DEVID(0x0011, 0x0041, ddb_cis),
364*4882a593Smuzhiyun DDB_DEVID(0x0012, 0x0042, ddb_ci),
365*4882a593Smuzhiyun DDB_DEVID(0x0013, 0x0043, ddb_ci_s2_pro),
366*4882a593Smuzhiyun DDB_DEVID(0x0013, 0x0044, ddb_ci_s2_pro_a),
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /****************************************************************************/
370*4882a593Smuzhiyun
get_ddb_info(u16 vendor,u16 device,u16 subvendor,u16 subdevice)371*4882a593Smuzhiyun const struct ddb_info *get_ddb_info(u16 vendor, u16 device,
372*4882a593Smuzhiyun u16 subvendor, u16 subdevice)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun int i;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(ddb_device_ids); i++) {
377*4882a593Smuzhiyun const struct ddb_device_id *id = &ddb_device_ids[i];
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun if (vendor == id->vendor &&
380*4882a593Smuzhiyun device == id->device &&
381*4882a593Smuzhiyun subvendor == id->subvendor &&
382*4882a593Smuzhiyun (subdevice == id->subdevice ||
383*4882a593Smuzhiyun id->subdevice == 0xffff))
384*4882a593Smuzhiyun return id->info;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun return &ddb_none;
388*4882a593Smuzhiyun }
389