xref: /OK3568_Linux_fs/kernel/drivers/media/pci/cx88/cx88.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * v4l2 device driver for cx2388x based TV cards
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (c) 2003,04 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef CX88_H
9*4882a593Smuzhiyun #define CX88_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/pci.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/i2c-algo-bit.h>
16*4882a593Smuzhiyun #include <linux/videodev2.h>
17*4882a593Smuzhiyun #include <linux/kdev_t.h>
18*4882a593Smuzhiyun #include <linux/refcount.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <media/v4l2-device.h>
21*4882a593Smuzhiyun #include <media/v4l2-fh.h>
22*4882a593Smuzhiyun #include <media/tuner.h>
23*4882a593Smuzhiyun #include <media/tveeprom.h>
24*4882a593Smuzhiyun #include <media/videobuf2-dma-sg.h>
25*4882a593Smuzhiyun #include <media/drv-intf/cx2341x.h>
26*4882a593Smuzhiyun #include <media/videobuf2-dvb.h>
27*4882a593Smuzhiyun #include <media/i2c/ir-kbd-i2c.h>
28*4882a593Smuzhiyun #include <media/i2c/wm8775.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include "cx88-reg.h"
31*4882a593Smuzhiyun #include "tuner-xc2028.h"
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include <linux/mutex.h>
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define CX88_VERSION "1.0.0"
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define UNSET (-1U)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define CX88_MAXBOARDS 8
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* Max number of inputs by card */
42*4882a593Smuzhiyun #define MAX_CX88_INPUT 8
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* ----------------------------------------------------------- */
45*4882a593Smuzhiyun /* defines and enums                                           */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM/LC */
48*4882a593Smuzhiyun #define CX88_NORMS (V4L2_STD_ALL		\
49*4882a593Smuzhiyun 		    & ~V4L2_STD_PAL_H		\
50*4882a593Smuzhiyun 		    & ~V4L2_STD_NTSC_M_KR	\
51*4882a593Smuzhiyun 		    & ~V4L2_STD_SECAM_LC)
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define FORMAT_FLAGS_PACKED       0x01
54*4882a593Smuzhiyun #define FORMAT_FLAGS_PLANAR       0x02
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define VBI_LINE_PAL_COUNT              18
57*4882a593Smuzhiyun #define VBI_LINE_NTSC_COUNT             12
58*4882a593Smuzhiyun #define VBI_LINE_LENGTH           2048
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define AUD_RDS_LINES		     4
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* need "shadow" registers for some write-only ones ... */
63*4882a593Smuzhiyun #define SHADOW_AUD_VOL_CTL           1
64*4882a593Smuzhiyun #define SHADOW_AUD_BAL_CTL           2
65*4882a593Smuzhiyun #define SHADOW_MAX                   3
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun /* FM Radio deemphasis type */
68*4882a593Smuzhiyun enum cx88_deemph_type {
69*4882a593Smuzhiyun 	FM_NO_DEEMPH = 0,
70*4882a593Smuzhiyun 	FM_DEEMPH_50,
71*4882a593Smuzhiyun 	FM_DEEMPH_75
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun enum cx88_board_type {
75*4882a593Smuzhiyun 	CX88_BOARD_NONE = 0,
76*4882a593Smuzhiyun 	CX88_MPEG_DVB,
77*4882a593Smuzhiyun 	CX88_MPEG_BLACKBIRD
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun enum cx8802_board_access {
81*4882a593Smuzhiyun 	CX8802_DRVCTL_SHARED    = 1,
82*4882a593Smuzhiyun 	CX8802_DRVCTL_EXCLUSIVE = 2,
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /* ----------------------------------------------------------- */
86*4882a593Smuzhiyun /* tv norms                                                    */
87*4882a593Smuzhiyun 
norm_maxw(v4l2_std_id norm)88*4882a593Smuzhiyun static inline unsigned int norm_maxw(v4l2_std_id norm)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	return 720;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun 
norm_maxh(v4l2_std_id norm)93*4882a593Smuzhiyun static inline unsigned int norm_maxh(v4l2_std_id norm)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun 	return (norm & V4L2_STD_525_60) ? 480 : 576;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /* ----------------------------------------------------------- */
99*4882a593Smuzhiyun /* static data                                                 */
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun struct cx8800_fmt {
102*4882a593Smuzhiyun 	u32   fourcc;          /* v4l2 format id */
103*4882a593Smuzhiyun 	int   depth;
104*4882a593Smuzhiyun 	int   flags;
105*4882a593Smuzhiyun 	u32   cxformat;
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun /* ----------------------------------------------------------- */
109*4882a593Smuzhiyun /* SRAM memory management data (see cx88-core.c)               */
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun #define SRAM_CH21 0   /* video */
112*4882a593Smuzhiyun #define SRAM_CH22 1
113*4882a593Smuzhiyun #define SRAM_CH23 2
114*4882a593Smuzhiyun #define SRAM_CH24 3   /* vbi   */
115*4882a593Smuzhiyun #define SRAM_CH25 4   /* audio */
116*4882a593Smuzhiyun #define SRAM_CH26 5
117*4882a593Smuzhiyun #define SRAM_CH28 6   /* mpeg */
118*4882a593Smuzhiyun #define SRAM_CH27 7   /* audio rds */
119*4882a593Smuzhiyun /* more */
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun struct sram_channel {
122*4882a593Smuzhiyun 	const char *name;
123*4882a593Smuzhiyun 	u32  cmds_start;
124*4882a593Smuzhiyun 	u32  ctrl_start;
125*4882a593Smuzhiyun 	u32  cdt;
126*4882a593Smuzhiyun 	u32  fifo_start;
127*4882a593Smuzhiyun 	u32  fifo_size;
128*4882a593Smuzhiyun 	u32  ptr1_reg;
129*4882a593Smuzhiyun 	u32  ptr2_reg;
130*4882a593Smuzhiyun 	u32  cnt1_reg;
131*4882a593Smuzhiyun 	u32  cnt2_reg;
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun extern const struct sram_channel cx88_sram_channels[];
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun /* ----------------------------------------------------------- */
137*4882a593Smuzhiyun /* card configuration                                          */
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun #define CX88_BOARD_NOAUTO               UNSET
140*4882a593Smuzhiyun #define CX88_BOARD_UNKNOWN                  0
141*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE                1
142*4882a593Smuzhiyun #define CX88_BOARD_GDI                      2
143*4882a593Smuzhiyun #define CX88_BOARD_PIXELVIEW                3
144*4882a593Smuzhiyun #define CX88_BOARD_ATI_WONDER_PRO           4
145*4882a593Smuzhiyun #define CX88_BOARD_WINFAST2000XP_EXPERT     5
146*4882a593Smuzhiyun #define CX88_BOARD_AVERTV_STUDIO_303        6
147*4882a593Smuzhiyun #define CX88_BOARD_MSI_TVANYWHERE_MASTER    7
148*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_DV2000           8
149*4882a593Smuzhiyun #define CX88_BOARD_LEADTEK_PVR2000          9
150*4882a593Smuzhiyun #define CX88_BOARD_IODATA_GVVCP3PCI        10
151*4882a593Smuzhiyun #define CX88_BOARD_PROLINK_PLAYTVPVR       11
152*4882a593Smuzhiyun #define CX88_BOARD_ASUS_PVR_416            12
153*4882a593Smuzhiyun #define CX88_BOARD_MSI_TVANYWHERE          13
154*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_DVB_T            14
155*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15
156*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_LTV883           16
157*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q  17
158*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_DVB_T1        18
159*4882a593Smuzhiyun #define CX88_BOARD_CONEXANT_DVB_T1         19
160*4882a593Smuzhiyun #define CX88_BOARD_PROVIDEO_PV259          20
161*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21
162*4882a593Smuzhiyun #define CX88_BOARD_PCHDTV_HD3000           22
163*4882a593Smuzhiyun #define CX88_BOARD_DNTV_LIVE_DVB_T         23
164*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_ROSLYN        24
165*4882a593Smuzhiyun #define CX88_BOARD_DIGITALLOGIC_MEC        25
166*4882a593Smuzhiyun #define CX88_BOARD_IODATA_GVBCTV7E         26
167*4882a593Smuzhiyun #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27
168*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T  28
169*4882a593Smuzhiyun #define CX88_BOARD_ADSTECH_DVB_T_PCI          29
170*4882a593Smuzhiyun #define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1  30
171*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
172*4882a593Smuzhiyun #define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
173*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
174*4882a593Smuzhiyun #define CX88_BOARD_ATI_HDTVWONDER          34
175*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_DTV1000         35
176*4882a593Smuzhiyun #define CX88_BOARD_AVERTV_303              36
177*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1  37
178*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_NOVASE2_S1    38
179*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_DVBS_100         39
180*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_HVR1100       40
181*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_HVR1100LP     41
182*4882a593Smuzhiyun #define CX88_BOARD_DNTV_LIVE_DVB_T_PRO     42
183*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_DVB_T_CX22702    43
184*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
185*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45
186*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46
187*4882a593Smuzhiyun #define CX88_BOARD_PCHDTV_HD5500           47
188*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_MCE200_DELUXE    48
189*4882a593Smuzhiyun #define CX88_BOARD_PIXELVIEW_PLAYTV_P7000  49
190*4882a593Smuzhiyun #define CX88_BOARD_NPGTECH_REALTV_TOP10FM  50
191*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_DTV2000H        51
192*4882a593Smuzhiyun #define CX88_BOARD_GENIATECH_DVBS          52
193*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_HVR3000       53
194*4882a593Smuzhiyun #define CX88_BOARD_NORWOOD_MICRO           54
195*4882a593Smuzhiyun #define CX88_BOARD_TE_DTV_250_OEM_SWANN    55
196*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_HVR1300       56
197*4882a593Smuzhiyun #define CX88_BOARD_ADSTECH_PTV_390         57
198*4882a593Smuzhiyun #define CX88_BOARD_PINNACLE_PCTV_HD_800i   58
199*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
200*4882a593Smuzhiyun #define CX88_BOARD_PINNACLE_HYBRID_PCTV    60
201*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
202*4882a593Smuzhiyun #define CX88_BOARD_POWERCOLOR_REAL_ANGEL   62
203*4882a593Smuzhiyun #define CX88_BOARD_GENIATECH_X8000_MT      63
204*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
205*4882a593Smuzhiyun #define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
206*4882a593Smuzhiyun #define CX88_BOARD_PROLINK_PV_8000GT       66
207*4882a593Smuzhiyun #define CX88_BOARD_KWORLD_ATSC_120         67
208*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_HVR4000       68
209*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_HVR4000LITE   69
210*4882a593Smuzhiyun #define CX88_BOARD_TEVII_S460              70
211*4882a593Smuzhiyun #define CX88_BOARD_OMICOM_SS4_PCI          71
212*4882a593Smuzhiyun #define CX88_BOARD_TBS_8920                72
213*4882a593Smuzhiyun #define CX88_BOARD_TEVII_S420              73
214*4882a593Smuzhiyun #define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
215*4882a593Smuzhiyun #define CX88_BOARD_PROF_7300               75
216*4882a593Smuzhiyun #define CX88_BOARD_SATTRADE_ST4200         76
217*4882a593Smuzhiyun #define CX88_BOARD_TBS_8910                77
218*4882a593Smuzhiyun #define CX88_BOARD_PROF_6200               78
219*4882a593Smuzhiyun #define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
220*4882a593Smuzhiyun #define CX88_BOARD_HAUPPAUGE_IRONLY        80
221*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_DTV1800H        81
222*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_DTV2000H_J      82
223*4882a593Smuzhiyun #define CX88_BOARD_PROF_7301               83
224*4882a593Smuzhiyun #define CX88_BOARD_SAMSUNG_SMT_7020        84
225*4882a593Smuzhiyun #define CX88_BOARD_TWINHAN_VP1027_DVBS     85
226*4882a593Smuzhiyun #define CX88_BOARD_TEVII_S464              86
227*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_DTV2000H_PLUS   87
228*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
229*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
230*4882a593Smuzhiyun #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
231*4882a593Smuzhiyun #define CX88_BOARD_NOTONLYTV_LV3H          91
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun enum cx88_itype {
234*4882a593Smuzhiyun 	CX88_VMUX_COMPOSITE1 = 1,
235*4882a593Smuzhiyun 	CX88_VMUX_COMPOSITE2,
236*4882a593Smuzhiyun 	CX88_VMUX_COMPOSITE3,
237*4882a593Smuzhiyun 	CX88_VMUX_COMPOSITE4,
238*4882a593Smuzhiyun 	CX88_VMUX_SVIDEO,
239*4882a593Smuzhiyun 	CX88_VMUX_TELEVISION,
240*4882a593Smuzhiyun 	CX88_VMUX_CABLE,
241*4882a593Smuzhiyun 	CX88_VMUX_DVB,
242*4882a593Smuzhiyun 	CX88_VMUX_DEBUG,
243*4882a593Smuzhiyun 	CX88_RADIO,
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun struct cx88_input {
247*4882a593Smuzhiyun 	enum cx88_itype type;
248*4882a593Smuzhiyun 	u32             gpio0, gpio1, gpio2, gpio3;
249*4882a593Smuzhiyun 	unsigned int    vmux:2;
250*4882a593Smuzhiyun 	unsigned int    audioroute:4;
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun enum cx88_audio_chip {
254*4882a593Smuzhiyun 	CX88_AUDIO_WM8775 = 1,
255*4882a593Smuzhiyun 	CX88_AUDIO_TVAUDIO,
256*4882a593Smuzhiyun };
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun struct cx88_board {
259*4882a593Smuzhiyun 	const char              *name;
260*4882a593Smuzhiyun 	unsigned int            tuner_type;
261*4882a593Smuzhiyun 	unsigned int		radio_type;
262*4882a593Smuzhiyun 	unsigned char		tuner_addr;
263*4882a593Smuzhiyun 	unsigned char		radio_addr;
264*4882a593Smuzhiyun 	int                     tda9887_conf;
265*4882a593Smuzhiyun 	struct cx88_input       input[MAX_CX88_INPUT];
266*4882a593Smuzhiyun 	struct cx88_input       radio;
267*4882a593Smuzhiyun 	enum cx88_board_type    mpeg;
268*4882a593Smuzhiyun 	enum cx88_audio_chip	audio_chip;
269*4882a593Smuzhiyun 	int			num_frontends;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	/* Used for I2S devices */
272*4882a593Smuzhiyun 	int			i2sinputcntl;
273*4882a593Smuzhiyun };
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun struct cx88_subid {
276*4882a593Smuzhiyun 	u16     subvendor;
277*4882a593Smuzhiyun 	u16     subdevice;
278*4882a593Smuzhiyun 	u32     card;
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun enum cx88_tvaudio {
282*4882a593Smuzhiyun 	WW_NONE = 1,
283*4882a593Smuzhiyun 	WW_BTSC,
284*4882a593Smuzhiyun 	WW_BG,
285*4882a593Smuzhiyun 	WW_DK,
286*4882a593Smuzhiyun 	WW_I,
287*4882a593Smuzhiyun 	WW_L,
288*4882a593Smuzhiyun 	WW_EIAJ,
289*4882a593Smuzhiyun 	WW_I2SPT,
290*4882a593Smuzhiyun 	WW_FM,
291*4882a593Smuzhiyun 	WW_I2SADC,
292*4882a593Smuzhiyun 	WW_M
293*4882a593Smuzhiyun };
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun #define INPUT(nr) (core->board.input[nr])
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun /* ----------------------------------------------------------- */
298*4882a593Smuzhiyun /* device / file handle status                                 */
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun #define RESOURCE_OVERLAY       1
301*4882a593Smuzhiyun #define RESOURCE_VIDEO         2
302*4882a593Smuzhiyun #define RESOURCE_VBI           4
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun #define BUFFER_TIMEOUT     msecs_to_jiffies(2000)
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun struct cx88_riscmem {
307*4882a593Smuzhiyun 	unsigned int   size;
308*4882a593Smuzhiyun 	__le32         *cpu;
309*4882a593Smuzhiyun 	__le32         *jmp;
310*4882a593Smuzhiyun 	dma_addr_t     dma;
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun /* buffer for one video frame */
314*4882a593Smuzhiyun struct cx88_buffer {
315*4882a593Smuzhiyun 	/* common v4l buffer stuff -- must be first */
316*4882a593Smuzhiyun 	struct vb2_v4l2_buffer vb;
317*4882a593Smuzhiyun 	struct list_head       list;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	/* cx88 specific */
320*4882a593Smuzhiyun 	unsigned int           bpl;
321*4882a593Smuzhiyun 	struct cx88_riscmem    risc;
322*4882a593Smuzhiyun };
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun struct cx88_dmaqueue {
325*4882a593Smuzhiyun 	struct list_head       active;
326*4882a593Smuzhiyun 	u32                    count;
327*4882a593Smuzhiyun };
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun struct cx8800_dev;
330*4882a593Smuzhiyun struct cx8802_dev;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun struct cx88_core {
333*4882a593Smuzhiyun 	struct list_head           devlist;
334*4882a593Smuzhiyun 	refcount_t		   refcount;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	/* board name */
337*4882a593Smuzhiyun 	int                        nr;
338*4882a593Smuzhiyun 	char                       name[32];
339*4882a593Smuzhiyun 	u32			   model;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	/* pci stuff */
342*4882a593Smuzhiyun 	int                        pci_bus;
343*4882a593Smuzhiyun 	int                        pci_slot;
344*4882a593Smuzhiyun 	u32                        __iomem *lmmio;
345*4882a593Smuzhiyun 	u8                         __iomem *bmmio;
346*4882a593Smuzhiyun 	u32                        shadow[SHADOW_MAX];
347*4882a593Smuzhiyun 	int                        pci_irqmask;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	/* i2c i/o */
350*4882a593Smuzhiyun 	struct i2c_adapter         i2c_adap;
351*4882a593Smuzhiyun 	struct i2c_algo_bit_data   i2c_algo;
352*4882a593Smuzhiyun 	struct i2c_client          i2c_client;
353*4882a593Smuzhiyun 	u32                        i2c_state, i2c_rc;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	/* config info -- analog */
356*4882a593Smuzhiyun 	struct v4l2_device	   v4l2_dev;
357*4882a593Smuzhiyun 	struct v4l2_ctrl_handler   video_hdl;
358*4882a593Smuzhiyun 	struct v4l2_ctrl	   *chroma_agc;
359*4882a593Smuzhiyun 	struct v4l2_ctrl_handler   audio_hdl;
360*4882a593Smuzhiyun 	struct v4l2_subdev	   *sd_wm8775;
361*4882a593Smuzhiyun 	struct i2c_client	   *i2c_rtc;
362*4882a593Smuzhiyun 	unsigned int               boardnr;
363*4882a593Smuzhiyun 	struct cx88_board	   board;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	/* Supported V4L _STD_ tuner formats */
366*4882a593Smuzhiyun 	unsigned int               tuner_formats;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	/* config info -- dvb */
369*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
370*4882a593Smuzhiyun 	int	(*prev_set_voltage)(struct dvb_frontend *fe,
371*4882a593Smuzhiyun 				    enum fe_sec_voltage voltage);
372*4882a593Smuzhiyun #endif
373*4882a593Smuzhiyun 	void	(*gate_ctrl)(struct cx88_core *core, int open);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	/* state info */
376*4882a593Smuzhiyun 	struct task_struct         *kthread;
377*4882a593Smuzhiyun 	v4l2_std_id                tvnorm;
378*4882a593Smuzhiyun 	unsigned int		   width, height;
379*4882a593Smuzhiyun 	unsigned int		   field;
380*4882a593Smuzhiyun 	enum cx88_tvaudio          tvaudio;
381*4882a593Smuzhiyun 	u32                        audiomode_manual;
382*4882a593Smuzhiyun 	u32                        audiomode_current;
383*4882a593Smuzhiyun 	u32                        input;
384*4882a593Smuzhiyun 	u32                        last_analog_input;
385*4882a593Smuzhiyun 	u32                        astat;
386*4882a593Smuzhiyun 	u32			   use_nicam;
387*4882a593Smuzhiyun 	unsigned long		   last_change;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	/* IR remote control state */
390*4882a593Smuzhiyun 	struct cx88_IR             *ir;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	/* I2C remote data */
393*4882a593Smuzhiyun 	struct IR_i2c_init_data    init_data;
394*4882a593Smuzhiyun 	struct wm8775_platform_data wm8775_data;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	struct mutex               lock;
397*4882a593Smuzhiyun 	/* various v4l controls */
398*4882a593Smuzhiyun 	u32                        freq;
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	/*
401*4882a593Smuzhiyun 	 * cx88-video needs to access cx8802 for hybrid tuner pll access and
402*4882a593Smuzhiyun 	 * for vb2_is_busy() checks.
403*4882a593Smuzhiyun 	 */
404*4882a593Smuzhiyun 	struct cx8802_dev          *dvbdev;
405*4882a593Smuzhiyun 	/* cx88-blackbird needs to access cx8800 for vb2_is_busy() checks */
406*4882a593Smuzhiyun 	struct cx8800_dev          *v4ldev;
407*4882a593Smuzhiyun 	enum cx88_board_type       active_type_id;
408*4882a593Smuzhiyun 	int			   active_ref;
409*4882a593Smuzhiyun 	int			   active_fe_id;
410*4882a593Smuzhiyun };
411*4882a593Smuzhiyun 
to_core(struct v4l2_device * v4l2_dev)412*4882a593Smuzhiyun static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun 	return container_of(v4l2_dev, struct cx88_core, v4l2_dev);
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun #define call_hw(core, grpid, o, f, args...) \
418*4882a593Smuzhiyun 	do {							\
419*4882a593Smuzhiyun 		if (!core->i2c_rc) {				\
420*4882a593Smuzhiyun 			if (core->gate_ctrl)			\
421*4882a593Smuzhiyun 				core->gate_ctrl(core, 1);	\
422*4882a593Smuzhiyun 			v4l2_device_call_all(&core->v4l2_dev,	\
423*4882a593Smuzhiyun 					     grpid, o, f, ##args); \
424*4882a593Smuzhiyun 			if (core->gate_ctrl)			\
425*4882a593Smuzhiyun 				core->gate_ctrl(core, 0);	\
426*4882a593Smuzhiyun 		}						\
427*4882a593Smuzhiyun 	} while (0)
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun #define call_all(core, o, f, args...) call_hw(core, 0, o, f, ##args)
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun #define WM8775_GID      (1 << 0)
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun #define wm8775_s_ctrl(core, id, val) \
434*4882a593Smuzhiyun 	do {								\
435*4882a593Smuzhiyun 		struct v4l2_ctrl *ctrl_ =				\
436*4882a593Smuzhiyun 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
437*4882a593Smuzhiyun 		if (ctrl_ && !core->i2c_rc) {				\
438*4882a593Smuzhiyun 			if (core->gate_ctrl)				\
439*4882a593Smuzhiyun 				core->gate_ctrl(core, 1);		\
440*4882a593Smuzhiyun 			v4l2_ctrl_s_ctrl(ctrl_, val);			\
441*4882a593Smuzhiyun 			if (core->gate_ctrl)				\
442*4882a593Smuzhiyun 				core->gate_ctrl(core, 0);		\
443*4882a593Smuzhiyun 		}							\
444*4882a593Smuzhiyun 	} while (0)
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun #define wm8775_g_ctrl(core, id) \
447*4882a593Smuzhiyun 	({								\
448*4882a593Smuzhiyun 		struct v4l2_ctrl *ctrl_ =				\
449*4882a593Smuzhiyun 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
450*4882a593Smuzhiyun 		s32 val = 0;						\
451*4882a593Smuzhiyun 		if (ctrl_ && !core->i2c_rc) {				\
452*4882a593Smuzhiyun 			if (core->gate_ctrl)				\
453*4882a593Smuzhiyun 				core->gate_ctrl(core, 1);		\
454*4882a593Smuzhiyun 			val = v4l2_ctrl_g_ctrl(ctrl_);			\
455*4882a593Smuzhiyun 			if (core->gate_ctrl)				\
456*4882a593Smuzhiyun 				core->gate_ctrl(core, 0);		\
457*4882a593Smuzhiyun 		}							\
458*4882a593Smuzhiyun 		val;							\
459*4882a593Smuzhiyun 	})
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun /* ----------------------------------------------------------- */
462*4882a593Smuzhiyun /* function 0: video stuff                                     */
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun struct cx8800_suspend_state {
465*4882a593Smuzhiyun 	int                        disabled;
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun struct cx8800_dev {
469*4882a593Smuzhiyun 	struct cx88_core           *core;
470*4882a593Smuzhiyun 	spinlock_t                 slock;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	/* various device info */
473*4882a593Smuzhiyun 	unsigned int               resources;
474*4882a593Smuzhiyun 	struct video_device        video_dev;
475*4882a593Smuzhiyun 	struct video_device        vbi_dev;
476*4882a593Smuzhiyun 	struct video_device        radio_dev;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	/* pci i/o */
479*4882a593Smuzhiyun 	struct pci_dev             *pci;
480*4882a593Smuzhiyun 	unsigned char              pci_rev, pci_lat;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	const struct cx8800_fmt    *fmt;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	/* capture queues */
485*4882a593Smuzhiyun 	struct cx88_dmaqueue       vidq;
486*4882a593Smuzhiyun 	struct vb2_queue           vb2_vidq;
487*4882a593Smuzhiyun 	struct cx88_dmaqueue       vbiq;
488*4882a593Smuzhiyun 	struct vb2_queue           vb2_vbiq;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	/* various v4l controls */
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	/* other global state info */
493*4882a593Smuzhiyun 	struct cx8800_suspend_state state;
494*4882a593Smuzhiyun };
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun /* ----------------------------------------------------------- */
497*4882a593Smuzhiyun /* function 1: audio/alsa stuff                                */
498*4882a593Smuzhiyun /* =============> moved to cx88-alsa.c <====================== */
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun /* ----------------------------------------------------------- */
501*4882a593Smuzhiyun /* function 2: mpeg stuff                                      */
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun struct cx8802_suspend_state {
504*4882a593Smuzhiyun 	int                        disabled;
505*4882a593Smuzhiyun };
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun struct cx8802_driver {
508*4882a593Smuzhiyun 	struct cx88_core *core;
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	/* List of drivers attached to device */
511*4882a593Smuzhiyun 	struct list_head drvlist;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	/* Type of driver and access required */
514*4882a593Smuzhiyun 	enum cx88_board_type type_id;
515*4882a593Smuzhiyun 	enum cx8802_board_access hw_access;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	/* MPEG 8802 internal only */
518*4882a593Smuzhiyun 	int (*suspend)(struct pci_dev *pci_dev, pm_message_t state);
519*4882a593Smuzhiyun 	int (*resume)(struct pci_dev *pci_dev);
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	/* Callers to the following functions must hold core->lock */
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 	/* MPEG 8802 -> mini driver - Driver probe and configuration */
524*4882a593Smuzhiyun 	int (*probe)(struct cx8802_driver *drv);
525*4882a593Smuzhiyun 	int (*remove)(struct cx8802_driver *drv);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	/* MPEG 8802 -> mini driver - Access for hardware control */
528*4882a593Smuzhiyun 	int (*advise_acquire)(struct cx8802_driver *drv);
529*4882a593Smuzhiyun 	int (*advise_release)(struct cx8802_driver *drv);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	/* MPEG 8802 <- mini driver - Access for hardware control */
532*4882a593Smuzhiyun 	int (*request_acquire)(struct cx8802_driver *drv);
533*4882a593Smuzhiyun 	int (*request_release)(struct cx8802_driver *drv);
534*4882a593Smuzhiyun };
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun struct cx8802_dev {
537*4882a593Smuzhiyun 	struct cx88_core           *core;
538*4882a593Smuzhiyun 	spinlock_t                 slock;
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	/* pci i/o */
541*4882a593Smuzhiyun 	struct pci_dev             *pci;
542*4882a593Smuzhiyun 	unsigned char              pci_rev, pci_lat;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	/* dma queues */
545*4882a593Smuzhiyun 	struct cx88_dmaqueue       mpegq;
546*4882a593Smuzhiyun 	struct vb2_queue           vb2_mpegq;
547*4882a593Smuzhiyun 	u32                        ts_packet_size;
548*4882a593Smuzhiyun 	u32                        ts_packet_count;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	/* other global state info */
551*4882a593Smuzhiyun 	struct cx8802_suspend_state state;
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	/* for blackbird only */
554*4882a593Smuzhiyun 	struct list_head           devlist;
555*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_CX88_BLACKBIRD)
556*4882a593Smuzhiyun 	struct video_device        mpeg_dev;
557*4882a593Smuzhiyun 	u32                        mailbox;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	/* mpeg params */
560*4882a593Smuzhiyun 	struct cx2341x_handler     cxhdl;
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun #endif
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
565*4882a593Smuzhiyun 	/* for dvb only */
566*4882a593Smuzhiyun 	struct vb2_dvb_frontends frontends;
567*4882a593Smuzhiyun #endif
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
570*4882a593Smuzhiyun 	/* For VP3045 secondary I2C bus support */
571*4882a593Smuzhiyun 	struct vp3054_i2c_state	   *vp3054;
572*4882a593Smuzhiyun #endif
573*4882a593Smuzhiyun 	/* for switching modulation types */
574*4882a593Smuzhiyun 	unsigned char              ts_gen_cntrl;
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	/* List of attached drivers; must hold core->lock to access */
577*4882a593Smuzhiyun 	struct list_head	   drvlist;
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	struct work_struct	   request_module_wk;
580*4882a593Smuzhiyun };
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun /* ----------------------------------------------------------- */
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun #define cx_read(reg)             readl(core->lmmio + ((reg) >> 2))
585*4882a593Smuzhiyun #define cx_write(reg, value)     writel((value), core->lmmio + ((reg) >> 2))
586*4882a593Smuzhiyun #define cx_writeb(reg, value)    writeb((value), core->bmmio + (reg))
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun #define cx_andor(reg, mask, value) \
589*4882a593Smuzhiyun 	writel((readl(core->lmmio + ((reg) >> 2)) & ~(mask)) |\
590*4882a593Smuzhiyun 	((value) & (mask)), core->lmmio + ((reg) >> 2))
591*4882a593Smuzhiyun #define cx_set(reg, bit)         cx_andor((reg), (bit), (bit))
592*4882a593Smuzhiyun #define cx_clear(reg, bit)       cx_andor((reg), (bit), 0)
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun #define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); }
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun /* shadow registers */
597*4882a593Smuzhiyun #define cx_sread(sreg)		    (core->shadow[sreg])
598*4882a593Smuzhiyun #define cx_swrite(sreg, reg, value) \
599*4882a593Smuzhiyun 	(core->shadow[sreg] = value, \
600*4882a593Smuzhiyun 	writel(core->shadow[sreg], core->lmmio + ((reg) >> 2)))
601*4882a593Smuzhiyun #define cx_sandor(sreg, reg, mask, value) \
602*4882a593Smuzhiyun 	(core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | \
603*4882a593Smuzhiyun 			       ((value) & (mask)), \
604*4882a593Smuzhiyun 				writel(core->shadow[sreg], \
605*4882a593Smuzhiyun 				       core->lmmio + ((reg) >> 2)))
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun /* ----------------------------------------------------------- */
608*4882a593Smuzhiyun /* cx88-core.c                                                 */
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun extern unsigned int cx88_core_debug;
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun void cx88_print_irqbits(const char *tag, const char *strings[],
613*4882a593Smuzhiyun 			int len, u32 bits, u32 mask);
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun int cx88_core_irq(struct cx88_core *core, u32 status);
616*4882a593Smuzhiyun void cx88_wakeup(struct cx88_core *core,
617*4882a593Smuzhiyun 		 struct cx88_dmaqueue *q, u32 count);
618*4882a593Smuzhiyun void cx88_shutdown(struct cx88_core *core);
619*4882a593Smuzhiyun int cx88_reset(struct cx88_core *core);
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun extern int
622*4882a593Smuzhiyun cx88_risc_buffer(struct pci_dev *pci, struct cx88_riscmem *risc,
623*4882a593Smuzhiyun 		 struct scatterlist *sglist,
624*4882a593Smuzhiyun 		 unsigned int top_offset, unsigned int bottom_offset,
625*4882a593Smuzhiyun 		 unsigned int bpl, unsigned int padding, unsigned int lines);
626*4882a593Smuzhiyun extern int
627*4882a593Smuzhiyun cx88_risc_databuffer(struct pci_dev *pci, struct cx88_riscmem *risc,
628*4882a593Smuzhiyun 		     struct scatterlist *sglist, unsigned int bpl,
629*4882a593Smuzhiyun 		     unsigned int lines, unsigned int lpi);
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun void cx88_risc_disasm(struct cx88_core *core,
632*4882a593Smuzhiyun 		      struct cx88_riscmem *risc);
633*4882a593Smuzhiyun int cx88_sram_channel_setup(struct cx88_core *core,
634*4882a593Smuzhiyun 			    const struct sram_channel *ch,
635*4882a593Smuzhiyun 			    unsigned int bpl, u32 risc);
636*4882a593Smuzhiyun void cx88_sram_channel_dump(struct cx88_core *core,
637*4882a593Smuzhiyun 			    const struct sram_channel *ch);
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun int cx88_set_scale(struct cx88_core *core, unsigned int width,
640*4882a593Smuzhiyun 		   unsigned int height, enum v4l2_field field);
641*4882a593Smuzhiyun int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm);
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun void cx88_vdev_init(struct cx88_core *core,
644*4882a593Smuzhiyun 		    struct pci_dev *pci,
645*4882a593Smuzhiyun 		    struct video_device *vfd,
646*4882a593Smuzhiyun 		    const struct video_device *template_,
647*4882a593Smuzhiyun 		    const char *type);
648*4882a593Smuzhiyun struct cx88_core *cx88_core_get(struct pci_dev *pci);
649*4882a593Smuzhiyun void cx88_core_put(struct cx88_core *core,
650*4882a593Smuzhiyun 		   struct pci_dev *pci);
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun int cx88_start_audio_dma(struct cx88_core *core);
653*4882a593Smuzhiyun int cx88_stop_audio_dma(struct cx88_core *core);
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun /* ----------------------------------------------------------- */
656*4882a593Smuzhiyun /* cx88-vbi.c                                                  */
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun /* Can be used as g_vbi_fmt, try_vbi_fmt and s_vbi_fmt */
659*4882a593Smuzhiyun int cx8800_vbi_fmt(struct file *file, void *priv,
660*4882a593Smuzhiyun 		   struct v4l2_format *f);
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun void cx8800_stop_vbi_dma(struct cx8800_dev *dev);
663*4882a593Smuzhiyun int cx8800_restart_vbi_queue(struct cx8800_dev *dev, struct cx88_dmaqueue *q);
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun extern const struct vb2_ops cx8800_vbi_qops;
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun /* ----------------------------------------------------------- */
668*4882a593Smuzhiyun /* cx88-i2c.c                                                  */
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun /* ----------------------------------------------------------- */
673*4882a593Smuzhiyun /* cx88-cards.c                                                */
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun int cx88_tuner_callback(void *dev, int component, int command, int arg);
676*4882a593Smuzhiyun int cx88_get_resources(const struct cx88_core *core,
677*4882a593Smuzhiyun 		       struct pci_dev *pci);
678*4882a593Smuzhiyun struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
679*4882a593Smuzhiyun void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl);
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun /* ----------------------------------------------------------- */
682*4882a593Smuzhiyun /* cx88-tvaudio.c                                              */
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun void cx88_set_tvaudio(struct cx88_core *core);
685*4882a593Smuzhiyun void cx88_newstation(struct cx88_core *core);
686*4882a593Smuzhiyun void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
687*4882a593Smuzhiyun void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
688*4882a593Smuzhiyun int cx88_audio_thread(void *data);
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun int cx8802_register_driver(struct cx8802_driver *drv);
691*4882a593Smuzhiyun int cx8802_unregister_driver(struct cx8802_driver *drv);
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun /* Caller must hold core->lock */
694*4882a593Smuzhiyun struct cx8802_driver *cx8802_get_driver(struct cx8802_dev *dev,
695*4882a593Smuzhiyun 					enum cx88_board_type btype);
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun /* ----------------------------------------------------------- */
698*4882a593Smuzhiyun /* cx88-dsp.c                                                  */
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core);
701*4882a593Smuzhiyun 
702*4882a593Smuzhiyun /* ----------------------------------------------------------- */
703*4882a593Smuzhiyun /* cx88-input.c                                                */
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
706*4882a593Smuzhiyun int cx88_ir_fini(struct cx88_core *core);
707*4882a593Smuzhiyun void cx88_ir_irq(struct cx88_core *core);
708*4882a593Smuzhiyun int cx88_ir_start(struct cx88_core *core);
709*4882a593Smuzhiyun void cx88_ir_stop(struct cx88_core *core);
710*4882a593Smuzhiyun void cx88_i2c_init_ir(struct cx88_core *core);
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun /* ----------------------------------------------------------- */
713*4882a593Smuzhiyun /* cx88-mpeg.c                                                 */
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun int cx8802_buf_prepare(struct vb2_queue *q, struct cx8802_dev *dev,
716*4882a593Smuzhiyun 		       struct cx88_buffer *buf);
717*4882a593Smuzhiyun void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
718*4882a593Smuzhiyun void cx8802_cancel_buffers(struct cx8802_dev *dev);
719*4882a593Smuzhiyun int cx8802_start_dma(struct cx8802_dev    *dev,
720*4882a593Smuzhiyun 		     struct cx88_dmaqueue *q,
721*4882a593Smuzhiyun 		     struct cx88_buffer   *buf);
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun /* ----------------------------------------------------------- */
724*4882a593Smuzhiyun /* cx88-video.c*/
725*4882a593Smuzhiyun int cx88_enum_input(struct cx88_core *core, struct v4l2_input *i);
726*4882a593Smuzhiyun int cx88_set_freq(struct cx88_core  *core, const struct v4l2_frequency *f);
727*4882a593Smuzhiyun int cx88_video_mux(struct cx88_core *core, unsigned int input);
728*4882a593Smuzhiyun int cx88_querycap(struct file *file, struct cx88_core *core,
729*4882a593Smuzhiyun 		  struct v4l2_capability *cap);
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun #endif
732