1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Support for the mpeg transport stream transfers
5*4882a593Smuzhiyun * PCI function #2 of the cx2388x.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * (c) 2004 Jelle Foks <jelle@foks.us>
8*4882a593Smuzhiyun * (c) 2004 Chris Pascoe <c.pascoe@itee.uq.edu.au>
9*4882a593Smuzhiyun * (c) 2004 Gerd Knorr <kraxel@bytesex.org>
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include "cx88.h"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/device.h>
18*4882a593Smuzhiyun #include <linux/dma-mapping.h>
19*4882a593Smuzhiyun #include <linux/interrupt.h>
20*4882a593Smuzhiyun #include <linux/delay.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun MODULE_DESCRIPTION("mpeg driver for cx2388x based TV cards");
25*4882a593Smuzhiyun MODULE_AUTHOR("Jelle Foks <jelle@foks.us>");
26*4882a593Smuzhiyun MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
27*4882a593Smuzhiyun MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
28*4882a593Smuzhiyun MODULE_LICENSE("GPL");
29*4882a593Smuzhiyun MODULE_VERSION(CX88_VERSION);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static unsigned int debug;
32*4882a593Smuzhiyun module_param(debug, int, 0644);
33*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "enable debug messages [mpeg]");
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define dprintk(level, fmt, arg...) do { \
36*4882a593Smuzhiyun if (debug + 1 > level) \
37*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("%s: mpeg:" fmt), \
38*4882a593Smuzhiyun __func__, ##arg); \
39*4882a593Smuzhiyun } while (0)
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #if defined(CONFIG_MODULES) && defined(MODULE)
request_module_async(struct work_struct * work)42*4882a593Smuzhiyun static void request_module_async(struct work_struct *work)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun struct cx8802_dev *dev = container_of(work, struct cx8802_dev,
45*4882a593Smuzhiyun request_module_wk);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun if (dev->core->board.mpeg & CX88_MPEG_DVB)
48*4882a593Smuzhiyun request_module("cx88-dvb");
49*4882a593Smuzhiyun if (dev->core->board.mpeg & CX88_MPEG_BLACKBIRD)
50*4882a593Smuzhiyun request_module("cx88-blackbird");
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
request_modules(struct cx8802_dev * dev)53*4882a593Smuzhiyun static void request_modules(struct cx8802_dev *dev)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun INIT_WORK(&dev->request_module_wk, request_module_async);
56*4882a593Smuzhiyun schedule_work(&dev->request_module_wk);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun
flush_request_modules(struct cx8802_dev * dev)59*4882a593Smuzhiyun static void flush_request_modules(struct cx8802_dev *dev)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun flush_work(&dev->request_module_wk);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun #else
64*4882a593Smuzhiyun #define request_modules(dev)
65*4882a593Smuzhiyun #define flush_request_modules(dev)
66*4882a593Smuzhiyun #endif /* CONFIG_MODULES */
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static LIST_HEAD(cx8802_devlist);
69*4882a593Smuzhiyun static DEFINE_MUTEX(cx8802_mutex);
70*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
71*4882a593Smuzhiyun
cx8802_start_dma(struct cx8802_dev * dev,struct cx88_dmaqueue * q,struct cx88_buffer * buf)72*4882a593Smuzhiyun int cx8802_start_dma(struct cx8802_dev *dev,
73*4882a593Smuzhiyun struct cx88_dmaqueue *q,
74*4882a593Smuzhiyun struct cx88_buffer *buf)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun struct cx88_core *core = dev->core;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun dprintk(1, "w: %d, h: %d, f: %d\n",
79*4882a593Smuzhiyun core->width, core->height, core->field);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* setup fifo + format */
82*4882a593Smuzhiyun cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH28],
83*4882a593Smuzhiyun dev->ts_packet_size, buf->risc.dma);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /* write TS length to chip */
86*4882a593Smuzhiyun cx_write(MO_TS_LNGTH, dev->ts_packet_size);
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun * FIXME: this needs a review.
90*4882a593Smuzhiyun * also: move to cx88-blackbird + cx88-dvb source files?
91*4882a593Smuzhiyun */
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun dprintk(1, "core->active_type_id = 0x%08x\n", core->active_type_id);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if ((core->active_type_id == CX88_MPEG_DVB) &&
96*4882a593Smuzhiyun (core->board.mpeg & CX88_MPEG_DVB)) {
97*4882a593Smuzhiyun dprintk(1, "cx8802_start_dma doing .dvb\n");
98*4882a593Smuzhiyun /* negedge driven & software reset */
99*4882a593Smuzhiyun cx_write(TS_GEN_CNTRL, 0x0040 | dev->ts_gen_cntrl);
100*4882a593Smuzhiyun udelay(100);
101*4882a593Smuzhiyun cx_write(MO_PINMUX_IO, 0x00);
102*4882a593Smuzhiyun cx_write(TS_HW_SOP_CNTRL, 0x47 << 16 | 188 << 4 | 0x01);
103*4882a593Smuzhiyun switch (core->boardnr) {
104*4882a593Smuzhiyun case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
105*4882a593Smuzhiyun case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
106*4882a593Smuzhiyun case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
107*4882a593Smuzhiyun case CX88_BOARD_PCHDTV_HD5500:
108*4882a593Smuzhiyun cx_write(TS_SOP_STAT, 1 << 13);
109*4882a593Smuzhiyun break;
110*4882a593Smuzhiyun case CX88_BOARD_SAMSUNG_SMT_7020:
111*4882a593Smuzhiyun cx_write(TS_SOP_STAT, 0x00);
112*4882a593Smuzhiyun break;
113*4882a593Smuzhiyun case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
114*4882a593Smuzhiyun case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
115*4882a593Smuzhiyun /* Enable MPEG parallel IO and video signal pins */
116*4882a593Smuzhiyun cx_write(MO_PINMUX_IO, 0x88);
117*4882a593Smuzhiyun udelay(100);
118*4882a593Smuzhiyun break;
119*4882a593Smuzhiyun case CX88_BOARD_HAUPPAUGE_HVR1300:
120*4882a593Smuzhiyun /* Enable MPEG parallel IO and video signal pins */
121*4882a593Smuzhiyun cx_write(MO_PINMUX_IO, 0x88);
122*4882a593Smuzhiyun cx_write(TS_SOP_STAT, 0);
123*4882a593Smuzhiyun cx_write(TS_VALERR_CNTRL, 0);
124*4882a593Smuzhiyun break;
125*4882a593Smuzhiyun case CX88_BOARD_PINNACLE_PCTV_HD_800i:
126*4882a593Smuzhiyun /* Enable MPEG parallel IO and video signal pins */
127*4882a593Smuzhiyun cx_write(MO_PINMUX_IO, 0x88);
128*4882a593Smuzhiyun cx_write(TS_HW_SOP_CNTRL, (0x47 << 16) | (188 << 4));
129*4882a593Smuzhiyun dev->ts_gen_cntrl = 5;
130*4882a593Smuzhiyun cx_write(TS_SOP_STAT, 0);
131*4882a593Smuzhiyun cx_write(TS_VALERR_CNTRL, 0);
132*4882a593Smuzhiyun udelay(100);
133*4882a593Smuzhiyun break;
134*4882a593Smuzhiyun default:
135*4882a593Smuzhiyun cx_write(TS_SOP_STAT, 0x00);
136*4882a593Smuzhiyun break;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun cx_write(TS_GEN_CNTRL, dev->ts_gen_cntrl);
139*4882a593Smuzhiyun udelay(100);
140*4882a593Smuzhiyun } else if ((core->active_type_id == CX88_MPEG_BLACKBIRD) &&
141*4882a593Smuzhiyun (core->board.mpeg & CX88_MPEG_BLACKBIRD)) {
142*4882a593Smuzhiyun dprintk(1, "cx8802_start_dma doing .blackbird\n");
143*4882a593Smuzhiyun cx_write(MO_PINMUX_IO, 0x88); /* enable MPEG parallel IO */
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /* punctured clock TS & posedge driven & software reset */
146*4882a593Smuzhiyun cx_write(TS_GEN_CNTRL, 0x46);
147*4882a593Smuzhiyun udelay(100);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun cx_write(TS_HW_SOP_CNTRL, 0x408); /* mpeg start byte */
150*4882a593Smuzhiyun cx_write(TS_VALERR_CNTRL, 0x2000);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* punctured clock TS & posedge driven */
153*4882a593Smuzhiyun cx_write(TS_GEN_CNTRL, 0x06);
154*4882a593Smuzhiyun udelay(100);
155*4882a593Smuzhiyun } else {
156*4882a593Smuzhiyun pr_err("%s() Failed. Unsupported value in .mpeg (0x%08x)\n",
157*4882a593Smuzhiyun __func__, core->board.mpeg);
158*4882a593Smuzhiyun return -EINVAL;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /* reset counter */
162*4882a593Smuzhiyun cx_write(MO_TS_GPCNTRL, GP_COUNT_CONTROL_RESET);
163*4882a593Smuzhiyun q->count = 0;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun /* clear interrupt status register */
166*4882a593Smuzhiyun cx_write(MO_TS_INTSTAT, 0x1f1111);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun /* enable irqs */
169*4882a593Smuzhiyun dprintk(1, "setting the interrupt mask\n");
170*4882a593Smuzhiyun cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_TSINT);
171*4882a593Smuzhiyun cx_set(MO_TS_INTMSK, 0x1f0011);
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* start dma */
174*4882a593Smuzhiyun cx_set(MO_DEV_CNTRL2, (1 << 5));
175*4882a593Smuzhiyun cx_set(MO_TS_DMACNTRL, 0x11);
176*4882a593Smuzhiyun return 0;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun EXPORT_SYMBOL(cx8802_start_dma);
179*4882a593Smuzhiyun
cx8802_stop_dma(struct cx8802_dev * dev)180*4882a593Smuzhiyun static int cx8802_stop_dma(struct cx8802_dev *dev)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct cx88_core *core = dev->core;
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun dprintk(1, "\n");
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* stop dma */
187*4882a593Smuzhiyun cx_clear(MO_TS_DMACNTRL, 0x11);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /* disable irqs */
190*4882a593Smuzhiyun cx_clear(MO_PCI_INTMSK, PCI_INT_TSINT);
191*4882a593Smuzhiyun cx_clear(MO_TS_INTMSK, 0x1f0011);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /* Reset the controller */
194*4882a593Smuzhiyun cx_write(TS_GEN_CNTRL, 0xcd);
195*4882a593Smuzhiyun return 0;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
cx8802_restart_queue(struct cx8802_dev * dev,struct cx88_dmaqueue * q)198*4882a593Smuzhiyun static int cx8802_restart_queue(struct cx8802_dev *dev,
199*4882a593Smuzhiyun struct cx88_dmaqueue *q)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun struct cx88_buffer *buf;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun dprintk(1, "\n");
204*4882a593Smuzhiyun if (list_empty(&q->active))
205*4882a593Smuzhiyun return 0;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun buf = list_entry(q->active.next, struct cx88_buffer, list);
208*4882a593Smuzhiyun dprintk(2, "restart_queue [%p/%d]: restart dma\n",
209*4882a593Smuzhiyun buf, buf->vb.vb2_buf.index);
210*4882a593Smuzhiyun cx8802_start_dma(dev, q, buf);
211*4882a593Smuzhiyun return 0;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
215*4882a593Smuzhiyun
cx8802_buf_prepare(struct vb2_queue * q,struct cx8802_dev * dev,struct cx88_buffer * buf)216*4882a593Smuzhiyun int cx8802_buf_prepare(struct vb2_queue *q, struct cx8802_dev *dev,
217*4882a593Smuzhiyun struct cx88_buffer *buf)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun int size = dev->ts_packet_size * dev->ts_packet_count;
220*4882a593Smuzhiyun struct sg_table *sgt = vb2_dma_sg_plane_desc(&buf->vb.vb2_buf, 0);
221*4882a593Smuzhiyun struct cx88_riscmem *risc = &buf->risc;
222*4882a593Smuzhiyun int rc;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun if (vb2_plane_size(&buf->vb.vb2_buf, 0) < size)
225*4882a593Smuzhiyun return -EINVAL;
226*4882a593Smuzhiyun vb2_set_plane_payload(&buf->vb.vb2_buf, 0, size);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun rc = cx88_risc_databuffer(dev->pci, risc, sgt->sgl,
229*4882a593Smuzhiyun dev->ts_packet_size, dev->ts_packet_count, 0);
230*4882a593Smuzhiyun if (rc) {
231*4882a593Smuzhiyun if (risc->cpu)
232*4882a593Smuzhiyun pci_free_consistent(dev->pci, risc->size,
233*4882a593Smuzhiyun risc->cpu, risc->dma);
234*4882a593Smuzhiyun memset(risc, 0, sizeof(*risc));
235*4882a593Smuzhiyun return rc;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun return 0;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun EXPORT_SYMBOL(cx8802_buf_prepare);
240*4882a593Smuzhiyun
cx8802_buf_queue(struct cx8802_dev * dev,struct cx88_buffer * buf)241*4882a593Smuzhiyun void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun struct cx88_buffer *prev;
244*4882a593Smuzhiyun struct cx88_dmaqueue *cx88q = &dev->mpegq;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun dprintk(1, "\n");
247*4882a593Smuzhiyun /* add jump to start */
248*4882a593Smuzhiyun buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
249*4882a593Smuzhiyun buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
250*4882a593Smuzhiyun buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun if (list_empty(&cx88q->active)) {
253*4882a593Smuzhiyun dprintk(1, "queue is empty - first active\n");
254*4882a593Smuzhiyun list_add_tail(&buf->list, &cx88q->active);
255*4882a593Smuzhiyun dprintk(1, "[%p/%d] %s - first active\n",
256*4882a593Smuzhiyun buf, buf->vb.vb2_buf.index, __func__);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun } else {
259*4882a593Smuzhiyun buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
260*4882a593Smuzhiyun dprintk(1, "queue is not empty - append to active\n");
261*4882a593Smuzhiyun prev = list_entry(cx88q->active.prev, struct cx88_buffer, list);
262*4882a593Smuzhiyun list_add_tail(&buf->list, &cx88q->active);
263*4882a593Smuzhiyun prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
264*4882a593Smuzhiyun dprintk(1, "[%p/%d] %s - append to active\n",
265*4882a593Smuzhiyun buf, buf->vb.vb2_buf.index, __func__);
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun EXPORT_SYMBOL(cx8802_buf_queue);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /* ----------------------------------------------------------- */
271*4882a593Smuzhiyun
do_cancel_buffers(struct cx8802_dev * dev)272*4882a593Smuzhiyun static void do_cancel_buffers(struct cx8802_dev *dev)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun struct cx88_dmaqueue *q = &dev->mpegq;
275*4882a593Smuzhiyun struct cx88_buffer *buf;
276*4882a593Smuzhiyun unsigned long flags;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun spin_lock_irqsave(&dev->slock, flags);
279*4882a593Smuzhiyun while (!list_empty(&q->active)) {
280*4882a593Smuzhiyun buf = list_entry(q->active.next, struct cx88_buffer, list);
281*4882a593Smuzhiyun list_del(&buf->list);
282*4882a593Smuzhiyun vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->slock, flags);
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
cx8802_cancel_buffers(struct cx8802_dev * dev)287*4882a593Smuzhiyun void cx8802_cancel_buffers(struct cx8802_dev *dev)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun dprintk(1, "\n");
290*4882a593Smuzhiyun cx8802_stop_dma(dev);
291*4882a593Smuzhiyun do_cancel_buffers(dev);
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun EXPORT_SYMBOL(cx8802_cancel_buffers);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun static const char *cx88_mpeg_irqs[32] = {
296*4882a593Smuzhiyun "ts_risci1", NULL, NULL, NULL,
297*4882a593Smuzhiyun "ts_risci2", NULL, NULL, NULL,
298*4882a593Smuzhiyun "ts_oflow", NULL, NULL, NULL,
299*4882a593Smuzhiyun "ts_sync", NULL, NULL, NULL,
300*4882a593Smuzhiyun "opc_err", "par_err", "rip_err", "pci_abort",
301*4882a593Smuzhiyun "ts_err?",
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun
cx8802_mpeg_irq(struct cx8802_dev * dev)304*4882a593Smuzhiyun static void cx8802_mpeg_irq(struct cx8802_dev *dev)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun struct cx88_core *core = dev->core;
307*4882a593Smuzhiyun u32 status, mask, count;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun dprintk(1, "\n");
310*4882a593Smuzhiyun status = cx_read(MO_TS_INTSTAT);
311*4882a593Smuzhiyun mask = cx_read(MO_TS_INTMSK);
312*4882a593Smuzhiyun if (0 == (status & mask))
313*4882a593Smuzhiyun return;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun cx_write(MO_TS_INTSTAT, status);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun if (debug || (status & mask & ~0xff))
318*4882a593Smuzhiyun cx88_print_irqbits("irq mpeg ",
319*4882a593Smuzhiyun cx88_mpeg_irqs, ARRAY_SIZE(cx88_mpeg_irqs),
320*4882a593Smuzhiyun status, mask);
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* risc op code error */
323*4882a593Smuzhiyun if (status & (1 << 16)) {
324*4882a593Smuzhiyun pr_warn("mpeg risc op code error\n");
325*4882a593Smuzhiyun cx_clear(MO_TS_DMACNTRL, 0x11);
326*4882a593Smuzhiyun cx88_sram_channel_dump(dev->core,
327*4882a593Smuzhiyun &cx88_sram_channels[SRAM_CH28]);
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* risc1 y */
331*4882a593Smuzhiyun if (status & 0x01) {
332*4882a593Smuzhiyun dprintk(1, "wake up\n");
333*4882a593Smuzhiyun spin_lock(&dev->slock);
334*4882a593Smuzhiyun count = cx_read(MO_TS_GPCNT);
335*4882a593Smuzhiyun cx88_wakeup(dev->core, &dev->mpegq, count);
336*4882a593Smuzhiyun spin_unlock(&dev->slock);
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun /* other general errors */
340*4882a593Smuzhiyun if (status & 0x1f0100) {
341*4882a593Smuzhiyun dprintk(0, "general errors: 0x%08x\n", status & 0x1f0100);
342*4882a593Smuzhiyun spin_lock(&dev->slock);
343*4882a593Smuzhiyun cx8802_stop_dma(dev);
344*4882a593Smuzhiyun spin_unlock(&dev->slock);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun #define MAX_IRQ_LOOP 10
349*4882a593Smuzhiyun
cx8802_irq(int irq,void * dev_id)350*4882a593Smuzhiyun static irqreturn_t cx8802_irq(int irq, void *dev_id)
351*4882a593Smuzhiyun {
352*4882a593Smuzhiyun struct cx8802_dev *dev = dev_id;
353*4882a593Smuzhiyun struct cx88_core *core = dev->core;
354*4882a593Smuzhiyun u32 status;
355*4882a593Smuzhiyun int loop, handled = 0;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun for (loop = 0; loop < MAX_IRQ_LOOP; loop++) {
358*4882a593Smuzhiyun status = cx_read(MO_PCI_INTSTAT) &
359*4882a593Smuzhiyun (core->pci_irqmask | PCI_INT_TSINT);
360*4882a593Smuzhiyun if (status == 0)
361*4882a593Smuzhiyun goto out;
362*4882a593Smuzhiyun dprintk(1, "cx8802_irq\n");
363*4882a593Smuzhiyun dprintk(1, " loop: %d/%d\n", loop, MAX_IRQ_LOOP);
364*4882a593Smuzhiyun dprintk(1, " status: %d\n", status);
365*4882a593Smuzhiyun handled = 1;
366*4882a593Smuzhiyun cx_write(MO_PCI_INTSTAT, status);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun if (status & core->pci_irqmask)
369*4882a593Smuzhiyun cx88_core_irq(core, status);
370*4882a593Smuzhiyun if (status & PCI_INT_TSINT)
371*4882a593Smuzhiyun cx8802_mpeg_irq(dev);
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun if (loop == MAX_IRQ_LOOP) {
374*4882a593Smuzhiyun dprintk(0, "clearing mask\n");
375*4882a593Smuzhiyun pr_warn("irq loop -- clearing mask\n");
376*4882a593Smuzhiyun cx_write(MO_PCI_INTMSK, 0);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun out:
380*4882a593Smuzhiyun return IRQ_RETVAL(handled);
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
cx8802_init_common(struct cx8802_dev * dev)383*4882a593Smuzhiyun static int cx8802_init_common(struct cx8802_dev *dev)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun struct cx88_core *core = dev->core;
386*4882a593Smuzhiyun int err;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun /* pci init */
389*4882a593Smuzhiyun if (pci_enable_device(dev->pci))
390*4882a593Smuzhiyun return -EIO;
391*4882a593Smuzhiyun pci_set_master(dev->pci);
392*4882a593Smuzhiyun err = pci_set_dma_mask(dev->pci, DMA_BIT_MASK(32));
393*4882a593Smuzhiyun if (err) {
394*4882a593Smuzhiyun pr_err("Oops: no 32bit PCI DMA ???\n");
395*4882a593Smuzhiyun return -EIO;
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun dev->pci_rev = dev->pci->revision;
399*4882a593Smuzhiyun pci_read_config_byte(dev->pci, PCI_LATENCY_TIMER, &dev->pci_lat);
400*4882a593Smuzhiyun pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
401*4882a593Smuzhiyun pci_name(dev->pci), dev->pci_rev, dev->pci->irq,
402*4882a593Smuzhiyun dev->pci_lat,
403*4882a593Smuzhiyun (unsigned long long)pci_resource_start(dev->pci, 0));
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun /* initialize driver struct */
406*4882a593Smuzhiyun spin_lock_init(&dev->slock);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun /* init dma queue */
409*4882a593Smuzhiyun INIT_LIST_HEAD(&dev->mpegq.active);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun /* get irq */
412*4882a593Smuzhiyun err = request_irq(dev->pci->irq, cx8802_irq,
413*4882a593Smuzhiyun IRQF_SHARED, dev->core->name, dev);
414*4882a593Smuzhiyun if (err < 0) {
415*4882a593Smuzhiyun pr_err("can't get IRQ %d\n", dev->pci->irq);
416*4882a593Smuzhiyun return err;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun cx_set(MO_PCI_INTMSK, core->pci_irqmask);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun /* everything worked */
421*4882a593Smuzhiyun pci_set_drvdata(dev->pci, dev);
422*4882a593Smuzhiyun return 0;
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
cx8802_fini_common(struct cx8802_dev * dev)425*4882a593Smuzhiyun static void cx8802_fini_common(struct cx8802_dev *dev)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun dprintk(2, "\n");
428*4882a593Smuzhiyun cx8802_stop_dma(dev);
429*4882a593Smuzhiyun pci_disable_device(dev->pci);
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun /* unregister stuff */
432*4882a593Smuzhiyun free_irq(dev->pci->irq, dev);
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun /* ----------------------------------------------------------- */
436*4882a593Smuzhiyun
cx8802_suspend_common(struct pci_dev * pci_dev,pm_message_t state)437*4882a593Smuzhiyun static int cx8802_suspend_common(struct pci_dev *pci_dev, pm_message_t state)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
440*4882a593Smuzhiyun unsigned long flags;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun /* stop mpeg dma */
443*4882a593Smuzhiyun spin_lock_irqsave(&dev->slock, flags);
444*4882a593Smuzhiyun if (!list_empty(&dev->mpegq.active)) {
445*4882a593Smuzhiyun dprintk(2, "suspend\n");
446*4882a593Smuzhiyun pr_info("suspend mpeg\n");
447*4882a593Smuzhiyun cx8802_stop_dma(dev);
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->slock, flags);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /* FIXME -- shutdown device */
452*4882a593Smuzhiyun cx88_shutdown(dev->core);
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun pci_save_state(pci_dev);
455*4882a593Smuzhiyun if (pci_set_power_state(pci_dev,
456*4882a593Smuzhiyun pci_choose_state(pci_dev, state)) != 0) {
457*4882a593Smuzhiyun pci_disable_device(pci_dev);
458*4882a593Smuzhiyun dev->state.disabled = 1;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun return 0;
461*4882a593Smuzhiyun }
462*4882a593Smuzhiyun
cx8802_resume_common(struct pci_dev * pci_dev)463*4882a593Smuzhiyun static int cx8802_resume_common(struct pci_dev *pci_dev)
464*4882a593Smuzhiyun {
465*4882a593Smuzhiyun struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
466*4882a593Smuzhiyun unsigned long flags;
467*4882a593Smuzhiyun int err;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun if (dev->state.disabled) {
470*4882a593Smuzhiyun err = pci_enable_device(pci_dev);
471*4882a593Smuzhiyun if (err) {
472*4882a593Smuzhiyun pr_err("can't enable device\n");
473*4882a593Smuzhiyun return err;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun dev->state.disabled = 0;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun err = pci_set_power_state(pci_dev, PCI_D0);
478*4882a593Smuzhiyun if (err) {
479*4882a593Smuzhiyun pr_err("can't enable device\n");
480*4882a593Smuzhiyun pci_disable_device(pci_dev);
481*4882a593Smuzhiyun dev->state.disabled = 1;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun return err;
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun pci_restore_state(pci_dev);
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun /* FIXME: re-initialize hardware */
488*4882a593Smuzhiyun cx88_reset(dev->core);
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun /* restart video+vbi capture */
491*4882a593Smuzhiyun spin_lock_irqsave(&dev->slock, flags);
492*4882a593Smuzhiyun if (!list_empty(&dev->mpegq.active)) {
493*4882a593Smuzhiyun pr_info("resume mpeg\n");
494*4882a593Smuzhiyun cx8802_restart_queue(dev, &dev->mpegq);
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->slock, flags);
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun return 0;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
cx8802_get_driver(struct cx8802_dev * dev,enum cx88_board_type btype)501*4882a593Smuzhiyun struct cx8802_driver *cx8802_get_driver(struct cx8802_dev *dev,
502*4882a593Smuzhiyun enum cx88_board_type btype)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun struct cx8802_driver *d;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun list_for_each_entry(d, &dev->drvlist, drvlist)
507*4882a593Smuzhiyun if (d->type_id == btype)
508*4882a593Smuzhiyun return d;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun return NULL;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun EXPORT_SYMBOL(cx8802_get_driver);
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /* Driver asked for hardware access. */
cx8802_request_acquire(struct cx8802_driver * drv)515*4882a593Smuzhiyun static int cx8802_request_acquire(struct cx8802_driver *drv)
516*4882a593Smuzhiyun {
517*4882a593Smuzhiyun struct cx88_core *core = drv->core;
518*4882a593Smuzhiyun unsigned int i;
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun /* Fail a request for hardware if the device is busy. */
521*4882a593Smuzhiyun if (core->active_type_id != CX88_BOARD_NONE &&
522*4882a593Smuzhiyun core->active_type_id != drv->type_id)
523*4882a593Smuzhiyun return -EBUSY;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun if (drv->type_id == CX88_MPEG_DVB) {
526*4882a593Smuzhiyun /* When switching to DVB, always set the input to the tuner */
527*4882a593Smuzhiyun core->last_analog_input = core->input;
528*4882a593Smuzhiyun core->input = 0;
529*4882a593Smuzhiyun for (i = 0;
530*4882a593Smuzhiyun i < (sizeof(core->board.input) /
531*4882a593Smuzhiyun sizeof(struct cx88_input));
532*4882a593Smuzhiyun i++) {
533*4882a593Smuzhiyun if (core->board.input[i].type == CX88_VMUX_DVB) {
534*4882a593Smuzhiyun core->input = i;
535*4882a593Smuzhiyun break;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun if (drv->advise_acquire) {
541*4882a593Smuzhiyun core->active_ref++;
542*4882a593Smuzhiyun if (core->active_type_id == CX88_BOARD_NONE) {
543*4882a593Smuzhiyun core->active_type_id = drv->type_id;
544*4882a593Smuzhiyun drv->advise_acquire(drv);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun dprintk(1, "Post acquire GPIO=%x\n", cx_read(MO_GP0_IO));
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun return 0;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun /* Driver asked to release hardware. */
cx8802_request_release(struct cx8802_driver * drv)554*4882a593Smuzhiyun static int cx8802_request_release(struct cx8802_driver *drv)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun struct cx88_core *core = drv->core;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun if (drv->advise_release && --core->active_ref == 0) {
559*4882a593Smuzhiyun if (drv->type_id == CX88_MPEG_DVB) {
560*4882a593Smuzhiyun /*
561*4882a593Smuzhiyun * If the DVB driver is releasing, reset the input
562*4882a593Smuzhiyun * state to the last configured analog input
563*4882a593Smuzhiyun */
564*4882a593Smuzhiyun core->input = core->last_analog_input;
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun drv->advise_release(drv);
568*4882a593Smuzhiyun core->active_type_id = CX88_BOARD_NONE;
569*4882a593Smuzhiyun dprintk(1, "Post release GPIO=%x\n", cx_read(MO_GP0_IO));
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun return 0;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun
cx8802_check_driver(struct cx8802_driver * drv)575*4882a593Smuzhiyun static int cx8802_check_driver(struct cx8802_driver *drv)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun if (!drv)
578*4882a593Smuzhiyun return -ENODEV;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun if ((drv->type_id != CX88_MPEG_DVB) &&
581*4882a593Smuzhiyun (drv->type_id != CX88_MPEG_BLACKBIRD))
582*4882a593Smuzhiyun return -EINVAL;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun if ((drv->hw_access != CX8802_DRVCTL_SHARED) &&
585*4882a593Smuzhiyun (drv->hw_access != CX8802_DRVCTL_EXCLUSIVE))
586*4882a593Smuzhiyun return -EINVAL;
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun if ((!drv->probe) ||
589*4882a593Smuzhiyun (!drv->remove) ||
590*4882a593Smuzhiyun (!drv->advise_acquire) ||
591*4882a593Smuzhiyun (!drv->advise_release))
592*4882a593Smuzhiyun return -EINVAL;
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun return 0;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun
cx8802_register_driver(struct cx8802_driver * drv)597*4882a593Smuzhiyun int cx8802_register_driver(struct cx8802_driver *drv)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun struct cx8802_dev *dev;
600*4882a593Smuzhiyun struct cx8802_driver *driver;
601*4882a593Smuzhiyun int err, i = 0;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun pr_info("registering cx8802 driver, type: %s access: %s\n",
604*4882a593Smuzhiyun drv->type_id == CX88_MPEG_DVB ? "dvb" : "blackbird",
605*4882a593Smuzhiyun drv->hw_access == CX8802_DRVCTL_SHARED ?
606*4882a593Smuzhiyun "shared" : "exclusive");
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun err = cx8802_check_driver(drv);
609*4882a593Smuzhiyun if (err) {
610*4882a593Smuzhiyun pr_err("cx8802_driver is invalid\n");
611*4882a593Smuzhiyun return err;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun mutex_lock(&cx8802_mutex);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun list_for_each_entry(dev, &cx8802_devlist, devlist) {
617*4882a593Smuzhiyun pr_info("subsystem: %04x:%04x, board: %s [card=%d]\n",
618*4882a593Smuzhiyun dev->pci->subsystem_vendor,
619*4882a593Smuzhiyun dev->pci->subsystem_device, dev->core->board.name,
620*4882a593Smuzhiyun dev->core->boardnr);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun /* Bring up a new struct for each driver instance */
623*4882a593Smuzhiyun driver = kzalloc(sizeof(*drv), GFP_KERNEL);
624*4882a593Smuzhiyun if (!driver) {
625*4882a593Smuzhiyun err = -ENOMEM;
626*4882a593Smuzhiyun goto out;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun /* Snapshot of the driver registration data */
630*4882a593Smuzhiyun drv->core = dev->core;
631*4882a593Smuzhiyun drv->suspend = cx8802_suspend_common;
632*4882a593Smuzhiyun drv->resume = cx8802_resume_common;
633*4882a593Smuzhiyun drv->request_acquire = cx8802_request_acquire;
634*4882a593Smuzhiyun drv->request_release = cx8802_request_release;
635*4882a593Smuzhiyun memcpy(driver, drv, sizeof(*driver));
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun mutex_lock(&drv->core->lock);
638*4882a593Smuzhiyun err = drv->probe(driver);
639*4882a593Smuzhiyun if (err == 0) {
640*4882a593Smuzhiyun i++;
641*4882a593Smuzhiyun list_add_tail(&driver->drvlist, &dev->drvlist);
642*4882a593Smuzhiyun } else {
643*4882a593Smuzhiyun pr_err("cx8802 probe failed, err = %d\n", err);
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun mutex_unlock(&drv->core->lock);
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun err = i ? 0 : -ENODEV;
649*4882a593Smuzhiyun out:
650*4882a593Smuzhiyun mutex_unlock(&cx8802_mutex);
651*4882a593Smuzhiyun return err;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun EXPORT_SYMBOL(cx8802_register_driver);
654*4882a593Smuzhiyun
cx8802_unregister_driver(struct cx8802_driver * drv)655*4882a593Smuzhiyun int cx8802_unregister_driver(struct cx8802_driver *drv)
656*4882a593Smuzhiyun {
657*4882a593Smuzhiyun struct cx8802_dev *dev;
658*4882a593Smuzhiyun struct cx8802_driver *d, *dtmp;
659*4882a593Smuzhiyun int err = 0;
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun pr_info("unregistering cx8802 driver, type: %s access: %s\n",
662*4882a593Smuzhiyun drv->type_id == CX88_MPEG_DVB ? "dvb" : "blackbird",
663*4882a593Smuzhiyun drv->hw_access == CX8802_DRVCTL_SHARED ?
664*4882a593Smuzhiyun "shared" : "exclusive");
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun mutex_lock(&cx8802_mutex);
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun list_for_each_entry(dev, &cx8802_devlist, devlist) {
669*4882a593Smuzhiyun pr_info("subsystem: %04x:%04x, board: %s [card=%d]\n",
670*4882a593Smuzhiyun dev->pci->subsystem_vendor,
671*4882a593Smuzhiyun dev->pci->subsystem_device, dev->core->board.name,
672*4882a593Smuzhiyun dev->core->boardnr);
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun mutex_lock(&dev->core->lock);
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun list_for_each_entry_safe(d, dtmp, &dev->drvlist, drvlist) {
677*4882a593Smuzhiyun /* only unregister the correct driver type */
678*4882a593Smuzhiyun if (d->type_id != drv->type_id)
679*4882a593Smuzhiyun continue;
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun err = d->remove(d);
682*4882a593Smuzhiyun if (err == 0) {
683*4882a593Smuzhiyun list_del(&d->drvlist);
684*4882a593Smuzhiyun kfree(d);
685*4882a593Smuzhiyun } else
686*4882a593Smuzhiyun pr_err("cx8802 driver remove failed (%d)\n",
687*4882a593Smuzhiyun err);
688*4882a593Smuzhiyun }
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun mutex_unlock(&dev->core->lock);
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun mutex_unlock(&cx8802_mutex);
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun return err;
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun EXPORT_SYMBOL(cx8802_unregister_driver);
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun /* ----------------------------------------------------------- */
cx8802_probe(struct pci_dev * pci_dev,const struct pci_device_id * pci_id)700*4882a593Smuzhiyun static int cx8802_probe(struct pci_dev *pci_dev,
701*4882a593Smuzhiyun const struct pci_device_id *pci_id)
702*4882a593Smuzhiyun {
703*4882a593Smuzhiyun struct cx8802_dev *dev;
704*4882a593Smuzhiyun struct cx88_core *core;
705*4882a593Smuzhiyun int err;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun /* general setup */
708*4882a593Smuzhiyun core = cx88_core_get(pci_dev);
709*4882a593Smuzhiyun if (!core)
710*4882a593Smuzhiyun return -EINVAL;
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun pr_info("cx2388x 8802 Driver Manager\n");
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun err = -ENODEV;
715*4882a593Smuzhiyun if (!core->board.mpeg)
716*4882a593Smuzhiyun goto fail_core;
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun err = -ENOMEM;
719*4882a593Smuzhiyun dev = kzalloc(sizeof(*dev), GFP_KERNEL);
720*4882a593Smuzhiyun if (!dev)
721*4882a593Smuzhiyun goto fail_core;
722*4882a593Smuzhiyun dev->pci = pci_dev;
723*4882a593Smuzhiyun dev->core = core;
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun /* Maintain a reference so cx88-video can query the 8802 device. */
726*4882a593Smuzhiyun core->dvbdev = dev;
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun err = cx8802_init_common(dev);
729*4882a593Smuzhiyun if (err != 0)
730*4882a593Smuzhiyun goto fail_dev;
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun INIT_LIST_HEAD(&dev->drvlist);
733*4882a593Smuzhiyun mutex_lock(&cx8802_mutex);
734*4882a593Smuzhiyun list_add_tail(&dev->devlist, &cx8802_devlist);
735*4882a593Smuzhiyun mutex_unlock(&cx8802_mutex);
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun /* now autoload cx88-dvb or cx88-blackbird */
738*4882a593Smuzhiyun request_modules(dev);
739*4882a593Smuzhiyun return 0;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun fail_dev:
742*4882a593Smuzhiyun kfree(dev);
743*4882a593Smuzhiyun fail_core:
744*4882a593Smuzhiyun core->dvbdev = NULL;
745*4882a593Smuzhiyun cx88_core_put(core, pci_dev);
746*4882a593Smuzhiyun return err;
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun
cx8802_remove(struct pci_dev * pci_dev)749*4882a593Smuzhiyun static void cx8802_remove(struct pci_dev *pci_dev)
750*4882a593Smuzhiyun {
751*4882a593Smuzhiyun struct cx8802_dev *dev;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun dev = pci_get_drvdata(pci_dev);
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun dprintk(1, "%s\n", __func__);
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun flush_request_modules(dev);
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun mutex_lock(&dev->core->lock);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun if (!list_empty(&dev->drvlist)) {
762*4882a593Smuzhiyun struct cx8802_driver *drv, *tmp;
763*4882a593Smuzhiyun int err;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun pr_warn("Trying to remove cx8802 driver while cx8802 sub-drivers still loaded?!\n");
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun list_for_each_entry_safe(drv, tmp, &dev->drvlist, drvlist) {
768*4882a593Smuzhiyun err = drv->remove(drv);
769*4882a593Smuzhiyun if (err == 0) {
770*4882a593Smuzhiyun list_del(&drv->drvlist);
771*4882a593Smuzhiyun } else
772*4882a593Smuzhiyun pr_err("cx8802 driver remove failed (%d)\n",
773*4882a593Smuzhiyun err);
774*4882a593Smuzhiyun kfree(drv);
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun mutex_unlock(&dev->core->lock);
779*4882a593Smuzhiyun
780*4882a593Smuzhiyun /* Destroy any 8802 reference. */
781*4882a593Smuzhiyun dev->core->dvbdev = NULL;
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun /* common */
784*4882a593Smuzhiyun cx8802_fini_common(dev);
785*4882a593Smuzhiyun cx88_core_put(dev->core, dev->pci);
786*4882a593Smuzhiyun kfree(dev);
787*4882a593Smuzhiyun }
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun static const struct pci_device_id cx8802_pci_tbl[] = {
790*4882a593Smuzhiyun {
791*4882a593Smuzhiyun .vendor = 0x14f1,
792*4882a593Smuzhiyun .device = 0x8802,
793*4882a593Smuzhiyun .subvendor = PCI_ANY_ID,
794*4882a593Smuzhiyun .subdevice = PCI_ANY_ID,
795*4882a593Smuzhiyun }, {
796*4882a593Smuzhiyun /* --- end of list --- */
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun };
799*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun static struct pci_driver cx8802_pci_driver = {
802*4882a593Smuzhiyun .name = "cx88-mpeg driver manager",
803*4882a593Smuzhiyun .id_table = cx8802_pci_tbl,
804*4882a593Smuzhiyun .probe = cx8802_probe,
805*4882a593Smuzhiyun .remove = cx8802_remove,
806*4882a593Smuzhiyun };
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun module_pci_driver(cx8802_pci_driver);
809