xref: /OK3568_Linux_fs/kernel/drivers/media/pci/cx88/cx88-input.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Device driver for GPIO attached remote control interfaces
5*4882a593Smuzhiyun  * on Conexant 2388x based TV/DVB cards.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (c) 2003 Pavel Machek
8*4882a593Smuzhiyun  * Copyright (c) 2004 Gerd Knorr
9*4882a593Smuzhiyun  * Copyright (c) 2004, 2005 Chris Pascoe
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include "cx88.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/hrtimer.h>
16*4882a593Smuzhiyun #include <linux/pci.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <media/rc-core.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define MODULE_NAME "cx88xx"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /* ---------------------------------------------------------------------- */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun struct cx88_IR {
27*4882a593Smuzhiyun 	struct cx88_core *core;
28*4882a593Smuzhiyun 	struct rc_dev *dev;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	int users;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	char name[32];
33*4882a593Smuzhiyun 	char phys[32];
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	/* sample from gpio pin 16 */
36*4882a593Smuzhiyun 	u32 sampling;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	/* poll external decoder */
39*4882a593Smuzhiyun 	int polling;
40*4882a593Smuzhiyun 	struct hrtimer timer;
41*4882a593Smuzhiyun 	u32 gpio_addr;
42*4882a593Smuzhiyun 	u32 last_gpio;
43*4882a593Smuzhiyun 	u32 mask_keycode;
44*4882a593Smuzhiyun 	u32 mask_keydown;
45*4882a593Smuzhiyun 	u32 mask_keyup;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun static unsigned int ir_samplerate = 4;
49*4882a593Smuzhiyun module_param(ir_samplerate, uint, 0444);
50*4882a593Smuzhiyun MODULE_PARM_DESC(ir_samplerate, "IR samplerate in kHz, 1 - 20, default 4");
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun static int ir_debug;
53*4882a593Smuzhiyun module_param(ir_debug, int, 0644);	/* debug level [IR] */
54*4882a593Smuzhiyun MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]");
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define ir_dprintk(fmt, arg...)	do {					\
57*4882a593Smuzhiyun 	if (ir_debug)							\
58*4882a593Smuzhiyun 		printk(KERN_DEBUG "%s IR: " fmt, ir->core->name, ##arg);\
59*4882a593Smuzhiyun } while (0)
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define dprintk(fmt, arg...) do {					\
62*4882a593Smuzhiyun 	if (ir_debug)							\
63*4882a593Smuzhiyun 		printk(KERN_DEBUG "cx88 IR: " fmt, ##arg);		\
64*4882a593Smuzhiyun } while (0)
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* ---------------------------------------------------------------------- */
67*4882a593Smuzhiyun 
cx88_ir_handle_key(struct cx88_IR * ir)68*4882a593Smuzhiyun static void cx88_ir_handle_key(struct cx88_IR *ir)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	struct cx88_core *core = ir->core;
71*4882a593Smuzhiyun 	u32 gpio, data, auxgpio;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/* read gpio value */
74*4882a593Smuzhiyun 	gpio = cx_read(ir->gpio_addr);
75*4882a593Smuzhiyun 	switch (core->boardnr) {
76*4882a593Smuzhiyun 	case CX88_BOARD_NPGTECH_REALTV_TOP10FM:
77*4882a593Smuzhiyun 		/*
78*4882a593Smuzhiyun 		 * This board apparently uses a combination of 2 GPIO
79*4882a593Smuzhiyun 		 * to represent the keys. Additionally, the second GPIO
80*4882a593Smuzhiyun 		 * can be used for parity.
81*4882a593Smuzhiyun 		 *
82*4882a593Smuzhiyun 		 * Example:
83*4882a593Smuzhiyun 		 *
84*4882a593Smuzhiyun 		 * for key "5"
85*4882a593Smuzhiyun 		 *	gpio = 0x758, auxgpio = 0xe5 or 0xf5
86*4882a593Smuzhiyun 		 * for key "Power"
87*4882a593Smuzhiyun 		 *	gpio = 0x758, auxgpio = 0xed or 0xfd
88*4882a593Smuzhiyun 		 */
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 		auxgpio = cx_read(MO_GP1_IO);
91*4882a593Smuzhiyun 		/* Take out the parity part */
92*4882a593Smuzhiyun 		gpio = (gpio & 0x7fd) + (auxgpio & 0xef);
93*4882a593Smuzhiyun 		break;
94*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1000:
95*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1800H:
96*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1800H_XC4000:
97*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H_PLUS:
98*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
99*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36:
100*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43:
101*4882a593Smuzhiyun 		gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900);
102*4882a593Smuzhiyun 		auxgpio = gpio;
103*4882a593Smuzhiyun 		break;
104*4882a593Smuzhiyun 	default:
105*4882a593Smuzhiyun 		auxgpio = gpio;
106*4882a593Smuzhiyun 	}
107*4882a593Smuzhiyun 	if (ir->polling) {
108*4882a593Smuzhiyun 		if (ir->last_gpio == auxgpio)
109*4882a593Smuzhiyun 			return;
110*4882a593Smuzhiyun 		ir->last_gpio = auxgpio;
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	/* extract data */
114*4882a593Smuzhiyun 	data = ir_extract_bits(gpio, ir->mask_keycode);
115*4882a593Smuzhiyun 	ir_dprintk("irq gpio=0x%x code=%d | %s%s%s\n",
116*4882a593Smuzhiyun 		   gpio, data,
117*4882a593Smuzhiyun 		   ir->polling ? "poll" : "irq",
118*4882a593Smuzhiyun 		   (gpio & ir->mask_keydown) ? " down" : "",
119*4882a593Smuzhiyun 		   (gpio & ir->mask_keyup) ? " up" : "");
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	if (ir->core->boardnr == CX88_BOARD_NORWOOD_MICRO) {
122*4882a593Smuzhiyun 		u32 gpio_key = cx_read(MO_GP0_IO);
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 		data = (data << 4) | ((gpio_key & 0xf0) >> 4);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 		rc_keydown(ir->dev, RC_PROTO_UNKNOWN, data, 0);
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	} else if (ir->core->boardnr == CX88_BOARD_PROLINK_PLAYTVPVR ||
129*4882a593Smuzhiyun 		   ir->core->boardnr == CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO) {
130*4882a593Smuzhiyun 		/* bit cleared on keydown, NEC scancode, 0xAAAACC, A = 0x866b */
131*4882a593Smuzhiyun 		u16 addr;
132*4882a593Smuzhiyun 		u8 cmd;
133*4882a593Smuzhiyun 		u32 scancode;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 		addr = (data >> 8) & 0xffff;
136*4882a593Smuzhiyun 		cmd  = (data >> 0) & 0x00ff;
137*4882a593Smuzhiyun 		scancode = RC_SCANCODE_NECX(addr, cmd);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 		if (0 == (gpio & ir->mask_keyup))
140*4882a593Smuzhiyun 			rc_keydown_notimeout(ir->dev, RC_PROTO_NECX, scancode,
141*4882a593Smuzhiyun 					     0);
142*4882a593Smuzhiyun 		else
143*4882a593Smuzhiyun 			rc_keyup(ir->dev);
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	} else if (ir->mask_keydown) {
146*4882a593Smuzhiyun 		/* bit set on keydown */
147*4882a593Smuzhiyun 		if (gpio & ir->mask_keydown)
148*4882a593Smuzhiyun 			rc_keydown_notimeout(ir->dev, RC_PROTO_UNKNOWN, data,
149*4882a593Smuzhiyun 					     0);
150*4882a593Smuzhiyun 		else
151*4882a593Smuzhiyun 			rc_keyup(ir->dev);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	} else if (ir->mask_keyup) {
154*4882a593Smuzhiyun 		/* bit cleared on keydown */
155*4882a593Smuzhiyun 		if (0 == (gpio & ir->mask_keyup))
156*4882a593Smuzhiyun 			rc_keydown_notimeout(ir->dev, RC_PROTO_UNKNOWN, data,
157*4882a593Smuzhiyun 					     0);
158*4882a593Smuzhiyun 		else
159*4882a593Smuzhiyun 			rc_keyup(ir->dev);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	} else {
162*4882a593Smuzhiyun 		/* can't distinguish keydown/up :-/ */
163*4882a593Smuzhiyun 		rc_keydown_notimeout(ir->dev, RC_PROTO_UNKNOWN, data, 0);
164*4882a593Smuzhiyun 		rc_keyup(ir->dev);
165*4882a593Smuzhiyun 	}
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
cx88_ir_work(struct hrtimer * timer)168*4882a593Smuzhiyun static enum hrtimer_restart cx88_ir_work(struct hrtimer *timer)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	u64 missed;
171*4882a593Smuzhiyun 	struct cx88_IR *ir = container_of(timer, struct cx88_IR, timer);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	cx88_ir_handle_key(ir);
174*4882a593Smuzhiyun 	missed = hrtimer_forward_now(&ir->timer,
175*4882a593Smuzhiyun 				     ktime_set(0, ir->polling * 1000000));
176*4882a593Smuzhiyun 	if (missed > 1)
177*4882a593Smuzhiyun 		ir_dprintk("Missed ticks %llu\n", missed - 1);
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	return HRTIMER_RESTART;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun 
__cx88_ir_start(void * priv)182*4882a593Smuzhiyun static int __cx88_ir_start(void *priv)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun 	struct cx88_core *core = priv;
185*4882a593Smuzhiyun 	struct cx88_IR *ir;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	if (!core || !core->ir)
188*4882a593Smuzhiyun 		return -EINVAL;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	ir = core->ir;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	if (ir->polling) {
193*4882a593Smuzhiyun 		hrtimer_init(&ir->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
194*4882a593Smuzhiyun 		ir->timer.function = cx88_ir_work;
195*4882a593Smuzhiyun 		hrtimer_start(&ir->timer,
196*4882a593Smuzhiyun 			      ktime_set(0, ir->polling * 1000000),
197*4882a593Smuzhiyun 			      HRTIMER_MODE_REL);
198*4882a593Smuzhiyun 	}
199*4882a593Smuzhiyun 	if (ir->sampling) {
200*4882a593Smuzhiyun 		core->pci_irqmask |= PCI_INT_IR_SMPINT;
201*4882a593Smuzhiyun 		cx_write(MO_DDS_IO, 0x33F286 * ir_samplerate); /* samplerate */
202*4882a593Smuzhiyun 		cx_write(MO_DDSCFG_IO, 0x5); /* enable */
203*4882a593Smuzhiyun 	}
204*4882a593Smuzhiyun 	return 0;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
__cx88_ir_stop(void * priv)207*4882a593Smuzhiyun static void __cx88_ir_stop(void *priv)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	struct cx88_core *core = priv;
210*4882a593Smuzhiyun 	struct cx88_IR *ir;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	if (!core || !core->ir)
213*4882a593Smuzhiyun 		return;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	ir = core->ir;
216*4882a593Smuzhiyun 	if (ir->sampling) {
217*4882a593Smuzhiyun 		cx_write(MO_DDSCFG_IO, 0x0);
218*4882a593Smuzhiyun 		core->pci_irqmask &= ~PCI_INT_IR_SMPINT;
219*4882a593Smuzhiyun 	}
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	if (ir->polling)
222*4882a593Smuzhiyun 		hrtimer_cancel(&ir->timer);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun 
cx88_ir_start(struct cx88_core * core)225*4882a593Smuzhiyun int cx88_ir_start(struct cx88_core *core)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun 	if (core->ir->users)
228*4882a593Smuzhiyun 		return __cx88_ir_start(core);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	return 0;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun EXPORT_SYMBOL(cx88_ir_start);
233*4882a593Smuzhiyun 
cx88_ir_stop(struct cx88_core * core)234*4882a593Smuzhiyun void cx88_ir_stop(struct cx88_core *core)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	if (core->ir->users)
237*4882a593Smuzhiyun 		__cx88_ir_stop(core);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun EXPORT_SYMBOL(cx88_ir_stop);
240*4882a593Smuzhiyun 
cx88_ir_open(struct rc_dev * rc)241*4882a593Smuzhiyun static int cx88_ir_open(struct rc_dev *rc)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun 	struct cx88_core *core = rc->priv;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	core->ir->users++;
246*4882a593Smuzhiyun 	return __cx88_ir_start(core);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
cx88_ir_close(struct rc_dev * rc)249*4882a593Smuzhiyun static void cx88_ir_close(struct rc_dev *rc)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct cx88_core *core = rc->priv;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	core->ir->users--;
254*4882a593Smuzhiyun 	if (!core->ir->users)
255*4882a593Smuzhiyun 		__cx88_ir_stop(core);
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun /* ---------------------------------------------------------------------- */
259*4882a593Smuzhiyun 
cx88_ir_init(struct cx88_core * core,struct pci_dev * pci)260*4882a593Smuzhiyun int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun 	struct cx88_IR *ir;
263*4882a593Smuzhiyun 	struct rc_dev *dev;
264*4882a593Smuzhiyun 	char *ir_codes = NULL;
265*4882a593Smuzhiyun 	u64 rc_proto = RC_PROTO_BIT_OTHER;
266*4882a593Smuzhiyun 	int err = -ENOMEM;
267*4882a593Smuzhiyun 	u32 hardware_mask = 0;	/* For devices with a hardware mask, when
268*4882a593Smuzhiyun 				 * used with a full-code IR table
269*4882a593Smuzhiyun 				 */
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	ir = kzalloc(sizeof(*ir), GFP_KERNEL);
272*4882a593Smuzhiyun 	dev = rc_allocate_device(RC_DRIVER_IR_RAW);
273*4882a593Smuzhiyun 	if (!ir || !dev)
274*4882a593Smuzhiyun 		goto err_out_free;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	ir->dev = dev;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	/* detect & configure */
279*4882a593Smuzhiyun 	switch (core->boardnr) {
280*4882a593Smuzhiyun 	case CX88_BOARD_DNTV_LIVE_DVB_T:
281*4882a593Smuzhiyun 	case CX88_BOARD_KWORLD_DVB_T:
282*4882a593Smuzhiyun 	case CX88_BOARD_KWORLD_DVB_T_CX22702:
283*4882a593Smuzhiyun 		ir_codes = RC_MAP_DNTV_LIVE_DVB_T;
284*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP1_IO;
285*4882a593Smuzhiyun 		ir->mask_keycode = 0x1f;
286*4882a593Smuzhiyun 		ir->mask_keyup = 0x60;
287*4882a593Smuzhiyun 		ir->polling = 50; /* ms */
288*4882a593Smuzhiyun 		break;
289*4882a593Smuzhiyun 	case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
290*4882a593Smuzhiyun 		ir_codes = RC_MAP_CINERGY_1400;
291*4882a593Smuzhiyun 		ir->sampling = 0xeb04; /* address */
292*4882a593Smuzhiyun 		break;
293*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE:
294*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_DVB_T1:
295*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
296*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
297*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR1100:
298*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR3000:
299*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR4000:
300*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
301*4882a593Smuzhiyun 	case CX88_BOARD_PCHDTV_HD3000:
302*4882a593Smuzhiyun 	case CX88_BOARD_PCHDTV_HD5500:
303*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_IRONLY:
304*4882a593Smuzhiyun 		ir_codes = RC_MAP_HAUPPAUGE;
305*4882a593Smuzhiyun 		ir->sampling = 1;
306*4882a593Smuzhiyun 		break;
307*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H:
308*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H_J:
309*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1800H:
310*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1800H_XC4000:
311*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H_PLUS:
312*4882a593Smuzhiyun 		ir_codes = RC_MAP_WINFAST;
313*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP0_IO;
314*4882a593Smuzhiyun 		ir->mask_keycode = 0x8f8;
315*4882a593Smuzhiyun 		ir->mask_keyup = 0x100;
316*4882a593Smuzhiyun 		ir->polling = 50; /* ms */
317*4882a593Smuzhiyun 		break;
318*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST2000XP_EXPERT:
319*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1000:
320*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
321*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36:
322*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43:
323*4882a593Smuzhiyun 		ir_codes = RC_MAP_WINFAST;
324*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP0_IO;
325*4882a593Smuzhiyun 		ir->mask_keycode = 0x8f8;
326*4882a593Smuzhiyun 		ir->mask_keyup = 0x100;
327*4882a593Smuzhiyun 		ir->polling = 1; /* ms */
328*4882a593Smuzhiyun 		break;
329*4882a593Smuzhiyun 	case CX88_BOARD_IODATA_GVBCTV7E:
330*4882a593Smuzhiyun 		ir_codes = RC_MAP_IODATA_BCTV7E;
331*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP0_IO;
332*4882a593Smuzhiyun 		ir->mask_keycode = 0xfd;
333*4882a593Smuzhiyun 		ir->mask_keydown = 0x02;
334*4882a593Smuzhiyun 		ir->polling = 5; /* ms */
335*4882a593Smuzhiyun 		break;
336*4882a593Smuzhiyun 	case CX88_BOARD_PROLINK_PLAYTVPVR:
337*4882a593Smuzhiyun 	case CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO:
338*4882a593Smuzhiyun 		/*
339*4882a593Smuzhiyun 		 * It seems that this hardware is paired with NEC extended
340*4882a593Smuzhiyun 		 * address 0x866b. So, unfortunately, its usage with other
341*4882a593Smuzhiyun 		 * IR's with different address won't work. Still, there are
342*4882a593Smuzhiyun 		 * other IR's from the same manufacturer that works, like the
343*4882a593Smuzhiyun 		 * 002-T mini RC, provided with newer PV hardware
344*4882a593Smuzhiyun 		 */
345*4882a593Smuzhiyun 		ir_codes = RC_MAP_PIXELVIEW_MK12;
346*4882a593Smuzhiyun 		rc_proto = RC_PROTO_BIT_NECX;
347*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP1_IO;
348*4882a593Smuzhiyun 		ir->mask_keyup = 0x80;
349*4882a593Smuzhiyun 		ir->polling = 10; /* ms */
350*4882a593Smuzhiyun 		hardware_mask = 0x3f;	/* Hardware returns only 6 bits from command part */
351*4882a593Smuzhiyun 		break;
352*4882a593Smuzhiyun 	case CX88_BOARD_PROLINK_PV_8000GT:
353*4882a593Smuzhiyun 	case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME:
354*4882a593Smuzhiyun 		ir_codes = RC_MAP_PIXELVIEW_NEW;
355*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP1_IO;
356*4882a593Smuzhiyun 		ir->mask_keycode = 0x3f;
357*4882a593Smuzhiyun 		ir->mask_keyup = 0x80;
358*4882a593Smuzhiyun 		ir->polling = 1; /* ms */
359*4882a593Smuzhiyun 		break;
360*4882a593Smuzhiyun 	case CX88_BOARD_KWORLD_LTV883:
361*4882a593Smuzhiyun 		ir_codes = RC_MAP_PIXELVIEW;
362*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP1_IO;
363*4882a593Smuzhiyun 		ir->mask_keycode = 0x1f;
364*4882a593Smuzhiyun 		ir->mask_keyup = 0x60;
365*4882a593Smuzhiyun 		ir->polling = 1; /* ms */
366*4882a593Smuzhiyun 		break;
367*4882a593Smuzhiyun 	case CX88_BOARD_ADSTECH_DVB_T_PCI:
368*4882a593Smuzhiyun 		ir_codes = RC_MAP_ADSTECH_DVB_T_PCI;
369*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP1_IO;
370*4882a593Smuzhiyun 		ir->mask_keycode = 0xbf;
371*4882a593Smuzhiyun 		ir->mask_keyup = 0x40;
372*4882a593Smuzhiyun 		ir->polling = 50; /* ms */
373*4882a593Smuzhiyun 		break;
374*4882a593Smuzhiyun 	case CX88_BOARD_MSI_TVANYWHERE_MASTER:
375*4882a593Smuzhiyun 		ir_codes = RC_MAP_MSI_TVANYWHERE;
376*4882a593Smuzhiyun 		ir->gpio_addr = MO_GP1_IO;
377*4882a593Smuzhiyun 		ir->mask_keycode = 0x1f;
378*4882a593Smuzhiyun 		ir->mask_keyup = 0x40;
379*4882a593Smuzhiyun 		ir->polling = 1; /* ms */
380*4882a593Smuzhiyun 		break;
381*4882a593Smuzhiyun 	case CX88_BOARD_AVERTV_303:
382*4882a593Smuzhiyun 	case CX88_BOARD_AVERTV_STUDIO_303:
383*4882a593Smuzhiyun 		ir_codes         = RC_MAP_AVERTV_303;
384*4882a593Smuzhiyun 		ir->gpio_addr    = MO_GP2_IO;
385*4882a593Smuzhiyun 		ir->mask_keycode = 0xfb;
386*4882a593Smuzhiyun 		ir->mask_keydown = 0x02;
387*4882a593Smuzhiyun 		ir->polling      = 50; /* ms */
388*4882a593Smuzhiyun 		break;
389*4882a593Smuzhiyun 	case CX88_BOARD_OMICOM_SS4_PCI:
390*4882a593Smuzhiyun 	case CX88_BOARD_SATTRADE_ST4200:
391*4882a593Smuzhiyun 	case CX88_BOARD_TBS_8920:
392*4882a593Smuzhiyun 	case CX88_BOARD_TBS_8910:
393*4882a593Smuzhiyun 	case CX88_BOARD_PROF_7300:
394*4882a593Smuzhiyun 	case CX88_BOARD_PROF_7301:
395*4882a593Smuzhiyun 	case CX88_BOARD_PROF_6200:
396*4882a593Smuzhiyun 		ir_codes = RC_MAP_TBS_NEC;
397*4882a593Smuzhiyun 		ir->sampling = 0xff00; /* address */
398*4882a593Smuzhiyun 		break;
399*4882a593Smuzhiyun 	case CX88_BOARD_TEVII_S464:
400*4882a593Smuzhiyun 	case CX88_BOARD_TEVII_S460:
401*4882a593Smuzhiyun 	case CX88_BOARD_TEVII_S420:
402*4882a593Smuzhiyun 		ir_codes = RC_MAP_TEVII_NEC;
403*4882a593Smuzhiyun 		ir->sampling = 0xff00; /* address */
404*4882a593Smuzhiyun 		break;
405*4882a593Smuzhiyun 	case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
406*4882a593Smuzhiyun 		ir_codes         = RC_MAP_DNTV_LIVE_DVBT_PRO;
407*4882a593Smuzhiyun 		ir->sampling     = 0xff00; /* address */
408*4882a593Smuzhiyun 		break;
409*4882a593Smuzhiyun 	case CX88_BOARD_NORWOOD_MICRO:
410*4882a593Smuzhiyun 		ir_codes         = RC_MAP_NORWOOD;
411*4882a593Smuzhiyun 		ir->gpio_addr    = MO_GP1_IO;
412*4882a593Smuzhiyun 		ir->mask_keycode = 0x0e;
413*4882a593Smuzhiyun 		ir->mask_keyup   = 0x80;
414*4882a593Smuzhiyun 		ir->polling      = 50; /* ms */
415*4882a593Smuzhiyun 		break;
416*4882a593Smuzhiyun 	case CX88_BOARD_NPGTECH_REALTV_TOP10FM:
417*4882a593Smuzhiyun 		ir_codes         = RC_MAP_NPGTECH;
418*4882a593Smuzhiyun 		ir->gpio_addr    = MO_GP0_IO;
419*4882a593Smuzhiyun 		ir->mask_keycode = 0xfa;
420*4882a593Smuzhiyun 		ir->polling      = 50; /* ms */
421*4882a593Smuzhiyun 		break;
422*4882a593Smuzhiyun 	case CX88_BOARD_PINNACLE_PCTV_HD_800i:
423*4882a593Smuzhiyun 		ir_codes         = RC_MAP_PINNACLE_PCTV_HD;
424*4882a593Smuzhiyun 		ir->sampling     = 1;
425*4882a593Smuzhiyun 		break;
426*4882a593Smuzhiyun 	case CX88_BOARD_POWERCOLOR_REAL_ANGEL:
427*4882a593Smuzhiyun 		ir_codes         = RC_MAP_POWERCOLOR_REAL_ANGEL;
428*4882a593Smuzhiyun 		ir->gpio_addr    = MO_GP2_IO;
429*4882a593Smuzhiyun 		ir->mask_keycode = 0x7e;
430*4882a593Smuzhiyun 		ir->polling      = 100; /* ms */
431*4882a593Smuzhiyun 		break;
432*4882a593Smuzhiyun 	case CX88_BOARD_TWINHAN_VP1027_DVBS:
433*4882a593Smuzhiyun 		ir_codes         = RC_MAP_TWINHAN_VP1027_DVBS;
434*4882a593Smuzhiyun 		ir->sampling     = 0xff00; /* address */
435*4882a593Smuzhiyun 		break;
436*4882a593Smuzhiyun 	}
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	if (!ir_codes) {
439*4882a593Smuzhiyun 		err = -ENODEV;
440*4882a593Smuzhiyun 		goto err_out_free;
441*4882a593Smuzhiyun 	}
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	/*
444*4882a593Smuzhiyun 	 * The usage of mask_keycode were very convenient, due to several
445*4882a593Smuzhiyun 	 * reasons. Among others, the scancode tables were using the scancode
446*4882a593Smuzhiyun 	 * as the index elements. So, the less bits it was used, the smaller
447*4882a593Smuzhiyun 	 * the table were stored. After the input changes, the better is to use
448*4882a593Smuzhiyun 	 * the full scancodes, since it allows replacing the IR remote by
449*4882a593Smuzhiyun 	 * another one. Unfortunately, there are still some hardware, like
450*4882a593Smuzhiyun 	 * Pixelview Ultra Pro, where only part of the scancode is sent via
451*4882a593Smuzhiyun 	 * GPIO. So, there's no way to get the full scancode. Due to that,
452*4882a593Smuzhiyun 	 * hardware_mask were introduced here: it represents those hardware
453*4882a593Smuzhiyun 	 * that has such limits.
454*4882a593Smuzhiyun 	 */
455*4882a593Smuzhiyun 	if (hardware_mask && !ir->mask_keycode)
456*4882a593Smuzhiyun 		ir->mask_keycode = hardware_mask;
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	/* init input device */
459*4882a593Smuzhiyun 	snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name);
460*4882a593Smuzhiyun 	snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci));
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	dev->device_name = ir->name;
463*4882a593Smuzhiyun 	dev->input_phys = ir->phys;
464*4882a593Smuzhiyun 	dev->input_id.bustype = BUS_PCI;
465*4882a593Smuzhiyun 	dev->input_id.version = 1;
466*4882a593Smuzhiyun 	if (pci->subsystem_vendor) {
467*4882a593Smuzhiyun 		dev->input_id.vendor = pci->subsystem_vendor;
468*4882a593Smuzhiyun 		dev->input_id.product = pci->subsystem_device;
469*4882a593Smuzhiyun 	} else {
470*4882a593Smuzhiyun 		dev->input_id.vendor = pci->vendor;
471*4882a593Smuzhiyun 		dev->input_id.product = pci->device;
472*4882a593Smuzhiyun 	}
473*4882a593Smuzhiyun 	dev->dev.parent = &pci->dev;
474*4882a593Smuzhiyun 	dev->map_name = ir_codes;
475*4882a593Smuzhiyun 	dev->driver_name = MODULE_NAME;
476*4882a593Smuzhiyun 	dev->priv = core;
477*4882a593Smuzhiyun 	dev->open = cx88_ir_open;
478*4882a593Smuzhiyun 	dev->close = cx88_ir_close;
479*4882a593Smuzhiyun 	dev->scancode_mask = hardware_mask;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	if (ir->sampling) {
482*4882a593Smuzhiyun 		dev->timeout = MS_TO_US(10); /* 10 ms */
483*4882a593Smuzhiyun 	} else {
484*4882a593Smuzhiyun 		dev->driver_type = RC_DRIVER_SCANCODE;
485*4882a593Smuzhiyun 		dev->allowed_protocols = rc_proto;
486*4882a593Smuzhiyun 	}
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	ir->core = core;
489*4882a593Smuzhiyun 	core->ir = ir;
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	/* all done */
492*4882a593Smuzhiyun 	err = rc_register_device(dev);
493*4882a593Smuzhiyun 	if (err)
494*4882a593Smuzhiyun 		goto err_out_free;
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	return 0;
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun err_out_free:
499*4882a593Smuzhiyun 	rc_free_device(dev);
500*4882a593Smuzhiyun 	core->ir = NULL;
501*4882a593Smuzhiyun 	kfree(ir);
502*4882a593Smuzhiyun 	return err;
503*4882a593Smuzhiyun }
504*4882a593Smuzhiyun 
cx88_ir_fini(struct cx88_core * core)505*4882a593Smuzhiyun int cx88_ir_fini(struct cx88_core *core)
506*4882a593Smuzhiyun {
507*4882a593Smuzhiyun 	struct cx88_IR *ir = core->ir;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	/* skip detach on non attached boards */
510*4882a593Smuzhiyun 	if (!ir)
511*4882a593Smuzhiyun 		return 0;
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	cx88_ir_stop(core);
514*4882a593Smuzhiyun 	rc_unregister_device(ir->dev);
515*4882a593Smuzhiyun 	kfree(ir);
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	/* done */
518*4882a593Smuzhiyun 	core->ir = NULL;
519*4882a593Smuzhiyun 	return 0;
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun /* ---------------------------------------------------------------------- */
523*4882a593Smuzhiyun 
cx88_ir_irq(struct cx88_core * core)524*4882a593Smuzhiyun void cx88_ir_irq(struct cx88_core *core)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun 	struct cx88_IR *ir = core->ir;
527*4882a593Smuzhiyun 	u32 samples;
528*4882a593Smuzhiyun 	unsigned int todo, bits;
529*4882a593Smuzhiyun 	struct ir_raw_event ev = {};
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	if (!ir || !ir->sampling)
532*4882a593Smuzhiyun 		return;
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	/*
535*4882a593Smuzhiyun 	 * Samples are stored in a 32 bit register, oldest sample in
536*4882a593Smuzhiyun 	 * the msb. A set bit represents space and an unset bit
537*4882a593Smuzhiyun 	 * represents a pulse.
538*4882a593Smuzhiyun 	 */
539*4882a593Smuzhiyun 	samples = cx_read(MO_SAMPLE_IO);
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	if (samples == 0xff && ir->dev->idle)
542*4882a593Smuzhiyun 		return;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	for (todo = 32; todo > 0; todo -= bits) {
545*4882a593Smuzhiyun 		ev.pulse = samples & 0x80000000 ? false : true;
546*4882a593Smuzhiyun 		bits = min(todo, 32U - fls(ev.pulse ? samples : ~samples));
547*4882a593Smuzhiyun 		ev.duration = (bits * (USEC_PER_SEC / 1000)) / ir_samplerate;
548*4882a593Smuzhiyun 		ir_raw_event_store_with_filter(ir->dev, &ev);
549*4882a593Smuzhiyun 		samples <<= bits;
550*4882a593Smuzhiyun 	}
551*4882a593Smuzhiyun 	ir_raw_event_handle(ir->dev);
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun 
get_key_pvr2000(struct IR_i2c * ir,enum rc_proto * protocol,u32 * scancode,u8 * toggle)554*4882a593Smuzhiyun static int get_key_pvr2000(struct IR_i2c *ir, enum rc_proto *protocol,
555*4882a593Smuzhiyun 			   u32 *scancode, u8 *toggle)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun 	int flags, code;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	/* poll IR chip */
560*4882a593Smuzhiyun 	flags = i2c_smbus_read_byte_data(ir->c, 0x10);
561*4882a593Smuzhiyun 	if (flags < 0) {
562*4882a593Smuzhiyun 		dprintk("read error\n");
563*4882a593Smuzhiyun 		return 0;
564*4882a593Smuzhiyun 	}
565*4882a593Smuzhiyun 	/* key pressed ? */
566*4882a593Smuzhiyun 	if (0 == (flags & 0x80))
567*4882a593Smuzhiyun 		return 0;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	/* read actual key code */
570*4882a593Smuzhiyun 	code = i2c_smbus_read_byte_data(ir->c, 0x00);
571*4882a593Smuzhiyun 	if (code < 0) {
572*4882a593Smuzhiyun 		dprintk("read error\n");
573*4882a593Smuzhiyun 		return 0;
574*4882a593Smuzhiyun 	}
575*4882a593Smuzhiyun 
576*4882a593Smuzhiyun 	dprintk("IR Key/Flags: (0x%02x/0x%02x)\n",
577*4882a593Smuzhiyun 		code & 0xff, flags & 0xff);
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	*protocol = RC_PROTO_UNKNOWN;
580*4882a593Smuzhiyun 	*scancode = code & 0xff;
581*4882a593Smuzhiyun 	*toggle = 0;
582*4882a593Smuzhiyun 	return 1;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun 
cx88_i2c_init_ir(struct cx88_core * core)585*4882a593Smuzhiyun void cx88_i2c_init_ir(struct cx88_core *core)
586*4882a593Smuzhiyun {
587*4882a593Smuzhiyun 	struct i2c_board_info info;
588*4882a593Smuzhiyun 	static const unsigned short default_addr_list[] = {
589*4882a593Smuzhiyun 		0x18, 0x6b, 0x71,
590*4882a593Smuzhiyun 		I2C_CLIENT_END
591*4882a593Smuzhiyun 	};
592*4882a593Smuzhiyun 	static const unsigned short pvr2000_addr_list[] = {
593*4882a593Smuzhiyun 		0x18, 0x1a,
594*4882a593Smuzhiyun 		I2C_CLIENT_END
595*4882a593Smuzhiyun 	};
596*4882a593Smuzhiyun 	const unsigned short *addr_list = default_addr_list;
597*4882a593Smuzhiyun 	const unsigned short *addrp;
598*4882a593Smuzhiyun 	/* Instantiate the IR receiver device, if present */
599*4882a593Smuzhiyun 	if (core->i2c_rc != 0)
600*4882a593Smuzhiyun 		return;
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	memset(&info, 0, sizeof(struct i2c_board_info));
603*4882a593Smuzhiyun 	strscpy(info.type, "ir_video", I2C_NAME_SIZE);
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	switch (core->boardnr) {
606*4882a593Smuzhiyun 	case CX88_BOARD_LEADTEK_PVR2000:
607*4882a593Smuzhiyun 		addr_list = pvr2000_addr_list;
608*4882a593Smuzhiyun 		core->init_data.name = "cx88 Leadtek PVR 2000 remote";
609*4882a593Smuzhiyun 		core->init_data.type = RC_PROTO_BIT_UNKNOWN;
610*4882a593Smuzhiyun 		core->init_data.get_key = get_key_pvr2000;
611*4882a593Smuzhiyun 		core->init_data.ir_codes = RC_MAP_EMPTY;
612*4882a593Smuzhiyun 		break;
613*4882a593Smuzhiyun 	}
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	/*
616*4882a593Smuzhiyun 	 * We can't call i2c_new_scanned_device() because it uses
617*4882a593Smuzhiyun 	 * quick writes for probing and at least some RC receiver
618*4882a593Smuzhiyun 	 * devices only reply to reads.
619*4882a593Smuzhiyun 	 * Also, Hauppauge XVR needs to be specified, as address 0x71
620*4882a593Smuzhiyun 	 * conflicts with another remote type used with saa7134
621*4882a593Smuzhiyun 	 */
622*4882a593Smuzhiyun 	for (addrp = addr_list; *addrp != I2C_CLIENT_END; addrp++) {
623*4882a593Smuzhiyun 		info.platform_data = NULL;
624*4882a593Smuzhiyun 		memset(&core->init_data, 0, sizeof(core->init_data));
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 		if (*addrp == 0x71) {
627*4882a593Smuzhiyun 			/* Hauppauge Z8F0811 */
628*4882a593Smuzhiyun 			strscpy(info.type, "ir_z8f0811_haup", I2C_NAME_SIZE);
629*4882a593Smuzhiyun 			core->init_data.name = core->board.name;
630*4882a593Smuzhiyun 			core->init_data.ir_codes = RC_MAP_HAUPPAUGE;
631*4882a593Smuzhiyun 			core->init_data.type = RC_PROTO_BIT_RC5 |
632*4882a593Smuzhiyun 				RC_PROTO_BIT_RC6_MCE | RC_PROTO_BIT_RC6_6A_32;
633*4882a593Smuzhiyun 			core->init_data.internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 			info.platform_data = &core->init_data;
636*4882a593Smuzhiyun 		}
637*4882a593Smuzhiyun 		if (i2c_smbus_xfer(&core->i2c_adap, *addrp, 0,
638*4882a593Smuzhiyun 				   I2C_SMBUS_READ, 0,
639*4882a593Smuzhiyun 				   I2C_SMBUS_QUICK, NULL) >= 0) {
640*4882a593Smuzhiyun 			info.addr = *addrp;
641*4882a593Smuzhiyun 			i2c_new_client_device(&core->i2c_adap, &info);
642*4882a593Smuzhiyun 			break;
643*4882a593Smuzhiyun 		}
644*4882a593Smuzhiyun 	}
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun /* ---------------------------------------------------------------------- */
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun MODULE_AUTHOR("Gerd Knorr, Pavel Machek, Chris Pascoe");
650*4882a593Smuzhiyun MODULE_DESCRIPTION("input driver for cx88 GPIO-based IR remote controls");
651*4882a593Smuzhiyun MODULE_LICENSE("GPL");
652