xref: /OK3568_Linux_fs/kernel/drivers/media/pci/cx88/cx88-dvb.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * device driver for Conexant 2388x based TV cards
4*4882a593Smuzhiyun  * MPEG Transport Stream (DVB) routines
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
7*4882a593Smuzhiyun  * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include "cx88.h"
11*4882a593Smuzhiyun #include "dvb-pll.h"
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/device.h>
16*4882a593Smuzhiyun #include <linux/fs.h>
17*4882a593Smuzhiyun #include <linux/kthread.h>
18*4882a593Smuzhiyun #include <linux/file.h>
19*4882a593Smuzhiyun #include <linux/suspend.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <media/v4l2-common.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "mt352.h"
24*4882a593Smuzhiyun #include "mt352_priv.h"
25*4882a593Smuzhiyun #include "cx88-vp3054-i2c.h"
26*4882a593Smuzhiyun #include "zl10353.h"
27*4882a593Smuzhiyun #include "cx22702.h"
28*4882a593Smuzhiyun #include "or51132.h"
29*4882a593Smuzhiyun #include "lgdt330x.h"
30*4882a593Smuzhiyun #include "s5h1409.h"
31*4882a593Smuzhiyun #include "xc4000.h"
32*4882a593Smuzhiyun #include "xc5000.h"
33*4882a593Smuzhiyun #include "nxt200x.h"
34*4882a593Smuzhiyun #include "cx24123.h"
35*4882a593Smuzhiyun #include "isl6421.h"
36*4882a593Smuzhiyun #include "tuner-simple.h"
37*4882a593Smuzhiyun #include "tda9887.h"
38*4882a593Smuzhiyun #include "s5h1411.h"
39*4882a593Smuzhiyun #include "stv0299.h"
40*4882a593Smuzhiyun #include "z0194a.h"
41*4882a593Smuzhiyun #include "stv0288.h"
42*4882a593Smuzhiyun #include "stb6000.h"
43*4882a593Smuzhiyun #include "cx24116.h"
44*4882a593Smuzhiyun #include "stv0900.h"
45*4882a593Smuzhiyun #include "stb6100.h"
46*4882a593Smuzhiyun #include "stb6100_proc.h"
47*4882a593Smuzhiyun #include "mb86a16.h"
48*4882a593Smuzhiyun #include "ts2020.h"
49*4882a593Smuzhiyun #include "ds3000.h"
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
52*4882a593Smuzhiyun MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
53*4882a593Smuzhiyun MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
54*4882a593Smuzhiyun MODULE_LICENSE("GPL");
55*4882a593Smuzhiyun MODULE_VERSION(CX88_VERSION);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun static unsigned int debug;
58*4882a593Smuzhiyun module_param(debug, int, 0644);
59*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun static unsigned int dvb_buf_tscnt = 32;
62*4882a593Smuzhiyun module_param(dvb_buf_tscnt, int, 0644);
63*4882a593Smuzhiyun MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define dprintk(level, fmt, arg...) do {				\
68*4882a593Smuzhiyun 	if (debug >= level)						\
69*4882a593Smuzhiyun 		printk(KERN_DEBUG pr_fmt("%s: dvb:" fmt),		\
70*4882a593Smuzhiyun 			__func__, ##arg);				\
71*4882a593Smuzhiyun } while (0)
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
74*4882a593Smuzhiyun 
queue_setup(struct vb2_queue * q,unsigned int * num_buffers,unsigned int * num_planes,unsigned int sizes[],struct device * alloc_devs[])75*4882a593Smuzhiyun static int queue_setup(struct vb2_queue *q,
76*4882a593Smuzhiyun 		       unsigned int *num_buffers, unsigned int *num_planes,
77*4882a593Smuzhiyun 		       unsigned int sizes[], struct device *alloc_devs[])
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun 	struct cx8802_dev *dev = q->drv_priv;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	*num_planes = 1;
82*4882a593Smuzhiyun 	dev->ts_packet_size  = 188 * 4;
83*4882a593Smuzhiyun 	dev->ts_packet_count = dvb_buf_tscnt;
84*4882a593Smuzhiyun 	sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
85*4882a593Smuzhiyun 	*num_buffers = dvb_buf_tscnt;
86*4882a593Smuzhiyun 	return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
buffer_prepare(struct vb2_buffer * vb)89*4882a593Smuzhiyun static int buffer_prepare(struct vb2_buffer *vb)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
92*4882a593Smuzhiyun 	struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
93*4882a593Smuzhiyun 	struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
buffer_finish(struct vb2_buffer * vb)98*4882a593Smuzhiyun static void buffer_finish(struct vb2_buffer *vb)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
101*4882a593Smuzhiyun 	struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
102*4882a593Smuzhiyun 	struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
103*4882a593Smuzhiyun 	struct cx88_riscmem *risc = &buf->risc;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	if (risc->cpu)
106*4882a593Smuzhiyun 		pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
107*4882a593Smuzhiyun 	memset(risc, 0, sizeof(*risc));
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
buffer_queue(struct vb2_buffer * vb)110*4882a593Smuzhiyun static void buffer_queue(struct vb2_buffer *vb)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
113*4882a593Smuzhiyun 	struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
114*4882a593Smuzhiyun 	struct cx88_buffer    *buf = container_of(vbuf, struct cx88_buffer, vb);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	cx8802_buf_queue(dev, buf);
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
start_streaming(struct vb2_queue * q,unsigned int count)119*4882a593Smuzhiyun static int start_streaming(struct vb2_queue *q, unsigned int count)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	struct cx8802_dev *dev = q->drv_priv;
122*4882a593Smuzhiyun 	struct cx88_dmaqueue *dmaq = &dev->mpegq;
123*4882a593Smuzhiyun 	struct cx88_buffer *buf;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
126*4882a593Smuzhiyun 	cx8802_start_dma(dev, dmaq, buf);
127*4882a593Smuzhiyun 	return 0;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
stop_streaming(struct vb2_queue * q)130*4882a593Smuzhiyun static void stop_streaming(struct vb2_queue *q)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	struct cx8802_dev *dev = q->drv_priv;
133*4882a593Smuzhiyun 	struct cx88_dmaqueue *dmaq = &dev->mpegq;
134*4882a593Smuzhiyun 	unsigned long flags;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	cx8802_cancel_buffers(dev);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->slock, flags);
139*4882a593Smuzhiyun 	while (!list_empty(&dmaq->active)) {
140*4882a593Smuzhiyun 		struct cx88_buffer *buf = list_entry(dmaq->active.next,
141*4882a593Smuzhiyun 			struct cx88_buffer, list);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 		list_del(&buf->list);
144*4882a593Smuzhiyun 		vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
145*4882a593Smuzhiyun 	}
146*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->slock, flags);
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static const struct vb2_ops dvb_qops = {
150*4882a593Smuzhiyun 	.queue_setup    = queue_setup,
151*4882a593Smuzhiyun 	.buf_prepare  = buffer_prepare,
152*4882a593Smuzhiyun 	.buf_finish = buffer_finish,
153*4882a593Smuzhiyun 	.buf_queue    = buffer_queue,
154*4882a593Smuzhiyun 	.wait_prepare = vb2_ops_wait_prepare,
155*4882a593Smuzhiyun 	.wait_finish = vb2_ops_wait_finish,
156*4882a593Smuzhiyun 	.start_streaming = start_streaming,
157*4882a593Smuzhiyun 	.stop_streaming = stop_streaming,
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
161*4882a593Smuzhiyun 
cx88_dvb_bus_ctrl(struct dvb_frontend * fe,int acquire)162*4882a593Smuzhiyun static int cx88_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
165*4882a593Smuzhiyun 	struct cx8802_driver *drv = NULL;
166*4882a593Smuzhiyun 	int ret = 0;
167*4882a593Smuzhiyun 	int fe_id;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
170*4882a593Smuzhiyun 	if (!fe_id) {
171*4882a593Smuzhiyun 		pr_err("%s() No frontend found\n", __func__);
172*4882a593Smuzhiyun 		return -EINVAL;
173*4882a593Smuzhiyun 	}
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	mutex_lock(&dev->core->lock);
176*4882a593Smuzhiyun 	drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
177*4882a593Smuzhiyun 	if (drv) {
178*4882a593Smuzhiyun 		if (acquire) {
179*4882a593Smuzhiyun 			dev->frontends.active_fe_id = fe_id;
180*4882a593Smuzhiyun 			ret = drv->request_acquire(drv);
181*4882a593Smuzhiyun 		} else {
182*4882a593Smuzhiyun 			ret = drv->request_release(drv);
183*4882a593Smuzhiyun 			dev->frontends.active_fe_id = 0;
184*4882a593Smuzhiyun 		}
185*4882a593Smuzhiyun 	}
186*4882a593Smuzhiyun 	mutex_unlock(&dev->core->lock);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	return ret;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun 
cx88_dvb_gate_ctrl(struct cx88_core * core,int open)191*4882a593Smuzhiyun static void cx88_dvb_gate_ctrl(struct cx88_core  *core, int open)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	struct vb2_dvb_frontends *f;
194*4882a593Smuzhiyun 	struct vb2_dvb_frontend *fe;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	if (!core->dvbdev)
197*4882a593Smuzhiyun 		return;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	f = &core->dvbdev->frontends;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	if (!f)
202*4882a593Smuzhiyun 		return;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (f->gate <= 1) /* undefined or fe0 */
205*4882a593Smuzhiyun 		fe = vb2_dvb_get_frontend(f, 1);
206*4882a593Smuzhiyun 	else
207*4882a593Smuzhiyun 		fe = vb2_dvb_get_frontend(f, f->gate);
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
210*4882a593Smuzhiyun 		fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
214*4882a593Smuzhiyun 
dvico_fusionhdtv_demod_init(struct dvb_frontend * fe)215*4882a593Smuzhiyun static int dvico_fusionhdtv_demod_init(struct dvb_frontend *fe)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	static const u8 clock_config[]  = { CLOCK_CTL,  0x38, 0x39 };
218*4882a593Smuzhiyun 	static const u8 reset[]         = { RESET,      0x80 };
219*4882a593Smuzhiyun 	static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1,  0x40 };
220*4882a593Smuzhiyun 	static const u8 agc_cfg[]       = { AGC_TARGET, 0x24, 0x20 };
221*4882a593Smuzhiyun 	static const u8 gpp_ctl_cfg[]   = { GPP_CTL,    0x33 };
222*4882a593Smuzhiyun 	static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	mt352_write(fe, clock_config,   sizeof(clock_config));
225*4882a593Smuzhiyun 	udelay(200);
226*4882a593Smuzhiyun 	mt352_write(fe, reset,          sizeof(reset));
227*4882a593Smuzhiyun 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
230*4882a593Smuzhiyun 	mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
231*4882a593Smuzhiyun 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
232*4882a593Smuzhiyun 	return 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun 
dvico_dual_demod_init(struct dvb_frontend * fe)235*4882a593Smuzhiyun static int dvico_dual_demod_init(struct dvb_frontend *fe)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	static const u8 clock_config[]  = { CLOCK_CTL,  0x38, 0x38 };
238*4882a593Smuzhiyun 	static const u8 reset[]         = { RESET,      0x80 };
239*4882a593Smuzhiyun 	static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1,  0x40 };
240*4882a593Smuzhiyun 	static const u8 agc_cfg[]       = { AGC_TARGET, 0x28, 0x20 };
241*4882a593Smuzhiyun 	static const u8 gpp_ctl_cfg[]   = { GPP_CTL,    0x33 };
242*4882a593Smuzhiyun 	static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	mt352_write(fe, clock_config,   sizeof(clock_config));
245*4882a593Smuzhiyun 	udelay(200);
246*4882a593Smuzhiyun 	mt352_write(fe, reset,          sizeof(reset));
247*4882a593Smuzhiyun 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
250*4882a593Smuzhiyun 	mt352_write(fe, gpp_ctl_cfg,    sizeof(gpp_ctl_cfg));
251*4882a593Smuzhiyun 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	return 0;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun 
dntv_live_dvbt_demod_init(struct dvb_frontend * fe)256*4882a593Smuzhiyun static int dntv_live_dvbt_demod_init(struct dvb_frontend *fe)
257*4882a593Smuzhiyun {
258*4882a593Smuzhiyun 	static const u8 clock_config[]  = { 0x89, 0x38, 0x39 };
259*4882a593Smuzhiyun 	static const u8 reset[]         = { 0x50, 0x80 };
260*4882a593Smuzhiyun 	static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
261*4882a593Smuzhiyun 	static const u8 agc_cfg[]       = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
262*4882a593Smuzhiyun 				       0x00, 0xFF, 0x00, 0x40, 0x40 };
263*4882a593Smuzhiyun 	static const u8 dntv_extra[]     = { 0xB5, 0x7A };
264*4882a593Smuzhiyun 	static const u8 capt_range_cfg[] = { 0x75, 0x32 };
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	mt352_write(fe, clock_config,   sizeof(clock_config));
267*4882a593Smuzhiyun 	udelay(2000);
268*4882a593Smuzhiyun 	mt352_write(fe, reset,          sizeof(reset));
269*4882a593Smuzhiyun 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
272*4882a593Smuzhiyun 	udelay(2000);
273*4882a593Smuzhiyun 	mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
274*4882a593Smuzhiyun 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	return 0;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun static const struct mt352_config dvico_fusionhdtv = {
280*4882a593Smuzhiyun 	.demod_address = 0x0f,
281*4882a593Smuzhiyun 	.demod_init    = dvico_fusionhdtv_demod_init,
282*4882a593Smuzhiyun };
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun static const struct mt352_config dntv_live_dvbt_config = {
285*4882a593Smuzhiyun 	.demod_address = 0x0f,
286*4882a593Smuzhiyun 	.demod_init    = dntv_live_dvbt_demod_init,
287*4882a593Smuzhiyun };
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun static const struct mt352_config dvico_fusionhdtv_dual = {
290*4882a593Smuzhiyun 	.demod_address = 0x0f,
291*4882a593Smuzhiyun 	.demod_init    = dvico_dual_demod_init,
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
295*4882a593Smuzhiyun 	.demod_address = (0x1e >> 1),
296*4882a593Smuzhiyun 	.no_tuner      = 1,
297*4882a593Smuzhiyun 	.if2           = 45600,
298*4882a593Smuzhiyun };
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun static const struct mb86a16_config twinhan_vp1027 = {
301*4882a593Smuzhiyun 	.demod_address  = 0x08,
302*4882a593Smuzhiyun };
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
dntv_live_dvbt_pro_demod_init(struct dvb_frontend * fe)305*4882a593Smuzhiyun static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend *fe)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	static const u8 clock_config[]  = { 0x89, 0x38, 0x38 };
308*4882a593Smuzhiyun 	static const u8 reset[]         = { 0x50, 0x80 };
309*4882a593Smuzhiyun 	static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
310*4882a593Smuzhiyun 	static const u8 agc_cfg[]       = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
311*4882a593Smuzhiyun 				       0x00, 0xFF, 0x00, 0x40, 0x40 };
312*4882a593Smuzhiyun 	static const u8 dntv_extra[]     = { 0xB5, 0x7A };
313*4882a593Smuzhiyun 	static const u8 capt_range_cfg[] = { 0x75, 0x32 };
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	mt352_write(fe, clock_config,   sizeof(clock_config));
316*4882a593Smuzhiyun 	udelay(2000);
317*4882a593Smuzhiyun 	mt352_write(fe, reset,          sizeof(reset));
318*4882a593Smuzhiyun 	mt352_write(fe, adc_ctl_1_cfg,  sizeof(adc_ctl_1_cfg));
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	mt352_write(fe, agc_cfg,        sizeof(agc_cfg));
321*4882a593Smuzhiyun 	udelay(2000);
322*4882a593Smuzhiyun 	mt352_write(fe, dntv_extra,     sizeof(dntv_extra));
323*4882a593Smuzhiyun 	mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	return 0;
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun static const struct mt352_config dntv_live_dvbt_pro_config = {
329*4882a593Smuzhiyun 	.demod_address = 0x0f,
330*4882a593Smuzhiyun 	.no_tuner      = 1,
331*4882a593Smuzhiyun 	.demod_init    = dntv_live_dvbt_pro_demod_init,
332*4882a593Smuzhiyun };
333*4882a593Smuzhiyun #endif
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun static const struct zl10353_config dvico_fusionhdtv_hybrid = {
336*4882a593Smuzhiyun 	.demod_address = 0x0f,
337*4882a593Smuzhiyun 	.no_tuner      = 1,
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
341*4882a593Smuzhiyun 	.demod_address = 0x0f,
342*4882a593Smuzhiyun 	.if2           = 45600,
343*4882a593Smuzhiyun 	.no_tuner      = 1,
344*4882a593Smuzhiyun };
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
347*4882a593Smuzhiyun 	.demod_address = 0x0f,
348*4882a593Smuzhiyun 	.if2 = 4560,
349*4882a593Smuzhiyun 	.no_tuner = 1,
350*4882a593Smuzhiyun 	.demod_init = dvico_fusionhdtv_demod_init,
351*4882a593Smuzhiyun };
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
354*4882a593Smuzhiyun 	.demod_address = 0x0f,
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun static const struct cx22702_config connexant_refboard_config = {
358*4882a593Smuzhiyun 	.demod_address = 0x43,
359*4882a593Smuzhiyun 	.output_mode   = CX22702_SERIAL_OUTPUT,
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun static const struct cx22702_config hauppauge_hvr_config = {
363*4882a593Smuzhiyun 	.demod_address = 0x63,
364*4882a593Smuzhiyun 	.output_mode   = CX22702_SERIAL_OUTPUT,
365*4882a593Smuzhiyun };
366*4882a593Smuzhiyun 
or51132_set_ts_param(struct dvb_frontend * fe,int is_punctured)367*4882a593Smuzhiyun static int or51132_set_ts_param(struct dvb_frontend *fe, int is_punctured)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
372*4882a593Smuzhiyun 	return 0;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun static const struct or51132_config pchdtv_hd3000 = {
376*4882a593Smuzhiyun 	.demod_address = 0x15,
377*4882a593Smuzhiyun 	.set_ts_params = or51132_set_ts_param,
378*4882a593Smuzhiyun };
379*4882a593Smuzhiyun 
lgdt330x_pll_rf_set(struct dvb_frontend * fe,int index)380*4882a593Smuzhiyun static int lgdt330x_pll_rf_set(struct dvb_frontend *fe, int index)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
383*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	dprintk(1, "%s: index = %d\n", __func__, index);
386*4882a593Smuzhiyun 	if (index == 0)
387*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 8);
388*4882a593Smuzhiyun 	else
389*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 8);
390*4882a593Smuzhiyun 	return 0;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun 
lgdt330x_set_ts_param(struct dvb_frontend * fe,int is_punctured)393*4882a593Smuzhiyun static int lgdt330x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	if (is_punctured)
398*4882a593Smuzhiyun 		dev->ts_gen_cntrl |= 0x04;
399*4882a593Smuzhiyun 	else
400*4882a593Smuzhiyun 		dev->ts_gen_cntrl &= ~0x04;
401*4882a593Smuzhiyun 	return 0;
402*4882a593Smuzhiyun }
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun static struct lgdt330x_config fusionhdtv_3_gold = {
405*4882a593Smuzhiyun 	.demod_chip    = LGDT3302,
406*4882a593Smuzhiyun 	.serial_mpeg   = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
407*4882a593Smuzhiyun 	.set_ts_params = lgdt330x_set_ts_param,
408*4882a593Smuzhiyun };
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun static const struct lgdt330x_config fusionhdtv_5_gold = {
411*4882a593Smuzhiyun 	.demod_chip    = LGDT3303,
412*4882a593Smuzhiyun 	.serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
413*4882a593Smuzhiyun 	.set_ts_params = lgdt330x_set_ts_param,
414*4882a593Smuzhiyun };
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun static const struct lgdt330x_config pchdtv_hd5500 = {
417*4882a593Smuzhiyun 	.demod_chip    = LGDT3303,
418*4882a593Smuzhiyun 	.serial_mpeg   = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
419*4882a593Smuzhiyun 	.set_ts_params = lgdt330x_set_ts_param,
420*4882a593Smuzhiyun };
421*4882a593Smuzhiyun 
nxt200x_set_ts_param(struct dvb_frontend * fe,int is_punctured)422*4882a593Smuzhiyun static int nxt200x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
427*4882a593Smuzhiyun 	return 0;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun static const struct nxt200x_config ati_hdtvwonder = {
431*4882a593Smuzhiyun 	.demod_address = 0x0a,
432*4882a593Smuzhiyun 	.set_ts_params = nxt200x_set_ts_param,
433*4882a593Smuzhiyun };
434*4882a593Smuzhiyun 
cx24123_set_ts_param(struct dvb_frontend * fe,int is_punctured)435*4882a593Smuzhiyun static int cx24123_set_ts_param(struct dvb_frontend *fe,
436*4882a593Smuzhiyun 				int is_punctured)
437*4882a593Smuzhiyun {
438*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	dev->ts_gen_cntrl = 0x02;
441*4882a593Smuzhiyun 	return 0;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun 
kworld_dvbs_100_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)444*4882a593Smuzhiyun static int kworld_dvbs_100_set_voltage(struct dvb_frontend *fe,
445*4882a593Smuzhiyun 				       enum fe_sec_voltage voltage)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
448*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	if (voltage == SEC_VOLTAGE_OFF)
451*4882a593Smuzhiyun 		cx_write(MO_GP0_IO, 0x000006fb);
452*4882a593Smuzhiyun 	else
453*4882a593Smuzhiyun 		cx_write(MO_GP0_IO, 0x000006f9);
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	if (core->prev_set_voltage)
456*4882a593Smuzhiyun 		return core->prev_set_voltage(fe, voltage);
457*4882a593Smuzhiyun 	return 0;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun 
geniatech_dvbs_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)460*4882a593Smuzhiyun static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
461*4882a593Smuzhiyun 				      enum fe_sec_voltage voltage)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
464*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	if (voltage == SEC_VOLTAGE_OFF) {
467*4882a593Smuzhiyun 		dprintk(1, "LNB Voltage OFF\n");
468*4882a593Smuzhiyun 		cx_write(MO_GP0_IO, 0x0000efff);
469*4882a593Smuzhiyun 	}
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 	if (core->prev_set_voltage)
472*4882a593Smuzhiyun 		return core->prev_set_voltage(fe, voltage);
473*4882a593Smuzhiyun 	return 0;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun 
tevii_dvbs_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)476*4882a593Smuzhiyun static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
477*4882a593Smuzhiyun 				  enum fe_sec_voltage voltage)
478*4882a593Smuzhiyun {
479*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
480*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	cx_set(MO_GP0_IO, 0x6040);
483*4882a593Smuzhiyun 	switch (voltage) {
484*4882a593Smuzhiyun 	case SEC_VOLTAGE_13:
485*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x20);
486*4882a593Smuzhiyun 		break;
487*4882a593Smuzhiyun 	case SEC_VOLTAGE_18:
488*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x20);
489*4882a593Smuzhiyun 		break;
490*4882a593Smuzhiyun 	case SEC_VOLTAGE_OFF:
491*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x20);
492*4882a593Smuzhiyun 		break;
493*4882a593Smuzhiyun 	}
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	if (core->prev_set_voltage)
496*4882a593Smuzhiyun 		return core->prev_set_voltage(fe, voltage);
497*4882a593Smuzhiyun 	return 0;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
vp1027_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)500*4882a593Smuzhiyun static int vp1027_set_voltage(struct dvb_frontend *fe,
501*4882a593Smuzhiyun 			      enum fe_sec_voltage voltage)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
504*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	switch (voltage) {
507*4882a593Smuzhiyun 	case SEC_VOLTAGE_13:
508*4882a593Smuzhiyun 		dprintk(1, "LNB SEC Voltage=13\n");
509*4882a593Smuzhiyun 		cx_write(MO_GP0_IO, 0x00001220);
510*4882a593Smuzhiyun 		break;
511*4882a593Smuzhiyun 	case SEC_VOLTAGE_18:
512*4882a593Smuzhiyun 		dprintk(1, "LNB SEC Voltage=18\n");
513*4882a593Smuzhiyun 		cx_write(MO_GP0_IO, 0x00001222);
514*4882a593Smuzhiyun 		break;
515*4882a593Smuzhiyun 	case SEC_VOLTAGE_OFF:
516*4882a593Smuzhiyun 		dprintk(1, "LNB Voltage OFF\n");
517*4882a593Smuzhiyun 		cx_write(MO_GP0_IO, 0x00001230);
518*4882a593Smuzhiyun 		break;
519*4882a593Smuzhiyun 	}
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	if (core->prev_set_voltage)
522*4882a593Smuzhiyun 		return core->prev_set_voltage(fe, voltage);
523*4882a593Smuzhiyun 	return 0;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun static const struct cx24123_config geniatech_dvbs_config = {
527*4882a593Smuzhiyun 	.demod_address = 0x55,
528*4882a593Smuzhiyun 	.set_ts_params = cx24123_set_ts_param,
529*4882a593Smuzhiyun };
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun static const struct cx24123_config hauppauge_novas_config = {
532*4882a593Smuzhiyun 	.demod_address = 0x55,
533*4882a593Smuzhiyun 	.set_ts_params = cx24123_set_ts_param,
534*4882a593Smuzhiyun };
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun static const struct cx24123_config kworld_dvbs_100_config = {
537*4882a593Smuzhiyun 	.demod_address = 0x15,
538*4882a593Smuzhiyun 	.set_ts_params = cx24123_set_ts_param,
539*4882a593Smuzhiyun 	.lnb_polarity  = 1,
540*4882a593Smuzhiyun };
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
543*4882a593Smuzhiyun 	.demod_address = 0x32 >> 1,
544*4882a593Smuzhiyun 	.output_mode   = S5H1409_PARALLEL_OUTPUT,
545*4882a593Smuzhiyun 	.gpio	       = S5H1409_GPIO_ON,
546*4882a593Smuzhiyun 	.qam_if	       = 44000,
547*4882a593Smuzhiyun 	.inversion     = S5H1409_INVERSION_OFF,
548*4882a593Smuzhiyun 	.status_mode   = S5H1409_DEMODLOCKING,
549*4882a593Smuzhiyun 	.mpeg_timing   = S5H1409_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK,
550*4882a593Smuzhiyun };
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
553*4882a593Smuzhiyun 	.demod_address = 0x32 >> 1,
554*4882a593Smuzhiyun 	.output_mode   = S5H1409_SERIAL_OUTPUT,
555*4882a593Smuzhiyun 	.gpio          = S5H1409_GPIO_OFF,
556*4882a593Smuzhiyun 	.inversion     = S5H1409_INVERSION_OFF,
557*4882a593Smuzhiyun 	.status_mode   = S5H1409_DEMODLOCKING,
558*4882a593Smuzhiyun 	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
559*4882a593Smuzhiyun };
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun static const struct s5h1409_config kworld_atsc_120_config = {
562*4882a593Smuzhiyun 	.demod_address = 0x32 >> 1,
563*4882a593Smuzhiyun 	.output_mode   = S5H1409_SERIAL_OUTPUT,
564*4882a593Smuzhiyun 	.gpio	       = S5H1409_GPIO_OFF,
565*4882a593Smuzhiyun 	.inversion     = S5H1409_INVERSION_OFF,
566*4882a593Smuzhiyun 	.status_mode   = S5H1409_DEMODLOCKING,
567*4882a593Smuzhiyun 	.mpeg_timing   = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
568*4882a593Smuzhiyun };
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
571*4882a593Smuzhiyun 	.i2c_address	= 0x64,
572*4882a593Smuzhiyun 	.if_khz		= 5380,
573*4882a593Smuzhiyun };
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
576*4882a593Smuzhiyun 	.demod_address = (0x1e >> 1),
577*4882a593Smuzhiyun 	.no_tuner      = 1,
578*4882a593Smuzhiyun 	.if2           = 45600,
579*4882a593Smuzhiyun };
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun static const struct zl10353_config cx88_geniatech_x8000_mt = {
582*4882a593Smuzhiyun 	.demod_address = (0x1e >> 1),
583*4882a593Smuzhiyun 	.no_tuner = 1,
584*4882a593Smuzhiyun 	.disable_i2c_gate_ctrl = 1,
585*4882a593Smuzhiyun };
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun static const struct s5h1411_config dvico_fusionhdtv7_config = {
588*4882a593Smuzhiyun 	.output_mode   = S5H1411_SERIAL_OUTPUT,
589*4882a593Smuzhiyun 	.gpio          = S5H1411_GPIO_ON,
590*4882a593Smuzhiyun 	.mpeg_timing   = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
591*4882a593Smuzhiyun 	.qam_if        = S5H1411_IF_44000,
592*4882a593Smuzhiyun 	.vsb_if        = S5H1411_IF_44000,
593*4882a593Smuzhiyun 	.inversion     = S5H1411_INVERSION_OFF,
594*4882a593Smuzhiyun 	.status_mode   = S5H1411_DEMODLOCKING
595*4882a593Smuzhiyun };
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
598*4882a593Smuzhiyun 	.i2c_address    = 0xc2 >> 1,
599*4882a593Smuzhiyun 	.if_khz         = 5380,
600*4882a593Smuzhiyun };
601*4882a593Smuzhiyun 
attach_xc3028(u8 addr,struct cx8802_dev * dev)602*4882a593Smuzhiyun static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun 	struct dvb_frontend *fe;
605*4882a593Smuzhiyun 	struct vb2_dvb_frontend *fe0 = NULL;
606*4882a593Smuzhiyun 	struct xc2028_ctrl ctl;
607*4882a593Smuzhiyun 	struct xc2028_config cfg = {
608*4882a593Smuzhiyun 		.i2c_adap  = &dev->core->i2c_adap,
609*4882a593Smuzhiyun 		.i2c_addr  = addr,
610*4882a593Smuzhiyun 		.ctrl      = &ctl,
611*4882a593Smuzhiyun 	};
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	/* Get the first frontend */
614*4882a593Smuzhiyun 	fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
615*4882a593Smuzhiyun 	if (!fe0)
616*4882a593Smuzhiyun 		return -EINVAL;
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	if (!fe0->dvb.frontend) {
619*4882a593Smuzhiyun 		pr_err("dvb frontend not attached. Can't attach xc3028\n");
620*4882a593Smuzhiyun 		return -EINVAL;
621*4882a593Smuzhiyun 	}
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	/*
624*4882a593Smuzhiyun 	 * Some xc3028 devices may be hidden by an I2C gate. This is known
625*4882a593Smuzhiyun 	 * to happen with some s5h1409-based devices.
626*4882a593Smuzhiyun 	 * Now that I2C gate is open, sets up xc3028 configuration
627*4882a593Smuzhiyun 	 */
628*4882a593Smuzhiyun 	cx88_setup_xc3028(dev->core, &ctl);
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
631*4882a593Smuzhiyun 	if (!fe) {
632*4882a593Smuzhiyun 		pr_err("xc3028 attach failed\n");
633*4882a593Smuzhiyun 		dvb_frontend_detach(fe0->dvb.frontend);
634*4882a593Smuzhiyun 		dvb_unregister_frontend(fe0->dvb.frontend);
635*4882a593Smuzhiyun 		fe0->dvb.frontend = NULL;
636*4882a593Smuzhiyun 		return -EINVAL;
637*4882a593Smuzhiyun 	}
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	pr_info("xc3028 attached\n");
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	return 0;
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun 
attach_xc4000(struct cx8802_dev * dev,struct xc4000_config * cfg)644*4882a593Smuzhiyun static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
645*4882a593Smuzhiyun {
646*4882a593Smuzhiyun 	struct dvb_frontend *fe;
647*4882a593Smuzhiyun 	struct vb2_dvb_frontend *fe0 = NULL;
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	/* Get the first frontend */
650*4882a593Smuzhiyun 	fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
651*4882a593Smuzhiyun 	if (!fe0)
652*4882a593Smuzhiyun 		return -EINVAL;
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	if (!fe0->dvb.frontend) {
655*4882a593Smuzhiyun 		pr_err("dvb frontend not attached. Can't attach xc4000\n");
656*4882a593Smuzhiyun 		return -EINVAL;
657*4882a593Smuzhiyun 	}
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
660*4882a593Smuzhiyun 			cfg);
661*4882a593Smuzhiyun 	if (!fe) {
662*4882a593Smuzhiyun 		pr_err("xc4000 attach failed\n");
663*4882a593Smuzhiyun 		dvb_frontend_detach(fe0->dvb.frontend);
664*4882a593Smuzhiyun 		dvb_unregister_frontend(fe0->dvb.frontend);
665*4882a593Smuzhiyun 		fe0->dvb.frontend = NULL;
666*4882a593Smuzhiyun 		return -EINVAL;
667*4882a593Smuzhiyun 	}
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 	pr_info("xc4000 attached\n");
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	return 0;
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun 
cx24116_set_ts_param(struct dvb_frontend * fe,int is_punctured)674*4882a593Smuzhiyun static int cx24116_set_ts_param(struct dvb_frontend *fe,
675*4882a593Smuzhiyun 				int is_punctured)
676*4882a593Smuzhiyun {
677*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	dev->ts_gen_cntrl = 0x2;
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 	return 0;
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun 
stv0900_set_ts_param(struct dvb_frontend * fe,int is_punctured)684*4882a593Smuzhiyun static int stv0900_set_ts_param(struct dvb_frontend *fe,
685*4882a593Smuzhiyun 				int is_punctured)
686*4882a593Smuzhiyun {
687*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	dev->ts_gen_cntrl = 0;
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	return 0;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun 
cx24116_reset_device(struct dvb_frontend * fe)694*4882a593Smuzhiyun static int cx24116_reset_device(struct dvb_frontend *fe)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
697*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 	/* Reset the part */
700*4882a593Smuzhiyun 	/* Put the cx24116 into reset */
701*4882a593Smuzhiyun 	cx_write(MO_SRST_IO, 0);
702*4882a593Smuzhiyun 	usleep_range(10000, 20000);
703*4882a593Smuzhiyun 	/* Take the cx24116 out of reset */
704*4882a593Smuzhiyun 	cx_write(MO_SRST_IO, 1);
705*4882a593Smuzhiyun 	usleep_range(10000, 20000);
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	return 0;
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun static const struct cx24116_config hauppauge_hvr4000_config = {
711*4882a593Smuzhiyun 	.demod_address          = 0x05,
712*4882a593Smuzhiyun 	.set_ts_params          = cx24116_set_ts_param,
713*4882a593Smuzhiyun 	.reset_device           = cx24116_reset_device,
714*4882a593Smuzhiyun };
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun static const struct cx24116_config tevii_s460_config = {
717*4882a593Smuzhiyun 	.demod_address = 0x55,
718*4882a593Smuzhiyun 	.set_ts_params = cx24116_set_ts_param,
719*4882a593Smuzhiyun 	.reset_device  = cx24116_reset_device,
720*4882a593Smuzhiyun };
721*4882a593Smuzhiyun 
ds3000_set_ts_param(struct dvb_frontend * fe,int is_punctured)722*4882a593Smuzhiyun static int ds3000_set_ts_param(struct dvb_frontend *fe,
723*4882a593Smuzhiyun 			       int is_punctured)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	dev->ts_gen_cntrl = 4;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	return 0;
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun static struct ds3000_config tevii_ds3000_config = {
733*4882a593Smuzhiyun 	.demod_address = 0x68,
734*4882a593Smuzhiyun 	.set_ts_params = ds3000_set_ts_param,
735*4882a593Smuzhiyun };
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun static struct ts2020_config tevii_ts2020_config  = {
738*4882a593Smuzhiyun 	.tuner_address = 0x60,
739*4882a593Smuzhiyun 	.clk_out_div = 1,
740*4882a593Smuzhiyun };
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun static const struct stv0900_config prof_7301_stv0900_config = {
743*4882a593Smuzhiyun 	.demod_address = 0x6a,
744*4882a593Smuzhiyun /*	demod_mode = 0,*/
745*4882a593Smuzhiyun 	.xtal = 27000000,
746*4882a593Smuzhiyun 	.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
747*4882a593Smuzhiyun 	.diseqc_mode = 2,/* 2/3 PWM */
748*4882a593Smuzhiyun 	.tun1_maddress = 0,/* 0x60 */
749*4882a593Smuzhiyun 	.tun1_adc = 0,/* 2 Vpp */
750*4882a593Smuzhiyun 	.path1_mode = 3,
751*4882a593Smuzhiyun 	.set_ts_params = stv0900_set_ts_param,
752*4882a593Smuzhiyun };
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun static const struct stb6100_config prof_7301_stb6100_config = {
755*4882a593Smuzhiyun 	.tuner_address = 0x60,
756*4882a593Smuzhiyun 	.refclock = 27000000,
757*4882a593Smuzhiyun };
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun static const struct stv0299_config tevii_tuner_sharp_config = {
760*4882a593Smuzhiyun 	.demod_address = 0x68,
761*4882a593Smuzhiyun 	.inittab = sharp_z0194a_inittab,
762*4882a593Smuzhiyun 	.mclk = 88000000UL,
763*4882a593Smuzhiyun 	.invert = 1,
764*4882a593Smuzhiyun 	.skip_reinit = 0,
765*4882a593Smuzhiyun 	.lock_output = 1,
766*4882a593Smuzhiyun 	.volt13_op0_op1 = STV0299_VOLT13_OP1,
767*4882a593Smuzhiyun 	.min_delay_ms = 100,
768*4882a593Smuzhiyun 	.set_symbol_rate = sharp_z0194a_set_symbol_rate,
769*4882a593Smuzhiyun 	.set_ts_params = cx24116_set_ts_param,
770*4882a593Smuzhiyun };
771*4882a593Smuzhiyun 
772*4882a593Smuzhiyun static const struct stv0288_config tevii_tuner_earda_config = {
773*4882a593Smuzhiyun 	.demod_address = 0x68,
774*4882a593Smuzhiyun 	.min_delay_ms = 100,
775*4882a593Smuzhiyun 	.set_ts_params = cx24116_set_ts_param,
776*4882a593Smuzhiyun };
777*4882a593Smuzhiyun 
cx8802_alloc_frontends(struct cx8802_dev * dev)778*4882a593Smuzhiyun static int cx8802_alloc_frontends(struct cx8802_dev *dev)
779*4882a593Smuzhiyun {
780*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
781*4882a593Smuzhiyun 	struct vb2_dvb_frontend *fe = NULL;
782*4882a593Smuzhiyun 	int i;
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun 	mutex_init(&dev->frontends.lock);
785*4882a593Smuzhiyun 	INIT_LIST_HEAD(&dev->frontends.felist);
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun 	if (!core->board.num_frontends)
788*4882a593Smuzhiyun 		return -ENODEV;
789*4882a593Smuzhiyun 
790*4882a593Smuzhiyun 	pr_info("%s: allocating %d frontend(s)\n", __func__,
791*4882a593Smuzhiyun 		core->board.num_frontends);
792*4882a593Smuzhiyun 	for (i = 1; i <= core->board.num_frontends; i++) {
793*4882a593Smuzhiyun 		fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
794*4882a593Smuzhiyun 		if (!fe) {
795*4882a593Smuzhiyun 			pr_err("%s() failed to alloc\n", __func__);
796*4882a593Smuzhiyun 			vb2_dvb_dealloc_frontends(&dev->frontends);
797*4882a593Smuzhiyun 			return -ENOMEM;
798*4882a593Smuzhiyun 		}
799*4882a593Smuzhiyun 	}
800*4882a593Smuzhiyun 	return 0;
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun static const u8 samsung_smt_7020_inittab[] = {
804*4882a593Smuzhiyun 	     0x01, 0x15,
805*4882a593Smuzhiyun 	     0x02, 0x00,
806*4882a593Smuzhiyun 	     0x03, 0x00,
807*4882a593Smuzhiyun 	     0x04, 0x7D,
808*4882a593Smuzhiyun 	     0x05, 0x0F,
809*4882a593Smuzhiyun 	     0x06, 0x02,
810*4882a593Smuzhiyun 	     0x07, 0x00,
811*4882a593Smuzhiyun 	     0x08, 0x60,
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	     0x0A, 0xC2,
814*4882a593Smuzhiyun 	     0x0B, 0x00,
815*4882a593Smuzhiyun 	     0x0C, 0x01,
816*4882a593Smuzhiyun 	     0x0D, 0x81,
817*4882a593Smuzhiyun 	     0x0E, 0x44,
818*4882a593Smuzhiyun 	     0x0F, 0x09,
819*4882a593Smuzhiyun 	     0x10, 0x3C,
820*4882a593Smuzhiyun 	     0x11, 0x84,
821*4882a593Smuzhiyun 	     0x12, 0xDA,
822*4882a593Smuzhiyun 	     0x13, 0x99,
823*4882a593Smuzhiyun 	     0x14, 0x8D,
824*4882a593Smuzhiyun 	     0x15, 0xCE,
825*4882a593Smuzhiyun 	     0x16, 0xE8,
826*4882a593Smuzhiyun 	     0x17, 0x43,
827*4882a593Smuzhiyun 	     0x18, 0x1C,
828*4882a593Smuzhiyun 	     0x19, 0x1B,
829*4882a593Smuzhiyun 	     0x1A, 0x1D,
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun 	     0x1C, 0x12,
832*4882a593Smuzhiyun 	     0x1D, 0x00,
833*4882a593Smuzhiyun 	     0x1E, 0x00,
834*4882a593Smuzhiyun 	     0x1F, 0x00,
835*4882a593Smuzhiyun 	     0x20, 0x00,
836*4882a593Smuzhiyun 	     0x21, 0x00,
837*4882a593Smuzhiyun 	     0x22, 0x00,
838*4882a593Smuzhiyun 	     0x23, 0x00,
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun 	     0x28, 0x02,
841*4882a593Smuzhiyun 	     0x29, 0x28,
842*4882a593Smuzhiyun 	     0x2A, 0x14,
843*4882a593Smuzhiyun 	     0x2B, 0x0F,
844*4882a593Smuzhiyun 	     0x2C, 0x09,
845*4882a593Smuzhiyun 	     0x2D, 0x05,
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	     0x31, 0x1F,
848*4882a593Smuzhiyun 	     0x32, 0x19,
849*4882a593Smuzhiyun 	     0x33, 0xFC,
850*4882a593Smuzhiyun 	     0x34, 0x13,
851*4882a593Smuzhiyun 	     0xff, 0xff,
852*4882a593Smuzhiyun };
853*4882a593Smuzhiyun 
samsung_smt_7020_tuner_set_params(struct dvb_frontend * fe)854*4882a593Smuzhiyun static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
855*4882a593Smuzhiyun {
856*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
857*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
858*4882a593Smuzhiyun 	u8 buf[4];
859*4882a593Smuzhiyun 	u32 div;
860*4882a593Smuzhiyun 	struct i2c_msg msg = {
861*4882a593Smuzhiyun 		.addr = 0x61,
862*4882a593Smuzhiyun 		.flags = 0,
863*4882a593Smuzhiyun 		.buf = buf,
864*4882a593Smuzhiyun 		.len = sizeof(buf) };
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 	div = c->frequency / 125;
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	buf[0] = (div >> 8) & 0x7f;
869*4882a593Smuzhiyun 	buf[1] = div & 0xff;
870*4882a593Smuzhiyun 	buf[2] = 0x84;  /* 0xC4 */
871*4882a593Smuzhiyun 	buf[3] = 0x00;
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun 	if (c->frequency < 1500000)
874*4882a593Smuzhiyun 		buf[3] |= 0x10;
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
877*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 1);
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 	if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
880*4882a593Smuzhiyun 		return -EIO;
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	return 0;
883*4882a593Smuzhiyun }
884*4882a593Smuzhiyun 
samsung_smt_7020_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)885*4882a593Smuzhiyun static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
886*4882a593Smuzhiyun 				     enum fe_sec_tone_mode tone)
887*4882a593Smuzhiyun {
888*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
889*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	cx_set(MO_GP0_IO, 0x0800);
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun 	switch (tone) {
894*4882a593Smuzhiyun 	case SEC_TONE_ON:
895*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x08);
896*4882a593Smuzhiyun 		break;
897*4882a593Smuzhiyun 	case SEC_TONE_OFF:
898*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x08);
899*4882a593Smuzhiyun 		break;
900*4882a593Smuzhiyun 	default:
901*4882a593Smuzhiyun 		return -EINVAL;
902*4882a593Smuzhiyun 	}
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	return 0;
905*4882a593Smuzhiyun }
906*4882a593Smuzhiyun 
samsung_smt_7020_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)907*4882a593Smuzhiyun static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
908*4882a593Smuzhiyun 					enum fe_sec_voltage voltage)
909*4882a593Smuzhiyun {
910*4882a593Smuzhiyun 	struct cx8802_dev *dev = fe->dvb->priv;
911*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 	u8 data;
914*4882a593Smuzhiyun 	struct i2c_msg msg = {
915*4882a593Smuzhiyun 		.addr = 8,
916*4882a593Smuzhiyun 		.flags = 0,
917*4882a593Smuzhiyun 		.buf = &data,
918*4882a593Smuzhiyun 		.len = sizeof(data) };
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun 	cx_set(MO_GP0_IO, 0x8000);
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	switch (voltage) {
923*4882a593Smuzhiyun 	case SEC_VOLTAGE_OFF:
924*4882a593Smuzhiyun 		break;
925*4882a593Smuzhiyun 	case SEC_VOLTAGE_13:
926*4882a593Smuzhiyun 		data = ISL6421_EN1 | ISL6421_LLC1;
927*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x80);
928*4882a593Smuzhiyun 		break;
929*4882a593Smuzhiyun 	case SEC_VOLTAGE_18:
930*4882a593Smuzhiyun 		data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
931*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x80);
932*4882a593Smuzhiyun 		break;
933*4882a593Smuzhiyun 	default:
934*4882a593Smuzhiyun 		return -EINVAL;
935*4882a593Smuzhiyun 	}
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun 
samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend * fe,u32 srate,u32 ratio)940*4882a593Smuzhiyun static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
941*4882a593Smuzhiyun 						    u32 srate, u32 ratio)
942*4882a593Smuzhiyun {
943*4882a593Smuzhiyun 	u8 aclk = 0;
944*4882a593Smuzhiyun 	u8 bclk = 0;
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun 	if (srate < 1500000) {
947*4882a593Smuzhiyun 		aclk = 0xb7;
948*4882a593Smuzhiyun 		bclk = 0x47;
949*4882a593Smuzhiyun 	} else if (srate < 3000000) {
950*4882a593Smuzhiyun 		aclk = 0xb7;
951*4882a593Smuzhiyun 		bclk = 0x4b;
952*4882a593Smuzhiyun 	} else if (srate < 7000000) {
953*4882a593Smuzhiyun 		aclk = 0xb7;
954*4882a593Smuzhiyun 		bclk = 0x4f;
955*4882a593Smuzhiyun 	} else if (srate < 14000000) {
956*4882a593Smuzhiyun 		aclk = 0xb7;
957*4882a593Smuzhiyun 		bclk = 0x53;
958*4882a593Smuzhiyun 	} else if (srate < 30000000) {
959*4882a593Smuzhiyun 		aclk = 0xb6;
960*4882a593Smuzhiyun 		bclk = 0x53;
961*4882a593Smuzhiyun 	} else if (srate < 45000000) {
962*4882a593Smuzhiyun 		aclk = 0xb4;
963*4882a593Smuzhiyun 		bclk = 0x51;
964*4882a593Smuzhiyun 	}
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 	stv0299_writereg(fe, 0x13, aclk);
967*4882a593Smuzhiyun 	stv0299_writereg(fe, 0x14, bclk);
968*4882a593Smuzhiyun 	stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
969*4882a593Smuzhiyun 	stv0299_writereg(fe, 0x20, (ratio >>  8) & 0xff);
970*4882a593Smuzhiyun 	stv0299_writereg(fe, 0x21, ratio & 0xf0);
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 	return 0;
973*4882a593Smuzhiyun }
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun static const struct stv0299_config samsung_stv0299_config = {
976*4882a593Smuzhiyun 	.demod_address = 0x68,
977*4882a593Smuzhiyun 	.inittab = samsung_smt_7020_inittab,
978*4882a593Smuzhiyun 	.mclk = 88000000UL,
979*4882a593Smuzhiyun 	.invert = 0,
980*4882a593Smuzhiyun 	.skip_reinit = 0,
981*4882a593Smuzhiyun 	.lock_output = STV0299_LOCKOUTPUT_LK,
982*4882a593Smuzhiyun 	.volt13_op0_op1 = STV0299_VOLT13_OP1,
983*4882a593Smuzhiyun 	.min_delay_ms = 100,
984*4882a593Smuzhiyun 	.set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
985*4882a593Smuzhiyun };
986*4882a593Smuzhiyun 
dvb_register(struct cx8802_dev * dev)987*4882a593Smuzhiyun static int dvb_register(struct cx8802_dev *dev)
988*4882a593Smuzhiyun {
989*4882a593Smuzhiyun 	struct cx88_core *core = dev->core;
990*4882a593Smuzhiyun 	struct vb2_dvb_frontend *fe0, *fe1 = NULL;
991*4882a593Smuzhiyun 	int mfe_shared = 0; /* bus not shared by default */
992*4882a593Smuzhiyun 	int res = -EINVAL;
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun 	if (core->i2c_rc != 0) {
995*4882a593Smuzhiyun 		pr_err("no i2c-bus available, cannot attach dvb drivers\n");
996*4882a593Smuzhiyun 		goto frontend_detach;
997*4882a593Smuzhiyun 	}
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 	/* Get the first frontend */
1000*4882a593Smuzhiyun 	fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
1001*4882a593Smuzhiyun 	if (!fe0)
1002*4882a593Smuzhiyun 		goto frontend_detach;
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun 	/* multi-frontend gate control is undefined or defaults to fe0 */
1005*4882a593Smuzhiyun 	dev->frontends.gate = 0;
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun 	/* Sets the gate control callback to be used by i2c command calls */
1008*4882a593Smuzhiyun 	core->gate_ctrl = cx88_dvb_gate_ctrl;
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	/* init frontend(s) */
1011*4882a593Smuzhiyun 	switch (core->boardnr) {
1012*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_DVB_T1:
1013*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1014*4882a593Smuzhiyun 					       &connexant_refboard_config,
1015*4882a593Smuzhiyun 					       &core->i2c_adap);
1016*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1017*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1018*4882a593Smuzhiyun 					0x61, &core->i2c_adap,
1019*4882a593Smuzhiyun 					DVB_PLL_THOMSON_DTT759X))
1020*4882a593Smuzhiyun 				goto frontend_detach;
1021*4882a593Smuzhiyun 		}
1022*4882a593Smuzhiyun 		break;
1023*4882a593Smuzhiyun 	case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
1024*4882a593Smuzhiyun 	case CX88_BOARD_CONEXANT_DVB_T1:
1025*4882a593Smuzhiyun 	case CX88_BOARD_KWORLD_DVB_T_CX22702:
1026*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1000:
1027*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1028*4882a593Smuzhiyun 					       &connexant_refboard_config,
1029*4882a593Smuzhiyun 					       &core->i2c_adap);
1030*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1031*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1032*4882a593Smuzhiyun 					0x60, &core->i2c_adap,
1033*4882a593Smuzhiyun 					DVB_PLL_THOMSON_DTT7579))
1034*4882a593Smuzhiyun 				goto frontend_detach;
1035*4882a593Smuzhiyun 		}
1036*4882a593Smuzhiyun 		break;
1037*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H:
1038*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR1100:
1039*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1040*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR1300:
1041*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1042*4882a593Smuzhiyun 					       &hauppauge_hvr_config,
1043*4882a593Smuzhiyun 					       &core->i2c_adap);
1044*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1045*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1046*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1047*4882a593Smuzhiyun 					TUNER_PHILIPS_FMD1216ME_MK3))
1048*4882a593Smuzhiyun 				goto frontend_detach;
1049*4882a593Smuzhiyun 		}
1050*4882a593Smuzhiyun 		break;
1051*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H_J:
1052*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx22702_attach,
1053*4882a593Smuzhiyun 					       &hauppauge_hvr_config,
1054*4882a593Smuzhiyun 					       &core->i2c_adap);
1055*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1056*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1057*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1058*4882a593Smuzhiyun 					TUNER_PHILIPS_FMD1216MEX_MK3))
1059*4882a593Smuzhiyun 				goto frontend_detach;
1060*4882a593Smuzhiyun 		}
1061*4882a593Smuzhiyun 		break;
1062*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR3000:
1063*4882a593Smuzhiyun 		/* MFE frontend 1 */
1064*4882a593Smuzhiyun 		mfe_shared = 1;
1065*4882a593Smuzhiyun 		dev->frontends.gate = 2;
1066*4882a593Smuzhiyun 		/* DVB-S init */
1067*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1068*4882a593Smuzhiyun 					       &hauppauge_novas_config,
1069*4882a593Smuzhiyun 					       &dev->core->i2c_adap);
1070*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1071*4882a593Smuzhiyun 			if (!dvb_attach(isl6421_attach,
1072*4882a593Smuzhiyun 					fe0->dvb.frontend,
1073*4882a593Smuzhiyun 					&dev->core->i2c_adap,
1074*4882a593Smuzhiyun 					0x08, ISL6421_DCL, 0x00, false))
1075*4882a593Smuzhiyun 				goto frontend_detach;
1076*4882a593Smuzhiyun 		}
1077*4882a593Smuzhiyun 		/* MFE frontend 2 */
1078*4882a593Smuzhiyun 		fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1079*4882a593Smuzhiyun 		if (!fe1)
1080*4882a593Smuzhiyun 			goto frontend_detach;
1081*4882a593Smuzhiyun 		/* DVB-T init */
1082*4882a593Smuzhiyun 		fe1->dvb.frontend = dvb_attach(cx22702_attach,
1083*4882a593Smuzhiyun 					       &hauppauge_hvr_config,
1084*4882a593Smuzhiyun 					       &dev->core->i2c_adap);
1085*4882a593Smuzhiyun 		if (fe1->dvb.frontend) {
1086*4882a593Smuzhiyun 			fe1->dvb.frontend->id = 1;
1087*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach,
1088*4882a593Smuzhiyun 					fe1->dvb.frontend,
1089*4882a593Smuzhiyun 					&dev->core->i2c_adap,
1090*4882a593Smuzhiyun 					0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1091*4882a593Smuzhiyun 				goto frontend_detach;
1092*4882a593Smuzhiyun 		}
1093*4882a593Smuzhiyun 		break;
1094*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
1095*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1096*4882a593Smuzhiyun 					       &dvico_fusionhdtv,
1097*4882a593Smuzhiyun 					       &core->i2c_adap);
1098*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1099*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1100*4882a593Smuzhiyun 					0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1101*4882a593Smuzhiyun 				goto frontend_detach;
1102*4882a593Smuzhiyun 			break;
1103*4882a593Smuzhiyun 		}
1104*4882a593Smuzhiyun 		/* ZL10353 replaces MT352 on later cards */
1105*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1106*4882a593Smuzhiyun 					       &dvico_fusionhdtv_plus_v1_1,
1107*4882a593Smuzhiyun 					       &core->i2c_adap);
1108*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1109*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1110*4882a593Smuzhiyun 					0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1111*4882a593Smuzhiyun 				goto frontend_detach;
1112*4882a593Smuzhiyun 		}
1113*4882a593Smuzhiyun 		break;
1114*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
1115*4882a593Smuzhiyun 		/*
1116*4882a593Smuzhiyun 		 * The tin box says DEE1601, but it seems to be DTT7579
1117*4882a593Smuzhiyun 		 * compatible, with a slightly different MT352 AGC gain.
1118*4882a593Smuzhiyun 		 */
1119*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1120*4882a593Smuzhiyun 					       &dvico_fusionhdtv_dual,
1121*4882a593Smuzhiyun 					       &core->i2c_adap);
1122*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1123*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1124*4882a593Smuzhiyun 					0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1125*4882a593Smuzhiyun 				goto frontend_detach;
1126*4882a593Smuzhiyun 			break;
1127*4882a593Smuzhiyun 		}
1128*4882a593Smuzhiyun 		/* ZL10353 replaces MT352 on later cards */
1129*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1130*4882a593Smuzhiyun 					       &dvico_fusionhdtv_plus_v1_1,
1131*4882a593Smuzhiyun 					       &core->i2c_adap);
1132*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1133*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1134*4882a593Smuzhiyun 					0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1135*4882a593Smuzhiyun 				goto frontend_detach;
1136*4882a593Smuzhiyun 		}
1137*4882a593Smuzhiyun 		break;
1138*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1139*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1140*4882a593Smuzhiyun 					       &dvico_fusionhdtv,
1141*4882a593Smuzhiyun 					       &core->i2c_adap);
1142*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1143*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1144*4882a593Smuzhiyun 					0x61, NULL, DVB_PLL_LG_Z201))
1145*4882a593Smuzhiyun 				goto frontend_detach;
1146*4882a593Smuzhiyun 		}
1147*4882a593Smuzhiyun 		break;
1148*4882a593Smuzhiyun 	case CX88_BOARD_KWORLD_DVB_T:
1149*4882a593Smuzhiyun 	case CX88_BOARD_DNTV_LIVE_DVB_T:
1150*4882a593Smuzhiyun 	case CX88_BOARD_ADSTECH_DVB_T_PCI:
1151*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1152*4882a593Smuzhiyun 					       &dntv_live_dvbt_config,
1153*4882a593Smuzhiyun 					       &core->i2c_adap);
1154*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1155*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1156*4882a593Smuzhiyun 					0x61, NULL, DVB_PLL_UNKNOWN_1))
1157*4882a593Smuzhiyun 				goto frontend_detach;
1158*4882a593Smuzhiyun 		}
1159*4882a593Smuzhiyun 		break;
1160*4882a593Smuzhiyun 	case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1161*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
1162*4882a593Smuzhiyun 		/* MT352 is on a secondary I2C bus made from some GPIO lines */
1163*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(mt352_attach,
1164*4882a593Smuzhiyun 					       &dntv_live_dvbt_pro_config,
1165*4882a593Smuzhiyun 					       &dev->vp3054->adap);
1166*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1167*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1168*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1169*4882a593Smuzhiyun 					TUNER_PHILIPS_FMD1216ME_MK3))
1170*4882a593Smuzhiyun 				goto frontend_detach;
1171*4882a593Smuzhiyun 		}
1172*4882a593Smuzhiyun #else
1173*4882a593Smuzhiyun 		pr_err("built without vp3054 support\n");
1174*4882a593Smuzhiyun #endif
1175*4882a593Smuzhiyun 		break;
1176*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1177*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1178*4882a593Smuzhiyun 					       &dvico_fusionhdtv_hybrid,
1179*4882a593Smuzhiyun 					       &core->i2c_adap);
1180*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1181*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1182*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1183*4882a593Smuzhiyun 					TUNER_THOMSON_FE6600))
1184*4882a593Smuzhiyun 				goto frontend_detach;
1185*4882a593Smuzhiyun 		}
1186*4882a593Smuzhiyun 		break;
1187*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1188*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1189*4882a593Smuzhiyun 					       &dvico_fusionhdtv_xc3028,
1190*4882a593Smuzhiyun 					       &core->i2c_adap);
1191*4882a593Smuzhiyun 		if (!fe0->dvb.frontend)
1192*4882a593Smuzhiyun 			fe0->dvb.frontend = dvb_attach(mt352_attach,
1193*4882a593Smuzhiyun 						&dvico_fusionhdtv_mt352_xc3028,
1194*4882a593Smuzhiyun 						&core->i2c_adap);
1195*4882a593Smuzhiyun 		/*
1196*4882a593Smuzhiyun 		 * On this board, the demod provides the I2C bus pullup.
1197*4882a593Smuzhiyun 		 * We must not permit gate_ctrl to be performed, or
1198*4882a593Smuzhiyun 		 * the xc3028 cannot communicate on the bus.
1199*4882a593Smuzhiyun 		 */
1200*4882a593Smuzhiyun 		if (fe0->dvb.frontend)
1201*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1202*4882a593Smuzhiyun 		if (attach_xc3028(0x61, dev) < 0)
1203*4882a593Smuzhiyun 			goto frontend_detach;
1204*4882a593Smuzhiyun 		break;
1205*4882a593Smuzhiyun 	case CX88_BOARD_PCHDTV_HD3000:
1206*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1207*4882a593Smuzhiyun 					       &core->i2c_adap);
1208*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1209*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1210*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1211*4882a593Smuzhiyun 					TUNER_THOMSON_DTT761X))
1212*4882a593Smuzhiyun 				goto frontend_detach;
1213*4882a593Smuzhiyun 		}
1214*4882a593Smuzhiyun 		break;
1215*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1216*4882a593Smuzhiyun 		dev->ts_gen_cntrl = 0x08;
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun 		/* Do a hardware reset of chip before using it. */
1219*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 1);
1220*4882a593Smuzhiyun 		msleep(100);
1221*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 1);
1222*4882a593Smuzhiyun 		msleep(200);
1223*4882a593Smuzhiyun 
1224*4882a593Smuzhiyun 		/* Select RF connector callback */
1225*4882a593Smuzhiyun 		fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1226*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1227*4882a593Smuzhiyun 					       &fusionhdtv_3_gold,
1228*4882a593Smuzhiyun 					       0x0e,
1229*4882a593Smuzhiyun 					       &core->i2c_adap);
1230*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1231*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1232*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1233*4882a593Smuzhiyun 					TUNER_MICROTUNE_4042FI5))
1234*4882a593Smuzhiyun 				goto frontend_detach;
1235*4882a593Smuzhiyun 		}
1236*4882a593Smuzhiyun 		break;
1237*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1238*4882a593Smuzhiyun 		dev->ts_gen_cntrl = 0x08;
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun 		/* Do a hardware reset of chip before using it. */
1241*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 1);
1242*4882a593Smuzhiyun 		msleep(100);
1243*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 9);
1244*4882a593Smuzhiyun 		msleep(200);
1245*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1246*4882a593Smuzhiyun 					       &fusionhdtv_3_gold,
1247*4882a593Smuzhiyun 					       0x0e,
1248*4882a593Smuzhiyun 					       &core->i2c_adap);
1249*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1250*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1251*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1252*4882a593Smuzhiyun 					TUNER_THOMSON_DTT761X))
1253*4882a593Smuzhiyun 				goto frontend_detach;
1254*4882a593Smuzhiyun 		}
1255*4882a593Smuzhiyun 		break;
1256*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1257*4882a593Smuzhiyun 		dev->ts_gen_cntrl = 0x08;
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun 		/* Do a hardware reset of chip before using it. */
1260*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 1);
1261*4882a593Smuzhiyun 		msleep(100);
1262*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 1);
1263*4882a593Smuzhiyun 		msleep(200);
1264*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1265*4882a593Smuzhiyun 					       &fusionhdtv_5_gold,
1266*4882a593Smuzhiyun 					       0x0e,
1267*4882a593Smuzhiyun 					       &core->i2c_adap);
1268*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1269*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1270*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1271*4882a593Smuzhiyun 					TUNER_LG_TDVS_H06XF))
1272*4882a593Smuzhiyun 				goto frontend_detach;
1273*4882a593Smuzhiyun 			if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1274*4882a593Smuzhiyun 					&core->i2c_adap, 0x43))
1275*4882a593Smuzhiyun 				goto frontend_detach;
1276*4882a593Smuzhiyun 		}
1277*4882a593Smuzhiyun 		break;
1278*4882a593Smuzhiyun 	case CX88_BOARD_PCHDTV_HD5500:
1279*4882a593Smuzhiyun 		dev->ts_gen_cntrl = 0x08;
1280*4882a593Smuzhiyun 
1281*4882a593Smuzhiyun 		/* Do a hardware reset of chip before using it. */
1282*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 1);
1283*4882a593Smuzhiyun 		msleep(100);
1284*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 1);
1285*4882a593Smuzhiyun 		msleep(200);
1286*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1287*4882a593Smuzhiyun 					       &pchdtv_hd5500,
1288*4882a593Smuzhiyun 					       0x59,
1289*4882a593Smuzhiyun 					       &core->i2c_adap);
1290*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1291*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1292*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1293*4882a593Smuzhiyun 					TUNER_LG_TDVS_H06XF))
1294*4882a593Smuzhiyun 				goto frontend_detach;
1295*4882a593Smuzhiyun 			if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1296*4882a593Smuzhiyun 					&core->i2c_adap, 0x43))
1297*4882a593Smuzhiyun 				goto frontend_detach;
1298*4882a593Smuzhiyun 		}
1299*4882a593Smuzhiyun 		break;
1300*4882a593Smuzhiyun 	case CX88_BOARD_ATI_HDTVWONDER:
1301*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1302*4882a593Smuzhiyun 					       &ati_hdtvwonder,
1303*4882a593Smuzhiyun 					       &core->i2c_adap);
1304*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1305*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1306*4882a593Smuzhiyun 					&core->i2c_adap, 0x61,
1307*4882a593Smuzhiyun 					TUNER_PHILIPS_TUV1236D))
1308*4882a593Smuzhiyun 				goto frontend_detach;
1309*4882a593Smuzhiyun 		}
1310*4882a593Smuzhiyun 		break;
1311*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1312*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1313*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1314*4882a593Smuzhiyun 					       &hauppauge_novas_config,
1315*4882a593Smuzhiyun 					       &core->i2c_adap);
1316*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1317*4882a593Smuzhiyun 			bool override_tone;
1318*4882a593Smuzhiyun 
1319*4882a593Smuzhiyun 			if (core->model == 92001)
1320*4882a593Smuzhiyun 				override_tone = true;
1321*4882a593Smuzhiyun 			else
1322*4882a593Smuzhiyun 				override_tone = false;
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun 			if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1325*4882a593Smuzhiyun 					&core->i2c_adap, 0x08, ISL6421_DCL,
1326*4882a593Smuzhiyun 					0x00, override_tone))
1327*4882a593Smuzhiyun 				goto frontend_detach;
1328*4882a593Smuzhiyun 		}
1329*4882a593Smuzhiyun 		break;
1330*4882a593Smuzhiyun 	case CX88_BOARD_KWORLD_DVBS_100:
1331*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1332*4882a593Smuzhiyun 					       &kworld_dvbs_100_config,
1333*4882a593Smuzhiyun 					       &core->i2c_adap);
1334*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1335*4882a593Smuzhiyun 			core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1336*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1337*4882a593Smuzhiyun 		}
1338*4882a593Smuzhiyun 		break;
1339*4882a593Smuzhiyun 	case CX88_BOARD_GENIATECH_DVBS:
1340*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24123_attach,
1341*4882a593Smuzhiyun 					       &geniatech_dvbs_config,
1342*4882a593Smuzhiyun 					       &core->i2c_adap);
1343*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1344*4882a593Smuzhiyun 			core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1345*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1346*4882a593Smuzhiyun 		}
1347*4882a593Smuzhiyun 		break;
1348*4882a593Smuzhiyun 	case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1349*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1350*4882a593Smuzhiyun 					       &pinnacle_pctv_hd_800i_config,
1351*4882a593Smuzhiyun 					       &core->i2c_adap);
1352*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1353*4882a593Smuzhiyun 			if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1354*4882a593Smuzhiyun 					&core->i2c_adap,
1355*4882a593Smuzhiyun 					&pinnacle_pctv_hd_800i_tuner_config))
1356*4882a593Smuzhiyun 				goto frontend_detach;
1357*4882a593Smuzhiyun 		}
1358*4882a593Smuzhiyun 		break;
1359*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1360*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1361*4882a593Smuzhiyun 					       &dvico_hdtv5_pci_nano_config,
1362*4882a593Smuzhiyun 					       &core->i2c_adap);
1363*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1364*4882a593Smuzhiyun 			struct dvb_frontend *fe;
1365*4882a593Smuzhiyun 			struct xc2028_config cfg = {
1366*4882a593Smuzhiyun 				.i2c_adap  = &core->i2c_adap,
1367*4882a593Smuzhiyun 				.i2c_addr  = 0x61,
1368*4882a593Smuzhiyun 			};
1369*4882a593Smuzhiyun 			static struct xc2028_ctrl ctl = {
1370*4882a593Smuzhiyun 				.fname       = XC2028_DEFAULT_FIRMWARE,
1371*4882a593Smuzhiyun 				.max_len     = 64,
1372*4882a593Smuzhiyun 				.scode_table = XC3028_FE_OREN538,
1373*4882a593Smuzhiyun 			};
1374*4882a593Smuzhiyun 
1375*4882a593Smuzhiyun 			fe = dvb_attach(xc2028_attach,
1376*4882a593Smuzhiyun 					fe0->dvb.frontend, &cfg);
1377*4882a593Smuzhiyun 			if (fe && fe->ops.tuner_ops.set_config)
1378*4882a593Smuzhiyun 				fe->ops.tuner_ops.set_config(fe, &ctl);
1379*4882a593Smuzhiyun 		}
1380*4882a593Smuzhiyun 		break;
1381*4882a593Smuzhiyun 	case CX88_BOARD_NOTONLYTV_LV3H:
1382*4882a593Smuzhiyun 	case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1383*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1800H:
1384*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1385*4882a593Smuzhiyun 					       &cx88_pinnacle_hybrid_pctv,
1386*4882a593Smuzhiyun 					       &core->i2c_adap);
1387*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1388*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1389*4882a593Smuzhiyun 			if (attach_xc3028(0x61, dev) < 0)
1390*4882a593Smuzhiyun 				goto frontend_detach;
1391*4882a593Smuzhiyun 		}
1392*4882a593Smuzhiyun 		break;
1393*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV1800H_XC4000:
1394*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1395*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1396*4882a593Smuzhiyun 					       &cx88_pinnacle_hybrid_pctv,
1397*4882a593Smuzhiyun 					       &core->i2c_adap);
1398*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1399*4882a593Smuzhiyun 			struct xc4000_config cfg = {
1400*4882a593Smuzhiyun 				.i2c_address	  = 0x61,
1401*4882a593Smuzhiyun 				.default_pm	  = 0,
1402*4882a593Smuzhiyun 				.dvb_amplitude	  = 134,
1403*4882a593Smuzhiyun 				.set_smoothedcvbs = 1,
1404*4882a593Smuzhiyun 				.if_khz		  = 4560
1405*4882a593Smuzhiyun 			};
1406*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1407*4882a593Smuzhiyun 			if (attach_xc4000(dev, &cfg) < 0)
1408*4882a593Smuzhiyun 				goto frontend_detach;
1409*4882a593Smuzhiyun 		}
1410*4882a593Smuzhiyun 		break;
1411*4882a593Smuzhiyun 	case CX88_BOARD_GENIATECH_X8000_MT:
1412*4882a593Smuzhiyun 		dev->ts_gen_cntrl = 0x00;
1413*4882a593Smuzhiyun 
1414*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1415*4882a593Smuzhiyun 					       &cx88_geniatech_x8000_mt,
1416*4882a593Smuzhiyun 					       &core->i2c_adap);
1417*4882a593Smuzhiyun 		if (attach_xc3028(0x61, dev) < 0)
1418*4882a593Smuzhiyun 			goto frontend_detach;
1419*4882a593Smuzhiyun 		break;
1420*4882a593Smuzhiyun 	case CX88_BOARD_KWORLD_ATSC_120:
1421*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1422*4882a593Smuzhiyun 					       &kworld_atsc_120_config,
1423*4882a593Smuzhiyun 					       &core->i2c_adap);
1424*4882a593Smuzhiyun 		if (attach_xc3028(0x61, dev) < 0)
1425*4882a593Smuzhiyun 			goto frontend_detach;
1426*4882a593Smuzhiyun 		break;
1427*4882a593Smuzhiyun 	case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1428*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1429*4882a593Smuzhiyun 					       &dvico_fusionhdtv7_config,
1430*4882a593Smuzhiyun 					       &core->i2c_adap);
1431*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1432*4882a593Smuzhiyun 			if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1433*4882a593Smuzhiyun 					&core->i2c_adap,
1434*4882a593Smuzhiyun 					&dvico_fusionhdtv7_tuner_config))
1435*4882a593Smuzhiyun 				goto frontend_detach;
1436*4882a593Smuzhiyun 		}
1437*4882a593Smuzhiyun 		break;
1438*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR4000:
1439*4882a593Smuzhiyun 		/* MFE frontend 1 */
1440*4882a593Smuzhiyun 		mfe_shared = 1;
1441*4882a593Smuzhiyun 		dev->frontends.gate = 2;
1442*4882a593Smuzhiyun 		/* DVB-S/S2 Init */
1443*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1444*4882a593Smuzhiyun 					       &hauppauge_hvr4000_config,
1445*4882a593Smuzhiyun 					       &dev->core->i2c_adap);
1446*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1447*4882a593Smuzhiyun 			if (!dvb_attach(isl6421_attach,
1448*4882a593Smuzhiyun 					fe0->dvb.frontend,
1449*4882a593Smuzhiyun 					&dev->core->i2c_adap,
1450*4882a593Smuzhiyun 					0x08, ISL6421_DCL, 0x00, false))
1451*4882a593Smuzhiyun 				goto frontend_detach;
1452*4882a593Smuzhiyun 		}
1453*4882a593Smuzhiyun 		/* MFE frontend 2 */
1454*4882a593Smuzhiyun 		fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1455*4882a593Smuzhiyun 		if (!fe1)
1456*4882a593Smuzhiyun 			goto frontend_detach;
1457*4882a593Smuzhiyun 		/* DVB-T Init */
1458*4882a593Smuzhiyun 		fe1->dvb.frontend = dvb_attach(cx22702_attach,
1459*4882a593Smuzhiyun 					       &hauppauge_hvr_config,
1460*4882a593Smuzhiyun 					       &dev->core->i2c_adap);
1461*4882a593Smuzhiyun 		if (fe1->dvb.frontend) {
1462*4882a593Smuzhiyun 			fe1->dvb.frontend->id = 1;
1463*4882a593Smuzhiyun 			if (!dvb_attach(simple_tuner_attach,
1464*4882a593Smuzhiyun 					fe1->dvb.frontend,
1465*4882a593Smuzhiyun 					&dev->core->i2c_adap,
1466*4882a593Smuzhiyun 					0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1467*4882a593Smuzhiyun 				goto frontend_detach;
1468*4882a593Smuzhiyun 		}
1469*4882a593Smuzhiyun 		break;
1470*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1471*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1472*4882a593Smuzhiyun 					       &hauppauge_hvr4000_config,
1473*4882a593Smuzhiyun 					       &dev->core->i2c_adap);
1474*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1475*4882a593Smuzhiyun 			if (!dvb_attach(isl6421_attach,
1476*4882a593Smuzhiyun 					fe0->dvb.frontend,
1477*4882a593Smuzhiyun 					&dev->core->i2c_adap,
1478*4882a593Smuzhiyun 					0x08, ISL6421_DCL, 0x00, false))
1479*4882a593Smuzhiyun 				goto frontend_detach;
1480*4882a593Smuzhiyun 		}
1481*4882a593Smuzhiyun 		break;
1482*4882a593Smuzhiyun 	case CX88_BOARD_PROF_6200:
1483*4882a593Smuzhiyun 	case CX88_BOARD_TBS_8910:
1484*4882a593Smuzhiyun 	case CX88_BOARD_TEVII_S420:
1485*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(stv0299_attach,
1486*4882a593Smuzhiyun 						&tevii_tuner_sharp_config,
1487*4882a593Smuzhiyun 						&core->i2c_adap);
1488*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1489*4882a593Smuzhiyun 			if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1490*4882a593Smuzhiyun 					&core->i2c_adap, DVB_PLL_OPERA1))
1491*4882a593Smuzhiyun 				goto frontend_detach;
1492*4882a593Smuzhiyun 			core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1493*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1494*4882a593Smuzhiyun 
1495*4882a593Smuzhiyun 		} else {
1496*4882a593Smuzhiyun 			fe0->dvb.frontend = dvb_attach(stv0288_attach,
1497*4882a593Smuzhiyun 							    &tevii_tuner_earda_config,
1498*4882a593Smuzhiyun 							    &core->i2c_adap);
1499*4882a593Smuzhiyun 			if (fe0->dvb.frontend) {
1500*4882a593Smuzhiyun 				if (!dvb_attach(stb6000_attach,
1501*4882a593Smuzhiyun 						fe0->dvb.frontend, 0x61,
1502*4882a593Smuzhiyun 						&core->i2c_adap))
1503*4882a593Smuzhiyun 					goto frontend_detach;
1504*4882a593Smuzhiyun 				core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1505*4882a593Smuzhiyun 				fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1506*4882a593Smuzhiyun 			}
1507*4882a593Smuzhiyun 		}
1508*4882a593Smuzhiyun 		break;
1509*4882a593Smuzhiyun 	case CX88_BOARD_TEVII_S460:
1510*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1511*4882a593Smuzhiyun 					       &tevii_s460_config,
1512*4882a593Smuzhiyun 					       &core->i2c_adap);
1513*4882a593Smuzhiyun 		if (fe0->dvb.frontend)
1514*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1515*4882a593Smuzhiyun 		break;
1516*4882a593Smuzhiyun 	case CX88_BOARD_TEVII_S464:
1517*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(ds3000_attach,
1518*4882a593Smuzhiyun 						&tevii_ds3000_config,
1519*4882a593Smuzhiyun 						&core->i2c_adap);
1520*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1521*4882a593Smuzhiyun 			dvb_attach(ts2020_attach, fe0->dvb.frontend,
1522*4882a593Smuzhiyun 				   &tevii_ts2020_config, &core->i2c_adap);
1523*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage =
1524*4882a593Smuzhiyun 							tevii_dvbs_set_voltage;
1525*4882a593Smuzhiyun 		}
1526*4882a593Smuzhiyun 		break;
1527*4882a593Smuzhiyun 	case CX88_BOARD_OMICOM_SS4_PCI:
1528*4882a593Smuzhiyun 	case CX88_BOARD_TBS_8920:
1529*4882a593Smuzhiyun 	case CX88_BOARD_PROF_7300:
1530*4882a593Smuzhiyun 	case CX88_BOARD_SATTRADE_ST4200:
1531*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(cx24116_attach,
1532*4882a593Smuzhiyun 					       &hauppauge_hvr4000_config,
1533*4882a593Smuzhiyun 					       &core->i2c_adap);
1534*4882a593Smuzhiyun 		if (fe0->dvb.frontend)
1535*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1536*4882a593Smuzhiyun 		break;
1537*4882a593Smuzhiyun 	case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1538*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(zl10353_attach,
1539*4882a593Smuzhiyun 					       &cx88_terratec_cinergy_ht_pci_mkii_config,
1540*4882a593Smuzhiyun 					       &core->i2c_adap);
1541*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1542*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1543*4882a593Smuzhiyun 			if (attach_xc3028(0x61, dev) < 0)
1544*4882a593Smuzhiyun 				goto frontend_detach;
1545*4882a593Smuzhiyun 		}
1546*4882a593Smuzhiyun 		break;
1547*4882a593Smuzhiyun 	case CX88_BOARD_PROF_7301:{
1548*4882a593Smuzhiyun 		struct dvb_tuner_ops *tuner_ops = NULL;
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(stv0900_attach,
1551*4882a593Smuzhiyun 					       &prof_7301_stv0900_config,
1552*4882a593Smuzhiyun 					       &core->i2c_adap, 0);
1553*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1554*4882a593Smuzhiyun 			if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1555*4882a593Smuzhiyun 					&prof_7301_stb6100_config,
1556*4882a593Smuzhiyun 					&core->i2c_adap))
1557*4882a593Smuzhiyun 				goto frontend_detach;
1558*4882a593Smuzhiyun 
1559*4882a593Smuzhiyun 			tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1560*4882a593Smuzhiyun 			tuner_ops->set_frequency = stb6100_set_freq;
1561*4882a593Smuzhiyun 			tuner_ops->get_frequency = stb6100_get_freq;
1562*4882a593Smuzhiyun 			tuner_ops->set_bandwidth = stb6100_set_bandw;
1563*4882a593Smuzhiyun 			tuner_ops->get_bandwidth = stb6100_get_bandw;
1564*4882a593Smuzhiyun 
1565*4882a593Smuzhiyun 			core->prev_set_voltage =
1566*4882a593Smuzhiyun 					fe0->dvb.frontend->ops.set_voltage;
1567*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage =
1568*4882a593Smuzhiyun 					tevii_dvbs_set_voltage;
1569*4882a593Smuzhiyun 		}
1570*4882a593Smuzhiyun 		break;
1571*4882a593Smuzhiyun 		}
1572*4882a593Smuzhiyun 	case CX88_BOARD_SAMSUNG_SMT_7020:
1573*4882a593Smuzhiyun 		dev->ts_gen_cntrl = 0x08;
1574*4882a593Smuzhiyun 
1575*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x0101);
1576*4882a593Smuzhiyun 
1577*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x01);
1578*4882a593Smuzhiyun 		msleep(100);
1579*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x01);
1580*4882a593Smuzhiyun 		msleep(200);
1581*4882a593Smuzhiyun 
1582*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(stv0299_attach,
1583*4882a593Smuzhiyun 					       &samsung_stv0299_config,
1584*4882a593Smuzhiyun 					       &dev->core->i2c_adap);
1585*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1586*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.tuner_ops.set_params =
1587*4882a593Smuzhiyun 				samsung_smt_7020_tuner_set_params;
1588*4882a593Smuzhiyun 			fe0->dvb.frontend->tuner_priv =
1589*4882a593Smuzhiyun 				&dev->core->i2c_adap;
1590*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage =
1591*4882a593Smuzhiyun 				samsung_smt_7020_set_voltage;
1592*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_tone =
1593*4882a593Smuzhiyun 				samsung_smt_7020_set_tone;
1594*4882a593Smuzhiyun 		}
1595*4882a593Smuzhiyun 
1596*4882a593Smuzhiyun 		break;
1597*4882a593Smuzhiyun 	case CX88_BOARD_TWINHAN_VP1027_DVBS:
1598*4882a593Smuzhiyun 		dev->ts_gen_cntrl = 0x00;
1599*4882a593Smuzhiyun 		fe0->dvb.frontend = dvb_attach(mb86a16_attach,
1600*4882a593Smuzhiyun 					       &twinhan_vp1027,
1601*4882a593Smuzhiyun 					       &core->i2c_adap);
1602*4882a593Smuzhiyun 		if (fe0->dvb.frontend) {
1603*4882a593Smuzhiyun 			core->prev_set_voltage =
1604*4882a593Smuzhiyun 					fe0->dvb.frontend->ops.set_voltage;
1605*4882a593Smuzhiyun 			fe0->dvb.frontend->ops.set_voltage =
1606*4882a593Smuzhiyun 					vp1027_set_voltage;
1607*4882a593Smuzhiyun 		}
1608*4882a593Smuzhiyun 		break;
1609*4882a593Smuzhiyun 
1610*4882a593Smuzhiyun 	default:
1611*4882a593Smuzhiyun 		pr_err("The frontend of your DVB/ATSC card isn't supported yet\n");
1612*4882a593Smuzhiyun 		break;
1613*4882a593Smuzhiyun 	}
1614*4882a593Smuzhiyun 
1615*4882a593Smuzhiyun 	if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1616*4882a593Smuzhiyun 		pr_err("frontend initialization failed\n");
1617*4882a593Smuzhiyun 		goto frontend_detach;
1618*4882a593Smuzhiyun 	}
1619*4882a593Smuzhiyun 	/* define general-purpose callback pointer */
1620*4882a593Smuzhiyun 	fe0->dvb.frontend->callback = cx88_tuner_callback;
1621*4882a593Smuzhiyun 
1622*4882a593Smuzhiyun 	/* Ensure all frontends negotiate bus access */
1623*4882a593Smuzhiyun 	fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1624*4882a593Smuzhiyun 	if (fe1)
1625*4882a593Smuzhiyun 		fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1626*4882a593Smuzhiyun 
1627*4882a593Smuzhiyun 	/* Put the tuner in standby to keep it quiet */
1628*4882a593Smuzhiyun 	call_all(core, tuner, standby);
1629*4882a593Smuzhiyun 
1630*4882a593Smuzhiyun 	/* register everything */
1631*4882a593Smuzhiyun 	res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1632*4882a593Smuzhiyun 				   &dev->pci->dev, NULL, adapter_nr,
1633*4882a593Smuzhiyun 				   mfe_shared);
1634*4882a593Smuzhiyun 	if (res)
1635*4882a593Smuzhiyun 		goto frontend_detach;
1636*4882a593Smuzhiyun 	return res;
1637*4882a593Smuzhiyun 
1638*4882a593Smuzhiyun frontend_detach:
1639*4882a593Smuzhiyun 	core->gate_ctrl = NULL;
1640*4882a593Smuzhiyun 	vb2_dvb_dealloc_frontends(&dev->frontends);
1641*4882a593Smuzhiyun 	return res;
1642*4882a593Smuzhiyun }
1643*4882a593Smuzhiyun 
1644*4882a593Smuzhiyun /* ----------------------------------------------------------- */
1645*4882a593Smuzhiyun 
1646*4882a593Smuzhiyun /* CX8802 MPEG -> mini driver - We have been given the hardware */
cx8802_dvb_advise_acquire(struct cx8802_driver * drv)1647*4882a593Smuzhiyun static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1648*4882a593Smuzhiyun {
1649*4882a593Smuzhiyun 	struct cx88_core *core = drv->core;
1650*4882a593Smuzhiyun 	int err = 0;
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun 	dprintk(1, "%s\n", __func__);
1653*4882a593Smuzhiyun 
1654*4882a593Smuzhiyun 	switch (core->boardnr) {
1655*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR1300:
1656*4882a593Smuzhiyun 		/* We arrive here with either the cx23416 or the cx22702
1657*4882a593Smuzhiyun 		 * on the bus. Take the bus from the cx23416 and enable the
1658*4882a593Smuzhiyun 		 * cx22702 demod
1659*4882a593Smuzhiyun 		 */
1660*4882a593Smuzhiyun 		/* Toggle reset on cx22702 leaving i2c active */
1661*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x00000080);
1662*4882a593Smuzhiyun 		udelay(1000);
1663*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x00000080);
1664*4882a593Smuzhiyun 		udelay(50);
1665*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x00000080);
1666*4882a593Smuzhiyun 		udelay(1000);
1667*4882a593Smuzhiyun 		/* enable the cx22702 pins */
1668*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x00000004);
1669*4882a593Smuzhiyun 		udelay(1000);
1670*4882a593Smuzhiyun 		break;
1671*4882a593Smuzhiyun 
1672*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR3000:
1673*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR4000:
1674*4882a593Smuzhiyun 		/* Toggle reset on cx22702 leaving i2c active */
1675*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x00000080);
1676*4882a593Smuzhiyun 		udelay(1000);
1677*4882a593Smuzhiyun 		cx_clear(MO_GP0_IO, 0x00000080);
1678*4882a593Smuzhiyun 		udelay(50);
1679*4882a593Smuzhiyun 		cx_set(MO_GP0_IO, 0x00000080);
1680*4882a593Smuzhiyun 		udelay(1000);
1681*4882a593Smuzhiyun 		switch (core->dvbdev->frontends.active_fe_id) {
1682*4882a593Smuzhiyun 		case 1: /* DVB-S/S2 Enabled */
1683*4882a593Smuzhiyun 			/* tri-state the cx22702 pins */
1684*4882a593Smuzhiyun 			cx_set(MO_GP0_IO, 0x00000004);
1685*4882a593Smuzhiyun 			/* Take the cx24116/cx24123 out of reset */
1686*4882a593Smuzhiyun 			cx_write(MO_SRST_IO, 1);
1687*4882a593Smuzhiyun 			core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1688*4882a593Smuzhiyun 			break;
1689*4882a593Smuzhiyun 		case 2: /* DVB-T Enabled */
1690*4882a593Smuzhiyun 			/* Put the cx24116/cx24123 into reset */
1691*4882a593Smuzhiyun 			cx_write(MO_SRST_IO, 0);
1692*4882a593Smuzhiyun 			/* enable the cx22702 pins */
1693*4882a593Smuzhiyun 			cx_clear(MO_GP0_IO, 0x00000004);
1694*4882a593Smuzhiyun 			core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1695*4882a593Smuzhiyun 			break;
1696*4882a593Smuzhiyun 		}
1697*4882a593Smuzhiyun 		udelay(1000);
1698*4882a593Smuzhiyun 		break;
1699*4882a593Smuzhiyun 
1700*4882a593Smuzhiyun 	case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1701*4882a593Smuzhiyun 		/* set RF input to AIR for DVB-T (GPIO 16) */
1702*4882a593Smuzhiyun 		cx_write(MO_GP2_IO, 0x0101);
1703*4882a593Smuzhiyun 		break;
1704*4882a593Smuzhiyun 
1705*4882a593Smuzhiyun 	default:
1706*4882a593Smuzhiyun 		err = -ENODEV;
1707*4882a593Smuzhiyun 	}
1708*4882a593Smuzhiyun 	return err;
1709*4882a593Smuzhiyun }
1710*4882a593Smuzhiyun 
1711*4882a593Smuzhiyun /* CX8802 MPEG -> mini driver - We no longer have the hardware */
cx8802_dvb_advise_release(struct cx8802_driver * drv)1712*4882a593Smuzhiyun static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1713*4882a593Smuzhiyun {
1714*4882a593Smuzhiyun 	struct cx88_core *core = drv->core;
1715*4882a593Smuzhiyun 	int err = 0;
1716*4882a593Smuzhiyun 
1717*4882a593Smuzhiyun 	dprintk(1, "%s\n", __func__);
1718*4882a593Smuzhiyun 
1719*4882a593Smuzhiyun 	switch (core->boardnr) {
1720*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR1300:
1721*4882a593Smuzhiyun 		/* Do Nothing, leave the cx22702 on the bus. */
1722*4882a593Smuzhiyun 		break;
1723*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR3000:
1724*4882a593Smuzhiyun 	case CX88_BOARD_HAUPPAUGE_HVR4000:
1725*4882a593Smuzhiyun 		break;
1726*4882a593Smuzhiyun 	default:
1727*4882a593Smuzhiyun 		err = -ENODEV;
1728*4882a593Smuzhiyun 	}
1729*4882a593Smuzhiyun 	return err;
1730*4882a593Smuzhiyun }
1731*4882a593Smuzhiyun 
cx8802_dvb_probe(struct cx8802_driver * drv)1732*4882a593Smuzhiyun static int cx8802_dvb_probe(struct cx8802_driver *drv)
1733*4882a593Smuzhiyun {
1734*4882a593Smuzhiyun 	struct cx88_core *core = drv->core;
1735*4882a593Smuzhiyun 	struct cx8802_dev *dev = drv->core->dvbdev;
1736*4882a593Smuzhiyun 	int err;
1737*4882a593Smuzhiyun 	struct vb2_dvb_frontend *fe;
1738*4882a593Smuzhiyun 	int i;
1739*4882a593Smuzhiyun 
1740*4882a593Smuzhiyun 	dprintk(1, "%s\n", __func__);
1741*4882a593Smuzhiyun 	dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1742*4882a593Smuzhiyun 		core->boardnr,
1743*4882a593Smuzhiyun 		core->name,
1744*4882a593Smuzhiyun 		core->pci_bus,
1745*4882a593Smuzhiyun 		core->pci_slot);
1746*4882a593Smuzhiyun 
1747*4882a593Smuzhiyun 	err = -ENODEV;
1748*4882a593Smuzhiyun 	if (!(core->board.mpeg & CX88_MPEG_DVB))
1749*4882a593Smuzhiyun 		goto fail_core;
1750*4882a593Smuzhiyun 
1751*4882a593Smuzhiyun 	/* If vp3054 isn't enabled, a stub will just return 0 */
1752*4882a593Smuzhiyun 	err = vp3054_i2c_probe(dev);
1753*4882a593Smuzhiyun 	if (err != 0)
1754*4882a593Smuzhiyun 		goto fail_core;
1755*4882a593Smuzhiyun 
1756*4882a593Smuzhiyun 	/* dvb stuff */
1757*4882a593Smuzhiyun 	pr_info("cx2388x based DVB/ATSC card\n");
1758*4882a593Smuzhiyun 	dev->ts_gen_cntrl = 0x0c;
1759*4882a593Smuzhiyun 
1760*4882a593Smuzhiyun 	err = cx8802_alloc_frontends(dev);
1761*4882a593Smuzhiyun 	if (err)
1762*4882a593Smuzhiyun 		goto fail_core;
1763*4882a593Smuzhiyun 
1764*4882a593Smuzhiyun 	for (i = 1; i <= core->board.num_frontends; i++) {
1765*4882a593Smuzhiyun 		struct vb2_queue *q;
1766*4882a593Smuzhiyun 
1767*4882a593Smuzhiyun 		fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
1768*4882a593Smuzhiyun 		if (!fe) {
1769*4882a593Smuzhiyun 			pr_err("%s() failed to get frontend(%d)\n",
1770*4882a593Smuzhiyun 			       __func__, i);
1771*4882a593Smuzhiyun 			err = -ENODEV;
1772*4882a593Smuzhiyun 			goto fail_probe;
1773*4882a593Smuzhiyun 		}
1774*4882a593Smuzhiyun 		q = &fe->dvb.dvbq;
1775*4882a593Smuzhiyun 		q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1776*4882a593Smuzhiyun 		q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1777*4882a593Smuzhiyun 		q->gfp_flags = GFP_DMA32;
1778*4882a593Smuzhiyun 		q->min_buffers_needed = 2;
1779*4882a593Smuzhiyun 		q->drv_priv = dev;
1780*4882a593Smuzhiyun 		q->buf_struct_size = sizeof(struct cx88_buffer);
1781*4882a593Smuzhiyun 		q->ops = &dvb_qops;
1782*4882a593Smuzhiyun 		q->mem_ops = &vb2_dma_sg_memops;
1783*4882a593Smuzhiyun 		q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1784*4882a593Smuzhiyun 		q->lock = &core->lock;
1785*4882a593Smuzhiyun 		q->dev = &dev->pci->dev;
1786*4882a593Smuzhiyun 
1787*4882a593Smuzhiyun 		err = vb2_queue_init(q);
1788*4882a593Smuzhiyun 		if (err < 0)
1789*4882a593Smuzhiyun 			goto fail_probe;
1790*4882a593Smuzhiyun 
1791*4882a593Smuzhiyun 		/* init struct vb2_dvb */
1792*4882a593Smuzhiyun 		fe->dvb.name = dev->core->name;
1793*4882a593Smuzhiyun 	}
1794*4882a593Smuzhiyun 
1795*4882a593Smuzhiyun 	err = dvb_register(dev);
1796*4882a593Smuzhiyun 	if (err)
1797*4882a593Smuzhiyun 		/* frontends/adapter de-allocated in dvb_register */
1798*4882a593Smuzhiyun 		pr_err("dvb_register failed (err = %d)\n", err);
1799*4882a593Smuzhiyun 	return err;
1800*4882a593Smuzhiyun fail_probe:
1801*4882a593Smuzhiyun 	vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
1802*4882a593Smuzhiyun fail_core:
1803*4882a593Smuzhiyun 	return err;
1804*4882a593Smuzhiyun }
1805*4882a593Smuzhiyun 
cx8802_dvb_remove(struct cx8802_driver * drv)1806*4882a593Smuzhiyun static int cx8802_dvb_remove(struct cx8802_driver *drv)
1807*4882a593Smuzhiyun {
1808*4882a593Smuzhiyun 	struct cx88_core *core = drv->core;
1809*4882a593Smuzhiyun 	struct cx8802_dev *dev = drv->core->dvbdev;
1810*4882a593Smuzhiyun 
1811*4882a593Smuzhiyun 	dprintk(1, "%s\n", __func__);
1812*4882a593Smuzhiyun 
1813*4882a593Smuzhiyun 	vb2_dvb_unregister_bus(&dev->frontends);
1814*4882a593Smuzhiyun 
1815*4882a593Smuzhiyun 	vp3054_i2c_remove(dev);
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun 	core->gate_ctrl = NULL;
1818*4882a593Smuzhiyun 
1819*4882a593Smuzhiyun 	return 0;
1820*4882a593Smuzhiyun }
1821*4882a593Smuzhiyun 
1822*4882a593Smuzhiyun static struct cx8802_driver cx8802_dvb_driver = {
1823*4882a593Smuzhiyun 	.type_id        = CX88_MPEG_DVB,
1824*4882a593Smuzhiyun 	.hw_access      = CX8802_DRVCTL_SHARED,
1825*4882a593Smuzhiyun 	.probe          = cx8802_dvb_probe,
1826*4882a593Smuzhiyun 	.remove         = cx8802_dvb_remove,
1827*4882a593Smuzhiyun 	.advise_acquire = cx8802_dvb_advise_acquire,
1828*4882a593Smuzhiyun 	.advise_release = cx8802_dvb_advise_release,
1829*4882a593Smuzhiyun };
1830*4882a593Smuzhiyun 
dvb_init(void)1831*4882a593Smuzhiyun static int __init dvb_init(void)
1832*4882a593Smuzhiyun {
1833*4882a593Smuzhiyun 	pr_info("cx2388x dvb driver version %s loaded\n", CX88_VERSION);
1834*4882a593Smuzhiyun 	return cx8802_register_driver(&cx8802_dvb_driver);
1835*4882a593Smuzhiyun }
1836*4882a593Smuzhiyun 
dvb_fini(void)1837*4882a593Smuzhiyun static void __exit dvb_fini(void)
1838*4882a593Smuzhiyun {
1839*4882a593Smuzhiyun 	cx8802_unregister_driver(&cx8802_dvb_driver);
1840*4882a593Smuzhiyun }
1841*4882a593Smuzhiyun 
1842*4882a593Smuzhiyun module_init(dvb_init);
1843*4882a593Smuzhiyun module_exit(dvb_fini);
1844