1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for the Conexant CX23885 PCIe bridge
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include "cx23885.h"
9*4882a593Smuzhiyun #include "cx23885-video.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/list.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/moduleparam.h>
15*4882a593Smuzhiyun #include <linux/kmod.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/interrupt.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/kthread.h>
21*4882a593Smuzhiyun #include <asm/div64.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <media/v4l2-common.h>
24*4882a593Smuzhiyun #include <media/v4l2-ioctl.h>
25*4882a593Smuzhiyun #include <media/v4l2-event.h>
26*4882a593Smuzhiyun #include "cx23885-ioctl.h"
27*4882a593Smuzhiyun #include "tuner-xc2028.h"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <media/drv-intf/cx25840.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun MODULE_DESCRIPTION("v4l2 driver module for cx23885 based TV cards");
32*4882a593Smuzhiyun MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>");
33*4882a593Smuzhiyun MODULE_LICENSE("GPL");
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static unsigned int video_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };
38*4882a593Smuzhiyun static unsigned int vbi_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun module_param_array(video_nr, int, NULL, 0444);
41*4882a593Smuzhiyun module_param_array(vbi_nr, int, NULL, 0444);
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun MODULE_PARM_DESC(video_nr, "video device numbers");
44*4882a593Smuzhiyun MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun static unsigned int video_debug;
47*4882a593Smuzhiyun module_param(video_debug, int, 0644);
48*4882a593Smuzhiyun MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun static unsigned int irq_debug;
51*4882a593Smuzhiyun module_param(irq_debug, int, 0644);
52*4882a593Smuzhiyun MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static unsigned int vid_limit = 16;
55*4882a593Smuzhiyun module_param(vid_limit, int, 0644);
56*4882a593Smuzhiyun MODULE_PARM_DESC(vid_limit, "capture memory limit in megabytes");
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define dprintk(level, fmt, arg...)\
59*4882a593Smuzhiyun do { if (video_debug >= level)\
60*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("%s: video:" fmt), \
61*4882a593Smuzhiyun __func__, ##arg); \
62*4882a593Smuzhiyun } while (0)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* ------------------------------------------------------------------- */
65*4882a593Smuzhiyun /* static data */
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #define FORMAT_FLAGS_PACKED 0x01
68*4882a593Smuzhiyun static struct cx23885_fmt formats[] = {
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun .fourcc = V4L2_PIX_FMT_YUYV,
71*4882a593Smuzhiyun .depth = 16,
72*4882a593Smuzhiyun .flags = FORMAT_FLAGS_PACKED,
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
format_by_fourcc(unsigned int fourcc)76*4882a593Smuzhiyun static struct cx23885_fmt *format_by_fourcc(unsigned int fourcc)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun unsigned int i;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(formats); i++)
81*4882a593Smuzhiyun if (formats[i].fourcc == fourcc)
82*4882a593Smuzhiyun return formats+i;
83*4882a593Smuzhiyun return NULL;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* ------------------------------------------------------------------- */
87*4882a593Smuzhiyun
cx23885_video_wakeup(struct cx23885_dev * dev,struct cx23885_dmaqueue * q,u32 count)88*4882a593Smuzhiyun void cx23885_video_wakeup(struct cx23885_dev *dev,
89*4882a593Smuzhiyun struct cx23885_dmaqueue *q, u32 count)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct cx23885_buffer *buf;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (list_empty(&q->active))
94*4882a593Smuzhiyun return;
95*4882a593Smuzhiyun buf = list_entry(q->active.next,
96*4882a593Smuzhiyun struct cx23885_buffer, queue);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun buf->vb.sequence = q->count++;
99*4882a593Smuzhiyun buf->vb.vb2_buf.timestamp = ktime_get_ns();
100*4882a593Smuzhiyun dprintk(2, "[%p/%d] wakeup reg=%d buf=%d\n", buf,
101*4882a593Smuzhiyun buf->vb.vb2_buf.index, count, q->count);
102*4882a593Smuzhiyun list_del(&buf->queue);
103*4882a593Smuzhiyun vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
cx23885_set_tvnorm(struct cx23885_dev * dev,v4l2_std_id norm)106*4882a593Smuzhiyun int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct v4l2_subdev_format format = {
109*4882a593Smuzhiyun .which = V4L2_SUBDEV_FORMAT_ACTIVE,
110*4882a593Smuzhiyun .format.code = MEDIA_BUS_FMT_FIXED,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun dprintk(1, "%s(norm = 0x%08x) name: [%s]\n",
114*4882a593Smuzhiyun __func__,
115*4882a593Smuzhiyun (unsigned int)norm,
116*4882a593Smuzhiyun v4l2_norm_to_name(norm));
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun if (dev->tvnorm == norm)
119*4882a593Smuzhiyun return 0;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun if (dev->tvnorm != norm) {
122*4882a593Smuzhiyun if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq) ||
123*4882a593Smuzhiyun vb2_is_busy(&dev->vb2_mpegq))
124*4882a593Smuzhiyun return -EBUSY;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun dev->tvnorm = norm;
128*4882a593Smuzhiyun dev->width = 720;
129*4882a593Smuzhiyun dev->height = norm_maxh(norm);
130*4882a593Smuzhiyun dev->field = V4L2_FIELD_INTERLACED;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun call_all(dev, video, s_std, norm);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun format.format.width = dev->width;
135*4882a593Smuzhiyun format.format.height = dev->height;
136*4882a593Smuzhiyun format.format.field = dev->field;
137*4882a593Smuzhiyun call_all(dev, pad, set_fmt, NULL, &format);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
cx23885_vdev_init(struct cx23885_dev * dev,struct pci_dev * pci,struct video_device * template,char * type)142*4882a593Smuzhiyun static struct video_device *cx23885_vdev_init(struct cx23885_dev *dev,
143*4882a593Smuzhiyun struct pci_dev *pci,
144*4882a593Smuzhiyun struct video_device *template,
145*4882a593Smuzhiyun char *type)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun struct video_device *vfd;
148*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun vfd = video_device_alloc();
151*4882a593Smuzhiyun if (NULL == vfd)
152*4882a593Smuzhiyun return NULL;
153*4882a593Smuzhiyun *vfd = *template;
154*4882a593Smuzhiyun vfd->v4l2_dev = &dev->v4l2_dev;
155*4882a593Smuzhiyun vfd->release = video_device_release;
156*4882a593Smuzhiyun vfd->lock = &dev->lock;
157*4882a593Smuzhiyun snprintf(vfd->name, sizeof(vfd->name), "%s (%s)",
158*4882a593Smuzhiyun cx23885_boards[dev->board].name, type);
159*4882a593Smuzhiyun video_set_drvdata(vfd, dev);
160*4882a593Smuzhiyun return vfd;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
cx23885_flatiron_write(struct cx23885_dev * dev,u8 reg,u8 data)163*4882a593Smuzhiyun int cx23885_flatiron_write(struct cx23885_dev *dev, u8 reg, u8 data)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun /* 8 bit registers, 8 bit values */
166*4882a593Smuzhiyun u8 buf[] = { reg, data };
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun struct i2c_msg msg = { .addr = 0x98 >> 1,
169*4882a593Smuzhiyun .flags = 0, .buf = buf, .len = 2 };
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun return i2c_transfer(&dev->i2c_bus[2].i2c_adap, &msg, 1);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
cx23885_flatiron_read(struct cx23885_dev * dev,u8 reg)174*4882a593Smuzhiyun u8 cx23885_flatiron_read(struct cx23885_dev *dev, u8 reg)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun /* 8 bit registers, 8 bit values */
177*4882a593Smuzhiyun int ret;
178*4882a593Smuzhiyun u8 b0[] = { reg };
179*4882a593Smuzhiyun u8 b1[] = { 0 };
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun struct i2c_msg msg[] = {
182*4882a593Smuzhiyun { .addr = 0x98 >> 1, .flags = 0, .buf = b0, .len = 1 },
183*4882a593Smuzhiyun { .addr = 0x98 >> 1, .flags = I2C_M_RD, .buf = b1, .len = 1 }
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun ret = i2c_transfer(&dev->i2c_bus[2].i2c_adap, &msg[0], 2);
187*4882a593Smuzhiyun if (ret != 2)
188*4882a593Smuzhiyun pr_err("%s() error\n", __func__);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return b1[0];
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
cx23885_flatiron_dump(struct cx23885_dev * dev)193*4882a593Smuzhiyun static void cx23885_flatiron_dump(struct cx23885_dev *dev)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun int i;
196*4882a593Smuzhiyun dprintk(1, "Flatiron dump\n");
197*4882a593Smuzhiyun for (i = 0; i < 0x24; i++) {
198*4882a593Smuzhiyun dprintk(1, "FI[%02x] = %02x\n", i,
199*4882a593Smuzhiyun cx23885_flatiron_read(dev, i));
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
cx23885_flatiron_mux(struct cx23885_dev * dev,int input)203*4882a593Smuzhiyun static int cx23885_flatiron_mux(struct cx23885_dev *dev, int input)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun u8 val;
206*4882a593Smuzhiyun dprintk(1, "%s(input = %d)\n", __func__, input);
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun if (input == 1)
209*4882a593Smuzhiyun val = cx23885_flatiron_read(dev, CH_PWR_CTRL1) & ~FLD_CH_SEL;
210*4882a593Smuzhiyun else if (input == 2)
211*4882a593Smuzhiyun val = cx23885_flatiron_read(dev, CH_PWR_CTRL1) | FLD_CH_SEL;
212*4882a593Smuzhiyun else
213*4882a593Smuzhiyun return -EINVAL;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun val |= 0x20; /* Enable clock to delta-sigma and dec filter */
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun cx23885_flatiron_write(dev, CH_PWR_CTRL1, val);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* Wake up */
220*4882a593Smuzhiyun cx23885_flatiron_write(dev, CH_PWR_CTRL2, 0);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun if (video_debug)
223*4882a593Smuzhiyun cx23885_flatiron_dump(dev);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun return 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
cx23885_video_mux(struct cx23885_dev * dev,unsigned int input)228*4882a593Smuzhiyun static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun dprintk(1, "%s() video_mux: %d [vmux=%d, gpio=0x%x,0x%x,0x%x,0x%x]\n",
231*4882a593Smuzhiyun __func__,
232*4882a593Smuzhiyun input, INPUT(input)->vmux,
233*4882a593Smuzhiyun INPUT(input)->gpio0, INPUT(input)->gpio1,
234*4882a593Smuzhiyun INPUT(input)->gpio2, INPUT(input)->gpio3);
235*4882a593Smuzhiyun dev->input = input;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun if (dev->board == CX23885_BOARD_MYGICA_X8506 ||
238*4882a593Smuzhiyun dev->board == CX23885_BOARD_MAGICPRO_PROHDTVE2 ||
239*4882a593Smuzhiyun dev->board == CX23885_BOARD_MYGICA_X8507) {
240*4882a593Smuzhiyun /* Select Analog TV */
241*4882a593Smuzhiyun if (INPUT(input)->type == CX23885_VMUX_TELEVISION)
242*4882a593Smuzhiyun cx23885_gpio_clear(dev, GPIO_0);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun /* Tell the internal A/V decoder */
246*4882a593Smuzhiyun v4l2_subdev_call(dev->sd_cx25840, video, s_routing,
247*4882a593Smuzhiyun INPUT(input)->vmux, 0, 0);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1800) ||
250*4882a593Smuzhiyun (dev->board == CX23885_BOARD_MPX885) ||
251*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1250) ||
252*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_IMPACTVCBE) ||
253*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) ||
254*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) ||
255*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4) ||
256*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC) ||
257*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_DVB) ||
258*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) ||
259*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR5525) ||
260*4882a593Smuzhiyun (dev->board == CX23885_BOARD_MYGICA_X8507) ||
261*4882a593Smuzhiyun (dev->board == CX23885_BOARD_AVERMEDIA_HC81R) ||
262*4882a593Smuzhiyun (dev->board == CX23885_BOARD_VIEWCAST_260E) ||
263*4882a593Smuzhiyun (dev->board == CX23885_BOARD_VIEWCAST_460E) ||
264*4882a593Smuzhiyun (dev->board == CX23885_BOARD_AVERMEDIA_CE310B)) {
265*4882a593Smuzhiyun /* Configure audio routing */
266*4882a593Smuzhiyun v4l2_subdev_call(dev->sd_cx25840, audio, s_routing,
267*4882a593Smuzhiyun INPUT(input)->amux, 0, 0);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun if (INPUT(input)->amux == CX25840_AUDIO7)
270*4882a593Smuzhiyun cx23885_flatiron_mux(dev, 1);
271*4882a593Smuzhiyun else if (INPUT(input)->amux == CX25840_AUDIO6)
272*4882a593Smuzhiyun cx23885_flatiron_mux(dev, 2);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
cx23885_audio_mux(struct cx23885_dev * dev,unsigned int input)278*4882a593Smuzhiyun static int cx23885_audio_mux(struct cx23885_dev *dev, unsigned int input)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun dprintk(1, "%s(input=%d)\n", __func__, input);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* The baseband video core of the cx23885 has two audio inputs.
283*4882a593Smuzhiyun * LR1 and LR2. In almost every single case so far only HVR1xxx
284*4882a593Smuzhiyun * cards we've only ever supported LR1. Time to support LR2,
285*4882a593Smuzhiyun * which is available via the optional white breakout header on
286*4882a593Smuzhiyun * the board.
287*4882a593Smuzhiyun * We'll use a could of existing enums in the card struct to allow
288*4882a593Smuzhiyun * devs to specify which baseband input they need, or just default
289*4882a593Smuzhiyun * to what we've always used.
290*4882a593Smuzhiyun */
291*4882a593Smuzhiyun if (INPUT(input)->amux == CX25840_AUDIO7)
292*4882a593Smuzhiyun cx23885_flatiron_mux(dev, 1);
293*4882a593Smuzhiyun else if (INPUT(input)->amux == CX25840_AUDIO6)
294*4882a593Smuzhiyun cx23885_flatiron_mux(dev, 2);
295*4882a593Smuzhiyun else {
296*4882a593Smuzhiyun /* Not specifically defined, assume the default. */
297*4882a593Smuzhiyun cx23885_flatiron_mux(dev, 1);
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun return 0;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
cx23885_start_video_dma(struct cx23885_dev * dev,struct cx23885_dmaqueue * q,struct cx23885_buffer * buf)304*4882a593Smuzhiyun static int cx23885_start_video_dma(struct cx23885_dev *dev,
305*4882a593Smuzhiyun struct cx23885_dmaqueue *q,
306*4882a593Smuzhiyun struct cx23885_buffer *buf)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /* Stop the dma/fifo before we tamper with it's risc programs */
311*4882a593Smuzhiyun cx_clear(VID_A_DMA_CTL, 0x11);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* setup fifo + format */
314*4882a593Smuzhiyun cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH01],
315*4882a593Smuzhiyun buf->bpl, buf->risc.dma);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* reset counter */
318*4882a593Smuzhiyun cx_write(VID_A_GPCNT_CTL, 3);
319*4882a593Smuzhiyun q->count = 0;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun /* enable irq */
322*4882a593Smuzhiyun cx23885_irq_add_enable(dev, 0x01);
323*4882a593Smuzhiyun cx_set(VID_A_INT_MSK, 0x000011);
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun /* start dma */
326*4882a593Smuzhiyun cx_set(DEV_CNTRL2, (1<<5));
327*4882a593Smuzhiyun cx_set(VID_A_DMA_CTL, 0x11); /* FIFO and RISC enable */
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun return 0;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
queue_setup(struct vb2_queue * q,unsigned int * num_buffers,unsigned int * num_planes,unsigned int sizes[],struct device * alloc_devs[])332*4882a593Smuzhiyun static int queue_setup(struct vb2_queue *q,
333*4882a593Smuzhiyun unsigned int *num_buffers, unsigned int *num_planes,
334*4882a593Smuzhiyun unsigned int sizes[], struct device *alloc_devs[])
335*4882a593Smuzhiyun {
336*4882a593Smuzhiyun struct cx23885_dev *dev = q->drv_priv;
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun *num_planes = 1;
339*4882a593Smuzhiyun sizes[0] = (dev->fmt->depth * dev->width * dev->height) >> 3;
340*4882a593Smuzhiyun return 0;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
buffer_prepare(struct vb2_buffer * vb)343*4882a593Smuzhiyun static int buffer_prepare(struct vb2_buffer *vb)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
346*4882a593Smuzhiyun struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
347*4882a593Smuzhiyun struct cx23885_buffer *buf =
348*4882a593Smuzhiyun container_of(vbuf, struct cx23885_buffer, vb);
349*4882a593Smuzhiyun u32 line0_offset, line1_offset;
350*4882a593Smuzhiyun struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
351*4882a593Smuzhiyun int field_tff;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun buf->bpl = (dev->width * dev->fmt->depth) >> 3;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun if (vb2_plane_size(vb, 0) < dev->height * buf->bpl)
356*4882a593Smuzhiyun return -EINVAL;
357*4882a593Smuzhiyun vb2_set_plane_payload(vb, 0, dev->height * buf->bpl);
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun switch (dev->field) {
360*4882a593Smuzhiyun case V4L2_FIELD_TOP:
361*4882a593Smuzhiyun cx23885_risc_buffer(dev->pci, &buf->risc,
362*4882a593Smuzhiyun sgt->sgl, 0, UNSET,
363*4882a593Smuzhiyun buf->bpl, 0, dev->height);
364*4882a593Smuzhiyun break;
365*4882a593Smuzhiyun case V4L2_FIELD_BOTTOM:
366*4882a593Smuzhiyun cx23885_risc_buffer(dev->pci, &buf->risc,
367*4882a593Smuzhiyun sgt->sgl, UNSET, 0,
368*4882a593Smuzhiyun buf->bpl, 0, dev->height);
369*4882a593Smuzhiyun break;
370*4882a593Smuzhiyun case V4L2_FIELD_INTERLACED:
371*4882a593Smuzhiyun if (dev->tvnorm & V4L2_STD_525_60)
372*4882a593Smuzhiyun /* NTSC or */
373*4882a593Smuzhiyun field_tff = 1;
374*4882a593Smuzhiyun else
375*4882a593Smuzhiyun field_tff = 0;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun if (cx23885_boards[dev->board].force_bff)
378*4882a593Smuzhiyun /* PAL / SECAM OR 888 in NTSC MODE */
379*4882a593Smuzhiyun field_tff = 0;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun if (field_tff) {
382*4882a593Smuzhiyun /* cx25840 transmits NTSC bottom field first */
383*4882a593Smuzhiyun dprintk(1, "%s() Creating TFF/NTSC risc\n",
384*4882a593Smuzhiyun __func__);
385*4882a593Smuzhiyun line0_offset = buf->bpl;
386*4882a593Smuzhiyun line1_offset = 0;
387*4882a593Smuzhiyun } else {
388*4882a593Smuzhiyun /* All other formats are top field first */
389*4882a593Smuzhiyun dprintk(1, "%s() Creating BFF/PAL/SECAM risc\n",
390*4882a593Smuzhiyun __func__);
391*4882a593Smuzhiyun line0_offset = 0;
392*4882a593Smuzhiyun line1_offset = buf->bpl;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun cx23885_risc_buffer(dev->pci, &buf->risc,
395*4882a593Smuzhiyun sgt->sgl, line0_offset,
396*4882a593Smuzhiyun line1_offset,
397*4882a593Smuzhiyun buf->bpl, buf->bpl,
398*4882a593Smuzhiyun dev->height >> 1);
399*4882a593Smuzhiyun break;
400*4882a593Smuzhiyun case V4L2_FIELD_SEQ_TB:
401*4882a593Smuzhiyun cx23885_risc_buffer(dev->pci, &buf->risc,
402*4882a593Smuzhiyun sgt->sgl,
403*4882a593Smuzhiyun 0, buf->bpl * (dev->height >> 1),
404*4882a593Smuzhiyun buf->bpl, 0,
405*4882a593Smuzhiyun dev->height >> 1);
406*4882a593Smuzhiyun break;
407*4882a593Smuzhiyun case V4L2_FIELD_SEQ_BT:
408*4882a593Smuzhiyun cx23885_risc_buffer(dev->pci, &buf->risc,
409*4882a593Smuzhiyun sgt->sgl,
410*4882a593Smuzhiyun buf->bpl * (dev->height >> 1), 0,
411*4882a593Smuzhiyun buf->bpl, 0,
412*4882a593Smuzhiyun dev->height >> 1);
413*4882a593Smuzhiyun break;
414*4882a593Smuzhiyun default:
415*4882a593Smuzhiyun BUG();
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun dprintk(2, "[%p/%d] buffer_init - %dx%d %dbpp 0x%08x - dma=0x%08lx\n",
418*4882a593Smuzhiyun buf, buf->vb.vb2_buf.index,
419*4882a593Smuzhiyun dev->width, dev->height, dev->fmt->depth, dev->fmt->fourcc,
420*4882a593Smuzhiyun (unsigned long)buf->risc.dma);
421*4882a593Smuzhiyun return 0;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun
buffer_finish(struct vb2_buffer * vb)424*4882a593Smuzhiyun static void buffer_finish(struct vb2_buffer *vb)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
427*4882a593Smuzhiyun struct cx23885_buffer *buf = container_of(vbuf,
428*4882a593Smuzhiyun struct cx23885_buffer, vb);
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun cx23885_free_buffer(vb->vb2_queue->drv_priv, buf);
431*4882a593Smuzhiyun }
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun /*
434*4882a593Smuzhiyun * The risc program for each buffer works as follows: it starts with a simple
435*4882a593Smuzhiyun * 'JUMP to addr + 12', which is effectively a NOP. Then the code to DMA the
436*4882a593Smuzhiyun * buffer follows and at the end we have a JUMP back to the start + 12 (skipping
437*4882a593Smuzhiyun * the initial JUMP).
438*4882a593Smuzhiyun *
439*4882a593Smuzhiyun * This is the risc program of the first buffer to be queued if the active list
440*4882a593Smuzhiyun * is empty and it just keeps DMAing this buffer without generating any
441*4882a593Smuzhiyun * interrupts.
442*4882a593Smuzhiyun *
443*4882a593Smuzhiyun * If a new buffer is added then the initial JUMP in the code for that buffer
444*4882a593Smuzhiyun * will generate an interrupt which signals that the previous buffer has been
445*4882a593Smuzhiyun * DMAed successfully and that it can be returned to userspace.
446*4882a593Smuzhiyun *
447*4882a593Smuzhiyun * It also sets the final jump of the previous buffer to the start of the new
448*4882a593Smuzhiyun * buffer, thus chaining the new buffer into the DMA chain. This is a single
449*4882a593Smuzhiyun * atomic u32 write, so there is no race condition.
450*4882a593Smuzhiyun *
451*4882a593Smuzhiyun * The end-result of all this that you only get an interrupt when a buffer
452*4882a593Smuzhiyun * is ready, so the control flow is very easy.
453*4882a593Smuzhiyun */
buffer_queue(struct vb2_buffer * vb)454*4882a593Smuzhiyun static void buffer_queue(struct vb2_buffer *vb)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
457*4882a593Smuzhiyun struct cx23885_dev *dev = vb->vb2_queue->drv_priv;
458*4882a593Smuzhiyun struct cx23885_buffer *buf = container_of(vbuf,
459*4882a593Smuzhiyun struct cx23885_buffer, vb);
460*4882a593Smuzhiyun struct cx23885_buffer *prev;
461*4882a593Smuzhiyun struct cx23885_dmaqueue *q = &dev->vidq;
462*4882a593Smuzhiyun unsigned long flags;
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun /* add jump to start */
465*4882a593Smuzhiyun buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12);
466*4882a593Smuzhiyun buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
467*4882a593Smuzhiyun buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12);
468*4882a593Smuzhiyun buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun spin_lock_irqsave(&dev->slock, flags);
471*4882a593Smuzhiyun if (list_empty(&q->active)) {
472*4882a593Smuzhiyun list_add_tail(&buf->queue, &q->active);
473*4882a593Smuzhiyun dprintk(2, "[%p/%d] buffer_queue - first active\n",
474*4882a593Smuzhiyun buf, buf->vb.vb2_buf.index);
475*4882a593Smuzhiyun } else {
476*4882a593Smuzhiyun buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
477*4882a593Smuzhiyun prev = list_entry(q->active.prev, struct cx23885_buffer,
478*4882a593Smuzhiyun queue);
479*4882a593Smuzhiyun list_add_tail(&buf->queue, &q->active);
480*4882a593Smuzhiyun prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
481*4882a593Smuzhiyun dprintk(2, "[%p/%d] buffer_queue - append to active\n",
482*4882a593Smuzhiyun buf, buf->vb.vb2_buf.index);
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->slock, flags);
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun
cx23885_start_streaming(struct vb2_queue * q,unsigned int count)487*4882a593Smuzhiyun static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun struct cx23885_dev *dev = q->drv_priv;
490*4882a593Smuzhiyun struct cx23885_dmaqueue *dmaq = &dev->vidq;
491*4882a593Smuzhiyun struct cx23885_buffer *buf = list_entry(dmaq->active.next,
492*4882a593Smuzhiyun struct cx23885_buffer, queue);
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun cx23885_start_video_dma(dev, dmaq, buf);
495*4882a593Smuzhiyun return 0;
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun
cx23885_stop_streaming(struct vb2_queue * q)498*4882a593Smuzhiyun static void cx23885_stop_streaming(struct vb2_queue *q)
499*4882a593Smuzhiyun {
500*4882a593Smuzhiyun struct cx23885_dev *dev = q->drv_priv;
501*4882a593Smuzhiyun struct cx23885_dmaqueue *dmaq = &dev->vidq;
502*4882a593Smuzhiyun unsigned long flags;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun cx_clear(VID_A_DMA_CTL, 0x11);
505*4882a593Smuzhiyun spin_lock_irqsave(&dev->slock, flags);
506*4882a593Smuzhiyun while (!list_empty(&dmaq->active)) {
507*4882a593Smuzhiyun struct cx23885_buffer *buf = list_entry(dmaq->active.next,
508*4882a593Smuzhiyun struct cx23885_buffer, queue);
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun list_del(&buf->queue);
511*4882a593Smuzhiyun vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->slock, flags);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun static const struct vb2_ops cx23885_video_qops = {
517*4882a593Smuzhiyun .queue_setup = queue_setup,
518*4882a593Smuzhiyun .buf_prepare = buffer_prepare,
519*4882a593Smuzhiyun .buf_finish = buffer_finish,
520*4882a593Smuzhiyun .buf_queue = buffer_queue,
521*4882a593Smuzhiyun .wait_prepare = vb2_ops_wait_prepare,
522*4882a593Smuzhiyun .wait_finish = vb2_ops_wait_finish,
523*4882a593Smuzhiyun .start_streaming = cx23885_start_streaming,
524*4882a593Smuzhiyun .stop_streaming = cx23885_stop_streaming,
525*4882a593Smuzhiyun };
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun /* ------------------------------------------------------------------ */
528*4882a593Smuzhiyun /* VIDEO IOCTLS */
529*4882a593Smuzhiyun
vidioc_g_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)530*4882a593Smuzhiyun static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
531*4882a593Smuzhiyun struct v4l2_format *f)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun f->fmt.pix.width = dev->width;
536*4882a593Smuzhiyun f->fmt.pix.height = dev->height;
537*4882a593Smuzhiyun f->fmt.pix.field = dev->field;
538*4882a593Smuzhiyun f->fmt.pix.pixelformat = dev->fmt->fourcc;
539*4882a593Smuzhiyun f->fmt.pix.bytesperline =
540*4882a593Smuzhiyun (f->fmt.pix.width * dev->fmt->depth) >> 3;
541*4882a593Smuzhiyun f->fmt.pix.sizeimage =
542*4882a593Smuzhiyun f->fmt.pix.height * f->fmt.pix.bytesperline;
543*4882a593Smuzhiyun f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun return 0;
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
vidioc_try_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)548*4882a593Smuzhiyun static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
549*4882a593Smuzhiyun struct v4l2_format *f)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
552*4882a593Smuzhiyun struct cx23885_fmt *fmt;
553*4882a593Smuzhiyun enum v4l2_field field;
554*4882a593Smuzhiyun unsigned int maxw, maxh;
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun fmt = format_by_fourcc(f->fmt.pix.pixelformat);
557*4882a593Smuzhiyun if (NULL == fmt)
558*4882a593Smuzhiyun return -EINVAL;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun field = f->fmt.pix.field;
561*4882a593Smuzhiyun maxw = 720;
562*4882a593Smuzhiyun maxh = norm_maxh(dev->tvnorm);
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun if (V4L2_FIELD_ANY == field) {
565*4882a593Smuzhiyun field = (f->fmt.pix.height > maxh/2)
566*4882a593Smuzhiyun ? V4L2_FIELD_INTERLACED
567*4882a593Smuzhiyun : V4L2_FIELD_BOTTOM;
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun switch (field) {
571*4882a593Smuzhiyun case V4L2_FIELD_TOP:
572*4882a593Smuzhiyun case V4L2_FIELD_BOTTOM:
573*4882a593Smuzhiyun maxh = maxh / 2;
574*4882a593Smuzhiyun break;
575*4882a593Smuzhiyun case V4L2_FIELD_INTERLACED:
576*4882a593Smuzhiyun case V4L2_FIELD_SEQ_TB:
577*4882a593Smuzhiyun case V4L2_FIELD_SEQ_BT:
578*4882a593Smuzhiyun break;
579*4882a593Smuzhiyun default:
580*4882a593Smuzhiyun field = V4L2_FIELD_INTERLACED;
581*4882a593Smuzhiyun break;
582*4882a593Smuzhiyun }
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun f->fmt.pix.field = field;
585*4882a593Smuzhiyun v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
586*4882a593Smuzhiyun &f->fmt.pix.height, 32, maxh, 0, 0);
587*4882a593Smuzhiyun f->fmt.pix.bytesperline =
588*4882a593Smuzhiyun (f->fmt.pix.width * fmt->depth) >> 3;
589*4882a593Smuzhiyun f->fmt.pix.sizeimage =
590*4882a593Smuzhiyun f->fmt.pix.height * f->fmt.pix.bytesperline;
591*4882a593Smuzhiyun f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun return 0;
594*4882a593Smuzhiyun }
595*4882a593Smuzhiyun
vidioc_s_fmt_vid_cap(struct file * file,void * priv,struct v4l2_format * f)596*4882a593Smuzhiyun static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
597*4882a593Smuzhiyun struct v4l2_format *f)
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
600*4882a593Smuzhiyun struct v4l2_subdev_format format = {
601*4882a593Smuzhiyun .which = V4L2_SUBDEV_FORMAT_ACTIVE,
602*4882a593Smuzhiyun };
603*4882a593Smuzhiyun int err;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun dprintk(2, "%s()\n", __func__);
606*4882a593Smuzhiyun err = vidioc_try_fmt_vid_cap(file, priv, f);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun if (0 != err)
609*4882a593Smuzhiyun return err;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq) ||
612*4882a593Smuzhiyun vb2_is_busy(&dev->vb2_mpegq))
613*4882a593Smuzhiyun return -EBUSY;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
616*4882a593Smuzhiyun dev->width = f->fmt.pix.width;
617*4882a593Smuzhiyun dev->height = f->fmt.pix.height;
618*4882a593Smuzhiyun dev->field = f->fmt.pix.field;
619*4882a593Smuzhiyun dprintk(2, "%s() width=%d height=%d field=%d\n", __func__,
620*4882a593Smuzhiyun dev->width, dev->height, dev->field);
621*4882a593Smuzhiyun v4l2_fill_mbus_format(&format.format, &f->fmt.pix, MEDIA_BUS_FMT_FIXED);
622*4882a593Smuzhiyun call_all(dev, pad, set_fmt, NULL, &format);
623*4882a593Smuzhiyun v4l2_fill_pix_format(&f->fmt.pix, &format.format);
624*4882a593Smuzhiyun /* set_fmt overwrites f->fmt.pix.field, restore it */
625*4882a593Smuzhiyun f->fmt.pix.field = dev->field;
626*4882a593Smuzhiyun return 0;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
vidioc_querycap(struct file * file,void * priv,struct v4l2_capability * cap)629*4882a593Smuzhiyun static int vidioc_querycap(struct file *file, void *priv,
630*4882a593Smuzhiyun struct v4l2_capability *cap)
631*4882a593Smuzhiyun {
632*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun strscpy(cap->driver, "cx23885", sizeof(cap->driver));
635*4882a593Smuzhiyun strscpy(cap->card, cx23885_boards[dev->board].name,
636*4882a593Smuzhiyun sizeof(cap->card));
637*4882a593Smuzhiyun sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci));
638*4882a593Smuzhiyun cap->capabilities = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
639*4882a593Smuzhiyun V4L2_CAP_AUDIO | V4L2_CAP_VBI_CAPTURE |
640*4882a593Smuzhiyun V4L2_CAP_VIDEO_CAPTURE |
641*4882a593Smuzhiyun V4L2_CAP_DEVICE_CAPS;
642*4882a593Smuzhiyun switch (dev->board) { /* i2c device tuners */
643*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
644*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
645*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
646*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
647*4882a593Smuzhiyun cap->capabilities |= V4L2_CAP_TUNER;
648*4882a593Smuzhiyun break;
649*4882a593Smuzhiyun default:
650*4882a593Smuzhiyun if (dev->tuner_type != TUNER_ABSENT)
651*4882a593Smuzhiyun cap->capabilities |= V4L2_CAP_TUNER;
652*4882a593Smuzhiyun break;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun return 0;
655*4882a593Smuzhiyun }
656*4882a593Smuzhiyun
vidioc_enum_fmt_vid_cap(struct file * file,void * priv,struct v4l2_fmtdesc * f)657*4882a593Smuzhiyun static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
658*4882a593Smuzhiyun struct v4l2_fmtdesc *f)
659*4882a593Smuzhiyun {
660*4882a593Smuzhiyun if (unlikely(f->index >= ARRAY_SIZE(formats)))
661*4882a593Smuzhiyun return -EINVAL;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun f->pixelformat = formats[f->index].fourcc;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun return 0;
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun
vidioc_g_pixelaspect(struct file * file,void * priv,int type,struct v4l2_fract * f)668*4882a593Smuzhiyun static int vidioc_g_pixelaspect(struct file *file, void *priv,
669*4882a593Smuzhiyun int type, struct v4l2_fract *f)
670*4882a593Smuzhiyun {
671*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
672*4882a593Smuzhiyun bool is_50hz = dev->tvnorm & V4L2_STD_625_50;
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
675*4882a593Smuzhiyun return -EINVAL;
676*4882a593Smuzhiyun
677*4882a593Smuzhiyun f->numerator = is_50hz ? 54 : 11;
678*4882a593Smuzhiyun f->denominator = is_50hz ? 59 : 10;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun return 0;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun
vidioc_g_selection(struct file * file,void * fh,struct v4l2_selection * sel)683*4882a593Smuzhiyun static int vidioc_g_selection(struct file *file, void *fh,
684*4882a593Smuzhiyun struct v4l2_selection *sel)
685*4882a593Smuzhiyun {
686*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
689*4882a593Smuzhiyun return -EINVAL;
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun switch (sel->target) {
692*4882a593Smuzhiyun case V4L2_SEL_TGT_CROP_BOUNDS:
693*4882a593Smuzhiyun case V4L2_SEL_TGT_CROP_DEFAULT:
694*4882a593Smuzhiyun sel->r.top = 0;
695*4882a593Smuzhiyun sel->r.left = 0;
696*4882a593Smuzhiyun sel->r.width = 720;
697*4882a593Smuzhiyun sel->r.height = norm_maxh(dev->tvnorm);
698*4882a593Smuzhiyun break;
699*4882a593Smuzhiyun default:
700*4882a593Smuzhiyun return -EINVAL;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun return 0;
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun
vidioc_g_std(struct file * file,void * priv,v4l2_std_id * id)705*4882a593Smuzhiyun static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id)
706*4882a593Smuzhiyun {
707*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
708*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun *id = dev->tvnorm;
711*4882a593Smuzhiyun return 0;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun
vidioc_s_std(struct file * file,void * priv,v4l2_std_id tvnorms)714*4882a593Smuzhiyun static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
717*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun return cx23885_set_tvnorm(dev, tvnorms);
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun
cx23885_enum_input(struct cx23885_dev * dev,struct v4l2_input * i)722*4882a593Smuzhiyun int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i)
723*4882a593Smuzhiyun {
724*4882a593Smuzhiyun static const char *iname[] = {
725*4882a593Smuzhiyun [CX23885_VMUX_COMPOSITE1] = "Composite1",
726*4882a593Smuzhiyun [CX23885_VMUX_COMPOSITE2] = "Composite2",
727*4882a593Smuzhiyun [CX23885_VMUX_COMPOSITE3] = "Composite3",
728*4882a593Smuzhiyun [CX23885_VMUX_COMPOSITE4] = "Composite4",
729*4882a593Smuzhiyun [CX23885_VMUX_SVIDEO] = "S-Video",
730*4882a593Smuzhiyun [CX23885_VMUX_COMPONENT] = "Component",
731*4882a593Smuzhiyun [CX23885_VMUX_TELEVISION] = "Television",
732*4882a593Smuzhiyun [CX23885_VMUX_CABLE] = "Cable TV",
733*4882a593Smuzhiyun [CX23885_VMUX_DVB] = "DVB",
734*4882a593Smuzhiyun [CX23885_VMUX_DEBUG] = "for debug only",
735*4882a593Smuzhiyun };
736*4882a593Smuzhiyun unsigned int n;
737*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun n = i->index;
740*4882a593Smuzhiyun if (n >= MAX_CX23885_INPUT)
741*4882a593Smuzhiyun return -EINVAL;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun if (0 == INPUT(n)->type)
744*4882a593Smuzhiyun return -EINVAL;
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun i->index = n;
747*4882a593Smuzhiyun i->type = V4L2_INPUT_TYPE_CAMERA;
748*4882a593Smuzhiyun strscpy(i->name, iname[INPUT(n)->type], sizeof(i->name));
749*4882a593Smuzhiyun i->std = CX23885_NORMS;
750*4882a593Smuzhiyun if ((CX23885_VMUX_TELEVISION == INPUT(n)->type) ||
751*4882a593Smuzhiyun (CX23885_VMUX_CABLE == INPUT(n)->type)) {
752*4882a593Smuzhiyun i->type = V4L2_INPUT_TYPE_TUNER;
753*4882a593Smuzhiyun i->audioset = 4;
754*4882a593Smuzhiyun } else {
755*4882a593Smuzhiyun /* Two selectable audio inputs for non-tv inputs */
756*4882a593Smuzhiyun i->audioset = 3;
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun if (dev->input == n) {
760*4882a593Smuzhiyun /* enum'd input matches our configured input.
761*4882a593Smuzhiyun * Ask the video decoder to process the call
762*4882a593Smuzhiyun * and give it an oppertunity to update the
763*4882a593Smuzhiyun * status field.
764*4882a593Smuzhiyun */
765*4882a593Smuzhiyun call_all(dev, video, g_input_status, &i->status);
766*4882a593Smuzhiyun }
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun return 0;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun
vidioc_enum_input(struct file * file,void * priv,struct v4l2_input * i)771*4882a593Smuzhiyun static int vidioc_enum_input(struct file *file, void *priv,
772*4882a593Smuzhiyun struct v4l2_input *i)
773*4882a593Smuzhiyun {
774*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
775*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
776*4882a593Smuzhiyun return cx23885_enum_input(dev, i);
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun
cx23885_get_input(struct file * file,void * priv,unsigned int * i)779*4882a593Smuzhiyun int cx23885_get_input(struct file *file, void *priv, unsigned int *i)
780*4882a593Smuzhiyun {
781*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun *i = dev->input;
784*4882a593Smuzhiyun dprintk(1, "%s() returns %d\n", __func__, *i);
785*4882a593Smuzhiyun return 0;
786*4882a593Smuzhiyun }
787*4882a593Smuzhiyun
vidioc_g_input(struct file * file,void * priv,unsigned int * i)788*4882a593Smuzhiyun static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
789*4882a593Smuzhiyun {
790*4882a593Smuzhiyun return cx23885_get_input(file, priv, i);
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun
cx23885_set_input(struct file * file,void * priv,unsigned int i)793*4882a593Smuzhiyun int cx23885_set_input(struct file *file, void *priv, unsigned int i)
794*4882a593Smuzhiyun {
795*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun dprintk(1, "%s(%d)\n", __func__, i);
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun if (i >= MAX_CX23885_INPUT) {
800*4882a593Smuzhiyun dprintk(1, "%s() -EINVAL\n", __func__);
801*4882a593Smuzhiyun return -EINVAL;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun if (INPUT(i)->type == 0)
805*4882a593Smuzhiyun return -EINVAL;
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun cx23885_video_mux(dev, i);
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun /* By default establish the default audio input for the card also */
810*4882a593Smuzhiyun /* Caller is free to use VIDIOC_S_AUDIO to override afterwards */
811*4882a593Smuzhiyun cx23885_audio_mux(dev, i);
812*4882a593Smuzhiyun return 0;
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun
vidioc_s_input(struct file * file,void * priv,unsigned int i)815*4882a593Smuzhiyun static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun return cx23885_set_input(file, priv, i);
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
vidioc_log_status(struct file * file,void * priv)820*4882a593Smuzhiyun static int vidioc_log_status(struct file *file, void *priv)
821*4882a593Smuzhiyun {
822*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun call_all(dev, core, log_status);
825*4882a593Smuzhiyun return 0;
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
cx23885_query_audinput(struct file * file,void * priv,struct v4l2_audio * i)828*4882a593Smuzhiyun static int cx23885_query_audinput(struct file *file, void *priv,
829*4882a593Smuzhiyun struct v4l2_audio *i)
830*4882a593Smuzhiyun {
831*4882a593Smuzhiyun static const char *iname[] = {
832*4882a593Smuzhiyun [0] = "Baseband L/R 1",
833*4882a593Smuzhiyun [1] = "Baseband L/R 2",
834*4882a593Smuzhiyun [2] = "TV",
835*4882a593Smuzhiyun };
836*4882a593Smuzhiyun unsigned int n;
837*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
838*4882a593Smuzhiyun
839*4882a593Smuzhiyun n = i->index;
840*4882a593Smuzhiyun if (n >= 3)
841*4882a593Smuzhiyun return -EINVAL;
842*4882a593Smuzhiyun
843*4882a593Smuzhiyun memset(i, 0, sizeof(*i));
844*4882a593Smuzhiyun i->index = n;
845*4882a593Smuzhiyun strscpy(i->name, iname[n], sizeof(i->name));
846*4882a593Smuzhiyun i->capability = V4L2_AUDCAP_STEREO;
847*4882a593Smuzhiyun return 0;
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun }
850*4882a593Smuzhiyun
vidioc_enum_audinput(struct file * file,void * priv,struct v4l2_audio * i)851*4882a593Smuzhiyun static int vidioc_enum_audinput(struct file *file, void *priv,
852*4882a593Smuzhiyun struct v4l2_audio *i)
853*4882a593Smuzhiyun {
854*4882a593Smuzhiyun return cx23885_query_audinput(file, priv, i);
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun
vidioc_g_audinput(struct file * file,void * priv,struct v4l2_audio * i)857*4882a593Smuzhiyun static int vidioc_g_audinput(struct file *file, void *priv,
858*4882a593Smuzhiyun struct v4l2_audio *i)
859*4882a593Smuzhiyun {
860*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun if ((CX23885_VMUX_TELEVISION == INPUT(dev->input)->type) ||
863*4882a593Smuzhiyun (CX23885_VMUX_CABLE == INPUT(dev->input)->type))
864*4882a593Smuzhiyun i->index = 2;
865*4882a593Smuzhiyun else
866*4882a593Smuzhiyun i->index = dev->audinput;
867*4882a593Smuzhiyun dprintk(1, "%s(input=%d)\n", __func__, i->index);
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun return cx23885_query_audinput(file, priv, i);
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun
vidioc_s_audinput(struct file * file,void * priv,const struct v4l2_audio * i)872*4882a593Smuzhiyun static int vidioc_s_audinput(struct file *file, void *priv,
873*4882a593Smuzhiyun const struct v4l2_audio *i)
874*4882a593Smuzhiyun {
875*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun if ((CX23885_VMUX_TELEVISION == INPUT(dev->input)->type) ||
878*4882a593Smuzhiyun (CX23885_VMUX_CABLE == INPUT(dev->input)->type)) {
879*4882a593Smuzhiyun return i->index != 2 ? -EINVAL : 0;
880*4882a593Smuzhiyun }
881*4882a593Smuzhiyun if (i->index > 1)
882*4882a593Smuzhiyun return -EINVAL;
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun dprintk(1, "%s(%d)\n", __func__, i->index);
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun dev->audinput = i->index;
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun /* Skip the audio defaults from the cards struct, caller wants
889*4882a593Smuzhiyun * directly touch the audio mux hardware. */
890*4882a593Smuzhiyun cx23885_flatiron_mux(dev, dev->audinput + 1);
891*4882a593Smuzhiyun return 0;
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun
vidioc_g_tuner(struct file * file,void * priv,struct v4l2_tuner * t)894*4882a593Smuzhiyun static int vidioc_g_tuner(struct file *file, void *priv,
895*4882a593Smuzhiyun struct v4l2_tuner *t)
896*4882a593Smuzhiyun {
897*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun switch (dev->board) { /* i2c device tuners */
900*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
901*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
902*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
903*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
904*4882a593Smuzhiyun break;
905*4882a593Smuzhiyun default:
906*4882a593Smuzhiyun if (dev->tuner_type == TUNER_ABSENT)
907*4882a593Smuzhiyun return -EINVAL;
908*4882a593Smuzhiyun break;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun if (0 != t->index)
911*4882a593Smuzhiyun return -EINVAL;
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun strscpy(t->name, "Television", sizeof(t->name));
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun call_all(dev, tuner, g_tuner, t);
916*4882a593Smuzhiyun return 0;
917*4882a593Smuzhiyun }
918*4882a593Smuzhiyun
vidioc_s_tuner(struct file * file,void * priv,const struct v4l2_tuner * t)919*4882a593Smuzhiyun static int vidioc_s_tuner(struct file *file, void *priv,
920*4882a593Smuzhiyun const struct v4l2_tuner *t)
921*4882a593Smuzhiyun {
922*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun switch (dev->board) { /* i2c device tuners */
925*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
926*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
927*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
928*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
929*4882a593Smuzhiyun break;
930*4882a593Smuzhiyun default:
931*4882a593Smuzhiyun if (dev->tuner_type == TUNER_ABSENT)
932*4882a593Smuzhiyun return -EINVAL;
933*4882a593Smuzhiyun break;
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun if (0 != t->index)
936*4882a593Smuzhiyun return -EINVAL;
937*4882a593Smuzhiyun /* Update the A/V core */
938*4882a593Smuzhiyun call_all(dev, tuner, s_tuner, t);
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun return 0;
941*4882a593Smuzhiyun }
942*4882a593Smuzhiyun
vidioc_g_frequency(struct file * file,void * priv,struct v4l2_frequency * f)943*4882a593Smuzhiyun static int vidioc_g_frequency(struct file *file, void *priv,
944*4882a593Smuzhiyun struct v4l2_frequency *f)
945*4882a593Smuzhiyun {
946*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun switch (dev->board) { /* i2c device tuners */
949*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
950*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
951*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
952*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
953*4882a593Smuzhiyun break;
954*4882a593Smuzhiyun default:
955*4882a593Smuzhiyun if (dev->tuner_type == TUNER_ABSENT)
956*4882a593Smuzhiyun return -EINVAL;
957*4882a593Smuzhiyun break;
958*4882a593Smuzhiyun }
959*4882a593Smuzhiyun f->type = V4L2_TUNER_ANALOG_TV;
960*4882a593Smuzhiyun f->frequency = dev->freq;
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun call_all(dev, tuner, g_frequency, f);
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun return 0;
965*4882a593Smuzhiyun }
966*4882a593Smuzhiyun
cx23885_set_freq(struct cx23885_dev * dev,const struct v4l2_frequency * f)967*4882a593Smuzhiyun static int cx23885_set_freq(struct cx23885_dev *dev, const struct v4l2_frequency *f)
968*4882a593Smuzhiyun {
969*4882a593Smuzhiyun struct v4l2_ctrl *mute;
970*4882a593Smuzhiyun int old_mute_val = 1;
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun switch (dev->board) { /* i2c device tuners */
973*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
974*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
975*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
976*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
977*4882a593Smuzhiyun break;
978*4882a593Smuzhiyun default:
979*4882a593Smuzhiyun if (dev->tuner_type == TUNER_ABSENT)
980*4882a593Smuzhiyun return -EINVAL;
981*4882a593Smuzhiyun break;
982*4882a593Smuzhiyun }
983*4882a593Smuzhiyun if (unlikely(f->tuner != 0))
984*4882a593Smuzhiyun return -EINVAL;
985*4882a593Smuzhiyun
986*4882a593Smuzhiyun dev->freq = f->frequency;
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun /* I need to mute audio here */
989*4882a593Smuzhiyun mute = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_AUDIO_MUTE);
990*4882a593Smuzhiyun if (mute) {
991*4882a593Smuzhiyun old_mute_val = v4l2_ctrl_g_ctrl(mute);
992*4882a593Smuzhiyun if (!old_mute_val)
993*4882a593Smuzhiyun v4l2_ctrl_s_ctrl(mute, 1);
994*4882a593Smuzhiyun }
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun call_all(dev, tuner, s_frequency, f);
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun /* When changing channels it is required to reset TVAUDIO */
999*4882a593Smuzhiyun msleep(100);
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun /* I need to unmute audio here */
1002*4882a593Smuzhiyun if (old_mute_val == 0)
1003*4882a593Smuzhiyun v4l2_ctrl_s_ctrl(mute, old_mute_val);
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun return 0;
1006*4882a593Smuzhiyun }
1007*4882a593Smuzhiyun
cx23885_set_freq_via_ops(struct cx23885_dev * dev,const struct v4l2_frequency * f)1008*4882a593Smuzhiyun static int cx23885_set_freq_via_ops(struct cx23885_dev *dev,
1009*4882a593Smuzhiyun const struct v4l2_frequency *f)
1010*4882a593Smuzhiyun {
1011*4882a593Smuzhiyun struct v4l2_ctrl *mute;
1012*4882a593Smuzhiyun int old_mute_val = 1;
1013*4882a593Smuzhiyun struct vb2_dvb_frontend *vfe;
1014*4882a593Smuzhiyun struct dvb_frontend *fe;
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun struct analog_parameters params = {
1017*4882a593Smuzhiyun .mode = V4L2_TUNER_ANALOG_TV,
1018*4882a593Smuzhiyun .audmode = V4L2_TUNER_MODE_STEREO,
1019*4882a593Smuzhiyun .std = dev->tvnorm,
1020*4882a593Smuzhiyun .frequency = f->frequency
1021*4882a593Smuzhiyun };
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun dev->freq = f->frequency;
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun /* I need to mute audio here */
1026*4882a593Smuzhiyun mute = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_AUDIO_MUTE);
1027*4882a593Smuzhiyun if (mute) {
1028*4882a593Smuzhiyun old_mute_val = v4l2_ctrl_g_ctrl(mute);
1029*4882a593Smuzhiyun if (!old_mute_val)
1030*4882a593Smuzhiyun v4l2_ctrl_s_ctrl(mute, 1);
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun /* If HVR1850 */
1034*4882a593Smuzhiyun dprintk(1, "%s() frequency=%d tuner=%d std=0x%llx\n", __func__,
1035*4882a593Smuzhiyun params.frequency, f->tuner, params.std);
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun vfe = vb2_dvb_get_frontend(&dev->ts2.frontends, 1);
1038*4882a593Smuzhiyun if (!vfe) {
1039*4882a593Smuzhiyun return -EINVAL;
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun fe = vfe->dvb.frontend;
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) ||
1045*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) ||
1046*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) ||
1047*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4) ||
1048*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_HVR5525) ||
1049*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_DVB) ||
1050*4882a593Smuzhiyun (dev->board == CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC))
1051*4882a593Smuzhiyun fe = &dev->ts1.analog_fe;
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun if (fe && fe->ops.tuner_ops.set_analog_params) {
1054*4882a593Smuzhiyun call_all(dev, video, s_std, dev->tvnorm);
1055*4882a593Smuzhiyun fe->ops.tuner_ops.set_analog_params(fe, ¶ms);
1056*4882a593Smuzhiyun }
1057*4882a593Smuzhiyun else
1058*4882a593Smuzhiyun pr_err("%s() No analog tuner, aborting\n", __func__);
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun /* When changing channels it is required to reset TVAUDIO */
1061*4882a593Smuzhiyun msleep(100);
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun /* I need to unmute audio here */
1064*4882a593Smuzhiyun if (old_mute_val == 0)
1065*4882a593Smuzhiyun v4l2_ctrl_s_ctrl(mute, old_mute_val);
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun return 0;
1068*4882a593Smuzhiyun }
1069*4882a593Smuzhiyun
cx23885_set_frequency(struct file * file,void * priv,const struct v4l2_frequency * f)1070*4882a593Smuzhiyun int cx23885_set_frequency(struct file *file, void *priv,
1071*4882a593Smuzhiyun const struct v4l2_frequency *f)
1072*4882a593Smuzhiyun {
1073*4882a593Smuzhiyun struct cx23885_dev *dev = video_drvdata(file);
1074*4882a593Smuzhiyun int ret;
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun switch (dev->board) {
1077*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1255:
1078*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
1079*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
1080*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1850:
1081*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
1082*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1083*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1084*4882a593Smuzhiyun ret = cx23885_set_freq_via_ops(dev, f);
1085*4882a593Smuzhiyun break;
1086*4882a593Smuzhiyun default:
1087*4882a593Smuzhiyun ret = cx23885_set_freq(dev, f);
1088*4882a593Smuzhiyun }
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun return ret;
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun
vidioc_s_frequency(struct file * file,void * priv,const struct v4l2_frequency * f)1093*4882a593Smuzhiyun static int vidioc_s_frequency(struct file *file, void *priv,
1094*4882a593Smuzhiyun const struct v4l2_frequency *f)
1095*4882a593Smuzhiyun {
1096*4882a593Smuzhiyun return cx23885_set_frequency(file, priv, f);
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun /* ----------------------------------------------------------- */
1100*4882a593Smuzhiyun
cx23885_video_irq(struct cx23885_dev * dev,u32 status)1101*4882a593Smuzhiyun int cx23885_video_irq(struct cx23885_dev *dev, u32 status)
1102*4882a593Smuzhiyun {
1103*4882a593Smuzhiyun u32 mask, count;
1104*4882a593Smuzhiyun int handled = 0;
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun mask = cx_read(VID_A_INT_MSK);
1107*4882a593Smuzhiyun if (0 == (status & mask))
1108*4882a593Smuzhiyun return handled;
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun cx_write(VID_A_INT_STAT, status);
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun /* risc op code error, fifo overflow or line sync detection error */
1113*4882a593Smuzhiyun if ((status & VID_BC_MSK_OPC_ERR) ||
1114*4882a593Smuzhiyun (status & VID_BC_MSK_SYNC) ||
1115*4882a593Smuzhiyun (status & VID_BC_MSK_OF)) {
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun if (status & VID_BC_MSK_OPC_ERR) {
1118*4882a593Smuzhiyun dprintk(7, " (VID_BC_MSK_OPC_ERR 0x%08x)\n",
1119*4882a593Smuzhiyun VID_BC_MSK_OPC_ERR);
1120*4882a593Smuzhiyun pr_warn("%s: video risc op code error\n",
1121*4882a593Smuzhiyun dev->name);
1122*4882a593Smuzhiyun cx23885_sram_channel_dump(dev,
1123*4882a593Smuzhiyun &dev->sram_channels[SRAM_CH01]);
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun if (status & VID_BC_MSK_SYNC)
1127*4882a593Smuzhiyun dprintk(7, " (VID_BC_MSK_SYNC 0x%08x) video lines miss-match\n",
1128*4882a593Smuzhiyun VID_BC_MSK_SYNC);
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun if (status & VID_BC_MSK_OF)
1131*4882a593Smuzhiyun dprintk(7, " (VID_BC_MSK_OF 0x%08x) fifo overflow\n",
1132*4882a593Smuzhiyun VID_BC_MSK_OF);
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun }
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun /* Video */
1137*4882a593Smuzhiyun if (status & VID_BC_MSK_RISCI1) {
1138*4882a593Smuzhiyun spin_lock(&dev->slock);
1139*4882a593Smuzhiyun count = cx_read(VID_A_GPCNT);
1140*4882a593Smuzhiyun cx23885_video_wakeup(dev, &dev->vidq, count);
1141*4882a593Smuzhiyun spin_unlock(&dev->slock);
1142*4882a593Smuzhiyun handled++;
1143*4882a593Smuzhiyun }
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun /* Allow the VBI framework to process it's payload */
1146*4882a593Smuzhiyun handled += cx23885_vbi_irq(dev, status);
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun return handled;
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun /* ----------------------------------------------------------- */
1152*4882a593Smuzhiyun /* exported stuff */
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun static const struct v4l2_file_operations video_fops = {
1155*4882a593Smuzhiyun .owner = THIS_MODULE,
1156*4882a593Smuzhiyun .open = v4l2_fh_open,
1157*4882a593Smuzhiyun .release = vb2_fop_release,
1158*4882a593Smuzhiyun .read = vb2_fop_read,
1159*4882a593Smuzhiyun .poll = vb2_fop_poll,
1160*4882a593Smuzhiyun .unlocked_ioctl = video_ioctl2,
1161*4882a593Smuzhiyun .mmap = vb2_fop_mmap,
1162*4882a593Smuzhiyun };
1163*4882a593Smuzhiyun
1164*4882a593Smuzhiyun static const struct v4l2_ioctl_ops video_ioctl_ops = {
1165*4882a593Smuzhiyun .vidioc_querycap = vidioc_querycap,
1166*4882a593Smuzhiyun .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1167*4882a593Smuzhiyun .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1168*4882a593Smuzhiyun .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1169*4882a593Smuzhiyun .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1170*4882a593Smuzhiyun .vidioc_g_fmt_vbi_cap = cx23885_vbi_fmt,
1171*4882a593Smuzhiyun .vidioc_try_fmt_vbi_cap = cx23885_vbi_fmt,
1172*4882a593Smuzhiyun .vidioc_s_fmt_vbi_cap = cx23885_vbi_fmt,
1173*4882a593Smuzhiyun .vidioc_reqbufs = vb2_ioctl_reqbufs,
1174*4882a593Smuzhiyun .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1175*4882a593Smuzhiyun .vidioc_querybuf = vb2_ioctl_querybuf,
1176*4882a593Smuzhiyun .vidioc_qbuf = vb2_ioctl_qbuf,
1177*4882a593Smuzhiyun .vidioc_dqbuf = vb2_ioctl_dqbuf,
1178*4882a593Smuzhiyun .vidioc_streamon = vb2_ioctl_streamon,
1179*4882a593Smuzhiyun .vidioc_streamoff = vb2_ioctl_streamoff,
1180*4882a593Smuzhiyun .vidioc_g_pixelaspect = vidioc_g_pixelaspect,
1181*4882a593Smuzhiyun .vidioc_g_selection = vidioc_g_selection,
1182*4882a593Smuzhiyun .vidioc_s_std = vidioc_s_std,
1183*4882a593Smuzhiyun .vidioc_g_std = vidioc_g_std,
1184*4882a593Smuzhiyun .vidioc_enum_input = vidioc_enum_input,
1185*4882a593Smuzhiyun .vidioc_g_input = vidioc_g_input,
1186*4882a593Smuzhiyun .vidioc_s_input = vidioc_s_input,
1187*4882a593Smuzhiyun .vidioc_log_status = vidioc_log_status,
1188*4882a593Smuzhiyun .vidioc_g_tuner = vidioc_g_tuner,
1189*4882a593Smuzhiyun .vidioc_s_tuner = vidioc_s_tuner,
1190*4882a593Smuzhiyun .vidioc_g_frequency = vidioc_g_frequency,
1191*4882a593Smuzhiyun .vidioc_s_frequency = vidioc_s_frequency,
1192*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_ADV_DEBUG
1193*4882a593Smuzhiyun .vidioc_g_chip_info = cx23885_g_chip_info,
1194*4882a593Smuzhiyun .vidioc_g_register = cx23885_g_register,
1195*4882a593Smuzhiyun .vidioc_s_register = cx23885_s_register,
1196*4882a593Smuzhiyun #endif
1197*4882a593Smuzhiyun .vidioc_enumaudio = vidioc_enum_audinput,
1198*4882a593Smuzhiyun .vidioc_g_audio = vidioc_g_audinput,
1199*4882a593Smuzhiyun .vidioc_s_audio = vidioc_s_audinput,
1200*4882a593Smuzhiyun .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1201*4882a593Smuzhiyun .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1202*4882a593Smuzhiyun };
1203*4882a593Smuzhiyun
1204*4882a593Smuzhiyun static struct video_device cx23885_vbi_template;
1205*4882a593Smuzhiyun static struct video_device cx23885_video_template = {
1206*4882a593Smuzhiyun .name = "cx23885-video",
1207*4882a593Smuzhiyun .fops = &video_fops,
1208*4882a593Smuzhiyun .ioctl_ops = &video_ioctl_ops,
1209*4882a593Smuzhiyun .tvnorms = CX23885_NORMS,
1210*4882a593Smuzhiyun };
1211*4882a593Smuzhiyun
cx23885_video_unregister(struct cx23885_dev * dev)1212*4882a593Smuzhiyun void cx23885_video_unregister(struct cx23885_dev *dev)
1213*4882a593Smuzhiyun {
1214*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1215*4882a593Smuzhiyun cx23885_irq_remove(dev, 0x01);
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun if (dev->vbi_dev) {
1218*4882a593Smuzhiyun if (video_is_registered(dev->vbi_dev))
1219*4882a593Smuzhiyun video_unregister_device(dev->vbi_dev);
1220*4882a593Smuzhiyun else
1221*4882a593Smuzhiyun video_device_release(dev->vbi_dev);
1222*4882a593Smuzhiyun dev->vbi_dev = NULL;
1223*4882a593Smuzhiyun }
1224*4882a593Smuzhiyun if (dev->video_dev) {
1225*4882a593Smuzhiyun if (video_is_registered(dev->video_dev))
1226*4882a593Smuzhiyun video_unregister_device(dev->video_dev);
1227*4882a593Smuzhiyun else
1228*4882a593Smuzhiyun video_device_release(dev->video_dev);
1229*4882a593Smuzhiyun dev->video_dev = NULL;
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun if (dev->audio_dev)
1233*4882a593Smuzhiyun cx23885_audio_unregister(dev);
1234*4882a593Smuzhiyun }
1235*4882a593Smuzhiyun
cx23885_video_register(struct cx23885_dev * dev)1236*4882a593Smuzhiyun int cx23885_video_register(struct cx23885_dev *dev)
1237*4882a593Smuzhiyun {
1238*4882a593Smuzhiyun struct vb2_queue *q;
1239*4882a593Smuzhiyun int err;
1240*4882a593Smuzhiyun
1241*4882a593Smuzhiyun dprintk(1, "%s()\n", __func__);
1242*4882a593Smuzhiyun
1243*4882a593Smuzhiyun /* Initialize VBI template */
1244*4882a593Smuzhiyun cx23885_vbi_template = cx23885_video_template;
1245*4882a593Smuzhiyun strscpy(cx23885_vbi_template.name, "cx23885-vbi",
1246*4882a593Smuzhiyun sizeof(cx23885_vbi_template.name));
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun dev->tvnorm = V4L2_STD_NTSC_M;
1249*4882a593Smuzhiyun dev->fmt = format_by_fourcc(V4L2_PIX_FMT_YUYV);
1250*4882a593Smuzhiyun dev->field = V4L2_FIELD_INTERLACED;
1251*4882a593Smuzhiyun dev->width = 720;
1252*4882a593Smuzhiyun dev->height = norm_maxh(dev->tvnorm);
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun /* init video dma queues */
1255*4882a593Smuzhiyun INIT_LIST_HEAD(&dev->vidq.active);
1256*4882a593Smuzhiyun
1257*4882a593Smuzhiyun /* init vbi dma queues */
1258*4882a593Smuzhiyun INIT_LIST_HEAD(&dev->vbiq.active);
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun cx23885_irq_add_enable(dev, 0x01);
1261*4882a593Smuzhiyun
1262*4882a593Smuzhiyun if ((TUNER_ABSENT != dev->tuner_type) &&
1263*4882a593Smuzhiyun ((dev->tuner_bus == 0) || (dev->tuner_bus == 1))) {
1264*4882a593Smuzhiyun struct v4l2_subdev *sd = NULL;
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun if (dev->tuner_addr)
1267*4882a593Smuzhiyun sd = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1268*4882a593Smuzhiyun &dev->i2c_bus[dev->tuner_bus].i2c_adap,
1269*4882a593Smuzhiyun "tuner", dev->tuner_addr, NULL);
1270*4882a593Smuzhiyun else
1271*4882a593Smuzhiyun sd = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1272*4882a593Smuzhiyun &dev->i2c_bus[dev->tuner_bus].i2c_adap,
1273*4882a593Smuzhiyun "tuner", 0, v4l2_i2c_tuner_addrs(ADDRS_TV));
1274*4882a593Smuzhiyun if (sd) {
1275*4882a593Smuzhiyun struct tuner_setup tun_setup;
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun memset(&tun_setup, 0, sizeof(tun_setup));
1278*4882a593Smuzhiyun tun_setup.mode_mask = T_ANALOG_TV;
1279*4882a593Smuzhiyun tun_setup.type = dev->tuner_type;
1280*4882a593Smuzhiyun tun_setup.addr = v4l2_i2c_subdev_addr(sd);
1281*4882a593Smuzhiyun tun_setup.tuner_callback = cx23885_tuner_callback;
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun v4l2_subdev_call(sd, tuner, s_type_addr, &tun_setup);
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun if ((dev->board == CX23885_BOARD_LEADTEK_WINFAST_PXTV1200) ||
1286*4882a593Smuzhiyun (dev->board == CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200)) {
1287*4882a593Smuzhiyun struct xc2028_ctrl ctrl = {
1288*4882a593Smuzhiyun .fname = XC2028_DEFAULT_FIRMWARE,
1289*4882a593Smuzhiyun .max_len = 64
1290*4882a593Smuzhiyun };
1291*4882a593Smuzhiyun struct v4l2_priv_tun_config cfg = {
1292*4882a593Smuzhiyun .tuner = dev->tuner_type,
1293*4882a593Smuzhiyun .priv = &ctrl
1294*4882a593Smuzhiyun };
1295*4882a593Smuzhiyun v4l2_subdev_call(sd, tuner, s_config, &cfg);
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun
1298*4882a593Smuzhiyun if (dev->board == CX23885_BOARD_AVERMEDIA_HC81R) {
1299*4882a593Smuzhiyun struct xc2028_ctrl ctrl = {
1300*4882a593Smuzhiyun .fname = "xc3028L-v36.fw",
1301*4882a593Smuzhiyun .max_len = 64
1302*4882a593Smuzhiyun };
1303*4882a593Smuzhiyun struct v4l2_priv_tun_config cfg = {
1304*4882a593Smuzhiyun .tuner = dev->tuner_type,
1305*4882a593Smuzhiyun .priv = &ctrl
1306*4882a593Smuzhiyun };
1307*4882a593Smuzhiyun v4l2_subdev_call(sd, tuner, s_config, &cfg);
1308*4882a593Smuzhiyun }
1309*4882a593Smuzhiyun }
1310*4882a593Smuzhiyun }
1311*4882a593Smuzhiyun
1312*4882a593Smuzhiyun /* initial device configuration */
1313*4882a593Smuzhiyun mutex_lock(&dev->lock);
1314*4882a593Smuzhiyun cx23885_set_tvnorm(dev, dev->tvnorm);
1315*4882a593Smuzhiyun cx23885_video_mux(dev, 0);
1316*4882a593Smuzhiyun cx23885_audio_mux(dev, 0);
1317*4882a593Smuzhiyun mutex_unlock(&dev->lock);
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun q = &dev->vb2_vidq;
1320*4882a593Smuzhiyun q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1321*4882a593Smuzhiyun q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1322*4882a593Smuzhiyun q->gfp_flags = GFP_DMA32;
1323*4882a593Smuzhiyun q->min_buffers_needed = 2;
1324*4882a593Smuzhiyun q->drv_priv = dev;
1325*4882a593Smuzhiyun q->buf_struct_size = sizeof(struct cx23885_buffer);
1326*4882a593Smuzhiyun q->ops = &cx23885_video_qops;
1327*4882a593Smuzhiyun q->mem_ops = &vb2_dma_sg_memops;
1328*4882a593Smuzhiyun q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1329*4882a593Smuzhiyun q->lock = &dev->lock;
1330*4882a593Smuzhiyun q->dev = &dev->pci->dev;
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun err = vb2_queue_init(q);
1333*4882a593Smuzhiyun if (err < 0)
1334*4882a593Smuzhiyun goto fail_unreg;
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun q = &dev->vb2_vbiq;
1337*4882a593Smuzhiyun q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1338*4882a593Smuzhiyun q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1339*4882a593Smuzhiyun q->gfp_flags = GFP_DMA32;
1340*4882a593Smuzhiyun q->min_buffers_needed = 2;
1341*4882a593Smuzhiyun q->drv_priv = dev;
1342*4882a593Smuzhiyun q->buf_struct_size = sizeof(struct cx23885_buffer);
1343*4882a593Smuzhiyun q->ops = &cx23885_vbi_qops;
1344*4882a593Smuzhiyun q->mem_ops = &vb2_dma_sg_memops;
1345*4882a593Smuzhiyun q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1346*4882a593Smuzhiyun q->lock = &dev->lock;
1347*4882a593Smuzhiyun q->dev = &dev->pci->dev;
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun err = vb2_queue_init(q);
1350*4882a593Smuzhiyun if (err < 0)
1351*4882a593Smuzhiyun goto fail_unreg;
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun /* register Video device */
1354*4882a593Smuzhiyun dev->video_dev = cx23885_vdev_init(dev, dev->pci,
1355*4882a593Smuzhiyun &cx23885_video_template, "video");
1356*4882a593Smuzhiyun dev->video_dev->queue = &dev->vb2_vidq;
1357*4882a593Smuzhiyun dev->video_dev->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1358*4882a593Smuzhiyun V4L2_CAP_AUDIO | V4L2_CAP_VIDEO_CAPTURE;
1359*4882a593Smuzhiyun switch (dev->board) { /* i2c device tuners */
1360*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
1361*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
1362*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1363*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1364*4882a593Smuzhiyun dev->video_dev->device_caps |= V4L2_CAP_TUNER;
1365*4882a593Smuzhiyun break;
1366*4882a593Smuzhiyun default:
1367*4882a593Smuzhiyun if (dev->tuner_type != TUNER_ABSENT)
1368*4882a593Smuzhiyun dev->video_dev->device_caps |= V4L2_CAP_TUNER;
1369*4882a593Smuzhiyun }
1370*4882a593Smuzhiyun
1371*4882a593Smuzhiyun err = video_register_device(dev->video_dev, VFL_TYPE_VIDEO,
1372*4882a593Smuzhiyun video_nr[dev->nr]);
1373*4882a593Smuzhiyun if (err < 0) {
1374*4882a593Smuzhiyun pr_info("%s: can't register video device\n",
1375*4882a593Smuzhiyun dev->name);
1376*4882a593Smuzhiyun goto fail_unreg;
1377*4882a593Smuzhiyun }
1378*4882a593Smuzhiyun pr_info("%s: registered device %s [v4l2]\n",
1379*4882a593Smuzhiyun dev->name, video_device_node_name(dev->video_dev));
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun /* register VBI device */
1382*4882a593Smuzhiyun dev->vbi_dev = cx23885_vdev_init(dev, dev->pci,
1383*4882a593Smuzhiyun &cx23885_vbi_template, "vbi");
1384*4882a593Smuzhiyun dev->vbi_dev->queue = &dev->vb2_vbiq;
1385*4882a593Smuzhiyun dev->vbi_dev->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1386*4882a593Smuzhiyun V4L2_CAP_AUDIO | V4L2_CAP_VBI_CAPTURE;
1387*4882a593Smuzhiyun switch (dev->board) { /* i2c device tuners */
1388*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR1265_K4:
1389*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_HVR5525:
1390*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
1391*4882a593Smuzhiyun case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1392*4882a593Smuzhiyun dev->vbi_dev->device_caps |= V4L2_CAP_TUNER;
1393*4882a593Smuzhiyun break;
1394*4882a593Smuzhiyun default:
1395*4882a593Smuzhiyun if (dev->tuner_type != TUNER_ABSENT)
1396*4882a593Smuzhiyun dev->vbi_dev->device_caps |= V4L2_CAP_TUNER;
1397*4882a593Smuzhiyun }
1398*4882a593Smuzhiyun err = video_register_device(dev->vbi_dev, VFL_TYPE_VBI,
1399*4882a593Smuzhiyun vbi_nr[dev->nr]);
1400*4882a593Smuzhiyun if (err < 0) {
1401*4882a593Smuzhiyun pr_info("%s: can't register vbi device\n",
1402*4882a593Smuzhiyun dev->name);
1403*4882a593Smuzhiyun goto fail_unreg;
1404*4882a593Smuzhiyun }
1405*4882a593Smuzhiyun pr_info("%s: registered device %s\n",
1406*4882a593Smuzhiyun dev->name, video_device_node_name(dev->vbi_dev));
1407*4882a593Smuzhiyun
1408*4882a593Smuzhiyun /* Register ALSA audio device */
1409*4882a593Smuzhiyun dev->audio_dev = cx23885_audio_register(dev);
1410*4882a593Smuzhiyun
1411*4882a593Smuzhiyun return 0;
1412*4882a593Smuzhiyun
1413*4882a593Smuzhiyun fail_unreg:
1414*4882a593Smuzhiyun cx23885_video_unregister(dev);
1415*4882a593Smuzhiyun return err;
1416*4882a593Smuzhiyun }
1417