1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for Silicon Labs C8051F300 microcontroller.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * It is used for LNB power control in TeVii S470,
6*4882a593Smuzhiyun * TBS 6920 PCIe DVB-S2 cards.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Microcontroller connected to cx23885 GPIO pins:
9*4882a593Smuzhiyun * GPIO0 - data - P0.3 F300
10*4882a593Smuzhiyun * GPIO1 - reset - P0.2 F300
11*4882a593Smuzhiyun * GPIO2 - clk - P0.1 F300
12*4882a593Smuzhiyun * GPIO3 - busy - P0.0 F300
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * Copyright (C) 2009 Igor M. Liplianin <liplianin@me.by>
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "cx23885.h"
18*4882a593Smuzhiyun #include "cx23885-f300.h"
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define F300_DATA GPIO_0
21*4882a593Smuzhiyun #define F300_RESET GPIO_1
22*4882a593Smuzhiyun #define F300_CLK GPIO_2
23*4882a593Smuzhiyun #define F300_BUSY GPIO_3
24*4882a593Smuzhiyun
f300_set_line(struct cx23885_dev * dev,u32 line,u8 lvl)25*4882a593Smuzhiyun static void f300_set_line(struct cx23885_dev *dev, u32 line, u8 lvl)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun cx23885_gpio_enable(dev, line, 1);
28*4882a593Smuzhiyun if (lvl == 1)
29*4882a593Smuzhiyun cx23885_gpio_set(dev, line);
30*4882a593Smuzhiyun else
31*4882a593Smuzhiyun cx23885_gpio_clear(dev, line);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
f300_get_line(struct cx23885_dev * dev,u32 line)34*4882a593Smuzhiyun static u8 f300_get_line(struct cx23885_dev *dev, u32 line)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun cx23885_gpio_enable(dev, line, 0);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return cx23885_gpio_get(dev, line);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
f300_send_byte(struct cx23885_dev * dev,u8 dta)41*4882a593Smuzhiyun static void f300_send_byte(struct cx23885_dev *dev, u8 dta)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun u8 i;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
46*4882a593Smuzhiyun f300_set_line(dev, F300_CLK, 0);
47*4882a593Smuzhiyun udelay(30);
48*4882a593Smuzhiyun f300_set_line(dev, F300_DATA, (dta & 0x80) >> 7);/* msb first */
49*4882a593Smuzhiyun udelay(30);
50*4882a593Smuzhiyun dta <<= 1;
51*4882a593Smuzhiyun f300_set_line(dev, F300_CLK, 1);
52*4882a593Smuzhiyun udelay(30);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
f300_get_byte(struct cx23885_dev * dev)56*4882a593Smuzhiyun static u8 f300_get_byte(struct cx23885_dev *dev)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun u8 i, dta = 0;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
61*4882a593Smuzhiyun f300_set_line(dev, F300_CLK, 0);
62*4882a593Smuzhiyun udelay(30);
63*4882a593Smuzhiyun dta <<= 1;
64*4882a593Smuzhiyun f300_set_line(dev, F300_CLK, 1);
65*4882a593Smuzhiyun udelay(30);
66*4882a593Smuzhiyun dta |= f300_get_line(dev, F300_DATA);/* msb first */
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return dta;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
f300_xfer(struct dvb_frontend * fe,u8 * buf)73*4882a593Smuzhiyun static u8 f300_xfer(struct dvb_frontend *fe, u8 *buf)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun struct cx23885_tsport *port = fe->dvb->priv;
76*4882a593Smuzhiyun struct cx23885_dev *dev = port->dev;
77*4882a593Smuzhiyun u8 i, temp, ret = 0;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun temp = buf[0];
80*4882a593Smuzhiyun for (i = 0; i < buf[0]; i++)
81*4882a593Smuzhiyun temp += buf[i + 1];
82*4882a593Smuzhiyun temp = (~temp + 1);/* get check sum */
83*4882a593Smuzhiyun buf[1 + buf[0]] = temp;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun f300_set_line(dev, F300_RESET, 1);
86*4882a593Smuzhiyun f300_set_line(dev, F300_CLK, 1);
87*4882a593Smuzhiyun udelay(30);
88*4882a593Smuzhiyun f300_set_line(dev, F300_DATA, 1);
89*4882a593Smuzhiyun msleep(1);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* question: */
92*4882a593Smuzhiyun f300_set_line(dev, F300_RESET, 0);/* begin to send data */
93*4882a593Smuzhiyun msleep(1);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun f300_send_byte(dev, 0xe0);/* the slave address is 0xe0, write */
96*4882a593Smuzhiyun msleep(1);
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun temp = buf[0];
99*4882a593Smuzhiyun temp += 2;
100*4882a593Smuzhiyun for (i = 0; i < temp; i++)
101*4882a593Smuzhiyun f300_send_byte(dev, buf[i]);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun f300_set_line(dev, F300_RESET, 1);/* sent data over */
104*4882a593Smuzhiyun f300_set_line(dev, F300_DATA, 1);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* answer: */
107*4882a593Smuzhiyun temp = 0;
108*4882a593Smuzhiyun for (i = 0; ((i < 8) & (temp == 0)); i++) {
109*4882a593Smuzhiyun msleep(1);
110*4882a593Smuzhiyun if (f300_get_line(dev, F300_BUSY) == 0)
111*4882a593Smuzhiyun temp = 1;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun if (i > 7) {
115*4882a593Smuzhiyun pr_err("%s: timeout, the slave no response\n",
116*4882a593Smuzhiyun __func__);
117*4882a593Smuzhiyun ret = 1; /* timeout, the slave no response */
118*4882a593Smuzhiyun } else { /* the slave not busy, prepare for getting data */
119*4882a593Smuzhiyun f300_set_line(dev, F300_RESET, 0);/*ready...*/
120*4882a593Smuzhiyun msleep(1);
121*4882a593Smuzhiyun f300_send_byte(dev, 0xe1);/* 0xe1 is Read */
122*4882a593Smuzhiyun msleep(1);
123*4882a593Smuzhiyun temp = f300_get_byte(dev);/*get the data length */
124*4882a593Smuzhiyun if (temp > 14)
125*4882a593Smuzhiyun temp = 14;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun for (i = 0; i < (temp + 1); i++)
128*4882a593Smuzhiyun f300_get_byte(dev);/* get data to empty buffer */
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun f300_set_line(dev, F300_RESET, 1);/* received data over */
131*4882a593Smuzhiyun f300_set_line(dev, F300_DATA, 1);
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun return ret;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
f300_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)137*4882a593Smuzhiyun int f300_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun u8 buf[16];
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun buf[0] = 0x05;
142*4882a593Smuzhiyun buf[1] = 0x38;/* write port */
143*4882a593Smuzhiyun buf[2] = 0x01;/* A port, lnb power */
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun switch (voltage) {
146*4882a593Smuzhiyun case SEC_VOLTAGE_13:
147*4882a593Smuzhiyun buf[3] = 0x01;/* power on */
148*4882a593Smuzhiyun buf[4] = 0x02;/* B port, H/V */
149*4882a593Smuzhiyun buf[5] = 0x00;/*13V v*/
150*4882a593Smuzhiyun break;
151*4882a593Smuzhiyun case SEC_VOLTAGE_18:
152*4882a593Smuzhiyun buf[3] = 0x01;
153*4882a593Smuzhiyun buf[4] = 0x02;
154*4882a593Smuzhiyun buf[5] = 0x01;/* 18V h*/
155*4882a593Smuzhiyun break;
156*4882a593Smuzhiyun case SEC_VOLTAGE_OFF:
157*4882a593Smuzhiyun buf[3] = 0x00;/* power off */
158*4882a593Smuzhiyun buf[4] = 0x00;
159*4882a593Smuzhiyun buf[5] = 0x00;
160*4882a593Smuzhiyun break;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun return f300_xfer(fe, buf);
164*4882a593Smuzhiyun }
165