1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * cx18 functions to query card hardware 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Derived from ivtv-cards.c 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 8*4882a593Smuzhiyun * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* hardware flags */ 12*4882a593Smuzhiyun #define CX18_HW_TUNER (1 << 0) 13*4882a593Smuzhiyun #define CX18_HW_TVEEPROM (1 << 1) 14*4882a593Smuzhiyun #define CX18_HW_CS5345 (1 << 2) 15*4882a593Smuzhiyun #define CX18_HW_DVB (1 << 3) 16*4882a593Smuzhiyun #define CX18_HW_418_AV (1 << 4) 17*4882a593Smuzhiyun #define CX18_HW_GPIO_MUX (1 << 5) 18*4882a593Smuzhiyun #define CX18_HW_GPIO_RESET_CTRL (1 << 6) 19*4882a593Smuzhiyun #define CX18_HW_Z8F0811_IR_HAUP (1 << 7) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun /* video inputs */ 22*4882a593Smuzhiyun #define CX18_CARD_INPUT_VID_TUNER 1 23*4882a593Smuzhiyun #define CX18_CARD_INPUT_SVIDEO1 2 24*4882a593Smuzhiyun #define CX18_CARD_INPUT_SVIDEO2 3 25*4882a593Smuzhiyun #define CX18_CARD_INPUT_COMPOSITE1 4 26*4882a593Smuzhiyun #define CX18_CARD_INPUT_COMPOSITE2 5 27*4882a593Smuzhiyun #define CX18_CARD_INPUT_COMPONENT1 6 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun /* audio inputs */ 30*4882a593Smuzhiyun #define CX18_CARD_INPUT_AUD_TUNER 1 31*4882a593Smuzhiyun #define CX18_CARD_INPUT_LINE_IN1 2 32*4882a593Smuzhiyun #define CX18_CARD_INPUT_LINE_IN2 3 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #define CX18_CARD_MAX_VIDEO_INPUTS 6 35*4882a593Smuzhiyun #define CX18_CARD_MAX_AUDIO_INPUTS 3 36*4882a593Smuzhiyun #define CX18_CARD_MAX_TUNERS 2 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* V4L2 capability aliases */ 39*4882a593Smuzhiyun #define CX18_CAP_ENCODER (V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER | \ 40*4882a593Smuzhiyun V4L2_CAP_AUDIO | V4L2_CAP_READWRITE | \ 41*4882a593Smuzhiyun V4L2_CAP_STREAMING | V4L2_CAP_VBI_CAPTURE | \ 42*4882a593Smuzhiyun V4L2_CAP_SLICED_VBI_CAPTURE) 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct cx18_card_video_input { 45*4882a593Smuzhiyun u8 video_type; /* video input type */ 46*4882a593Smuzhiyun u8 audio_index; /* index in cx18_card_audio_input array */ 47*4882a593Smuzhiyun u32 video_input; /* hardware video input */ 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun struct cx18_card_audio_input { 51*4882a593Smuzhiyun u8 audio_type; /* audio input type */ 52*4882a593Smuzhiyun u32 audio_input; /* hardware audio input */ 53*4882a593Smuzhiyun u16 muxer_input; /* hardware muxer input for boards with a 54*4882a593Smuzhiyun multiplexer chip */ 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun struct cx18_card_pci_info { 58*4882a593Smuzhiyun u16 device; 59*4882a593Smuzhiyun u16 subsystem_vendor; 60*4882a593Smuzhiyun u16 subsystem_device; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* GPIO definitions */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* The mask is the set of bits used by the operation */ 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun struct cx18_gpio_init { /* set initial GPIO DIR and OUT values */ 68*4882a593Smuzhiyun u32 direction; /* DIR setting. Leave to 0 if no init is needed */ 69*4882a593Smuzhiyun u32 initial_value; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun struct cx18_gpio_i2c_slave_reset { 73*4882a593Smuzhiyun u32 active_lo_mask; /* GPIO outputs that reset i2c chips when low */ 74*4882a593Smuzhiyun u32 active_hi_mask; /* GPIO outputs that reset i2c chips when high */ 75*4882a593Smuzhiyun int msecs_asserted; /* time period reset must remain asserted */ 76*4882a593Smuzhiyun int msecs_recovery; /* time after deassert for chips to be ready */ 77*4882a593Smuzhiyun u32 ir_reset_mask; /* GPIO to reset the Zilog Z8F0811 IR controller */ 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun struct cx18_gpio_audio_input { /* select tuner/line in input */ 81*4882a593Smuzhiyun u32 mask; /* leave to 0 if not supported */ 82*4882a593Smuzhiyun u32 tuner; 83*4882a593Smuzhiyun u32 linein; 84*4882a593Smuzhiyun u32 radio; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun struct cx18_card_tuner { 88*4882a593Smuzhiyun v4l2_std_id std; /* standard for which the tuner is suitable */ 89*4882a593Smuzhiyun int tuner; /* tuner ID (from tuner.h) */ 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun struct cx18_card_tuner_i2c { 93*4882a593Smuzhiyun unsigned short radio[2];/* radio tuner i2c address to probe */ 94*4882a593Smuzhiyun unsigned short demod[3];/* demodulator i2c address to probe */ 95*4882a593Smuzhiyun unsigned short tv[4]; /* tv tuner i2c addresses to probe */ 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun struct cx18_ddr { /* DDR config data */ 99*4882a593Smuzhiyun u32 chip_config; 100*4882a593Smuzhiyun u32 refresh; 101*4882a593Smuzhiyun u32 timing1; 102*4882a593Smuzhiyun u32 timing2; 103*4882a593Smuzhiyun u32 tune_lane; 104*4882a593Smuzhiyun u32 initial_emrs; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun /* for card information/parameters */ 108*4882a593Smuzhiyun struct cx18_card { 109*4882a593Smuzhiyun int type; 110*4882a593Smuzhiyun char *name; 111*4882a593Smuzhiyun char *comment; 112*4882a593Smuzhiyun u32 v4l2_capabilities; 113*4882a593Smuzhiyun u32 hw_audio_ctrl; /* hardware used for the V4L2 controls (only 114*4882a593Smuzhiyun 1 dev allowed currently) */ 115*4882a593Smuzhiyun u32 hw_muxer; /* hardware used to multiplex audio input */ 116*4882a593Smuzhiyun u32 hw_all; /* all hardware used by the board */ 117*4882a593Smuzhiyun struct cx18_card_video_input video_inputs[CX18_CARD_MAX_VIDEO_INPUTS]; 118*4882a593Smuzhiyun struct cx18_card_audio_input audio_inputs[CX18_CARD_MAX_AUDIO_INPUTS]; 119*4882a593Smuzhiyun struct cx18_card_audio_input radio_input; 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun /* GPIO card-specific settings */ 122*4882a593Smuzhiyun u8 xceive_pin; /* XCeive tuner GPIO reset pin */ 123*4882a593Smuzhiyun struct cx18_gpio_init gpio_init; 124*4882a593Smuzhiyun struct cx18_gpio_i2c_slave_reset gpio_i2c_slave_reset; 125*4882a593Smuzhiyun struct cx18_gpio_audio_input gpio_audio_input; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun struct cx18_card_tuner tuners[CX18_CARD_MAX_TUNERS]; 128*4882a593Smuzhiyun struct cx18_card_tuner_i2c *i2c; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun struct cx18_ddr ddr; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun /* list of device and subsystem vendor/devices that 133*4882a593Smuzhiyun correspond to this card type. */ 134*4882a593Smuzhiyun const struct cx18_card_pci_info *pci_list; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun int cx18_get_input(struct cx18 *cx, u16 index, struct v4l2_input *input); 138*4882a593Smuzhiyun int cx18_get_audio_input(struct cx18 *cx, u16 index, struct v4l2_audio *input); 139*4882a593Smuzhiyun const struct cx18_card *cx18_get_card(u16 index); 140