1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * cx18 audio-related functions
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Derived from ivtv-audio.c
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "cx18-driver.h"
11*4882a593Smuzhiyun #include "cx18-io.h"
12*4882a593Smuzhiyun #include "cx18-cards.h"
13*4882a593Smuzhiyun #include "cx18-audio.h"
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define CX18_AUDIO_ENABLE 0xc72014
16*4882a593Smuzhiyun #define CX18_AI1_MUX_MASK 0x30
17*4882a593Smuzhiyun #define CX18_AI1_MUX_I2S1 0x00
18*4882a593Smuzhiyun #define CX18_AI1_MUX_I2S2 0x10
19*4882a593Smuzhiyun #define CX18_AI1_MUX_843_I2S 0x20
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun /* Selects the audio input and output according to the current
22*4882a593Smuzhiyun settings. */
cx18_audio_set_io(struct cx18 * cx)23*4882a593Smuzhiyun int cx18_audio_set_io(struct cx18 *cx)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun const struct cx18_card_audio_input *in;
26*4882a593Smuzhiyun u32 u, v;
27*4882a593Smuzhiyun int err;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* Determine which input to use */
30*4882a593Smuzhiyun if (test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
31*4882a593Smuzhiyun in = &cx->card->radio_input;
32*4882a593Smuzhiyun else
33*4882a593Smuzhiyun in = &cx->card->audio_inputs[cx->audio_input];
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* handle muxer chips */
36*4882a593Smuzhiyun v4l2_subdev_call(cx->sd_extmux, audio, s_routing,
37*4882a593Smuzhiyun (u32) in->muxer_input, 0, 0);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun err = cx18_call_hw_err(cx, cx->card->hw_audio_ctrl,
40*4882a593Smuzhiyun audio, s_routing, in->audio_input, 0, 0);
41*4882a593Smuzhiyun if (err)
42*4882a593Smuzhiyun return err;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun /* FIXME - this internal mux should be abstracted to a subdev */
45*4882a593Smuzhiyun u = cx18_read_reg(cx, CX18_AUDIO_ENABLE);
46*4882a593Smuzhiyun v = u & ~CX18_AI1_MUX_MASK;
47*4882a593Smuzhiyun switch (in->audio_input) {
48*4882a593Smuzhiyun case CX18_AV_AUDIO_SERIAL1:
49*4882a593Smuzhiyun v |= CX18_AI1_MUX_I2S1;
50*4882a593Smuzhiyun break;
51*4882a593Smuzhiyun case CX18_AV_AUDIO_SERIAL2:
52*4882a593Smuzhiyun v |= CX18_AI1_MUX_I2S2;
53*4882a593Smuzhiyun break;
54*4882a593Smuzhiyun default:
55*4882a593Smuzhiyun v |= CX18_AI1_MUX_843_I2S;
56*4882a593Smuzhiyun break;
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun if (v == u) {
59*4882a593Smuzhiyun /* force a toggle of some AI1 MUX control bits */
60*4882a593Smuzhiyun u &= ~CX18_AI1_MUX_MASK;
61*4882a593Smuzhiyun switch (in->audio_input) {
62*4882a593Smuzhiyun case CX18_AV_AUDIO_SERIAL1:
63*4882a593Smuzhiyun u |= CX18_AI1_MUX_843_I2S;
64*4882a593Smuzhiyun break;
65*4882a593Smuzhiyun case CX18_AV_AUDIO_SERIAL2:
66*4882a593Smuzhiyun u |= CX18_AI1_MUX_843_I2S;
67*4882a593Smuzhiyun break;
68*4882a593Smuzhiyun default:
69*4882a593Smuzhiyun u |= CX18_AI1_MUX_I2S1;
70*4882a593Smuzhiyun break;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun cx18_write_reg_expect(cx, u | 0xb00, CX18_AUDIO_ENABLE,
73*4882a593Smuzhiyun u, CX18_AI1_MUX_MASK);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun cx18_write_reg_expect(cx, v | 0xb00, CX18_AUDIO_ENABLE,
76*4882a593Smuzhiyun v, CX18_AI1_MUX_MASK);
77*4882a593Smuzhiyun return 0;
78*4882a593Smuzhiyun }
79