xref: /OK3568_Linux_fs/kernel/drivers/media/pci/bt8xx/dvb-bt8xx.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Bt8xx based DVB adapter driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2002,2003 Florian Schirmer <jolt@tuxbox.org>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/bitops.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <media/dmxdev.h>
20*4882a593Smuzhiyun #include <media/dvbdev.h>
21*4882a593Smuzhiyun #include <media/dvb_demux.h>
22*4882a593Smuzhiyun #include <media/dvb_frontend.h>
23*4882a593Smuzhiyun #include "dvb-bt8xx.h"
24*4882a593Smuzhiyun #include "bt878.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun static int debug;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun module_param(debug, int, 0644);
29*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define dprintk(fmt, arg...) do {				\
34*4882a593Smuzhiyun 	if (debug)						\
35*4882a593Smuzhiyun 		printk(KERN_DEBUG pr_fmt("%s: " fmt),		\
36*4882a593Smuzhiyun 		       __func__, ##arg);			\
37*4882a593Smuzhiyun } while (0)
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define IF_FREQUENCYx6 217    /* 6 * 36.16666666667MHz */
41*4882a593Smuzhiyun 
dvb_bt8xx_task(struct tasklet_struct * t)42*4882a593Smuzhiyun static void dvb_bt8xx_task(struct tasklet_struct *t)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	struct bt878 *bt = from_tasklet(bt, t, tasklet);
45*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = dev_get_drvdata(&bt->adapter->dev);
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	dprintk("%d\n", card->bt->finished_block);
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	while (card->bt->last_block != card->bt->finished_block) {
50*4882a593Smuzhiyun 		(card->bt->TS_Size ? dvb_dmx_swfilter_204 : dvb_dmx_swfilter)
51*4882a593Smuzhiyun 			(&card->demux,
52*4882a593Smuzhiyun 			 &card->bt->buf_cpu[card->bt->last_block *
53*4882a593Smuzhiyun 					    card->bt->block_bytes],
54*4882a593Smuzhiyun 			 card->bt->block_bytes);
55*4882a593Smuzhiyun 		card->bt->last_block = (card->bt->last_block + 1) %
56*4882a593Smuzhiyun 					card->bt->block_count;
57*4882a593Smuzhiyun 	}
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun 
dvb_bt8xx_start_feed(struct dvb_demux_feed * dvbdmxfeed)60*4882a593Smuzhiyun static int dvb_bt8xx_start_feed(struct dvb_demux_feed *dvbdmxfeed)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	struct dvb_demux*dvbdmx = dvbdmxfeed->demux;
63*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = dvbdmx->priv;
64*4882a593Smuzhiyun 	int rc;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	dprintk("dvb_bt8xx: start_feed\n");
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	if (!dvbdmx->dmx.frontend)
69*4882a593Smuzhiyun 		return -EINVAL;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	mutex_lock(&card->lock);
72*4882a593Smuzhiyun 	card->nfeeds++;
73*4882a593Smuzhiyun 	rc = card->nfeeds;
74*4882a593Smuzhiyun 	if (card->nfeeds == 1)
75*4882a593Smuzhiyun 		bt878_start(card->bt, card->gpio_mode,
76*4882a593Smuzhiyun 			    card->op_sync_orin, card->irq_err_ignore);
77*4882a593Smuzhiyun 	mutex_unlock(&card->lock);
78*4882a593Smuzhiyun 	return rc;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun 
dvb_bt8xx_stop_feed(struct dvb_demux_feed * dvbdmxfeed)81*4882a593Smuzhiyun static int dvb_bt8xx_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun 	struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
84*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = dvbdmx->priv;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	dprintk("dvb_bt8xx: stop_feed\n");
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	if (!dvbdmx->dmx.frontend)
89*4882a593Smuzhiyun 		return -EINVAL;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	mutex_lock(&card->lock);
92*4882a593Smuzhiyun 	card->nfeeds--;
93*4882a593Smuzhiyun 	if (card->nfeeds == 0)
94*4882a593Smuzhiyun 		bt878_stop(card->bt);
95*4882a593Smuzhiyun 	mutex_unlock(&card->lock);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	return 0;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
is_pci_slot_eq(struct pci_dev * adev,struct pci_dev * bdev)100*4882a593Smuzhiyun static int is_pci_slot_eq(struct pci_dev* adev, struct pci_dev* bdev)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	if ((adev->subsystem_vendor == bdev->subsystem_vendor) &&
103*4882a593Smuzhiyun 		(adev->subsystem_device == bdev->subsystem_device) &&
104*4882a593Smuzhiyun 		(adev->bus->number == bdev->bus->number) &&
105*4882a593Smuzhiyun 		(PCI_SLOT(adev->devfn) == PCI_SLOT(bdev->devfn)))
106*4882a593Smuzhiyun 		return 1;
107*4882a593Smuzhiyun 	return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
dvb_bt8xx_878_match(unsigned int bttv_nr,struct pci_dev * bttv_pci_dev)110*4882a593Smuzhiyun static struct bt878 *dvb_bt8xx_878_match(unsigned int bttv_nr,
111*4882a593Smuzhiyun 					 struct pci_dev* bttv_pci_dev)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	unsigned int card_nr;
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	/* Hmm, n squared. Hope n is small */
116*4882a593Smuzhiyun 	for (card_nr = 0; card_nr < bt878_num; card_nr++)
117*4882a593Smuzhiyun 		if (is_pci_slot_eq(bt878[card_nr].dev, bttv_pci_dev))
118*4882a593Smuzhiyun 			return &bt878[card_nr];
119*4882a593Smuzhiyun 	return NULL;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun 
thomson_dtt7579_demod_init(struct dvb_frontend * fe)122*4882a593Smuzhiyun static int thomson_dtt7579_demod_init(struct dvb_frontend* fe)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun 	static u8 mt352_clock_config [] = { 0x89, 0x38, 0x38 };
125*4882a593Smuzhiyun 	static u8 mt352_reset [] = { 0x50, 0x80 };
126*4882a593Smuzhiyun 	static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
127*4882a593Smuzhiyun 	static u8 mt352_agc_cfg [] = { 0x67, 0x28, 0x20 };
128*4882a593Smuzhiyun 	static u8 mt352_gpp_ctl_cfg [] = { 0x8C, 0x33 };
129*4882a593Smuzhiyun 	static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
132*4882a593Smuzhiyun 	udelay(2000);
133*4882a593Smuzhiyun 	mt352_write(fe, mt352_reset, sizeof(mt352_reset));
134*4882a593Smuzhiyun 	mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg));
137*4882a593Smuzhiyun 	mt352_write(fe, mt352_gpp_ctl_cfg, sizeof(mt352_gpp_ctl_cfg));
138*4882a593Smuzhiyun 	mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	return 0;
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun 
thomson_dtt7579_tuner_calc_regs(struct dvb_frontend * fe,u8 * pllbuf,int buf_len)143*4882a593Smuzhiyun static int thomson_dtt7579_tuner_calc_regs(struct dvb_frontend *fe, u8* pllbuf, int buf_len)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
146*4882a593Smuzhiyun 	u32 div;
147*4882a593Smuzhiyun 	unsigned char bs = 0;
148*4882a593Smuzhiyun 	unsigned char cp = 0;
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	if (buf_len < 5)
151*4882a593Smuzhiyun 		return -EINVAL;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	if (c->frequency < 542000000)
156*4882a593Smuzhiyun 		cp = 0xb4;
157*4882a593Smuzhiyun 	else if (c->frequency < 771000000)
158*4882a593Smuzhiyun 		cp = 0xbc;
159*4882a593Smuzhiyun 	else
160*4882a593Smuzhiyun 		cp = 0xf4;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	if (c->frequency == 0)
163*4882a593Smuzhiyun 		bs = 0x03;
164*4882a593Smuzhiyun 	else if (c->frequency < 443250000)
165*4882a593Smuzhiyun 		bs = 0x02;
166*4882a593Smuzhiyun 	else
167*4882a593Smuzhiyun 		bs = 0x08;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	pllbuf[0] = 0x60;
170*4882a593Smuzhiyun 	pllbuf[1] = div >> 8;
171*4882a593Smuzhiyun 	pllbuf[2] = div & 0xff;
172*4882a593Smuzhiyun 	pllbuf[3] = cp;
173*4882a593Smuzhiyun 	pllbuf[4] = bs;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	return 5;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun static struct mt352_config thomson_dtt7579_config = {
179*4882a593Smuzhiyun 	.demod_address = 0x0f,
180*4882a593Smuzhiyun 	.demod_init = thomson_dtt7579_demod_init,
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun static struct zl10353_config thomson_dtt7579_zl10353_config = {
184*4882a593Smuzhiyun 	.demod_address = 0x0f,
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun 
cx24108_tuner_set_params(struct dvb_frontend * fe)187*4882a593Smuzhiyun static int cx24108_tuner_set_params(struct dvb_frontend *fe)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
190*4882a593Smuzhiyun 	u32 freq = c->frequency;
191*4882a593Smuzhiyun 	int i, a, n, pump;
192*4882a593Smuzhiyun 	u32 band, pll;
193*4882a593Smuzhiyun 	u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000,
194*4882a593Smuzhiyun 		1576000,1718000,1856000,2036000,2150000};
195*4882a593Smuzhiyun 	u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000,
196*4882a593Smuzhiyun 		0x00102000,0x00104000,0x00108000,0x00110000,
197*4882a593Smuzhiyun 		0x00120000,0x00140000};
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	#define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */
200*4882a593Smuzhiyun 	dprintk("cx24108 debug: entering SetTunerFreq, freq=%d\n", freq);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	/* This is really the bit driving the tuner chip cx24108 */
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (freq<950000)
205*4882a593Smuzhiyun 		freq = 950000; /* kHz */
206*4882a593Smuzhiyun 	else if (freq>2150000)
207*4882a593Smuzhiyun 		freq = 2150000; /* satellite IF is 950..2150MHz */
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	/* decide which VCO to use for the input frequency */
210*4882a593Smuzhiyun 	for(i = 1; (i < ARRAY_SIZE(osci) - 1) && (osci[i] < freq); i++);
211*4882a593Smuzhiyun 	dprintk("cx24108 debug: select vco #%d (f=%d)\n", i, freq);
212*4882a593Smuzhiyun 	band=bandsel[i];
213*4882a593Smuzhiyun 	/* the gain values must be set by SetSymbolrate */
214*4882a593Smuzhiyun 	/* compute the pll divider needed, from Conexant data sheet,
215*4882a593Smuzhiyun 	   resolved for (n*32+a), remember f(vco) is f(receive) *2 or *4,
216*4882a593Smuzhiyun 	   depending on the divider bit. It is set to /4 on the 2 lowest
217*4882a593Smuzhiyun 	   bands  */
218*4882a593Smuzhiyun 	n=((i<=2?2:1)*freq*10L)/(XTAL/100);
219*4882a593Smuzhiyun 	a=n%32; n/=32; if(a==0) n--;
220*4882a593Smuzhiyun 	pump=(freq<(osci[i-1]+osci[i])/2);
221*4882a593Smuzhiyun 	pll=0xf8000000|
222*4882a593Smuzhiyun 	    ((pump?1:2)<<(14+11))|
223*4882a593Smuzhiyun 	    ((n&0x1ff)<<(5+11))|
224*4882a593Smuzhiyun 	    ((a&0x1f)<<11);
225*4882a593Smuzhiyun 	/* everything is shifted left 11 bits to left-align the bits in the
226*4882a593Smuzhiyun 	   32bit word. Output to the tuner goes MSB-aligned, after all */
227*4882a593Smuzhiyun 	dprintk("cx24108 debug: pump=%d, n=%d, a=%d\n", pump, n, a);
228*4882a593Smuzhiyun 	cx24110_pll_write(fe,band);
229*4882a593Smuzhiyun 	/* set vga and vca to their widest-band settings, as a precaution.
230*4882a593Smuzhiyun 	   SetSymbolrate might not be called to set this up */
231*4882a593Smuzhiyun 	cx24110_pll_write(fe,0x500c0000);
232*4882a593Smuzhiyun 	cx24110_pll_write(fe,0x83f1f800);
233*4882a593Smuzhiyun 	cx24110_pll_write(fe,pll);
234*4882a593Smuzhiyun 	//writereg(client,0x56,0x7f);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	return 0;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
pinnsat_tuner_init(struct dvb_frontend * fe)239*4882a593Smuzhiyun static int pinnsat_tuner_init(struct dvb_frontend* fe)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = fe->dvb->priv;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	bttv_gpio_enable(card->bttv_nr, 1, 1);  /* output */
244*4882a593Smuzhiyun 	bttv_write_gpio(card->bttv_nr, 1, 1);   /* relay on */
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun 
pinnsat_tuner_sleep(struct dvb_frontend * fe)249*4882a593Smuzhiyun static int pinnsat_tuner_sleep(struct dvb_frontend* fe)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = fe->dvb->priv;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	bttv_write_gpio(card->bttv_nr, 1, 0);   /* relay off */
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	return 0;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun static struct cx24110_config pctvsat_config = {
259*4882a593Smuzhiyun 	.demod_address = 0x55,
260*4882a593Smuzhiyun };
261*4882a593Smuzhiyun 
microtune_mt7202dtf_tuner_set_params(struct dvb_frontend * fe)262*4882a593Smuzhiyun static int microtune_mt7202dtf_tuner_set_params(struct dvb_frontend *fe)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
265*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
266*4882a593Smuzhiyun 	u8 cfg, cpump, band_select;
267*4882a593Smuzhiyun 	u8 data[4];
268*4882a593Smuzhiyun 	u32 div;
269*4882a593Smuzhiyun 	struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	div = (36000000 + c->frequency + 83333) / 166666;
272*4882a593Smuzhiyun 	cfg = 0x88;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (c->frequency < 175000000)
275*4882a593Smuzhiyun 		cpump = 2;
276*4882a593Smuzhiyun 	else if (c->frequency < 390000000)
277*4882a593Smuzhiyun 		cpump = 1;
278*4882a593Smuzhiyun 	else if (c->frequency < 470000000)
279*4882a593Smuzhiyun 		cpump = 2;
280*4882a593Smuzhiyun 	else if (c->frequency < 750000000)
281*4882a593Smuzhiyun 		cpump = 2;
282*4882a593Smuzhiyun 	else
283*4882a593Smuzhiyun 		cpump = 3;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	if (c->frequency < 175000000)
286*4882a593Smuzhiyun 		band_select = 0x0e;
287*4882a593Smuzhiyun 	else if (c->frequency < 470000000)
288*4882a593Smuzhiyun 		band_select = 0x05;
289*4882a593Smuzhiyun 	else
290*4882a593Smuzhiyun 		band_select = 0x03;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	data[0] = (div >> 8) & 0x7f;
293*4882a593Smuzhiyun 	data[1] = div & 0xff;
294*4882a593Smuzhiyun 	data[2] = ((div >> 10) & 0x60) | cfg;
295*4882a593Smuzhiyun 	data[3] = (cpump << 6) | band_select;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
298*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 1);
299*4882a593Smuzhiyun 	i2c_transfer(card->i2c_adapter, &msg, 1);
300*4882a593Smuzhiyun 	return (div * 166666 - 36000000);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun 
microtune_mt7202dtf_request_firmware(struct dvb_frontend * fe,const struct firmware ** fw,char * name)303*4882a593Smuzhiyun static int microtune_mt7202dtf_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun 	struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 	return request_firmware(fw, name, &bt->bt->dev->dev);
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun static const struct sp887x_config microtune_mt7202dtf_config = {
311*4882a593Smuzhiyun 	.demod_address = 0x70,
312*4882a593Smuzhiyun 	.request_firmware = microtune_mt7202dtf_request_firmware,
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun 
advbt771_samsung_tdtc9251dh0_demod_init(struct dvb_frontend * fe)315*4882a593Smuzhiyun static int advbt771_samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d };
318*4882a593Smuzhiyun 	static u8 mt352_reset [] = { 0x50, 0x80 };
319*4882a593Smuzhiyun 	static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
320*4882a593Smuzhiyun 	static u8 mt352_agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
321*4882a593Smuzhiyun 				       0x00, 0xFF, 0x00, 0x40, 0x40 };
322*4882a593Smuzhiyun 	static u8 mt352_av771_extra[] = { 0xB5, 0x7A };
323*4882a593Smuzhiyun 	static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
326*4882a593Smuzhiyun 	udelay(2000);
327*4882a593Smuzhiyun 	mt352_write(fe, mt352_reset, sizeof(mt352_reset));
328*4882a593Smuzhiyun 	mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg));
331*4882a593Smuzhiyun 	udelay(2000);
332*4882a593Smuzhiyun 	mt352_write(fe, mt352_av771_extra,sizeof(mt352_av771_extra));
333*4882a593Smuzhiyun 	mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	return 0;
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun 
advbt771_samsung_tdtc9251dh0_tuner_calc_regs(struct dvb_frontend * fe,u8 * pllbuf,int buf_len)338*4882a593Smuzhiyun static int advbt771_samsung_tdtc9251dh0_tuner_calc_regs(struct dvb_frontend *fe, u8 *pllbuf, int buf_len)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
341*4882a593Smuzhiyun 	u32 div;
342*4882a593Smuzhiyun 	unsigned char bs = 0;
343*4882a593Smuzhiyun 	unsigned char cp = 0;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	if (buf_len < 5) return -EINVAL;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	if (c->frequency < 150000000)
350*4882a593Smuzhiyun 		cp = 0xB4;
351*4882a593Smuzhiyun 	else if (c->frequency < 173000000)
352*4882a593Smuzhiyun 		cp = 0xBC;
353*4882a593Smuzhiyun 	else if (c->frequency < 250000000)
354*4882a593Smuzhiyun 		cp = 0xB4;
355*4882a593Smuzhiyun 	else if (c->frequency < 400000000)
356*4882a593Smuzhiyun 		cp = 0xBC;
357*4882a593Smuzhiyun 	else if (c->frequency < 420000000)
358*4882a593Smuzhiyun 		cp = 0xF4;
359*4882a593Smuzhiyun 	else if (c->frequency < 470000000)
360*4882a593Smuzhiyun 		cp = 0xFC;
361*4882a593Smuzhiyun 	else if (c->frequency < 600000000)
362*4882a593Smuzhiyun 		cp = 0xBC;
363*4882a593Smuzhiyun 	else if (c->frequency < 730000000)
364*4882a593Smuzhiyun 		cp = 0xF4;
365*4882a593Smuzhiyun 	else
366*4882a593Smuzhiyun 		cp = 0xFC;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	if (c->frequency < 150000000)
369*4882a593Smuzhiyun 		bs = 0x01;
370*4882a593Smuzhiyun 	else if (c->frequency < 173000000)
371*4882a593Smuzhiyun 		bs = 0x01;
372*4882a593Smuzhiyun 	else if (c->frequency < 250000000)
373*4882a593Smuzhiyun 		bs = 0x02;
374*4882a593Smuzhiyun 	else if (c->frequency < 400000000)
375*4882a593Smuzhiyun 		bs = 0x02;
376*4882a593Smuzhiyun 	else if (c->frequency < 420000000)
377*4882a593Smuzhiyun 		bs = 0x02;
378*4882a593Smuzhiyun 	else if (c->frequency < 470000000)
379*4882a593Smuzhiyun 		bs = 0x02;
380*4882a593Smuzhiyun 	else
381*4882a593Smuzhiyun 		bs = 0x08;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	pllbuf[0] = 0x61;
384*4882a593Smuzhiyun 	pllbuf[1] = div >> 8;
385*4882a593Smuzhiyun 	pllbuf[2] = div & 0xff;
386*4882a593Smuzhiyun 	pllbuf[3] = cp;
387*4882a593Smuzhiyun 	pllbuf[4] = bs;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	return 5;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun static struct mt352_config advbt771_samsung_tdtc9251dh0_config = {
393*4882a593Smuzhiyun 	.demod_address = 0x0f,
394*4882a593Smuzhiyun 	.demod_init = advbt771_samsung_tdtc9251dh0_demod_init,
395*4882a593Smuzhiyun };
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun static const struct dst_config dst_config = {
398*4882a593Smuzhiyun 	.demod_address = 0x55,
399*4882a593Smuzhiyun };
400*4882a593Smuzhiyun 
or51211_request_firmware(struct dvb_frontend * fe,const struct firmware ** fw,char * name)401*4882a593Smuzhiyun static int or51211_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun 	struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	return request_firmware(fw, name, &bt->bt->dev->dev);
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun 
or51211_setmode(struct dvb_frontend * fe,int mode)408*4882a593Smuzhiyun static void or51211_setmode(struct dvb_frontend * fe, int mode)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun 	struct dvb_bt8xx_card *bt = fe->dvb->priv;
411*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x0002, mode);   /* Reset */
412*4882a593Smuzhiyun 	msleep(20);
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
or51211_reset(struct dvb_frontend * fe)415*4882a593Smuzhiyun static void or51211_reset(struct dvb_frontend * fe)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	struct dvb_bt8xx_card *bt = fe->dvb->priv;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	/* RESET DEVICE
420*4882a593Smuzhiyun 	 * reset is controlled by GPIO-0
421*4882a593Smuzhiyun 	 * when set to 0 causes reset and when to 1 for normal op
422*4882a593Smuzhiyun 	 * must remain reset for 128 clock cycles on a 50Mhz clock
423*4882a593Smuzhiyun 	 * also PRM1 PRM2 & PRM4 are controlled by GPIO-1,GPIO-2 & GPIO-4
424*4882a593Smuzhiyun 	 * We assume that the reset has be held low long enough or we
425*4882a593Smuzhiyun 	 * have been reset by a power on.  When the driver is unloaded
426*4882a593Smuzhiyun 	 * reset set to 0 so if reloaded we have been reset.
427*4882a593Smuzhiyun 	 */
428*4882a593Smuzhiyun 	/* reset & PRM1,2&4 are outputs */
429*4882a593Smuzhiyun 	int ret = bttv_gpio_enable(bt->bttv_nr, 0x001F, 0x001F);
430*4882a593Smuzhiyun 	if (ret != 0)
431*4882a593Smuzhiyun 		pr_warn("or51211: Init Error - Can't Reset DVR (%i)\n", ret);
432*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x001F, 0x0000);   /* Reset */
433*4882a593Smuzhiyun 	msleep(20);
434*4882a593Smuzhiyun 	/* Now set for normal operation */
435*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x0001F, 0x0001);
436*4882a593Smuzhiyun 	/* wait for operation to begin */
437*4882a593Smuzhiyun 	msleep(500);
438*4882a593Smuzhiyun }
439*4882a593Smuzhiyun 
or51211_sleep(struct dvb_frontend * fe)440*4882a593Smuzhiyun static void or51211_sleep(struct dvb_frontend * fe)
441*4882a593Smuzhiyun {
442*4882a593Smuzhiyun 	struct dvb_bt8xx_card *bt = fe->dvb->priv;
443*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x0001, 0x0000);
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun static const struct or51211_config or51211_config = {
447*4882a593Smuzhiyun 	.demod_address = 0x15,
448*4882a593Smuzhiyun 	.request_firmware = or51211_request_firmware,
449*4882a593Smuzhiyun 	.setmode = or51211_setmode,
450*4882a593Smuzhiyun 	.reset = or51211_reset,
451*4882a593Smuzhiyun 	.sleep = or51211_sleep,
452*4882a593Smuzhiyun };
453*4882a593Smuzhiyun 
vp3021_alps_tded4_tuner_set_params(struct dvb_frontend * fe)454*4882a593Smuzhiyun static int vp3021_alps_tded4_tuner_set_params(struct dvb_frontend *fe)
455*4882a593Smuzhiyun {
456*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
457*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
458*4882a593Smuzhiyun 	u8 buf[4];
459*4882a593Smuzhiyun 	u32 div;
460*4882a593Smuzhiyun 	struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf) };
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	div = (c->frequency + 36166667) / 166667;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	buf[0] = (div >> 8) & 0x7F;
465*4882a593Smuzhiyun 	buf[1] = div & 0xFF;
466*4882a593Smuzhiyun 	buf[2] = 0x85;
467*4882a593Smuzhiyun 	if ((c->frequency >= 47000000) && (c->frequency < 153000000))
468*4882a593Smuzhiyun 		buf[3] = 0x01;
469*4882a593Smuzhiyun 	else if ((c->frequency >= 153000000) && (c->frequency < 430000000))
470*4882a593Smuzhiyun 		buf[3] = 0x02;
471*4882a593Smuzhiyun 	else if ((c->frequency >= 430000000) && (c->frequency < 824000000))
472*4882a593Smuzhiyun 		buf[3] = 0x0C;
473*4882a593Smuzhiyun 	else if ((c->frequency >= 824000000) && (c->frequency < 863000000))
474*4882a593Smuzhiyun 		buf[3] = 0x8C;
475*4882a593Smuzhiyun 	else
476*4882a593Smuzhiyun 		return -EINVAL;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
479*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 1);
480*4882a593Smuzhiyun 	i2c_transfer(card->i2c_adapter, &msg, 1);
481*4882a593Smuzhiyun 	return 0;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun static struct nxt6000_config vp3021_alps_tded4_config = {
485*4882a593Smuzhiyun 	.demod_address = 0x0a,
486*4882a593Smuzhiyun 	.clock_inversion = 1,
487*4882a593Smuzhiyun };
488*4882a593Smuzhiyun 
digitv_alps_tded4_demod_init(struct dvb_frontend * fe)489*4882a593Smuzhiyun static int digitv_alps_tded4_demod_init(struct dvb_frontend* fe)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun 	static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d };
492*4882a593Smuzhiyun 	static u8 mt352_reset [] = { 0x50, 0x80 };
493*4882a593Smuzhiyun 	static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
494*4882a593Smuzhiyun 	static u8 mt352_agc_cfg [] = { 0x67, 0x20, 0xa0 };
495*4882a593Smuzhiyun 	static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
498*4882a593Smuzhiyun 	udelay(2000);
499*4882a593Smuzhiyun 	mt352_write(fe, mt352_reset, sizeof(mt352_reset));
500*4882a593Smuzhiyun 	mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
501*4882a593Smuzhiyun 	mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg));
502*4882a593Smuzhiyun 	mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	return 0;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun 
digitv_alps_tded4_tuner_calc_regs(struct dvb_frontend * fe,u8 * pllbuf,int buf_len)507*4882a593Smuzhiyun static int digitv_alps_tded4_tuner_calc_regs(struct dvb_frontend *fe,  u8 *pllbuf, int buf_len)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun 	u32 div;
510*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	if (buf_len < 5)
513*4882a593Smuzhiyun 		return -EINVAL;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	pllbuf[0] = 0x61;
518*4882a593Smuzhiyun 	pllbuf[1] = (div >> 8) & 0x7F;
519*4882a593Smuzhiyun 	pllbuf[2] = div & 0xFF;
520*4882a593Smuzhiyun 	pllbuf[3] = 0x85;
521*4882a593Smuzhiyun 
522*4882a593Smuzhiyun 	dprintk("frequency %u, div %u\n", c->frequency, div);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	if (c->frequency < 470000000)
525*4882a593Smuzhiyun 		pllbuf[4] = 0x02;
526*4882a593Smuzhiyun 	else if (c->frequency > 823000000)
527*4882a593Smuzhiyun 		pllbuf[4] = 0x88;
528*4882a593Smuzhiyun 	else
529*4882a593Smuzhiyun 		pllbuf[4] = 0x08;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	if (c->bandwidth_hz == 8000000)
532*4882a593Smuzhiyun 		pllbuf[4] |= 0x04;
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	return 5;
535*4882a593Smuzhiyun }
536*4882a593Smuzhiyun 
digitv_alps_tded4_reset(struct dvb_bt8xx_card * bt)537*4882a593Smuzhiyun static void digitv_alps_tded4_reset(struct dvb_bt8xx_card *bt)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun 	/*
540*4882a593Smuzhiyun 	 * Reset the frontend, must be called before trying
541*4882a593Smuzhiyun 	 * to initialise the MT352 or mt352_attach
542*4882a593Smuzhiyun 	 * will fail. Same goes for the nxt6000 frontend.
543*4882a593Smuzhiyun 	 *
544*4882a593Smuzhiyun 	 */
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	int ret = bttv_gpio_enable(bt->bttv_nr, 0x08, 0x08);
547*4882a593Smuzhiyun 	if (ret != 0)
548*4882a593Smuzhiyun 		pr_warn("digitv_alps_tded4: Init Error - Can't Reset DVR (%i)\n",
549*4882a593Smuzhiyun 			ret);
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	/* Pulse the reset line */
552*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */
553*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x08, 0x00); /* Low  */
554*4882a593Smuzhiyun 	msleep(100);
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun static struct mt352_config digitv_alps_tded4_config = {
560*4882a593Smuzhiyun 	.demod_address = 0x0a,
561*4882a593Smuzhiyun 	.demod_init = digitv_alps_tded4_demod_init,
562*4882a593Smuzhiyun };
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun static struct lgdt330x_config tdvs_tua6034_config = {
565*4882a593Smuzhiyun 	.demod_chip       = LGDT3303,
566*4882a593Smuzhiyun 	.serial_mpeg      = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
567*4882a593Smuzhiyun };
568*4882a593Smuzhiyun 
lgdt330x_reset(struct dvb_bt8xx_card * bt)569*4882a593Smuzhiyun static void lgdt330x_reset(struct dvb_bt8xx_card *bt)
570*4882a593Smuzhiyun {
571*4882a593Smuzhiyun 	/* Set pin 27 of the lgdt3303 chip high to reset the frontend */
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	/* Pulse the reset line */
574*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */
575*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000000); /* Low  */
576*4882a593Smuzhiyun 	msleep(100);
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */
579*4882a593Smuzhiyun 	msleep(100);
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun 
frontend_init(struct dvb_bt8xx_card * card,u32 type)582*4882a593Smuzhiyun static void frontend_init(struct dvb_bt8xx_card *card, u32 type)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun 	struct dst_state* state = NULL;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	switch(type) {
587*4882a593Smuzhiyun 	case BTTV_BOARD_DVICO_DVBT_LITE:
588*4882a593Smuzhiyun 		card->fe = dvb_attach(mt352_attach, &thomson_dtt7579_config, card->i2c_adapter);
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 		if (card->fe == NULL)
591*4882a593Smuzhiyun 			card->fe = dvb_attach(zl10353_attach, &thomson_dtt7579_zl10353_config,
592*4882a593Smuzhiyun 						  card->i2c_adapter);
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 		if (card->fe != NULL) {
595*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.calc_regs = thomson_dtt7579_tuner_calc_regs;
596*4882a593Smuzhiyun 			card->fe->ops.info.frequency_min_hz = 174 * MHz;
597*4882a593Smuzhiyun 			card->fe->ops.info.frequency_max_hz = 862 * MHz;
598*4882a593Smuzhiyun 		}
599*4882a593Smuzhiyun 		break;
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE:
602*4882a593Smuzhiyun 		lgdt330x_reset(card);
603*4882a593Smuzhiyun 		card->fe = dvb_attach(lgdt330x_attach, &tdvs_tua6034_config,
604*4882a593Smuzhiyun 				      0x0e, card->i2c_adapter);
605*4882a593Smuzhiyun 		if (card->fe != NULL) {
606*4882a593Smuzhiyun 			dvb_attach(simple_tuner_attach, card->fe,
607*4882a593Smuzhiyun 				   card->i2c_adapter, 0x61,
608*4882a593Smuzhiyun 				   TUNER_LG_TDVS_H06XF);
609*4882a593Smuzhiyun 			dprintk("dvb_bt8xx: lgdt330x detected\n");
610*4882a593Smuzhiyun 		}
611*4882a593Smuzhiyun 		break;
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	case BTTV_BOARD_NEBULA_DIGITV:
614*4882a593Smuzhiyun 		/*
615*4882a593Smuzhiyun 		 * It is possible to determine the correct frontend using the I2C bus (see the Nebula SDK);
616*4882a593Smuzhiyun 		 * this would be a cleaner solution than trying each frontend in turn.
617*4882a593Smuzhiyun 		 */
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 		/* Old Nebula (marked (c)2003 on high profile pci card) has nxt6000 demod */
620*4882a593Smuzhiyun 		digitv_alps_tded4_reset(card);
621*4882a593Smuzhiyun 		card->fe = dvb_attach(nxt6000_attach, &vp3021_alps_tded4_config, card->i2c_adapter);
622*4882a593Smuzhiyun 		if (card->fe != NULL) {
623*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.set_params = vp3021_alps_tded4_tuner_set_params;
624*4882a593Smuzhiyun 			dprintk("dvb_bt8xx: an nxt6000 was detected on your digitv card\n");
625*4882a593Smuzhiyun 			break;
626*4882a593Smuzhiyun 		}
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 		/* New Nebula (marked (c)2005 on low profile pci card) has mt352 demod */
629*4882a593Smuzhiyun 		digitv_alps_tded4_reset(card);
630*4882a593Smuzhiyun 		card->fe = dvb_attach(mt352_attach, &digitv_alps_tded4_config, card->i2c_adapter);
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 		if (card->fe != NULL) {
633*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.calc_regs = digitv_alps_tded4_tuner_calc_regs;
634*4882a593Smuzhiyun 			dprintk("dvb_bt8xx: an mt352 was detected on your digitv card\n");
635*4882a593Smuzhiyun 		}
636*4882a593Smuzhiyun 		break;
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	case BTTV_BOARD_AVDVBT_761:
639*4882a593Smuzhiyun 		card->fe = dvb_attach(sp887x_attach, &microtune_mt7202dtf_config, card->i2c_adapter);
640*4882a593Smuzhiyun 		if (card->fe) {
641*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.set_params = microtune_mt7202dtf_tuner_set_params;
642*4882a593Smuzhiyun 		}
643*4882a593Smuzhiyun 		break;
644*4882a593Smuzhiyun 
645*4882a593Smuzhiyun 	case BTTV_BOARD_AVDVBT_771:
646*4882a593Smuzhiyun 		card->fe = dvb_attach(mt352_attach, &advbt771_samsung_tdtc9251dh0_config, card->i2c_adapter);
647*4882a593Smuzhiyun 		if (card->fe != NULL) {
648*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.calc_regs = advbt771_samsung_tdtc9251dh0_tuner_calc_regs;
649*4882a593Smuzhiyun 			card->fe->ops.info.frequency_min_hz = 174 * MHz;
650*4882a593Smuzhiyun 			card->fe->ops.info.frequency_max_hz = 862 * MHz;
651*4882a593Smuzhiyun 		}
652*4882a593Smuzhiyun 		break;
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	case BTTV_BOARD_TWINHAN_DST:
655*4882a593Smuzhiyun 		/*	DST is not a frontend driver !!!		*/
656*4882a593Smuzhiyun 		state = kmalloc(sizeof (struct dst_state), GFP_KERNEL);
657*4882a593Smuzhiyun 		if (!state) {
658*4882a593Smuzhiyun 			pr_err("No memory\n");
659*4882a593Smuzhiyun 			break;
660*4882a593Smuzhiyun 		}
661*4882a593Smuzhiyun 		/*	Setup the Card					*/
662*4882a593Smuzhiyun 		state->config = &dst_config;
663*4882a593Smuzhiyun 		state->i2c = card->i2c_adapter;
664*4882a593Smuzhiyun 		state->bt = card->bt;
665*4882a593Smuzhiyun 		state->dst_ca = NULL;
666*4882a593Smuzhiyun 		/*	DST is not a frontend, attaching the ASIC	*/
667*4882a593Smuzhiyun 		if (dvb_attach(dst_attach, state, &card->dvb_adapter) == NULL) {
668*4882a593Smuzhiyun 			pr_err("%s: Could not find a Twinhan DST\n", __func__);
669*4882a593Smuzhiyun 			kfree(state);
670*4882a593Smuzhiyun 			break;
671*4882a593Smuzhiyun 		}
672*4882a593Smuzhiyun 		/*	Attach other DST peripherals if any		*/
673*4882a593Smuzhiyun 		/*	Conditional Access device			*/
674*4882a593Smuzhiyun 		card->fe = &state->frontend;
675*4882a593Smuzhiyun 		if (state->dst_hw_cap & DST_TYPE_HAS_CA)
676*4882a593Smuzhiyun 			dvb_attach(dst_ca_attach, state, &card->dvb_adapter);
677*4882a593Smuzhiyun 		break;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	case BTTV_BOARD_PINNACLESAT:
680*4882a593Smuzhiyun 		card->fe = dvb_attach(cx24110_attach, &pctvsat_config, card->i2c_adapter);
681*4882a593Smuzhiyun 		if (card->fe) {
682*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.init = pinnsat_tuner_init;
683*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.sleep = pinnsat_tuner_sleep;
684*4882a593Smuzhiyun 			card->fe->ops.tuner_ops.set_params = cx24108_tuner_set_params;
685*4882a593Smuzhiyun 		}
686*4882a593Smuzhiyun 		break;
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 	case BTTV_BOARD_PC_HDTV:
689*4882a593Smuzhiyun 		card->fe = dvb_attach(or51211_attach, &or51211_config, card->i2c_adapter);
690*4882a593Smuzhiyun 		if (card->fe != NULL)
691*4882a593Smuzhiyun 			dvb_attach(simple_tuner_attach, card->fe,
692*4882a593Smuzhiyun 				   card->i2c_adapter, 0x61,
693*4882a593Smuzhiyun 				   TUNER_PHILIPS_FCV1236D);
694*4882a593Smuzhiyun 		break;
695*4882a593Smuzhiyun 	}
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	if (card->fe == NULL)
698*4882a593Smuzhiyun 		pr_err("A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
699*4882a593Smuzhiyun 		       card->bt->dev->vendor,
700*4882a593Smuzhiyun 		       card->bt->dev->device,
701*4882a593Smuzhiyun 		       card->bt->dev->subsystem_vendor,
702*4882a593Smuzhiyun 		       card->bt->dev->subsystem_device);
703*4882a593Smuzhiyun 	else
704*4882a593Smuzhiyun 		if (dvb_register_frontend(&card->dvb_adapter, card->fe)) {
705*4882a593Smuzhiyun 			pr_err("Frontend registration failed!\n");
706*4882a593Smuzhiyun 			dvb_frontend_detach(card->fe);
707*4882a593Smuzhiyun 			card->fe = NULL;
708*4882a593Smuzhiyun 		}
709*4882a593Smuzhiyun }
710*4882a593Smuzhiyun 
dvb_bt8xx_load_card(struct dvb_bt8xx_card * card,u32 type)711*4882a593Smuzhiyun static int dvb_bt8xx_load_card(struct dvb_bt8xx_card *card, u32 type)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun 	int result;
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	result = dvb_register_adapter(&card->dvb_adapter, card->card_name,
716*4882a593Smuzhiyun 				      THIS_MODULE, &card->bt->dev->dev,
717*4882a593Smuzhiyun 				      adapter_nr);
718*4882a593Smuzhiyun 	if (result < 0) {
719*4882a593Smuzhiyun 		pr_err("dvb_register_adapter failed (errno = %d)\n", result);
720*4882a593Smuzhiyun 		return result;
721*4882a593Smuzhiyun 	}
722*4882a593Smuzhiyun 	card->dvb_adapter.priv = card;
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun 	card->bt->adapter = card->i2c_adapter;
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	memset(&card->demux, 0, sizeof(struct dvb_demux));
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun 	card->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	card->demux.priv = card;
731*4882a593Smuzhiyun 	card->demux.filternum = 256;
732*4882a593Smuzhiyun 	card->demux.feednum = 256;
733*4882a593Smuzhiyun 	card->demux.start_feed = dvb_bt8xx_start_feed;
734*4882a593Smuzhiyun 	card->demux.stop_feed = dvb_bt8xx_stop_feed;
735*4882a593Smuzhiyun 	card->demux.write_to_decoder = NULL;
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	result = dvb_dmx_init(&card->demux);
738*4882a593Smuzhiyun 	if (result < 0) {
739*4882a593Smuzhiyun 		pr_err("dvb_dmx_init failed (errno = %d)\n", result);
740*4882a593Smuzhiyun 		goto err_unregister_adaptor;
741*4882a593Smuzhiyun 	}
742*4882a593Smuzhiyun 
743*4882a593Smuzhiyun 	card->dmxdev.filternum = 256;
744*4882a593Smuzhiyun 	card->dmxdev.demux = &card->demux.dmx;
745*4882a593Smuzhiyun 	card->dmxdev.capabilities = 0;
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	result = dvb_dmxdev_init(&card->dmxdev, &card->dvb_adapter);
748*4882a593Smuzhiyun 	if (result < 0) {
749*4882a593Smuzhiyun 		pr_err("dvb_dmxdev_init failed (errno = %d)\n", result);
750*4882a593Smuzhiyun 		goto err_dmx_release;
751*4882a593Smuzhiyun 	}
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 	card->fe_hw.source = DMX_FRONTEND_0;
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_hw);
756*4882a593Smuzhiyun 	if (result < 0) {
757*4882a593Smuzhiyun 		pr_err("dvb_dmx_init failed (errno = %d)\n", result);
758*4882a593Smuzhiyun 		goto err_dmxdev_release;
759*4882a593Smuzhiyun 	}
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	card->fe_mem.source = DMX_MEMORY_FE;
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun 	result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_mem);
764*4882a593Smuzhiyun 	if (result < 0) {
765*4882a593Smuzhiyun 		pr_err("dvb_dmx_init failed (errno = %d)\n", result);
766*4882a593Smuzhiyun 		goto err_remove_hw_frontend;
767*4882a593Smuzhiyun 	}
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	result = card->demux.dmx.connect_frontend(&card->demux.dmx, &card->fe_hw);
770*4882a593Smuzhiyun 	if (result < 0) {
771*4882a593Smuzhiyun 		pr_err("dvb_dmx_init failed (errno = %d)\n", result);
772*4882a593Smuzhiyun 		goto err_remove_mem_frontend;
773*4882a593Smuzhiyun 	}
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	result = dvb_net_init(&card->dvb_adapter, &card->dvbnet, &card->demux.dmx);
776*4882a593Smuzhiyun 	if (result < 0) {
777*4882a593Smuzhiyun 		pr_err("dvb_net_init failed (errno = %d)\n", result);
778*4882a593Smuzhiyun 		goto err_disconnect_frontend;
779*4882a593Smuzhiyun 	}
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 	tasklet_setup(&card->bt->tasklet, dvb_bt8xx_task);
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	frontend_init(card, type);
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	return 0;
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun err_disconnect_frontend:
788*4882a593Smuzhiyun 	card->demux.dmx.disconnect_frontend(&card->demux.dmx);
789*4882a593Smuzhiyun err_remove_mem_frontend:
790*4882a593Smuzhiyun 	card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem);
791*4882a593Smuzhiyun err_remove_hw_frontend:
792*4882a593Smuzhiyun 	card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
793*4882a593Smuzhiyun err_dmxdev_release:
794*4882a593Smuzhiyun 	dvb_dmxdev_release(&card->dmxdev);
795*4882a593Smuzhiyun err_dmx_release:
796*4882a593Smuzhiyun 	dvb_dmx_release(&card->demux);
797*4882a593Smuzhiyun err_unregister_adaptor:
798*4882a593Smuzhiyun 	dvb_unregister_adapter(&card->dvb_adapter);
799*4882a593Smuzhiyun 	return result;
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun 
dvb_bt8xx_probe(struct bttv_sub_device * sub)802*4882a593Smuzhiyun static int dvb_bt8xx_probe(struct bttv_sub_device *sub)
803*4882a593Smuzhiyun {
804*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card;
805*4882a593Smuzhiyun 	struct pci_dev* bttv_pci_dev;
806*4882a593Smuzhiyun 	int ret;
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	if (!(card = kzalloc(sizeof(struct dvb_bt8xx_card), GFP_KERNEL)))
809*4882a593Smuzhiyun 		return -ENOMEM;
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun 	mutex_init(&card->lock);
812*4882a593Smuzhiyun 	card->bttv_nr = sub->core->nr;
813*4882a593Smuzhiyun 	strscpy(card->card_name, sub->core->v4l2_dev.name,
814*4882a593Smuzhiyun 		sizeof(card->card_name));
815*4882a593Smuzhiyun 	card->i2c_adapter = &sub->core->i2c_adap;
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	switch(sub->core->type) {
818*4882a593Smuzhiyun 	case BTTV_BOARD_PINNACLESAT:
819*4882a593Smuzhiyun 		card->gpio_mode = 0x0400c060;
820*4882a593Smuzhiyun 		/* should be: BT878_A_GAIN=0,BT878_A_PWRDN,BT878_DA_DPM,BT878_DA_SBR,
821*4882a593Smuzhiyun 			      BT878_DA_IOM=1,BT878_DA_APP to enable serial highspeed mode. */
822*4882a593Smuzhiyun 		card->op_sync_orin = BT878_RISC_SYNC_MASK;
823*4882a593Smuzhiyun 		card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
824*4882a593Smuzhiyun 		break;
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 	case BTTV_BOARD_DVICO_DVBT_LITE:
827*4882a593Smuzhiyun 		card->gpio_mode = 0x0400C060;
828*4882a593Smuzhiyun 		card->op_sync_orin = BT878_RISC_SYNC_MASK;
829*4882a593Smuzhiyun 		card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
830*4882a593Smuzhiyun 		/* 26, 15, 14, 6, 5
831*4882a593Smuzhiyun 		 * A_PWRDN  DA_DPM DA_SBR DA_IOM_DA
832*4882a593Smuzhiyun 		 * DA_APP(parallel) */
833*4882a593Smuzhiyun 		break;
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 	case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE:
836*4882a593Smuzhiyun 		card->gpio_mode = 0x0400c060;
837*4882a593Smuzhiyun 		card->op_sync_orin = BT878_RISC_SYNC_MASK;
838*4882a593Smuzhiyun 		card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
839*4882a593Smuzhiyun 		break;
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 	case BTTV_BOARD_NEBULA_DIGITV:
842*4882a593Smuzhiyun 	case BTTV_BOARD_AVDVBT_761:
843*4882a593Smuzhiyun 		card->gpio_mode = (1 << 26) | (1 << 14) | (1 << 5);
844*4882a593Smuzhiyun 		card->op_sync_orin = BT878_RISC_SYNC_MASK;
845*4882a593Smuzhiyun 		card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
846*4882a593Smuzhiyun 		/* A_PWRDN DA_SBR DA_APP (high speed serial) */
847*4882a593Smuzhiyun 		break;
848*4882a593Smuzhiyun 
849*4882a593Smuzhiyun 	case BTTV_BOARD_AVDVBT_771: //case 0x07711461:
850*4882a593Smuzhiyun 		card->gpio_mode = 0x0400402B;
851*4882a593Smuzhiyun 		card->op_sync_orin = BT878_RISC_SYNC_MASK;
852*4882a593Smuzhiyun 		card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
853*4882a593Smuzhiyun 		/* A_PWRDN DA_SBR  DA_APP[0] PKTP=10 RISC_ENABLE FIFO_ENABLE*/
854*4882a593Smuzhiyun 		break;
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 	case BTTV_BOARD_TWINHAN_DST:
857*4882a593Smuzhiyun 		card->gpio_mode = 0x2204f2c;
858*4882a593Smuzhiyun 		card->op_sync_orin = BT878_RISC_SYNC_MASK;
859*4882a593Smuzhiyun 		card->irq_err_ignore = BT878_APABORT | BT878_ARIPERR |
860*4882a593Smuzhiyun 				       BT878_APPERR | BT878_AFBUS;
861*4882a593Smuzhiyun 		/* 25,21,14,11,10,9,8,3,2 then
862*4882a593Smuzhiyun 		 * 0x33 = 5,4,1,0
863*4882a593Smuzhiyun 		 * A_SEL=SML, DA_MLB, DA_SBR,
864*4882a593Smuzhiyun 		 * DA_SDR=f, fifo trigger = 32 DWORDS
865*4882a593Smuzhiyun 		 * IOM = 0 == audio A/D
866*4882a593Smuzhiyun 		 * DPM = 0 == digital audio mode
867*4882a593Smuzhiyun 		 * == async data parallel port
868*4882a593Smuzhiyun 		 * then 0x33 (13 is set by start_capture)
869*4882a593Smuzhiyun 		 * DA_APP = async data parallel port,
870*4882a593Smuzhiyun 		 * ACAP_EN = 1,
871*4882a593Smuzhiyun 		 * RISC+FIFO ENABLE */
872*4882a593Smuzhiyun 		break;
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun 	case BTTV_BOARD_PC_HDTV:
875*4882a593Smuzhiyun 		card->gpio_mode = 0x0100EC7B;
876*4882a593Smuzhiyun 		card->op_sync_orin = BT878_RISC_SYNC_MASK;
877*4882a593Smuzhiyun 		card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
878*4882a593Smuzhiyun 		break;
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 	default:
881*4882a593Smuzhiyun 		pr_err("Unknown bttv card type: %d\n", sub->core->type);
882*4882a593Smuzhiyun 		kfree(card);
883*4882a593Smuzhiyun 		return -ENODEV;
884*4882a593Smuzhiyun 	}
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	dprintk("dvb_bt8xx: identified card%d as %s\n", card->bttv_nr, card->card_name);
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun 	if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) {
889*4882a593Smuzhiyun 		pr_err("no pci device for card %d\n", card->bttv_nr);
890*4882a593Smuzhiyun 		kfree(card);
891*4882a593Smuzhiyun 		return -ENODEV;
892*4882a593Smuzhiyun 	}
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) {
895*4882a593Smuzhiyun 		pr_err("unable to determine DMA core of card %d,\n", card->bttv_nr);
896*4882a593Smuzhiyun 		pr_err("if you have the ALSA bt87x audio driver installed, try removing it.\n");
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 		kfree(card);
899*4882a593Smuzhiyun 		return -ENODEV;
900*4882a593Smuzhiyun 	}
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	mutex_init(&card->bt->gpio_lock);
903*4882a593Smuzhiyun 	card->bt->bttv_nr = sub->core->nr;
904*4882a593Smuzhiyun 
905*4882a593Smuzhiyun 	if ( (ret = dvb_bt8xx_load_card(card, sub->core->type)) ) {
906*4882a593Smuzhiyun 		kfree(card);
907*4882a593Smuzhiyun 		return ret;
908*4882a593Smuzhiyun 	}
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun 	dev_set_drvdata(&sub->dev, card);
911*4882a593Smuzhiyun 	return 0;
912*4882a593Smuzhiyun }
913*4882a593Smuzhiyun 
dvb_bt8xx_remove(struct bttv_sub_device * sub)914*4882a593Smuzhiyun static void dvb_bt8xx_remove(struct bttv_sub_device *sub)
915*4882a593Smuzhiyun {
916*4882a593Smuzhiyun 	struct dvb_bt8xx_card *card = dev_get_drvdata(&sub->dev);
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	dprintk("dvb_bt8xx: unloading card%d\n", card->bttv_nr);
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun 	bt878_stop(card->bt);
921*4882a593Smuzhiyun 	tasklet_kill(&card->bt->tasklet);
922*4882a593Smuzhiyun 	dvb_net_release(&card->dvbnet);
923*4882a593Smuzhiyun 	card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem);
924*4882a593Smuzhiyun 	card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
925*4882a593Smuzhiyun 	dvb_dmxdev_release(&card->dmxdev);
926*4882a593Smuzhiyun 	dvb_dmx_release(&card->demux);
927*4882a593Smuzhiyun 	if (card->fe) {
928*4882a593Smuzhiyun 		dvb_unregister_frontend(card->fe);
929*4882a593Smuzhiyun 		dvb_frontend_detach(card->fe);
930*4882a593Smuzhiyun 	}
931*4882a593Smuzhiyun 	dvb_unregister_adapter(&card->dvb_adapter);
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	kfree(card);
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun static struct bttv_sub_driver driver = {
937*4882a593Smuzhiyun 	.drv = {
938*4882a593Smuzhiyun 		.name		= "dvb-bt8xx",
939*4882a593Smuzhiyun 	},
940*4882a593Smuzhiyun 	.probe		= dvb_bt8xx_probe,
941*4882a593Smuzhiyun 	.remove		= dvb_bt8xx_remove,
942*4882a593Smuzhiyun 	/* FIXME:
943*4882a593Smuzhiyun 	 * .shutdown	= dvb_bt8xx_shutdown,
944*4882a593Smuzhiyun 	 * .suspend	= dvb_bt8xx_suspend,
945*4882a593Smuzhiyun 	 * .resume	= dvb_bt8xx_resume,
946*4882a593Smuzhiyun 	 */
947*4882a593Smuzhiyun };
948*4882a593Smuzhiyun 
dvb_bt8xx_init(void)949*4882a593Smuzhiyun static int __init dvb_bt8xx_init(void)
950*4882a593Smuzhiyun {
951*4882a593Smuzhiyun 	return bttv_sub_register(&driver, "dvb");
952*4882a593Smuzhiyun }
953*4882a593Smuzhiyun 
dvb_bt8xx_exit(void)954*4882a593Smuzhiyun static void __exit dvb_bt8xx_exit(void)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun 	bttv_sub_unregister(&driver);
957*4882a593Smuzhiyun }
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun module_init(dvb_bt8xx_init);
960*4882a593Smuzhiyun module_exit(dvb_bt8xx_exit);
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun MODULE_DESCRIPTION("Bt8xx based DVB adapter driver");
963*4882a593Smuzhiyun MODULE_AUTHOR("Florian Schirmer <jolt@tuxbox.org>");
964*4882a593Smuzhiyun MODULE_LICENSE("GPL");
965