1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun Frontend/Card driver for TwinHan DST Frontend
4*4882a593Smuzhiyun Copyright (C) 2003 Jamie Honan
5*4882a593Smuzhiyun Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/string.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/vmalloc.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <asm/div64.h>
19*4882a593Smuzhiyun #include <media/dvb_frontend.h>
20*4882a593Smuzhiyun #include "dst_priv.h"
21*4882a593Smuzhiyun #include "dst_common.h"
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun static unsigned int verbose;
24*4882a593Smuzhiyun module_param(verbose, int, 0644);
25*4882a593Smuzhiyun MODULE_PARM_DESC(verbose, "verbosity level (0 to 3)");
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static unsigned int dst_addons;
28*4882a593Smuzhiyun module_param(dst_addons, int, 0644);
29*4882a593Smuzhiyun MODULE_PARM_DESC(dst_addons, "CA daughterboard, default is 0 (No addons)");
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static unsigned int dst_algo;
32*4882a593Smuzhiyun module_param(dst_algo, int, 0644);
33*4882a593Smuzhiyun MODULE_PARM_DESC(dst_algo, "tuning algo: default is 0=(SW), 1=(HW)");
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define HAS_LOCK 1
36*4882a593Smuzhiyun #define ATTEMPT_TUNE 2
37*4882a593Smuzhiyun #define HAS_POWER 4
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define dprintk(level, fmt, arg...) do { \
40*4882a593Smuzhiyun if (level >= verbose) \
41*4882a593Smuzhiyun printk(KERN_DEBUG pr_fmt("%s: " fmt), \
42*4882a593Smuzhiyun __func__, ##arg); \
43*4882a593Smuzhiyun } while(0)
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static int dst_command(struct dst_state *state, u8 *data, u8 len);
46*4882a593Smuzhiyun
dst_packsize(struct dst_state * state,int psize)47*4882a593Smuzhiyun static void dst_packsize(struct dst_state *state, int psize)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun union dst_gpio_packet bits;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun bits.psize = psize;
52*4882a593Smuzhiyun bt878_device_control(state->bt, DST_IG_TS, &bits);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
dst_gpio_outb(struct dst_state * state,u32 mask,u32 enbb,u32 outhigh,int delay)55*4882a593Smuzhiyun static int dst_gpio_outb(struct dst_state *state, u32 mask, u32 enbb,
56*4882a593Smuzhiyun u32 outhigh, int delay)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun union dst_gpio_packet enb;
59*4882a593Smuzhiyun union dst_gpio_packet bits;
60*4882a593Smuzhiyun int err;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun enb.enb.mask = mask;
63*4882a593Smuzhiyun enb.enb.enable = enbb;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun dprintk(2, "mask=[%04x], enbb=[%04x], outhigh=[%04x]\n",
66*4882a593Smuzhiyun mask, enbb, outhigh);
67*4882a593Smuzhiyun if ((err = bt878_device_control(state->bt, DST_IG_ENABLE, &enb)) < 0) {
68*4882a593Smuzhiyun dprintk(2, "dst_gpio_enb error (err == %i, mask == %02x, enb == %02x)\n",
69*4882a593Smuzhiyun err, mask, enbb);
70*4882a593Smuzhiyun return -EREMOTEIO;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun udelay(1000);
73*4882a593Smuzhiyun /* because complete disabling means no output, no need to do output packet */
74*4882a593Smuzhiyun if (enbb == 0)
75*4882a593Smuzhiyun return 0;
76*4882a593Smuzhiyun if (delay)
77*4882a593Smuzhiyun msleep(10);
78*4882a593Smuzhiyun bits.outp.mask = enbb;
79*4882a593Smuzhiyun bits.outp.highvals = outhigh;
80*4882a593Smuzhiyun if ((err = bt878_device_control(state->bt, DST_IG_WRITE, &bits)) < 0) {
81*4882a593Smuzhiyun dprintk(2, "dst_gpio_outb error (err == %i, enbb == %02x, outhigh == %02x)\n",
82*4882a593Smuzhiyun err, enbb, outhigh);
83*4882a593Smuzhiyun return -EREMOTEIO;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun return 0;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
dst_gpio_inb(struct dst_state * state,u8 * result)89*4882a593Smuzhiyun static int dst_gpio_inb(struct dst_state *state, u8 *result)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun union dst_gpio_packet rd_packet;
92*4882a593Smuzhiyun int err;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun *result = 0;
95*4882a593Smuzhiyun if ((err = bt878_device_control(state->bt, DST_IG_READ, &rd_packet)) < 0) {
96*4882a593Smuzhiyun pr_err("dst_gpio_inb error (err == %i)\n", err);
97*4882a593Smuzhiyun return -EREMOTEIO;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun *result = (u8) rd_packet.rd.value;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
rdc_reset_state(struct dst_state * state)104*4882a593Smuzhiyun int rdc_reset_state(struct dst_state *state)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun dprintk(2, "Resetting state machine\n");
107*4882a593Smuzhiyun if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, 0, NO_DELAY) < 0) {
108*4882a593Smuzhiyun pr_err("dst_gpio_outb ERROR !\n");
109*4882a593Smuzhiyun return -1;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun msleep(10);
112*4882a593Smuzhiyun if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, RDC_8820_INT, NO_DELAY) < 0) {
113*4882a593Smuzhiyun pr_err("dst_gpio_outb ERROR !\n");
114*4882a593Smuzhiyun msleep(10);
115*4882a593Smuzhiyun return -1;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun return 0;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun EXPORT_SYMBOL(rdc_reset_state);
121*4882a593Smuzhiyun
rdc_8820_reset(struct dst_state * state)122*4882a593Smuzhiyun static int rdc_8820_reset(struct dst_state *state)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun dprintk(3, "Resetting DST\n");
125*4882a593Smuzhiyun if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, 0, NO_DELAY) < 0) {
126*4882a593Smuzhiyun pr_err("dst_gpio_outb ERROR !\n");
127*4882a593Smuzhiyun return -1;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun udelay(1000);
130*4882a593Smuzhiyun if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, RDC_8820_RESET, DELAY) < 0) {
131*4882a593Smuzhiyun pr_err("dst_gpio_outb ERROR !\n");
132*4882a593Smuzhiyun return -1;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
dst_pio_enable(struct dst_state * state)138*4882a593Smuzhiyun static int dst_pio_enable(struct dst_state *state)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_ENABLE, 0, NO_DELAY) < 0) {
141*4882a593Smuzhiyun pr_err("dst_gpio_outb ERROR !\n");
142*4882a593Smuzhiyun return -1;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun udelay(1000);
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun return 0;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun
dst_pio_disable(struct dst_state * state)149*4882a593Smuzhiyun int dst_pio_disable(struct dst_state *state)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_DISABLE, RDC_8820_PIO_0_DISABLE, NO_DELAY) < 0) {
152*4882a593Smuzhiyun pr_err("dst_gpio_outb ERROR !\n");
153*4882a593Smuzhiyun return -1;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_FW_1)
156*4882a593Smuzhiyun udelay(1000);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun return 0;
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun EXPORT_SYMBOL(dst_pio_disable);
161*4882a593Smuzhiyun
dst_wait_dst_ready(struct dst_state * state,u8 delay_mode)162*4882a593Smuzhiyun int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun u8 reply;
165*4882a593Smuzhiyun int i;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun for (i = 0; i < 200; i++) {
168*4882a593Smuzhiyun if (dst_gpio_inb(state, &reply) < 0) {
169*4882a593Smuzhiyun pr_err("dst_gpio_inb ERROR !\n");
170*4882a593Smuzhiyun return -1;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun if ((reply & RDC_8820_PIO_0_ENABLE) == 0) {
173*4882a593Smuzhiyun dprintk(2, "dst wait ready after %d\n", i);
174*4882a593Smuzhiyun return 1;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun msleep(10);
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun dprintk(1, "dst wait NOT ready after %d\n", i);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun return 0;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun EXPORT_SYMBOL(dst_wait_dst_ready);
183*4882a593Smuzhiyun
dst_error_recovery(struct dst_state * state)184*4882a593Smuzhiyun int dst_error_recovery(struct dst_state *state)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun dprintk(1, "Trying to return from previous errors.\n");
187*4882a593Smuzhiyun dst_pio_disable(state);
188*4882a593Smuzhiyun msleep(10);
189*4882a593Smuzhiyun dst_pio_enable(state);
190*4882a593Smuzhiyun msleep(10);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun return 0;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun EXPORT_SYMBOL(dst_error_recovery);
195*4882a593Smuzhiyun
dst_error_bailout(struct dst_state * state)196*4882a593Smuzhiyun int dst_error_bailout(struct dst_state *state)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun dprintk(2, "Trying to bailout from previous error.\n");
199*4882a593Smuzhiyun rdc_8820_reset(state);
200*4882a593Smuzhiyun dst_pio_disable(state);
201*4882a593Smuzhiyun msleep(10);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun EXPORT_SYMBOL(dst_error_bailout);
206*4882a593Smuzhiyun
dst_comm_init(struct dst_state * state)207*4882a593Smuzhiyun int dst_comm_init(struct dst_state *state)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun dprintk(2, "Initializing DST.\n");
210*4882a593Smuzhiyun if ((dst_pio_enable(state)) < 0) {
211*4882a593Smuzhiyun pr_err("PIO Enable Failed\n");
212*4882a593Smuzhiyun return -1;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun if ((rdc_reset_state(state)) < 0) {
215*4882a593Smuzhiyun pr_err("RDC 8820 State RESET Failed.\n");
216*4882a593Smuzhiyun return -1;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_FW_1)
219*4882a593Smuzhiyun msleep(100);
220*4882a593Smuzhiyun else
221*4882a593Smuzhiyun msleep(5);
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun return 0;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun EXPORT_SYMBOL(dst_comm_init);
226*4882a593Smuzhiyun
write_dst(struct dst_state * state,u8 * data,u8 len)227*4882a593Smuzhiyun int write_dst(struct dst_state *state, u8 *data, u8 len)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun struct i2c_msg msg = {
230*4882a593Smuzhiyun .addr = state->config->demod_address,
231*4882a593Smuzhiyun .flags = 0,
232*4882a593Smuzhiyun .buf = data,
233*4882a593Smuzhiyun .len = len
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun int err;
237*4882a593Smuzhiyun u8 cnt;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun dprintk(1, "writing [ %*ph ]\n", len, data);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun for (cnt = 0; cnt < 2; cnt++) {
242*4882a593Smuzhiyun if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
243*4882a593Smuzhiyun dprintk(2, "_write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n",
244*4882a593Smuzhiyun err, len, data[0]);
245*4882a593Smuzhiyun dst_error_recovery(state);
246*4882a593Smuzhiyun continue;
247*4882a593Smuzhiyun } else
248*4882a593Smuzhiyun break;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun if (cnt >= 2) {
251*4882a593Smuzhiyun dprintk(2, "RDC 8820 RESET\n");
252*4882a593Smuzhiyun dst_error_bailout(state);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun return -1;
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun return 0;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun EXPORT_SYMBOL(write_dst);
260*4882a593Smuzhiyun
read_dst(struct dst_state * state,u8 * ret,u8 len)261*4882a593Smuzhiyun int read_dst(struct dst_state *state, u8 *ret, u8 len)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct i2c_msg msg = {
264*4882a593Smuzhiyun .addr = state->config->demod_address,
265*4882a593Smuzhiyun .flags = I2C_M_RD,
266*4882a593Smuzhiyun .buf = ret,
267*4882a593Smuzhiyun .len = len
268*4882a593Smuzhiyun };
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun int err;
271*4882a593Smuzhiyun int cnt;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun for (cnt = 0; cnt < 2; cnt++) {
274*4882a593Smuzhiyun if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
275*4882a593Smuzhiyun dprintk(2, "read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n",
276*4882a593Smuzhiyun err, len, ret[0]);
277*4882a593Smuzhiyun dst_error_recovery(state);
278*4882a593Smuzhiyun continue;
279*4882a593Smuzhiyun } else
280*4882a593Smuzhiyun break;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun if (cnt >= 2) {
283*4882a593Smuzhiyun dprintk(2, "RDC 8820 RESET\n");
284*4882a593Smuzhiyun dst_error_bailout(state);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun return -1;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun dprintk(3, "reply is %*ph\n", len, ret);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun return 0;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun EXPORT_SYMBOL(read_dst);
293*4882a593Smuzhiyun
dst_set_polarization(struct dst_state * state)294*4882a593Smuzhiyun static int dst_set_polarization(struct dst_state *state)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun switch (state->voltage) {
297*4882a593Smuzhiyun case SEC_VOLTAGE_13: /* Vertical */
298*4882a593Smuzhiyun dprintk(2, "Polarization=[Vertical]\n");
299*4882a593Smuzhiyun state->tx_tuna[8] &= ~0x40;
300*4882a593Smuzhiyun break;
301*4882a593Smuzhiyun case SEC_VOLTAGE_18: /* Horizontal */
302*4882a593Smuzhiyun dprintk(2, "Polarization=[Horizontal]\n");
303*4882a593Smuzhiyun state->tx_tuna[8] |= 0x40;
304*4882a593Smuzhiyun break;
305*4882a593Smuzhiyun case SEC_VOLTAGE_OFF:
306*4882a593Smuzhiyun break;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun return 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
dst_set_freq(struct dst_state * state,u32 freq)312*4882a593Smuzhiyun static int dst_set_freq(struct dst_state *state, u32 freq)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun state->frequency = freq;
315*4882a593Smuzhiyun dprintk(2, "set Frequency %u\n", freq);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
318*4882a593Smuzhiyun freq = freq / 1000;
319*4882a593Smuzhiyun if (freq < 950 || freq > 2150)
320*4882a593Smuzhiyun return -EINVAL;
321*4882a593Smuzhiyun state->tx_tuna[2] = (freq >> 8);
322*4882a593Smuzhiyun state->tx_tuna[3] = (u8) freq;
323*4882a593Smuzhiyun state->tx_tuna[4] = 0x01;
324*4882a593Smuzhiyun state->tx_tuna[8] &= ~0x04;
325*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
326*4882a593Smuzhiyun if (freq < 1531)
327*4882a593Smuzhiyun state->tx_tuna[8] |= 0x04;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_TERR) {
330*4882a593Smuzhiyun freq = freq / 1000;
331*4882a593Smuzhiyun if (freq < 137000 || freq > 858000)
332*4882a593Smuzhiyun return -EINVAL;
333*4882a593Smuzhiyun state->tx_tuna[2] = (freq >> 16) & 0xff;
334*4882a593Smuzhiyun state->tx_tuna[3] = (freq >> 8) & 0xff;
335*4882a593Smuzhiyun state->tx_tuna[4] = (u8) freq;
336*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_CABLE) {
337*4882a593Smuzhiyun freq = freq / 1000;
338*4882a593Smuzhiyun state->tx_tuna[2] = (freq >> 16) & 0xff;
339*4882a593Smuzhiyun state->tx_tuna[3] = (freq >> 8) & 0xff;
340*4882a593Smuzhiyun state->tx_tuna[4] = (u8) freq;
341*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_ATSC) {
342*4882a593Smuzhiyun freq = freq / 1000;
343*4882a593Smuzhiyun if (freq < 51000 || freq > 858000)
344*4882a593Smuzhiyun return -EINVAL;
345*4882a593Smuzhiyun state->tx_tuna[2] = (freq >> 16) & 0xff;
346*4882a593Smuzhiyun state->tx_tuna[3] = (freq >> 8) & 0xff;
347*4882a593Smuzhiyun state->tx_tuna[4] = (u8) freq;
348*4882a593Smuzhiyun state->tx_tuna[5] = 0x00; /* ATSC */
349*4882a593Smuzhiyun state->tx_tuna[6] = 0x00;
350*4882a593Smuzhiyun if (state->dst_hw_cap & DST_TYPE_HAS_ANALOG)
351*4882a593Smuzhiyun state->tx_tuna[7] = 0x00; /* Digital */
352*4882a593Smuzhiyun } else
353*4882a593Smuzhiyun return -EINVAL;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun return 0;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
dst_set_bandwidth(struct dst_state * state,u32 bandwidth)358*4882a593Smuzhiyun static int dst_set_bandwidth(struct dst_state *state, u32 bandwidth)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun state->bandwidth = bandwidth;
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_TERR)
363*4882a593Smuzhiyun return -EOPNOTSUPP;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun switch (bandwidth) {
366*4882a593Smuzhiyun case 6000000:
367*4882a593Smuzhiyun if (state->dst_hw_cap & DST_TYPE_HAS_CA)
368*4882a593Smuzhiyun state->tx_tuna[7] = 0x06;
369*4882a593Smuzhiyun else {
370*4882a593Smuzhiyun state->tx_tuna[6] = 0x06;
371*4882a593Smuzhiyun state->tx_tuna[7] = 0x00;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun break;
374*4882a593Smuzhiyun case 7000000:
375*4882a593Smuzhiyun if (state->dst_hw_cap & DST_TYPE_HAS_CA)
376*4882a593Smuzhiyun state->tx_tuna[7] = 0x07;
377*4882a593Smuzhiyun else {
378*4882a593Smuzhiyun state->tx_tuna[6] = 0x07;
379*4882a593Smuzhiyun state->tx_tuna[7] = 0x00;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun break;
382*4882a593Smuzhiyun case 8000000:
383*4882a593Smuzhiyun if (state->dst_hw_cap & DST_TYPE_HAS_CA)
384*4882a593Smuzhiyun state->tx_tuna[7] = 0x08;
385*4882a593Smuzhiyun else {
386*4882a593Smuzhiyun state->tx_tuna[6] = 0x08;
387*4882a593Smuzhiyun state->tx_tuna[7] = 0x00;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun break;
390*4882a593Smuzhiyun default:
391*4882a593Smuzhiyun return -EINVAL;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun return 0;
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
dst_set_inversion(struct dst_state * state,enum fe_spectral_inversion inversion)397*4882a593Smuzhiyun static int dst_set_inversion(struct dst_state *state,
398*4882a593Smuzhiyun enum fe_spectral_inversion inversion)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun state->inversion = inversion;
401*4882a593Smuzhiyun switch (inversion) {
402*4882a593Smuzhiyun case INVERSION_OFF: /* Inversion = Normal */
403*4882a593Smuzhiyun state->tx_tuna[8] &= ~0x80;
404*4882a593Smuzhiyun break;
405*4882a593Smuzhiyun case INVERSION_ON:
406*4882a593Smuzhiyun state->tx_tuna[8] |= 0x80;
407*4882a593Smuzhiyun break;
408*4882a593Smuzhiyun default:
409*4882a593Smuzhiyun return -EINVAL;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun return 0;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
dst_set_fec(struct dst_state * state,enum fe_code_rate fec)415*4882a593Smuzhiyun static int dst_set_fec(struct dst_state *state, enum fe_code_rate fec)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun state->fec = fec;
418*4882a593Smuzhiyun return 0;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
dst_get_fec(struct dst_state * state)421*4882a593Smuzhiyun static enum fe_code_rate dst_get_fec(struct dst_state *state)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun return state->fec;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
dst_set_symbolrate(struct dst_state * state,u32 srate)426*4882a593Smuzhiyun static int dst_set_symbolrate(struct dst_state *state, u32 srate)
427*4882a593Smuzhiyun {
428*4882a593Smuzhiyun u32 symcalc;
429*4882a593Smuzhiyun u64 sval;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun state->symbol_rate = srate;
432*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_TERR) {
433*4882a593Smuzhiyun return -EOPNOTSUPP;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun dprintk(2, "set symrate %u\n", srate);
436*4882a593Smuzhiyun srate /= 1000;
437*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
438*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_SYMDIV) {
439*4882a593Smuzhiyun sval = srate;
440*4882a593Smuzhiyun sval <<= 20;
441*4882a593Smuzhiyun do_div(sval, 88000);
442*4882a593Smuzhiyun symcalc = (u32) sval;
443*4882a593Smuzhiyun dprintk(2, "set symcalc %u\n", symcalc);
444*4882a593Smuzhiyun state->tx_tuna[5] = (u8) (symcalc >> 12);
445*4882a593Smuzhiyun state->tx_tuna[6] = (u8) (symcalc >> 4);
446*4882a593Smuzhiyun state->tx_tuna[7] = (u8) (symcalc << 4);
447*4882a593Smuzhiyun } else {
448*4882a593Smuzhiyun state->tx_tuna[5] = (u8) (srate >> 16) & 0x7f;
449*4882a593Smuzhiyun state->tx_tuna[6] = (u8) (srate >> 8);
450*4882a593Smuzhiyun state->tx_tuna[7] = (u8) srate;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun state->tx_tuna[8] &= ~0x20;
453*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
454*4882a593Smuzhiyun if (srate > 8000)
455*4882a593Smuzhiyun state->tx_tuna[8] |= 0x20;
456*4882a593Smuzhiyun }
457*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_CABLE) {
458*4882a593Smuzhiyun dprintk(3, "%s\n", state->fw_name);
459*4882a593Smuzhiyun if (!strncmp(state->fw_name, "DCTNEW", 6)) {
460*4882a593Smuzhiyun state->tx_tuna[5] = (u8) (srate >> 8);
461*4882a593Smuzhiyun state->tx_tuna[6] = (u8) srate;
462*4882a593Smuzhiyun state->tx_tuna[7] = 0x00;
463*4882a593Smuzhiyun } else if (!strncmp(state->fw_name, "DCT-CI", 6)) {
464*4882a593Smuzhiyun state->tx_tuna[5] = 0x00;
465*4882a593Smuzhiyun state->tx_tuna[6] = (u8) (srate >> 8);
466*4882a593Smuzhiyun state->tx_tuna[7] = (u8) srate;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun return 0;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
dst_set_modulation(struct dst_state * state,enum fe_modulation modulation)472*4882a593Smuzhiyun static int dst_set_modulation(struct dst_state *state,
473*4882a593Smuzhiyun enum fe_modulation modulation)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_CABLE)
476*4882a593Smuzhiyun return -EOPNOTSUPP;
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun state->modulation = modulation;
479*4882a593Smuzhiyun switch (modulation) {
480*4882a593Smuzhiyun case QAM_16:
481*4882a593Smuzhiyun state->tx_tuna[8] = 0x10;
482*4882a593Smuzhiyun break;
483*4882a593Smuzhiyun case QAM_32:
484*4882a593Smuzhiyun state->tx_tuna[8] = 0x20;
485*4882a593Smuzhiyun break;
486*4882a593Smuzhiyun case QAM_64:
487*4882a593Smuzhiyun state->tx_tuna[8] = 0x40;
488*4882a593Smuzhiyun break;
489*4882a593Smuzhiyun case QAM_128:
490*4882a593Smuzhiyun state->tx_tuna[8] = 0x80;
491*4882a593Smuzhiyun break;
492*4882a593Smuzhiyun case QAM_256:
493*4882a593Smuzhiyun if (!strncmp(state->fw_name, "DCTNEW", 6))
494*4882a593Smuzhiyun state->tx_tuna[8] = 0xff;
495*4882a593Smuzhiyun else if (!strncmp(state->fw_name, "DCT-CI", 6))
496*4882a593Smuzhiyun state->tx_tuna[8] = 0x00;
497*4882a593Smuzhiyun break;
498*4882a593Smuzhiyun case QPSK:
499*4882a593Smuzhiyun case QAM_AUTO:
500*4882a593Smuzhiyun case VSB_8:
501*4882a593Smuzhiyun case VSB_16:
502*4882a593Smuzhiyun default:
503*4882a593Smuzhiyun return -EINVAL;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun return 0;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
dst_get_modulation(struct dst_state * state)510*4882a593Smuzhiyun static enum fe_modulation dst_get_modulation(struct dst_state *state)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun return state->modulation;
513*4882a593Smuzhiyun }
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun
dst_check_sum(u8 * buf,u32 len)516*4882a593Smuzhiyun u8 dst_check_sum(u8 *buf, u32 len)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun u32 i;
519*4882a593Smuzhiyun u8 val = 0;
520*4882a593Smuzhiyun if (!len)
521*4882a593Smuzhiyun return 0;
522*4882a593Smuzhiyun for (i = 0; i < len; i++) {
523*4882a593Smuzhiyun val += buf[i];
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun return ((~val) + 1);
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun EXPORT_SYMBOL(dst_check_sum);
528*4882a593Smuzhiyun
dst_type_flags_print(struct dst_state * state)529*4882a593Smuzhiyun static void dst_type_flags_print(struct dst_state *state)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun u32 type_flags = state->type_flags;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun pr_err("DST type flags :\n");
534*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_TS188)
535*4882a593Smuzhiyun pr_err(" 0x%x newtuner\n", DST_TYPE_HAS_TS188);
536*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_NEWTUNE_2)
537*4882a593Smuzhiyun pr_err(" 0x%x newtuner 2\n", DST_TYPE_HAS_NEWTUNE_2);
538*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_TS204)
539*4882a593Smuzhiyun pr_err(" 0x%x ts204\n", DST_TYPE_HAS_TS204);
540*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_VLF)
541*4882a593Smuzhiyun pr_err(" 0x%x VLF\n", DST_TYPE_HAS_VLF);
542*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_SYMDIV)
543*4882a593Smuzhiyun pr_err(" 0x%x symdiv\n", DST_TYPE_HAS_SYMDIV);
544*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_FW_1)
545*4882a593Smuzhiyun pr_err(" 0x%x firmware version = 1\n", DST_TYPE_HAS_FW_1);
546*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_FW_2)
547*4882a593Smuzhiyun pr_err(" 0x%x firmware version = 2\n", DST_TYPE_HAS_FW_2);
548*4882a593Smuzhiyun if (type_flags & DST_TYPE_HAS_FW_3)
549*4882a593Smuzhiyun pr_err(" 0x%x firmware version = 3\n", DST_TYPE_HAS_FW_3);
550*4882a593Smuzhiyun pr_err("\n");
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun
dst_type_print(struct dst_state * state,u8 type)554*4882a593Smuzhiyun static int dst_type_print(struct dst_state *state, u8 type)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun char *otype;
557*4882a593Smuzhiyun switch (type) {
558*4882a593Smuzhiyun case DST_TYPE_IS_SAT:
559*4882a593Smuzhiyun otype = "satellite";
560*4882a593Smuzhiyun break;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun case DST_TYPE_IS_TERR:
563*4882a593Smuzhiyun otype = "terrestrial";
564*4882a593Smuzhiyun break;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun case DST_TYPE_IS_CABLE:
567*4882a593Smuzhiyun otype = "cable";
568*4882a593Smuzhiyun break;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun case DST_TYPE_IS_ATSC:
571*4882a593Smuzhiyun otype = "atsc";
572*4882a593Smuzhiyun break;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun default:
575*4882a593Smuzhiyun dprintk(2, "invalid dst type %d\n", type);
576*4882a593Smuzhiyun return -EINVAL;
577*4882a593Smuzhiyun }
578*4882a593Smuzhiyun dprintk(2, "DST type: %s\n", otype);
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun return 0;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun static struct tuner_types tuner_list[] = {
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_L64724,
586*4882a593Smuzhiyun .tuner_name = "L 64724",
587*4882a593Smuzhiyun .board_name = "UNKNOWN",
588*4882a593Smuzhiyun .fw_name = "UNKNOWN"
589*4882a593Smuzhiyun },
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_STV0299,
593*4882a593Smuzhiyun .tuner_name = "STV 0299",
594*4882a593Smuzhiyun .board_name = "VP1020",
595*4882a593Smuzhiyun .fw_name = "DST-MOT"
596*4882a593Smuzhiyun },
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun {
599*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_STV0299,
600*4882a593Smuzhiyun .tuner_name = "STV 0299",
601*4882a593Smuzhiyun .board_name = "VP1020",
602*4882a593Smuzhiyun .fw_name = "DST-03T"
603*4882a593Smuzhiyun },
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun {
606*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_MB86A15,
607*4882a593Smuzhiyun .tuner_name = "MB 86A15",
608*4882a593Smuzhiyun .board_name = "VP1022",
609*4882a593Smuzhiyun .fw_name = "DST-03T"
610*4882a593Smuzhiyun },
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun {
613*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_MB86A15,
614*4882a593Smuzhiyun .tuner_name = "MB 86A15",
615*4882a593Smuzhiyun .board_name = "VP1025",
616*4882a593Smuzhiyun .fw_name = "DST-03T"
617*4882a593Smuzhiyun },
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_STV0299,
621*4882a593Smuzhiyun .tuner_name = "STV 0299",
622*4882a593Smuzhiyun .board_name = "VP1030",
623*4882a593Smuzhiyun .fw_name = "DST-CI"
624*4882a593Smuzhiyun },
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun {
627*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_STV0299,
628*4882a593Smuzhiyun .tuner_name = "STV 0299",
629*4882a593Smuzhiyun .board_name = "VP1030",
630*4882a593Smuzhiyun .fw_name = "DSTMCI"
631*4882a593Smuzhiyun },
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_UNKNOWN,
635*4882a593Smuzhiyun .tuner_name = "UNKNOWN",
636*4882a593Smuzhiyun .board_name = "VP2021",
637*4882a593Smuzhiyun .fw_name = "DCTNEW"
638*4882a593Smuzhiyun },
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun {
641*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_UNKNOWN,
642*4882a593Smuzhiyun .tuner_name = "UNKNOWN",
643*4882a593Smuzhiyun .board_name = "VP2030",
644*4882a593Smuzhiyun .fw_name = "DCT-CI"
645*4882a593Smuzhiyun },
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_UNKNOWN,
649*4882a593Smuzhiyun .tuner_name = "UNKNOWN",
650*4882a593Smuzhiyun .board_name = "VP2031",
651*4882a593Smuzhiyun .fw_name = "DCT-CI"
652*4882a593Smuzhiyun },
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_UNKNOWN,
656*4882a593Smuzhiyun .tuner_name = "UNKNOWN",
657*4882a593Smuzhiyun .board_name = "VP2040",
658*4882a593Smuzhiyun .fw_name = "DCT-CI"
659*4882a593Smuzhiyun },
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun {
662*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_UNKNOWN,
663*4882a593Smuzhiyun .tuner_name = "UNKNOWN",
664*4882a593Smuzhiyun .board_name = "VP3020",
665*4882a593Smuzhiyun .fw_name = "DTTFTA"
666*4882a593Smuzhiyun },
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_UNKNOWN,
670*4882a593Smuzhiyun .tuner_name = "UNKNOWN",
671*4882a593Smuzhiyun .board_name = "VP3021",
672*4882a593Smuzhiyun .fw_name = "DTTFTA"
673*4882a593Smuzhiyun },
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_TDA10046,
677*4882a593Smuzhiyun .tuner_name = "TDA10046",
678*4882a593Smuzhiyun .board_name = "VP3040",
679*4882a593Smuzhiyun .fw_name = "DTT-CI"
680*4882a593Smuzhiyun },
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_UNKNOWN,
684*4882a593Smuzhiyun .tuner_name = "UNKNOWN",
685*4882a593Smuzhiyun .board_name = "VP3051",
686*4882a593Smuzhiyun .fw_name = "DTTNXT"
687*4882a593Smuzhiyun },
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun {
690*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_NXT200x,
691*4882a593Smuzhiyun .tuner_name = "NXT200x",
692*4882a593Smuzhiyun .board_name = "VP3220",
693*4882a593Smuzhiyun .fw_name = "ATSCDI"
694*4882a593Smuzhiyun },
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun {
697*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_NXT200x,
698*4882a593Smuzhiyun .tuner_name = "NXT200x",
699*4882a593Smuzhiyun .board_name = "VP3250",
700*4882a593Smuzhiyun .fw_name = "ATSCAD"
701*4882a593Smuzhiyun },
702*4882a593Smuzhiyun };
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun /*
705*4882a593Smuzhiyun Known cards list
706*4882a593Smuzhiyun Satellite
707*4882a593Smuzhiyun -------------------
708*4882a593Smuzhiyun 200103A
709*4882a593Smuzhiyun VP-1020 DST-MOT LG(old), TS=188
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun VP-1020 DST-03T LG(new), TS=204
712*4882a593Smuzhiyun VP-1022 DST-03T LG(new), TS=204
713*4882a593Smuzhiyun VP-1025 DST-03T LG(new), TS=204
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun VP-1030 DSTMCI, LG(new), TS=188
716*4882a593Smuzhiyun VP-1032 DSTMCI, LG(new), TS=188
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun Cable
719*4882a593Smuzhiyun -------------------
720*4882a593Smuzhiyun VP-2030 DCT-CI, Samsung, TS=204
721*4882a593Smuzhiyun VP-2021 DCT-CI, Unknown, TS=204
722*4882a593Smuzhiyun VP-2031 DCT-CI, Philips, TS=188
723*4882a593Smuzhiyun VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
724*4882a593Smuzhiyun VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun Terrestrial
727*4882a593Smuzhiyun -------------------
728*4882a593Smuzhiyun VP-3050 DTTNXT TS=188
729*4882a593Smuzhiyun VP-3040 DTT-CI, Philips, TS=188
730*4882a593Smuzhiyun VP-3040 DTT-CI, Philips, TS=204
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun ATSC
733*4882a593Smuzhiyun -------------------
734*4882a593Smuzhiyun VP-3220 ATSCDI, TS=188
735*4882a593Smuzhiyun VP-3250 ATSCAD, TS=188
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun */
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun static struct dst_types dst_tlist[] = {
740*4882a593Smuzhiyun {
741*4882a593Smuzhiyun .device_id = "200103A",
742*4882a593Smuzhiyun .offset = 0,
743*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
744*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_OBS_REGS,
745*4882a593Smuzhiyun .dst_feature = 0,
746*4882a593Smuzhiyun .tuner_type = 0
747*4882a593Smuzhiyun }, /* obsolete */
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun {
750*4882a593Smuzhiyun .device_id = "DST-020",
751*4882a593Smuzhiyun .offset = 0,
752*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
753*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
754*4882a593Smuzhiyun .dst_feature = 0,
755*4882a593Smuzhiyun .tuner_type = 0
756*4882a593Smuzhiyun }, /* obsolete */
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun .device_id = "DST-030",
760*4882a593Smuzhiyun .offset = 0,
761*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
762*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
763*4882a593Smuzhiyun .dst_feature = 0,
764*4882a593Smuzhiyun .tuner_type = 0
765*4882a593Smuzhiyun }, /* obsolete */
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun {
768*4882a593Smuzhiyun .device_id = "DST-03T",
769*4882a593Smuzhiyun .offset = 0,
770*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
771*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_2,
772*4882a593Smuzhiyun .dst_feature = DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 | DST_TYPE_HAS_DISEQC5
773*4882a593Smuzhiyun | DST_TYPE_HAS_MAC | DST_TYPE_HAS_MOTO,
774*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_MULTI
775*4882a593Smuzhiyun },
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun .device_id = "DST-MOT",
779*4882a593Smuzhiyun .offset = 0,
780*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
781*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
782*4882a593Smuzhiyun .dst_feature = 0,
783*4882a593Smuzhiyun .tuner_type = 0
784*4882a593Smuzhiyun }, /* obsolete */
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun {
787*4882a593Smuzhiyun .device_id = "DST-CI",
788*4882a593Smuzhiyun .offset = 1,
789*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
790*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_1,
791*4882a593Smuzhiyun .dst_feature = DST_TYPE_HAS_CA,
792*4882a593Smuzhiyun .tuner_type = 0
793*4882a593Smuzhiyun }, /* An OEM board */
794*4882a593Smuzhiyun
795*4882a593Smuzhiyun {
796*4882a593Smuzhiyun .device_id = "DSTMCI",
797*4882a593Smuzhiyun .offset = 1,
798*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
799*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_INC_COUNT | DST_TYPE_HAS_VLF,
800*4882a593Smuzhiyun .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4
801*4882a593Smuzhiyun | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC,
802*4882a593Smuzhiyun .tuner_type = TUNER_TYPE_MULTI
803*4882a593Smuzhiyun },
804*4882a593Smuzhiyun
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun .device_id = "DSTFCI",
807*4882a593Smuzhiyun .offset = 1,
808*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_SAT,
809*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
810*4882a593Smuzhiyun .dst_feature = 0,
811*4882a593Smuzhiyun .tuner_type = 0
812*4882a593Smuzhiyun }, /* unknown to vendor */
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun {
815*4882a593Smuzhiyun .device_id = "DCT-CI",
816*4882a593Smuzhiyun .offset = 1,
817*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_CABLE,
818*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_VLF,
819*4882a593Smuzhiyun .dst_feature = DST_TYPE_HAS_CA,
820*4882a593Smuzhiyun .tuner_type = 0
821*4882a593Smuzhiyun },
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun {
824*4882a593Smuzhiyun .device_id = "DCTNEW",
825*4882a593Smuzhiyun .offset = 1,
826*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_CABLE,
827*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_3 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_MULTI_FE,
828*4882a593Smuzhiyun .dst_feature = 0,
829*4882a593Smuzhiyun .tuner_type = 0
830*4882a593Smuzhiyun },
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun {
833*4882a593Smuzhiyun .device_id = "DTT-CI",
834*4882a593Smuzhiyun .offset = 1,
835*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_TERR,
836*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_VLF,
837*4882a593Smuzhiyun .dst_feature = DST_TYPE_HAS_CA,
838*4882a593Smuzhiyun .tuner_type = 0
839*4882a593Smuzhiyun },
840*4882a593Smuzhiyun
841*4882a593Smuzhiyun {
842*4882a593Smuzhiyun .device_id = "DTTDIG",
843*4882a593Smuzhiyun .offset = 1,
844*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_TERR,
845*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_FW_2,
846*4882a593Smuzhiyun .dst_feature = 0,
847*4882a593Smuzhiyun .tuner_type = 0
848*4882a593Smuzhiyun },
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun {
851*4882a593Smuzhiyun .device_id = "DTTNXT",
852*4882a593Smuzhiyun .offset = 1,
853*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_TERR,
854*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_FW_2,
855*4882a593Smuzhiyun .dst_feature = DST_TYPE_HAS_ANALOG,
856*4882a593Smuzhiyun .tuner_type = 0
857*4882a593Smuzhiyun },
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun {
860*4882a593Smuzhiyun .device_id = "ATSCDI",
861*4882a593Smuzhiyun .offset = 1,
862*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_ATSC,
863*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_FW_2,
864*4882a593Smuzhiyun .dst_feature = 0,
865*4882a593Smuzhiyun .tuner_type = 0
866*4882a593Smuzhiyun },
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun {
869*4882a593Smuzhiyun .device_id = "ATSCAD",
870*4882a593Smuzhiyun .offset = 1,
871*4882a593Smuzhiyun .dst_type = DST_TYPE_IS_ATSC,
872*4882a593Smuzhiyun .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD,
873*4882a593Smuzhiyun .dst_feature = DST_TYPE_HAS_MAC | DST_TYPE_HAS_ANALOG,
874*4882a593Smuzhiyun .tuner_type = 0
875*4882a593Smuzhiyun },
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun { }
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun };
880*4882a593Smuzhiyun
dst_get_mac(struct dst_state * state)881*4882a593Smuzhiyun static int dst_get_mac(struct dst_state *state)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun u8 get_mac[] = { 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
884*4882a593Smuzhiyun get_mac[7] = dst_check_sum(get_mac, 7);
885*4882a593Smuzhiyun if (dst_command(state, get_mac, 8) < 0) {
886*4882a593Smuzhiyun dprintk(2, "Unsupported Command\n");
887*4882a593Smuzhiyun return -1;
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun memset(&state->mac_address, '\0', 8);
890*4882a593Smuzhiyun memcpy(&state->mac_address, &state->rxbuffer, 6);
891*4882a593Smuzhiyun pr_err("MAC Address=[%pM]\n", state->mac_address);
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun return 0;
894*4882a593Smuzhiyun }
895*4882a593Smuzhiyun
dst_fw_ver(struct dst_state * state)896*4882a593Smuzhiyun static int dst_fw_ver(struct dst_state *state)
897*4882a593Smuzhiyun {
898*4882a593Smuzhiyun u8 get_ver[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
899*4882a593Smuzhiyun get_ver[7] = dst_check_sum(get_ver, 7);
900*4882a593Smuzhiyun if (dst_command(state, get_ver, 8) < 0) {
901*4882a593Smuzhiyun dprintk(2, "Unsupported Command\n");
902*4882a593Smuzhiyun return -1;
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun memcpy(&state->fw_version, &state->rxbuffer, 8);
905*4882a593Smuzhiyun pr_err("Firmware Ver = %x.%x Build = %02x, on %x:%x, %x-%x-20%02x\n",
906*4882a593Smuzhiyun state->fw_version[0] >> 4, state->fw_version[0] & 0x0f,
907*4882a593Smuzhiyun state->fw_version[1],
908*4882a593Smuzhiyun state->fw_version[5], state->fw_version[6],
909*4882a593Smuzhiyun state->fw_version[4], state->fw_version[3], state->fw_version[2]);
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun return 0;
912*4882a593Smuzhiyun }
913*4882a593Smuzhiyun
dst_card_type(struct dst_state * state)914*4882a593Smuzhiyun static int dst_card_type(struct dst_state *state)
915*4882a593Smuzhiyun {
916*4882a593Smuzhiyun int j;
917*4882a593Smuzhiyun struct tuner_types *p_tuner_list = NULL;
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun u8 get_type[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
920*4882a593Smuzhiyun get_type[7] = dst_check_sum(get_type, 7);
921*4882a593Smuzhiyun if (dst_command(state, get_type, 8) < 0) {
922*4882a593Smuzhiyun dprintk(2, "Unsupported Command\n");
923*4882a593Smuzhiyun return -1;
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun memset(&state->card_info, '\0', 8);
926*4882a593Smuzhiyun memcpy(&state->card_info, &state->rxbuffer, 7);
927*4882a593Smuzhiyun pr_err("Device Model=[%s]\n", &state->card_info[0]);
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
930*4882a593Smuzhiyun if (!strcmp(&state->card_info[0], p_tuner_list->board_name)) {
931*4882a593Smuzhiyun state->tuner_type = p_tuner_list->tuner_type;
932*4882a593Smuzhiyun pr_err("DST has [%s] tuner, tuner type=[%d]\n",
933*4882a593Smuzhiyun p_tuner_list->tuner_name, p_tuner_list->tuner_type);
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun return 0;
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun
dst_get_vendor(struct dst_state * state)940*4882a593Smuzhiyun static int dst_get_vendor(struct dst_state *state)
941*4882a593Smuzhiyun {
942*4882a593Smuzhiyun u8 get_vendor[] = { 0x00, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
943*4882a593Smuzhiyun get_vendor[7] = dst_check_sum(get_vendor, 7);
944*4882a593Smuzhiyun if (dst_command(state, get_vendor, 8) < 0) {
945*4882a593Smuzhiyun dprintk(2, "Unsupported Command\n");
946*4882a593Smuzhiyun return -1;
947*4882a593Smuzhiyun }
948*4882a593Smuzhiyun memset(&state->vendor, '\0', 8);
949*4882a593Smuzhiyun memcpy(&state->vendor, &state->rxbuffer, 7);
950*4882a593Smuzhiyun pr_err("Vendor=[%s]\n", &state->vendor[0]);
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun return 0;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun
debug_dst_buffer(struct dst_state * state)955*4882a593Smuzhiyun static void debug_dst_buffer(struct dst_state *state)
956*4882a593Smuzhiyun {
957*4882a593Smuzhiyun dprintk(3, "%s: [ %*ph ]\n", __func__, 8, state->rxbuffer);
958*4882a593Smuzhiyun }
959*4882a593Smuzhiyun
dst_check_stv0299(struct dst_state * state)960*4882a593Smuzhiyun static int dst_check_stv0299(struct dst_state *state)
961*4882a593Smuzhiyun {
962*4882a593Smuzhiyun u8 check_stv0299[] = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun check_stv0299[7] = dst_check_sum(check_stv0299, 7);
965*4882a593Smuzhiyun if (dst_command(state, check_stv0299, 8) < 0) {
966*4882a593Smuzhiyun pr_err("Cmd=[0x04] failed\n");
967*4882a593Smuzhiyun return -1;
968*4882a593Smuzhiyun }
969*4882a593Smuzhiyun debug_dst_buffer(state);
970*4882a593Smuzhiyun
971*4882a593Smuzhiyun if (memcmp(&check_stv0299, &state->rxbuffer, 8)) {
972*4882a593Smuzhiyun pr_err("Found a STV0299 NIM\n");
973*4882a593Smuzhiyun state->tuner_type = TUNER_TYPE_STV0299;
974*4882a593Smuzhiyun return 0;
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun return -1;
978*4882a593Smuzhiyun }
979*4882a593Smuzhiyun
dst_check_mb86a15(struct dst_state * state)980*4882a593Smuzhiyun static int dst_check_mb86a15(struct dst_state *state)
981*4882a593Smuzhiyun {
982*4882a593Smuzhiyun u8 check_mb86a15[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun check_mb86a15[7] = dst_check_sum(check_mb86a15, 7);
985*4882a593Smuzhiyun if (dst_command(state, check_mb86a15, 8) < 0) {
986*4882a593Smuzhiyun pr_err("Cmd=[0x10], failed\n");
987*4882a593Smuzhiyun return -1;
988*4882a593Smuzhiyun }
989*4882a593Smuzhiyun debug_dst_buffer(state);
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun if (memcmp(&check_mb86a15, &state->rxbuffer, 8) < 0) {
992*4882a593Smuzhiyun pr_err("Found a MB86A15 NIM\n");
993*4882a593Smuzhiyun state->tuner_type = TUNER_TYPE_MB86A15;
994*4882a593Smuzhiyun return 0;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun return -1;
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun
dst_get_tuner_info(struct dst_state * state)1000*4882a593Smuzhiyun static int dst_get_tuner_info(struct dst_state *state)
1001*4882a593Smuzhiyun {
1002*4882a593Smuzhiyun u8 get_tuner_1[] = { 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1003*4882a593Smuzhiyun u8 get_tuner_2[] = { 0x00, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun get_tuner_1[7] = dst_check_sum(get_tuner_1, 7);
1006*4882a593Smuzhiyun get_tuner_2[7] = dst_check_sum(get_tuner_2, 7);
1007*4882a593Smuzhiyun pr_err("DST TYpe = MULTI FE\n");
1008*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
1009*4882a593Smuzhiyun if (dst_command(state, get_tuner_1, 8) < 0) {
1010*4882a593Smuzhiyun dprintk(2, "Cmd=[0x13], Unsupported\n");
1011*4882a593Smuzhiyun goto force;
1012*4882a593Smuzhiyun }
1013*4882a593Smuzhiyun } else {
1014*4882a593Smuzhiyun if (dst_command(state, get_tuner_2, 8) < 0) {
1015*4882a593Smuzhiyun dprintk(2, "Cmd=[0xb], Unsupported\n");
1016*4882a593Smuzhiyun goto force;
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun memcpy(&state->board_info, &state->rxbuffer, 8);
1020*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
1021*4882a593Smuzhiyun pr_err("DST type has TS=188\n");
1022*4882a593Smuzhiyun }
1023*4882a593Smuzhiyun if (state->board_info[0] == 0xbc) {
1024*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_ATSC)
1025*4882a593Smuzhiyun state->type_flags |= DST_TYPE_HAS_TS188;
1026*4882a593Smuzhiyun else
1027*4882a593Smuzhiyun state->type_flags |= DST_TYPE_HAS_NEWTUNE_2;
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun if (state->board_info[1] == 0x01) {
1030*4882a593Smuzhiyun state->dst_hw_cap |= DST_TYPE_HAS_DBOARD;
1031*4882a593Smuzhiyun pr_err("DST has Daughterboard\n");
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun }
1034*4882a593Smuzhiyun
1035*4882a593Smuzhiyun return 0;
1036*4882a593Smuzhiyun force:
1037*4882a593Smuzhiyun if (!strncmp(state->fw_name, "DCT-CI", 6)) {
1038*4882a593Smuzhiyun state->type_flags |= DST_TYPE_HAS_TS204;
1039*4882a593Smuzhiyun pr_err("Forcing [%s] to TS188\n", state->fw_name);
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun return -1;
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun
dst_get_device_id(struct dst_state * state)1045*4882a593Smuzhiyun static int dst_get_device_id(struct dst_state *state)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun u8 reply;
1048*4882a593Smuzhiyun
1049*4882a593Smuzhiyun int i, j;
1050*4882a593Smuzhiyun struct dst_types *p_dst_type = NULL;
1051*4882a593Smuzhiyun struct tuner_types *p_tuner_list = NULL;
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun u8 use_dst_type = 0;
1054*4882a593Smuzhiyun u32 use_type_flags = 0;
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun static u8 device_type[8] = {0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff};
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun state->tuner_type = 0;
1059*4882a593Smuzhiyun device_type[7] = dst_check_sum(device_type, 7);
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun if (write_dst(state, device_type, FIXED_COMM))
1062*4882a593Smuzhiyun return -1; /* Write failed */
1063*4882a593Smuzhiyun if ((dst_pio_disable(state)) < 0)
1064*4882a593Smuzhiyun return -1;
1065*4882a593Smuzhiyun if (read_dst(state, &reply, GET_ACK))
1066*4882a593Smuzhiyun return -1; /* Read failure */
1067*4882a593Smuzhiyun if (reply != ACK) {
1068*4882a593Smuzhiyun dprintk(2, "Write not Acknowledged! [Reply=0x%02x]\n", reply);
1069*4882a593Smuzhiyun return -1; /* Unack'd write */
1070*4882a593Smuzhiyun }
1071*4882a593Smuzhiyun if (!dst_wait_dst_ready(state, DEVICE_INIT))
1072*4882a593Smuzhiyun return -1; /* DST not ready yet */
1073*4882a593Smuzhiyun if (read_dst(state, state->rxbuffer, FIXED_COMM))
1074*4882a593Smuzhiyun return -1;
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun dst_pio_disable(state);
1077*4882a593Smuzhiyun if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
1078*4882a593Smuzhiyun dprintk(2, "Checksum failure!\n");
1079*4882a593Smuzhiyun return -1; /* Checksum failure */
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun state->rxbuffer[7] = '\0';
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun for (i = 0, p_dst_type = dst_tlist; i < ARRAY_SIZE(dst_tlist); i++, p_dst_type++) {
1084*4882a593Smuzhiyun if (!strncmp (&state->rxbuffer[p_dst_type->offset], p_dst_type->device_id, strlen (p_dst_type->device_id))) {
1085*4882a593Smuzhiyun use_type_flags = p_dst_type->type_flags;
1086*4882a593Smuzhiyun use_dst_type = p_dst_type->dst_type;
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun /* Card capabilities */
1089*4882a593Smuzhiyun state->dst_hw_cap = p_dst_type->dst_feature;
1090*4882a593Smuzhiyun pr_err("Recognise [%s]\n", p_dst_type->device_id);
1091*4882a593Smuzhiyun strscpy(state->fw_name, p_dst_type->device_id,
1092*4882a593Smuzhiyun sizeof(state->fw_name));
1093*4882a593Smuzhiyun /* Multiple tuners */
1094*4882a593Smuzhiyun if (p_dst_type->tuner_type & TUNER_TYPE_MULTI) {
1095*4882a593Smuzhiyun switch (use_dst_type) {
1096*4882a593Smuzhiyun case DST_TYPE_IS_SAT:
1097*4882a593Smuzhiyun /* STV0299 check */
1098*4882a593Smuzhiyun if (dst_check_stv0299(state) < 0) {
1099*4882a593Smuzhiyun pr_err("Unsupported\n");
1100*4882a593Smuzhiyun state->tuner_type = TUNER_TYPE_MB86A15;
1101*4882a593Smuzhiyun }
1102*4882a593Smuzhiyun break;
1103*4882a593Smuzhiyun default:
1104*4882a593Smuzhiyun break;
1105*4882a593Smuzhiyun }
1106*4882a593Smuzhiyun if (dst_check_mb86a15(state) < 0)
1107*4882a593Smuzhiyun pr_err("Unsupported\n");
1108*4882a593Smuzhiyun /* Single tuner */
1109*4882a593Smuzhiyun } else {
1110*4882a593Smuzhiyun state->tuner_type = p_dst_type->tuner_type;
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
1113*4882a593Smuzhiyun if (!(strncmp(p_dst_type->device_id, p_tuner_list->fw_name, 7)) &&
1114*4882a593Smuzhiyun p_tuner_list->tuner_type == state->tuner_type) {
1115*4882a593Smuzhiyun pr_err("[%s] has a [%s]\n",
1116*4882a593Smuzhiyun p_dst_type->device_id, p_tuner_list->tuner_name);
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun }
1119*4882a593Smuzhiyun break;
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun }
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun if (i >= ARRAY_SIZE(dst_tlist)) {
1124*4882a593Smuzhiyun pr_err("Unable to recognize %s or %s\n", &state->rxbuffer[0], &state->rxbuffer[1]);
1125*4882a593Smuzhiyun pr_err("please email linux-dvb@linuxtv.org with this type in");
1126*4882a593Smuzhiyun use_dst_type = DST_TYPE_IS_SAT;
1127*4882a593Smuzhiyun use_type_flags = DST_TYPE_HAS_SYMDIV;
1128*4882a593Smuzhiyun }
1129*4882a593Smuzhiyun dst_type_print(state, use_dst_type);
1130*4882a593Smuzhiyun state->type_flags = use_type_flags;
1131*4882a593Smuzhiyun state->dst_type = use_dst_type;
1132*4882a593Smuzhiyun dst_type_flags_print(state);
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun return 0;
1135*4882a593Smuzhiyun }
1136*4882a593Smuzhiyun
dst_probe(struct dst_state * state)1137*4882a593Smuzhiyun static int dst_probe(struct dst_state *state)
1138*4882a593Smuzhiyun {
1139*4882a593Smuzhiyun mutex_init(&state->dst_mutex);
1140*4882a593Smuzhiyun if (dst_addons & DST_TYPE_HAS_CA) {
1141*4882a593Smuzhiyun if ((rdc_8820_reset(state)) < 0) {
1142*4882a593Smuzhiyun pr_err("RDC 8820 RESET Failed.\n");
1143*4882a593Smuzhiyun return -1;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun msleep(4000);
1146*4882a593Smuzhiyun } else {
1147*4882a593Smuzhiyun msleep(100);
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun if ((dst_comm_init(state)) < 0) {
1150*4882a593Smuzhiyun pr_err("DST Initialization Failed.\n");
1151*4882a593Smuzhiyun return -1;
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun msleep(100);
1154*4882a593Smuzhiyun if (dst_get_device_id(state) < 0) {
1155*4882a593Smuzhiyun pr_err("unknown device.\n");
1156*4882a593Smuzhiyun return -1;
1157*4882a593Smuzhiyun }
1158*4882a593Smuzhiyun if (dst_get_mac(state) < 0) {
1159*4882a593Smuzhiyun dprintk(2, "MAC: Unsupported command\n");
1160*4882a593Smuzhiyun }
1161*4882a593Smuzhiyun if ((state->type_flags & DST_TYPE_HAS_MULTI_FE) || (state->type_flags & DST_TYPE_HAS_FW_BUILD)) {
1162*4882a593Smuzhiyun if (dst_get_tuner_info(state) < 0)
1163*4882a593Smuzhiyun dprintk(2, "Tuner: Unsupported command\n");
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_TS204) {
1166*4882a593Smuzhiyun dst_packsize(state, 204);
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_FW_BUILD) {
1169*4882a593Smuzhiyun if (dst_fw_ver(state) < 0) {
1170*4882a593Smuzhiyun dprintk(2, "FW: Unsupported command\n");
1171*4882a593Smuzhiyun return 0;
1172*4882a593Smuzhiyun }
1173*4882a593Smuzhiyun if (dst_card_type(state) < 0) {
1174*4882a593Smuzhiyun dprintk(2, "Card: Unsupported command\n");
1175*4882a593Smuzhiyun return 0;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun if (dst_get_vendor(state) < 0) {
1178*4882a593Smuzhiyun dprintk(2, "Vendor: Unsupported command\n");
1179*4882a593Smuzhiyun return 0;
1180*4882a593Smuzhiyun }
1181*4882a593Smuzhiyun }
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun return 0;
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun
dst_command(struct dst_state * state,u8 * data,u8 len)1186*4882a593Smuzhiyun static int dst_command(struct dst_state *state, u8 *data, u8 len)
1187*4882a593Smuzhiyun {
1188*4882a593Smuzhiyun u8 reply;
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun mutex_lock(&state->dst_mutex);
1191*4882a593Smuzhiyun if ((dst_comm_init(state)) < 0) {
1192*4882a593Smuzhiyun dprintk(1, "DST Communication Initialization Failed.\n");
1193*4882a593Smuzhiyun goto error;
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun if (write_dst(state, data, len)) {
1196*4882a593Smuzhiyun dprintk(2, "Trying to recover..\n");
1197*4882a593Smuzhiyun if ((dst_error_recovery(state)) < 0) {
1198*4882a593Smuzhiyun pr_err("Recovery Failed.\n");
1199*4882a593Smuzhiyun goto error;
1200*4882a593Smuzhiyun }
1201*4882a593Smuzhiyun goto error;
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun if ((dst_pio_disable(state)) < 0) {
1204*4882a593Smuzhiyun pr_err("PIO Disable Failed.\n");
1205*4882a593Smuzhiyun goto error;
1206*4882a593Smuzhiyun }
1207*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_FW_1)
1208*4882a593Smuzhiyun mdelay(3);
1209*4882a593Smuzhiyun if (read_dst(state, &reply, GET_ACK)) {
1210*4882a593Smuzhiyun dprintk(3, "Trying to recover..\n");
1211*4882a593Smuzhiyun if ((dst_error_recovery(state)) < 0) {
1212*4882a593Smuzhiyun dprintk(2, "Recovery Failed.\n");
1213*4882a593Smuzhiyun goto error;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun goto error;
1216*4882a593Smuzhiyun }
1217*4882a593Smuzhiyun if (reply != ACK) {
1218*4882a593Smuzhiyun dprintk(2, "write not acknowledged 0x%02x\n", reply);
1219*4882a593Smuzhiyun goto error;
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
1222*4882a593Smuzhiyun goto error;
1223*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_FW_1)
1224*4882a593Smuzhiyun mdelay(3);
1225*4882a593Smuzhiyun else
1226*4882a593Smuzhiyun udelay(2000);
1227*4882a593Smuzhiyun if (!dst_wait_dst_ready(state, NO_DELAY))
1228*4882a593Smuzhiyun goto error;
1229*4882a593Smuzhiyun if (read_dst(state, state->rxbuffer, FIXED_COMM)) {
1230*4882a593Smuzhiyun dprintk(3, "Trying to recover..\n");
1231*4882a593Smuzhiyun if ((dst_error_recovery(state)) < 0) {
1232*4882a593Smuzhiyun dprintk(2, "Recovery failed.\n");
1233*4882a593Smuzhiyun goto error;
1234*4882a593Smuzhiyun }
1235*4882a593Smuzhiyun goto error;
1236*4882a593Smuzhiyun }
1237*4882a593Smuzhiyun if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
1238*4882a593Smuzhiyun dprintk(2, "checksum failure\n");
1239*4882a593Smuzhiyun goto error;
1240*4882a593Smuzhiyun }
1241*4882a593Smuzhiyun mutex_unlock(&state->dst_mutex);
1242*4882a593Smuzhiyun return 0;
1243*4882a593Smuzhiyun
1244*4882a593Smuzhiyun error:
1245*4882a593Smuzhiyun mutex_unlock(&state->dst_mutex);
1246*4882a593Smuzhiyun return -EIO;
1247*4882a593Smuzhiyun
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun
dst_get_signal(struct dst_state * state)1250*4882a593Smuzhiyun static int dst_get_signal(struct dst_state *state)
1251*4882a593Smuzhiyun {
1252*4882a593Smuzhiyun int retval;
1253*4882a593Smuzhiyun u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb };
1254*4882a593Smuzhiyun //dprintk("%s: Getting Signal strength and other parameters\n", __func__);
1255*4882a593Smuzhiyun if ((state->diseq_flags & ATTEMPT_TUNE) == 0) {
1256*4882a593Smuzhiyun state->decode_lock = state->decode_strength = state->decode_snr = 0;
1257*4882a593Smuzhiyun return 0;
1258*4882a593Smuzhiyun }
1259*4882a593Smuzhiyun if (0 == (state->diseq_flags & HAS_LOCK)) {
1260*4882a593Smuzhiyun state->decode_lock = state->decode_strength = state->decode_snr = 0;
1261*4882a593Smuzhiyun return 0;
1262*4882a593Smuzhiyun }
1263*4882a593Smuzhiyun if (time_after_eq(jiffies, state->cur_jiff + (HZ / 5))) {
1264*4882a593Smuzhiyun retval = dst_command(state, get_signal, 8);
1265*4882a593Smuzhiyun if (retval < 0)
1266*4882a593Smuzhiyun return retval;
1267*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
1268*4882a593Smuzhiyun state->decode_lock = ((state->rxbuffer[6] & 0x10) == 0) ? 1 : 0;
1269*4882a593Smuzhiyun state->decode_strength = state->rxbuffer[5] << 8;
1270*4882a593Smuzhiyun state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1271*4882a593Smuzhiyun } else if ((state->dst_type == DST_TYPE_IS_TERR) || (state->dst_type == DST_TYPE_IS_CABLE)) {
1272*4882a593Smuzhiyun state->decode_lock = (state->rxbuffer[1]) ? 1 : 0;
1273*4882a593Smuzhiyun state->decode_strength = state->rxbuffer[4] << 8;
1274*4882a593Smuzhiyun state->decode_snr = state->rxbuffer[3] << 8;
1275*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_ATSC) {
1276*4882a593Smuzhiyun state->decode_lock = (state->rxbuffer[6] == 0x00) ? 1 : 0;
1277*4882a593Smuzhiyun state->decode_strength = state->rxbuffer[4] << 8;
1278*4882a593Smuzhiyun state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1279*4882a593Smuzhiyun }
1280*4882a593Smuzhiyun state->cur_jiff = jiffies;
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun return 0;
1283*4882a593Smuzhiyun }
1284*4882a593Smuzhiyun
dst_tone_power_cmd(struct dst_state * state)1285*4882a593Smuzhiyun static int dst_tone_power_cmd(struct dst_state *state)
1286*4882a593Smuzhiyun {
1287*4882a593Smuzhiyun u8 packet[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 };
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_SAT)
1290*4882a593Smuzhiyun return -EOPNOTSUPP;
1291*4882a593Smuzhiyun packet[4] = state->tx_tuna[4];
1292*4882a593Smuzhiyun packet[2] = state->tx_tuna[2];
1293*4882a593Smuzhiyun packet[3] = state->tx_tuna[3];
1294*4882a593Smuzhiyun packet[7] = dst_check_sum (packet, 7);
1295*4882a593Smuzhiyun return dst_command(state, packet, 8);
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun
dst_get_tuna(struct dst_state * state)1298*4882a593Smuzhiyun static int dst_get_tuna(struct dst_state *state)
1299*4882a593Smuzhiyun {
1300*4882a593Smuzhiyun int retval;
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun if ((state->diseq_flags & ATTEMPT_TUNE) == 0)
1303*4882a593Smuzhiyun return 0;
1304*4882a593Smuzhiyun state->diseq_flags &= ~(HAS_LOCK);
1305*4882a593Smuzhiyun if (!dst_wait_dst_ready(state, NO_DELAY))
1306*4882a593Smuzhiyun return -EIO;
1307*4882a593Smuzhiyun if ((state->type_flags & DST_TYPE_HAS_VLF) &&
1308*4882a593Smuzhiyun !(state->dst_type == DST_TYPE_IS_ATSC))
1309*4882a593Smuzhiyun
1310*4882a593Smuzhiyun retval = read_dst(state, state->rx_tuna, 10);
1311*4882a593Smuzhiyun else
1312*4882a593Smuzhiyun retval = read_dst(state, &state->rx_tuna[2], FIXED_COMM);
1313*4882a593Smuzhiyun if (retval < 0) {
1314*4882a593Smuzhiyun dprintk(3, "read not successful\n");
1315*4882a593Smuzhiyun return retval;
1316*4882a593Smuzhiyun }
1317*4882a593Smuzhiyun if ((state->type_flags & DST_TYPE_HAS_VLF) &&
1318*4882a593Smuzhiyun !(state->dst_type == DST_TYPE_IS_ATSC)) {
1319*4882a593Smuzhiyun
1320*4882a593Smuzhiyun if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) {
1321*4882a593Smuzhiyun dprintk(2, "checksum failure ?\n");
1322*4882a593Smuzhiyun return -EIO;
1323*4882a593Smuzhiyun }
1324*4882a593Smuzhiyun } else {
1325*4882a593Smuzhiyun if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[2], 7)) {
1326*4882a593Smuzhiyun dprintk(2, "checksum failure?\n");
1327*4882a593Smuzhiyun return -EIO;
1328*4882a593Smuzhiyun }
1329*4882a593Smuzhiyun }
1330*4882a593Smuzhiyun if (state->rx_tuna[2] == 0 && state->rx_tuna[3] == 0)
1331*4882a593Smuzhiyun return 0;
1332*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
1333*4882a593Smuzhiyun state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3];
1334*4882a593Smuzhiyun } else {
1335*4882a593Smuzhiyun state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 16) + (state->rx_tuna[3] << 8) + state->rx_tuna[4];
1336*4882a593Smuzhiyun }
1337*4882a593Smuzhiyun state->decode_freq = state->decode_freq * 1000;
1338*4882a593Smuzhiyun state->decode_lock = 1;
1339*4882a593Smuzhiyun state->diseq_flags |= HAS_LOCK;
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun return 1;
1342*4882a593Smuzhiyun }
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun static int dst_set_voltage(struct dvb_frontend *fe,
1345*4882a593Smuzhiyun enum fe_sec_voltage voltage);
1346*4882a593Smuzhiyun
dst_write_tuna(struct dvb_frontend * fe)1347*4882a593Smuzhiyun static int dst_write_tuna(struct dvb_frontend *fe)
1348*4882a593Smuzhiyun {
1349*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1350*4882a593Smuzhiyun int retval;
1351*4882a593Smuzhiyun u8 reply;
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun dprintk(2, "type_flags 0x%x\n", state->type_flags);
1354*4882a593Smuzhiyun state->decode_freq = 0;
1355*4882a593Smuzhiyun state->decode_lock = state->decode_strength = state->decode_snr = 0;
1356*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
1357*4882a593Smuzhiyun if (!(state->diseq_flags & HAS_POWER))
1358*4882a593Smuzhiyun dst_set_voltage(fe, SEC_VOLTAGE_13);
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun state->diseq_flags &= ~(HAS_LOCK | ATTEMPT_TUNE);
1361*4882a593Smuzhiyun mutex_lock(&state->dst_mutex);
1362*4882a593Smuzhiyun if ((dst_comm_init(state)) < 0) {
1363*4882a593Smuzhiyun dprintk(3, "DST Communication initialization failed.\n");
1364*4882a593Smuzhiyun goto error;
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun // if (state->type_flags & DST_TYPE_HAS_NEWTUNE) {
1367*4882a593Smuzhiyun if ((state->type_flags & DST_TYPE_HAS_VLF) &&
1368*4882a593Smuzhiyun (!(state->dst_type == DST_TYPE_IS_ATSC))) {
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[0], 9);
1371*4882a593Smuzhiyun retval = write_dst(state, &state->tx_tuna[0], 10);
1372*4882a593Smuzhiyun } else {
1373*4882a593Smuzhiyun state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[2], 7);
1374*4882a593Smuzhiyun retval = write_dst(state, &state->tx_tuna[2], FIXED_COMM);
1375*4882a593Smuzhiyun }
1376*4882a593Smuzhiyun if (retval < 0) {
1377*4882a593Smuzhiyun dst_pio_disable(state);
1378*4882a593Smuzhiyun dprintk(3, "write not successful\n");
1379*4882a593Smuzhiyun goto werr;
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun if ((dst_pio_disable(state)) < 0) {
1382*4882a593Smuzhiyun dprintk(3, "DST PIO disable failed !\n");
1383*4882a593Smuzhiyun goto error;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun if ((read_dst(state, &reply, GET_ACK) < 0)) {
1386*4882a593Smuzhiyun dprintk(3, "read verify not successful.\n");
1387*4882a593Smuzhiyun goto error;
1388*4882a593Smuzhiyun }
1389*4882a593Smuzhiyun if (reply != ACK) {
1390*4882a593Smuzhiyun dprintk(3, "write not acknowledged 0x%02x\n", reply);
1391*4882a593Smuzhiyun goto error;
1392*4882a593Smuzhiyun }
1393*4882a593Smuzhiyun state->diseq_flags |= ATTEMPT_TUNE;
1394*4882a593Smuzhiyun retval = dst_get_tuna(state);
1395*4882a593Smuzhiyun werr:
1396*4882a593Smuzhiyun mutex_unlock(&state->dst_mutex);
1397*4882a593Smuzhiyun return retval;
1398*4882a593Smuzhiyun
1399*4882a593Smuzhiyun error:
1400*4882a593Smuzhiyun mutex_unlock(&state->dst_mutex);
1401*4882a593Smuzhiyun return -EIO;
1402*4882a593Smuzhiyun }
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun /*
1405*4882a593Smuzhiyun * line22k0 0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
1406*4882a593Smuzhiyun * line22k1 0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
1407*4882a593Smuzhiyun * line22k2 0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
1408*4882a593Smuzhiyun * tone 0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
1409*4882a593Smuzhiyun * data 0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
1410*4882a593Smuzhiyun * power_off 0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
1411*4882a593Smuzhiyun * power_on 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
1412*4882a593Smuzhiyun * Diseqc 1 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
1413*4882a593Smuzhiyun * Diseqc 2 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8
1414*4882a593Smuzhiyun * Diseqc 3 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4
1415*4882a593Smuzhiyun * Diseqc 4 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0
1416*4882a593Smuzhiyun */
1417*4882a593Smuzhiyun
dst_set_diseqc(struct dvb_frontend * fe,struct dvb_diseqc_master_cmd * cmd)1418*4882a593Smuzhiyun static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
1419*4882a593Smuzhiyun {
1420*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1421*4882a593Smuzhiyun u8 packet[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_SAT)
1424*4882a593Smuzhiyun return -EOPNOTSUPP;
1425*4882a593Smuzhiyun if (cmd->msg_len > 0 && cmd->msg_len < 5)
1426*4882a593Smuzhiyun memcpy(&packet[3], cmd->msg, cmd->msg_len);
1427*4882a593Smuzhiyun else if (cmd->msg_len == 5 && state->dst_hw_cap & DST_TYPE_HAS_DISEQC5)
1428*4882a593Smuzhiyun memcpy(&packet[2], cmd->msg, cmd->msg_len);
1429*4882a593Smuzhiyun else
1430*4882a593Smuzhiyun return -EINVAL;
1431*4882a593Smuzhiyun packet[7] = dst_check_sum(&packet[0], 7);
1432*4882a593Smuzhiyun return dst_command(state, packet, 8);
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun
dst_set_voltage(struct dvb_frontend * fe,enum fe_sec_voltage voltage)1435*4882a593Smuzhiyun static int dst_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
1436*4882a593Smuzhiyun {
1437*4882a593Smuzhiyun int need_cmd, retval = 0;
1438*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun state->voltage = voltage;
1441*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_SAT)
1442*4882a593Smuzhiyun return -EOPNOTSUPP;
1443*4882a593Smuzhiyun
1444*4882a593Smuzhiyun need_cmd = 0;
1445*4882a593Smuzhiyun
1446*4882a593Smuzhiyun switch (voltage) {
1447*4882a593Smuzhiyun case SEC_VOLTAGE_13:
1448*4882a593Smuzhiyun case SEC_VOLTAGE_18:
1449*4882a593Smuzhiyun if ((state->diseq_flags & HAS_POWER) == 0)
1450*4882a593Smuzhiyun need_cmd = 1;
1451*4882a593Smuzhiyun state->diseq_flags |= HAS_POWER;
1452*4882a593Smuzhiyun state->tx_tuna[4] = 0x01;
1453*4882a593Smuzhiyun break;
1454*4882a593Smuzhiyun case SEC_VOLTAGE_OFF:
1455*4882a593Smuzhiyun need_cmd = 1;
1456*4882a593Smuzhiyun state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
1457*4882a593Smuzhiyun state->tx_tuna[4] = 0x00;
1458*4882a593Smuzhiyun break;
1459*4882a593Smuzhiyun default:
1460*4882a593Smuzhiyun return -EINVAL;
1461*4882a593Smuzhiyun }
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun if (need_cmd)
1464*4882a593Smuzhiyun retval = dst_tone_power_cmd(state);
1465*4882a593Smuzhiyun
1466*4882a593Smuzhiyun return retval;
1467*4882a593Smuzhiyun }
1468*4882a593Smuzhiyun
dst_set_tone(struct dvb_frontend * fe,enum fe_sec_tone_mode tone)1469*4882a593Smuzhiyun static int dst_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
1470*4882a593Smuzhiyun {
1471*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1472*4882a593Smuzhiyun
1473*4882a593Smuzhiyun state->tone = tone;
1474*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_SAT)
1475*4882a593Smuzhiyun return -EOPNOTSUPP;
1476*4882a593Smuzhiyun
1477*4882a593Smuzhiyun switch (tone) {
1478*4882a593Smuzhiyun case SEC_TONE_OFF:
1479*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1480*4882a593Smuzhiyun state->tx_tuna[2] = 0x00;
1481*4882a593Smuzhiyun else
1482*4882a593Smuzhiyun state->tx_tuna[2] = 0xff;
1483*4882a593Smuzhiyun break;
1484*4882a593Smuzhiyun
1485*4882a593Smuzhiyun case SEC_TONE_ON:
1486*4882a593Smuzhiyun state->tx_tuna[2] = 0x02;
1487*4882a593Smuzhiyun break;
1488*4882a593Smuzhiyun default:
1489*4882a593Smuzhiyun return -EINVAL;
1490*4882a593Smuzhiyun }
1491*4882a593Smuzhiyun return dst_tone_power_cmd(state);
1492*4882a593Smuzhiyun }
1493*4882a593Smuzhiyun
dst_send_burst(struct dvb_frontend * fe,enum fe_sec_mini_cmd minicmd)1494*4882a593Smuzhiyun static int dst_send_burst(struct dvb_frontend *fe, enum fe_sec_mini_cmd minicmd)
1495*4882a593Smuzhiyun {
1496*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1497*4882a593Smuzhiyun
1498*4882a593Smuzhiyun if (state->dst_type != DST_TYPE_IS_SAT)
1499*4882a593Smuzhiyun return -EOPNOTSUPP;
1500*4882a593Smuzhiyun state->minicmd = minicmd;
1501*4882a593Smuzhiyun switch (minicmd) {
1502*4882a593Smuzhiyun case SEC_MINI_A:
1503*4882a593Smuzhiyun state->tx_tuna[3] = 0x02;
1504*4882a593Smuzhiyun break;
1505*4882a593Smuzhiyun case SEC_MINI_B:
1506*4882a593Smuzhiyun state->tx_tuna[3] = 0xff;
1507*4882a593Smuzhiyun break;
1508*4882a593Smuzhiyun }
1509*4882a593Smuzhiyun return dst_tone_power_cmd(state);
1510*4882a593Smuzhiyun }
1511*4882a593Smuzhiyun
1512*4882a593Smuzhiyun
bt8xx_dst_init(struct dvb_frontend * fe)1513*4882a593Smuzhiyun static int bt8xx_dst_init(struct dvb_frontend *fe)
1514*4882a593Smuzhiyun {
1515*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1516*4882a593Smuzhiyun
1517*4882a593Smuzhiyun static u8 sat_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x00, 0x73, 0x21, 0x00, 0x00 };
1518*4882a593Smuzhiyun static u8 sat_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x55, 0xbd, 0x50, 0x00, 0x00 };
1519*4882a593Smuzhiyun static u8 ter_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1520*4882a593Smuzhiyun static u8 ter_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1521*4882a593Smuzhiyun static u8 cab_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1522*4882a593Smuzhiyun static u8 cab_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1523*4882a593Smuzhiyun static u8 atsc_tuner[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1524*4882a593Smuzhiyun
1525*4882a593Smuzhiyun state->inversion = INVERSION_OFF;
1526*4882a593Smuzhiyun state->voltage = SEC_VOLTAGE_13;
1527*4882a593Smuzhiyun state->tone = SEC_TONE_OFF;
1528*4882a593Smuzhiyun state->diseq_flags = 0;
1529*4882a593Smuzhiyun state->k22 = 0x02;
1530*4882a593Smuzhiyun state->bandwidth = 7000000;
1531*4882a593Smuzhiyun state->cur_jiff = jiffies;
1532*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT)
1533*4882a593Smuzhiyun memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204));
1534*4882a593Smuzhiyun else if (state->dst_type == DST_TYPE_IS_TERR)
1535*4882a593Smuzhiyun memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? ter_tuna_188 : ter_tuna_204), sizeof (ter_tuna_204));
1536*4882a593Smuzhiyun else if (state->dst_type == DST_TYPE_IS_CABLE)
1537*4882a593Smuzhiyun memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? cab_tuna_188 : cab_tuna_204), sizeof (cab_tuna_204));
1538*4882a593Smuzhiyun else if (state->dst_type == DST_TYPE_IS_ATSC)
1539*4882a593Smuzhiyun memcpy(state->tx_tuna, atsc_tuner, sizeof (atsc_tuner));
1540*4882a593Smuzhiyun
1541*4882a593Smuzhiyun return 0;
1542*4882a593Smuzhiyun }
1543*4882a593Smuzhiyun
dst_read_status(struct dvb_frontend * fe,enum fe_status * status)1544*4882a593Smuzhiyun static int dst_read_status(struct dvb_frontend *fe, enum fe_status *status)
1545*4882a593Smuzhiyun {
1546*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1547*4882a593Smuzhiyun
1548*4882a593Smuzhiyun *status = 0;
1549*4882a593Smuzhiyun if (state->diseq_flags & HAS_LOCK) {
1550*4882a593Smuzhiyun // dst_get_signal(state); // don't require(?) to ask MCU
1551*4882a593Smuzhiyun if (state->decode_lock)
1552*4882a593Smuzhiyun *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI;
1553*4882a593Smuzhiyun }
1554*4882a593Smuzhiyun
1555*4882a593Smuzhiyun return 0;
1556*4882a593Smuzhiyun }
1557*4882a593Smuzhiyun
dst_read_signal_strength(struct dvb_frontend * fe,u16 * strength)1558*4882a593Smuzhiyun static int dst_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1559*4882a593Smuzhiyun {
1560*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1561*4882a593Smuzhiyun
1562*4882a593Smuzhiyun int retval = dst_get_signal(state);
1563*4882a593Smuzhiyun *strength = state->decode_strength;
1564*4882a593Smuzhiyun
1565*4882a593Smuzhiyun return retval;
1566*4882a593Smuzhiyun }
1567*4882a593Smuzhiyun
dst_read_snr(struct dvb_frontend * fe,u16 * snr)1568*4882a593Smuzhiyun static int dst_read_snr(struct dvb_frontend *fe, u16 *snr)
1569*4882a593Smuzhiyun {
1570*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1571*4882a593Smuzhiyun
1572*4882a593Smuzhiyun int retval = dst_get_signal(state);
1573*4882a593Smuzhiyun *snr = state->decode_snr;
1574*4882a593Smuzhiyun
1575*4882a593Smuzhiyun return retval;
1576*4882a593Smuzhiyun }
1577*4882a593Smuzhiyun
dst_set_frontend(struct dvb_frontend * fe)1578*4882a593Smuzhiyun static int dst_set_frontend(struct dvb_frontend *fe)
1579*4882a593Smuzhiyun {
1580*4882a593Smuzhiyun struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1581*4882a593Smuzhiyun int retval = -EINVAL;
1582*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1583*4882a593Smuzhiyun
1584*4882a593Smuzhiyun if (p != NULL) {
1585*4882a593Smuzhiyun retval = dst_set_freq(state, p->frequency);
1586*4882a593Smuzhiyun if(retval != 0)
1587*4882a593Smuzhiyun return retval;
1588*4882a593Smuzhiyun dprintk(3, "Set Frequency=[%d]\n", p->frequency);
1589*4882a593Smuzhiyun
1590*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
1591*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1592*4882a593Smuzhiyun dst_set_inversion(state, p->inversion);
1593*4882a593Smuzhiyun dst_set_fec(state, p->fec_inner);
1594*4882a593Smuzhiyun dst_set_symbolrate(state, p->symbol_rate);
1595*4882a593Smuzhiyun dst_set_polarization(state);
1596*4882a593Smuzhiyun dprintk(3, "Set Symbolrate=[%d]\n", p->symbol_rate);
1597*4882a593Smuzhiyun
1598*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_TERR)
1599*4882a593Smuzhiyun dst_set_bandwidth(state, p->bandwidth_hz);
1600*4882a593Smuzhiyun else if (state->dst_type == DST_TYPE_IS_CABLE) {
1601*4882a593Smuzhiyun dst_set_fec(state, p->fec_inner);
1602*4882a593Smuzhiyun dst_set_symbolrate(state, p->symbol_rate);
1603*4882a593Smuzhiyun dst_set_modulation(state, p->modulation);
1604*4882a593Smuzhiyun }
1605*4882a593Smuzhiyun retval = dst_write_tuna(fe);
1606*4882a593Smuzhiyun }
1607*4882a593Smuzhiyun
1608*4882a593Smuzhiyun return retval;
1609*4882a593Smuzhiyun }
1610*4882a593Smuzhiyun
dst_tune_frontend(struct dvb_frontend * fe,bool re_tune,unsigned int mode_flags,unsigned int * delay,enum fe_status * status)1611*4882a593Smuzhiyun static int dst_tune_frontend(struct dvb_frontend* fe,
1612*4882a593Smuzhiyun bool re_tune,
1613*4882a593Smuzhiyun unsigned int mode_flags,
1614*4882a593Smuzhiyun unsigned int *delay,
1615*4882a593Smuzhiyun enum fe_status *status)
1616*4882a593Smuzhiyun {
1617*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1618*4882a593Smuzhiyun struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1619*4882a593Smuzhiyun
1620*4882a593Smuzhiyun if (re_tune) {
1621*4882a593Smuzhiyun dst_set_freq(state, p->frequency);
1622*4882a593Smuzhiyun dprintk(3, "Set Frequency=[%d]\n", p->frequency);
1623*4882a593Smuzhiyun
1624*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
1625*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1626*4882a593Smuzhiyun dst_set_inversion(state, p->inversion);
1627*4882a593Smuzhiyun dst_set_fec(state, p->fec_inner);
1628*4882a593Smuzhiyun dst_set_symbolrate(state, p->symbol_rate);
1629*4882a593Smuzhiyun dst_set_polarization(state);
1630*4882a593Smuzhiyun dprintk(3, "Set Symbolrate=[%d]\n", p->symbol_rate);
1631*4882a593Smuzhiyun
1632*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_TERR)
1633*4882a593Smuzhiyun dst_set_bandwidth(state, p->bandwidth_hz);
1634*4882a593Smuzhiyun else if (state->dst_type == DST_TYPE_IS_CABLE) {
1635*4882a593Smuzhiyun dst_set_fec(state, p->fec_inner);
1636*4882a593Smuzhiyun dst_set_symbolrate(state, p->symbol_rate);
1637*4882a593Smuzhiyun dst_set_modulation(state, p->modulation);
1638*4882a593Smuzhiyun }
1639*4882a593Smuzhiyun dst_write_tuna(fe);
1640*4882a593Smuzhiyun }
1641*4882a593Smuzhiyun
1642*4882a593Smuzhiyun if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1643*4882a593Smuzhiyun dst_read_status(fe, status);
1644*4882a593Smuzhiyun
1645*4882a593Smuzhiyun *delay = HZ/10;
1646*4882a593Smuzhiyun return 0;
1647*4882a593Smuzhiyun }
1648*4882a593Smuzhiyun
dst_get_tuning_algo(struct dvb_frontend * fe)1649*4882a593Smuzhiyun static enum dvbfe_algo dst_get_tuning_algo(struct dvb_frontend *fe)
1650*4882a593Smuzhiyun {
1651*4882a593Smuzhiyun return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW;
1652*4882a593Smuzhiyun }
1653*4882a593Smuzhiyun
dst_get_frontend(struct dvb_frontend * fe,struct dtv_frontend_properties * p)1654*4882a593Smuzhiyun static int dst_get_frontend(struct dvb_frontend *fe,
1655*4882a593Smuzhiyun struct dtv_frontend_properties *p)
1656*4882a593Smuzhiyun {
1657*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1658*4882a593Smuzhiyun
1659*4882a593Smuzhiyun p->frequency = state->decode_freq;
1660*4882a593Smuzhiyun if (state->dst_type == DST_TYPE_IS_SAT) {
1661*4882a593Smuzhiyun if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1662*4882a593Smuzhiyun p->inversion = state->inversion;
1663*4882a593Smuzhiyun p->symbol_rate = state->symbol_rate;
1664*4882a593Smuzhiyun p->fec_inner = dst_get_fec(state);
1665*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_TERR) {
1666*4882a593Smuzhiyun p->bandwidth_hz = state->bandwidth;
1667*4882a593Smuzhiyun } else if (state->dst_type == DST_TYPE_IS_CABLE) {
1668*4882a593Smuzhiyun p->symbol_rate = state->symbol_rate;
1669*4882a593Smuzhiyun p->fec_inner = dst_get_fec(state);
1670*4882a593Smuzhiyun p->modulation = dst_get_modulation(state);
1671*4882a593Smuzhiyun }
1672*4882a593Smuzhiyun
1673*4882a593Smuzhiyun return 0;
1674*4882a593Smuzhiyun }
1675*4882a593Smuzhiyun
bt8xx_dst_release(struct dvb_frontend * fe)1676*4882a593Smuzhiyun static void bt8xx_dst_release(struct dvb_frontend *fe)
1677*4882a593Smuzhiyun {
1678*4882a593Smuzhiyun struct dst_state *state = fe->demodulator_priv;
1679*4882a593Smuzhiyun if (state->dst_ca) {
1680*4882a593Smuzhiyun dvb_unregister_device(state->dst_ca);
1681*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_ATTACH
1682*4882a593Smuzhiyun symbol_put(dst_ca_attach);
1683*4882a593Smuzhiyun #endif
1684*4882a593Smuzhiyun }
1685*4882a593Smuzhiyun kfree(state);
1686*4882a593Smuzhiyun }
1687*4882a593Smuzhiyun
1688*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_dvbt_ops;
1689*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_dvbs_ops;
1690*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_dvbc_ops;
1691*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_atsc_ops;
1692*4882a593Smuzhiyun
dst_attach(struct dst_state * state,struct dvb_adapter * dvb_adapter)1693*4882a593Smuzhiyun struct dst_state *dst_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter)
1694*4882a593Smuzhiyun {
1695*4882a593Smuzhiyun /* check if the ASIC is there */
1696*4882a593Smuzhiyun if (dst_probe(state) < 0) {
1697*4882a593Smuzhiyun kfree(state);
1698*4882a593Smuzhiyun return NULL;
1699*4882a593Smuzhiyun }
1700*4882a593Smuzhiyun /* determine settings based on type */
1701*4882a593Smuzhiyun /* create dvb_frontend */
1702*4882a593Smuzhiyun switch (state->dst_type) {
1703*4882a593Smuzhiyun case DST_TYPE_IS_TERR:
1704*4882a593Smuzhiyun memcpy(&state->frontend.ops, &dst_dvbt_ops, sizeof(struct dvb_frontend_ops));
1705*4882a593Smuzhiyun break;
1706*4882a593Smuzhiyun case DST_TYPE_IS_CABLE:
1707*4882a593Smuzhiyun memcpy(&state->frontend.ops, &dst_dvbc_ops, sizeof(struct dvb_frontend_ops));
1708*4882a593Smuzhiyun break;
1709*4882a593Smuzhiyun case DST_TYPE_IS_SAT:
1710*4882a593Smuzhiyun memcpy(&state->frontend.ops, &dst_dvbs_ops, sizeof(struct dvb_frontend_ops));
1711*4882a593Smuzhiyun break;
1712*4882a593Smuzhiyun case DST_TYPE_IS_ATSC:
1713*4882a593Smuzhiyun memcpy(&state->frontend.ops, &dst_atsc_ops, sizeof(struct dvb_frontend_ops));
1714*4882a593Smuzhiyun break;
1715*4882a593Smuzhiyun default:
1716*4882a593Smuzhiyun pr_err("unknown DST type. please report to the LinuxTV.org DVB mailinglist.\n");
1717*4882a593Smuzhiyun kfree(state);
1718*4882a593Smuzhiyun return NULL;
1719*4882a593Smuzhiyun }
1720*4882a593Smuzhiyun state->frontend.demodulator_priv = state;
1721*4882a593Smuzhiyun
1722*4882a593Smuzhiyun return state; /* Manu (DST is a card not a frontend) */
1723*4882a593Smuzhiyun }
1724*4882a593Smuzhiyun
1725*4882a593Smuzhiyun EXPORT_SYMBOL(dst_attach);
1726*4882a593Smuzhiyun
1727*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_dvbt_ops = {
1728*4882a593Smuzhiyun .delsys = { SYS_DVBT },
1729*4882a593Smuzhiyun .info = {
1730*4882a593Smuzhiyun .name = "DST DVB-T",
1731*4882a593Smuzhiyun .frequency_min_hz = 137 * MHz,
1732*4882a593Smuzhiyun .frequency_max_hz = 858 * MHz,
1733*4882a593Smuzhiyun .frequency_stepsize_hz = 166667,
1734*4882a593Smuzhiyun .caps = FE_CAN_FEC_AUTO |
1735*4882a593Smuzhiyun FE_CAN_QAM_AUTO |
1736*4882a593Smuzhiyun FE_CAN_QAM_16 |
1737*4882a593Smuzhiyun FE_CAN_QAM_32 |
1738*4882a593Smuzhiyun FE_CAN_QAM_64 |
1739*4882a593Smuzhiyun FE_CAN_QAM_128 |
1740*4882a593Smuzhiyun FE_CAN_QAM_256 |
1741*4882a593Smuzhiyun FE_CAN_TRANSMISSION_MODE_AUTO |
1742*4882a593Smuzhiyun FE_CAN_GUARD_INTERVAL_AUTO
1743*4882a593Smuzhiyun },
1744*4882a593Smuzhiyun
1745*4882a593Smuzhiyun .release = bt8xx_dst_release,
1746*4882a593Smuzhiyun .init = bt8xx_dst_init,
1747*4882a593Smuzhiyun .tune = dst_tune_frontend,
1748*4882a593Smuzhiyun .set_frontend = dst_set_frontend,
1749*4882a593Smuzhiyun .get_frontend = dst_get_frontend,
1750*4882a593Smuzhiyun .get_frontend_algo = dst_get_tuning_algo,
1751*4882a593Smuzhiyun .read_status = dst_read_status,
1752*4882a593Smuzhiyun .read_signal_strength = dst_read_signal_strength,
1753*4882a593Smuzhiyun .read_snr = dst_read_snr,
1754*4882a593Smuzhiyun };
1755*4882a593Smuzhiyun
1756*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_dvbs_ops = {
1757*4882a593Smuzhiyun .delsys = { SYS_DVBS },
1758*4882a593Smuzhiyun .info = {
1759*4882a593Smuzhiyun .name = "DST DVB-S",
1760*4882a593Smuzhiyun .frequency_min_hz = 950 * MHz,
1761*4882a593Smuzhiyun .frequency_max_hz = 2150 * MHz,
1762*4882a593Smuzhiyun .frequency_stepsize_hz = 1 * MHz,
1763*4882a593Smuzhiyun .frequency_tolerance_hz = 29500 * kHz,
1764*4882a593Smuzhiyun .symbol_rate_min = 1000000,
1765*4882a593Smuzhiyun .symbol_rate_max = 45000000,
1766*4882a593Smuzhiyun /* . symbol_rate_tolerance = ???,*/
1767*4882a593Smuzhiyun .caps = FE_CAN_FEC_AUTO | FE_CAN_QPSK
1768*4882a593Smuzhiyun },
1769*4882a593Smuzhiyun
1770*4882a593Smuzhiyun .release = bt8xx_dst_release,
1771*4882a593Smuzhiyun .init = bt8xx_dst_init,
1772*4882a593Smuzhiyun .tune = dst_tune_frontend,
1773*4882a593Smuzhiyun .set_frontend = dst_set_frontend,
1774*4882a593Smuzhiyun .get_frontend = dst_get_frontend,
1775*4882a593Smuzhiyun .get_frontend_algo = dst_get_tuning_algo,
1776*4882a593Smuzhiyun .read_status = dst_read_status,
1777*4882a593Smuzhiyun .read_signal_strength = dst_read_signal_strength,
1778*4882a593Smuzhiyun .read_snr = dst_read_snr,
1779*4882a593Smuzhiyun .diseqc_send_burst = dst_send_burst,
1780*4882a593Smuzhiyun .diseqc_send_master_cmd = dst_set_diseqc,
1781*4882a593Smuzhiyun .set_voltage = dst_set_voltage,
1782*4882a593Smuzhiyun .set_tone = dst_set_tone,
1783*4882a593Smuzhiyun };
1784*4882a593Smuzhiyun
1785*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_dvbc_ops = {
1786*4882a593Smuzhiyun .delsys = { SYS_DVBC_ANNEX_A },
1787*4882a593Smuzhiyun .info = {
1788*4882a593Smuzhiyun .name = "DST DVB-C",
1789*4882a593Smuzhiyun .frequency_min_hz = 51 * MHz,
1790*4882a593Smuzhiyun .frequency_max_hz = 858 * MHz,
1791*4882a593Smuzhiyun .frequency_stepsize_hz = 62500,
1792*4882a593Smuzhiyun .symbol_rate_min = 1000000,
1793*4882a593Smuzhiyun .symbol_rate_max = 45000000,
1794*4882a593Smuzhiyun .caps = FE_CAN_FEC_AUTO |
1795*4882a593Smuzhiyun FE_CAN_QAM_AUTO |
1796*4882a593Smuzhiyun FE_CAN_QAM_16 |
1797*4882a593Smuzhiyun FE_CAN_QAM_32 |
1798*4882a593Smuzhiyun FE_CAN_QAM_64 |
1799*4882a593Smuzhiyun FE_CAN_QAM_128 |
1800*4882a593Smuzhiyun FE_CAN_QAM_256
1801*4882a593Smuzhiyun },
1802*4882a593Smuzhiyun
1803*4882a593Smuzhiyun .release = bt8xx_dst_release,
1804*4882a593Smuzhiyun .init = bt8xx_dst_init,
1805*4882a593Smuzhiyun .tune = dst_tune_frontend,
1806*4882a593Smuzhiyun .set_frontend = dst_set_frontend,
1807*4882a593Smuzhiyun .get_frontend = dst_get_frontend,
1808*4882a593Smuzhiyun .get_frontend_algo = dst_get_tuning_algo,
1809*4882a593Smuzhiyun .read_status = dst_read_status,
1810*4882a593Smuzhiyun .read_signal_strength = dst_read_signal_strength,
1811*4882a593Smuzhiyun .read_snr = dst_read_snr,
1812*4882a593Smuzhiyun };
1813*4882a593Smuzhiyun
1814*4882a593Smuzhiyun static const struct dvb_frontend_ops dst_atsc_ops = {
1815*4882a593Smuzhiyun .delsys = { SYS_ATSC },
1816*4882a593Smuzhiyun .info = {
1817*4882a593Smuzhiyun .name = "DST ATSC",
1818*4882a593Smuzhiyun .frequency_min_hz = 510 * MHz,
1819*4882a593Smuzhiyun .frequency_max_hz = 858 * MHz,
1820*4882a593Smuzhiyun .frequency_stepsize_hz = 62500,
1821*4882a593Smuzhiyun .symbol_rate_min = 1000000,
1822*4882a593Smuzhiyun .symbol_rate_max = 45000000,
1823*4882a593Smuzhiyun .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
1824*4882a593Smuzhiyun },
1825*4882a593Smuzhiyun
1826*4882a593Smuzhiyun .release = bt8xx_dst_release,
1827*4882a593Smuzhiyun .init = bt8xx_dst_init,
1828*4882a593Smuzhiyun .tune = dst_tune_frontend,
1829*4882a593Smuzhiyun .set_frontend = dst_set_frontend,
1830*4882a593Smuzhiyun .get_frontend = dst_get_frontend,
1831*4882a593Smuzhiyun .get_frontend_algo = dst_get_tuning_algo,
1832*4882a593Smuzhiyun .read_status = dst_read_status,
1833*4882a593Smuzhiyun .read_signal_strength = dst_read_signal_strength,
1834*4882a593Smuzhiyun .read_snr = dst_read_snr,
1835*4882a593Smuzhiyun };
1836*4882a593Smuzhiyun
1837*4882a593Smuzhiyun MODULE_DESCRIPTION("DST DVB-S/T/C/ATSC Combo Frontend driver");
1838*4882a593Smuzhiyun MODULE_AUTHOR("Jamie Honan, Manu Abraham");
1839*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1840