1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * bt878.c: part of the driver for the Pinnacle PCTV Sat DVB PCI card
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * large parts based on the bttv driver
8*4882a593Smuzhiyun * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@metzlerbros.de)
9*4882a593Smuzhiyun * & Marcus Metzler (mocm@metzlerbros.de)
10*4882a593Smuzhiyun * (c) 1999,2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/pci.h>
16*4882a593Smuzhiyun #include <linux/pgtable.h>
17*4882a593Smuzhiyun #include <asm/io.h>
18*4882a593Smuzhiyun #include <linux/ioport.h>
19*4882a593Smuzhiyun #include <asm/page.h>
20*4882a593Smuzhiyun #include <linux/types.h>
21*4882a593Smuzhiyun #include <linux/interrupt.h>
22*4882a593Smuzhiyun #include <linux/kmod.h>
23*4882a593Smuzhiyun #include <linux/vmalloc.h>
24*4882a593Smuzhiyun #include <linux/init.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <media/dmxdev.h>
27*4882a593Smuzhiyun #include <media/dvbdev.h>
28*4882a593Smuzhiyun #include "bt878.h"
29*4882a593Smuzhiyun #include "dst_priv.h"
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /**************************************/
33*4882a593Smuzhiyun /* Miscellaneous utility definitions */
34*4882a593Smuzhiyun /**************************************/
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static unsigned int bt878_verbose = 1;
37*4882a593Smuzhiyun static unsigned int bt878_debug;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun module_param_named(verbose, bt878_verbose, int, 0444);
40*4882a593Smuzhiyun MODULE_PARM_DESC(verbose,
41*4882a593Smuzhiyun "verbose startup messages, default is 1 (yes)");
42*4882a593Smuzhiyun module_param_named(debug, bt878_debug, int, 0644);
43*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off debugging, default is 0 (off).");
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun int bt878_num;
46*4882a593Smuzhiyun struct bt878 bt878[BT878_MAX];
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun EXPORT_SYMBOL(bt878_num);
49*4882a593Smuzhiyun EXPORT_SYMBOL(bt878);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define btwrite(dat,adr) bmtwrite((dat), (bt->bt878_mem+(adr)))
52*4882a593Smuzhiyun #define btread(adr) bmtread(bt->bt878_mem+(adr))
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define btand(dat,adr) btwrite((dat) & btread(adr), adr)
55*4882a593Smuzhiyun #define btor(dat,adr) btwrite((dat) | btread(adr), adr)
56*4882a593Smuzhiyun #define btaor(dat,mask,adr) btwrite((dat) | ((mask) & btread(adr)), adr)
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #if defined(dprintk)
59*4882a593Smuzhiyun #undef dprintk
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun #define dprintk(fmt, arg...) \
62*4882a593Smuzhiyun do { \
63*4882a593Smuzhiyun if (bt878_debug) \
64*4882a593Smuzhiyun printk(KERN_DEBUG fmt, ##arg); \
65*4882a593Smuzhiyun } while (0)
66*4882a593Smuzhiyun
bt878_mem_free(struct bt878 * bt)67*4882a593Smuzhiyun static void bt878_mem_free(struct bt878 *bt)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun if (bt->buf_cpu) {
70*4882a593Smuzhiyun pci_free_consistent(bt->dev, bt->buf_size, bt->buf_cpu,
71*4882a593Smuzhiyun bt->buf_dma);
72*4882a593Smuzhiyun bt->buf_cpu = NULL;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun if (bt->risc_cpu) {
76*4882a593Smuzhiyun pci_free_consistent(bt->dev, bt->risc_size, bt->risc_cpu,
77*4882a593Smuzhiyun bt->risc_dma);
78*4882a593Smuzhiyun bt->risc_cpu = NULL;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
bt878_mem_alloc(struct bt878 * bt)82*4882a593Smuzhiyun static int bt878_mem_alloc(struct bt878 *bt)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun if (!bt->buf_cpu) {
85*4882a593Smuzhiyun bt->buf_size = 128 * 1024;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun bt->buf_cpu = pci_zalloc_consistent(bt->dev, bt->buf_size,
88*4882a593Smuzhiyun &bt->buf_dma);
89*4882a593Smuzhiyun if (!bt->buf_cpu)
90*4882a593Smuzhiyun return -ENOMEM;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun if (!bt->risc_cpu) {
94*4882a593Smuzhiyun bt->risc_size = PAGE_SIZE;
95*4882a593Smuzhiyun bt->risc_cpu = pci_zalloc_consistent(bt->dev, bt->risc_size,
96*4882a593Smuzhiyun &bt->risc_dma);
97*4882a593Smuzhiyun if (!bt->risc_cpu) {
98*4882a593Smuzhiyun bt878_mem_free(bt);
99*4882a593Smuzhiyun return -ENOMEM;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return 0;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* RISC instructions */
107*4882a593Smuzhiyun #define RISC_WRITE (0x01 << 28)
108*4882a593Smuzhiyun #define RISC_JUMP (0x07 << 28)
109*4882a593Smuzhiyun #define RISC_SYNC (0x08 << 28)
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* RISC bits */
112*4882a593Smuzhiyun #define RISC_WR_SOL (1 << 27)
113*4882a593Smuzhiyun #define RISC_WR_EOL (1 << 26)
114*4882a593Smuzhiyun #define RISC_IRQ (1 << 24)
115*4882a593Smuzhiyun #define RISC_STATUS(status) ((((~status) & 0x0F) << 20) | ((status & 0x0F) << 16))
116*4882a593Smuzhiyun #define RISC_SYNC_RESYNC (1 << 15)
117*4882a593Smuzhiyun #define RISC_SYNC_FM1 0x06
118*4882a593Smuzhiyun #define RISC_SYNC_VRO 0x0C
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun #define RISC_FLUSH() bt->risc_pos = 0
121*4882a593Smuzhiyun #define RISC_INSTR(instr) bt->risc_cpu[bt->risc_pos++] = cpu_to_le32(instr)
122*4882a593Smuzhiyun
bt878_make_risc(struct bt878 * bt)123*4882a593Smuzhiyun static int bt878_make_risc(struct bt878 *bt)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun bt->block_bytes = bt->buf_size >> 4;
126*4882a593Smuzhiyun bt->block_count = 1 << 4;
127*4882a593Smuzhiyun bt->line_bytes = bt->block_bytes;
128*4882a593Smuzhiyun bt->line_count = bt->block_count;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun while (bt->line_bytes > 4095) {
131*4882a593Smuzhiyun bt->line_bytes >>= 1;
132*4882a593Smuzhiyun bt->line_count <<= 1;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun if (bt->line_count > 255) {
136*4882a593Smuzhiyun printk(KERN_ERR "bt878: buffer size error!\n");
137*4882a593Smuzhiyun return -EINVAL;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun
bt878_risc_program(struct bt878 * bt,u32 op_sync_orin)143*4882a593Smuzhiyun static void bt878_risc_program(struct bt878 *bt, u32 op_sync_orin)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun u32 buf_pos = 0;
146*4882a593Smuzhiyun u32 line;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun RISC_FLUSH();
149*4882a593Smuzhiyun RISC_INSTR(RISC_SYNC | RISC_SYNC_FM1 | op_sync_orin);
150*4882a593Smuzhiyun RISC_INSTR(0);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun dprintk("bt878: risc len lines %u, bytes per line %u\n",
153*4882a593Smuzhiyun bt->line_count, bt->line_bytes);
154*4882a593Smuzhiyun for (line = 0; line < bt->line_count; line++) {
155*4882a593Smuzhiyun // At the beginning of every block we issue an IRQ with previous (finished) block number set
156*4882a593Smuzhiyun if (!(buf_pos % bt->block_bytes))
157*4882a593Smuzhiyun RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
158*4882a593Smuzhiyun RISC_IRQ |
159*4882a593Smuzhiyun RISC_STATUS(((buf_pos /
160*4882a593Smuzhiyun bt->block_bytes) +
161*4882a593Smuzhiyun (bt->block_count -
162*4882a593Smuzhiyun 1)) %
163*4882a593Smuzhiyun bt->block_count) | bt->
164*4882a593Smuzhiyun line_bytes);
165*4882a593Smuzhiyun else
166*4882a593Smuzhiyun RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
167*4882a593Smuzhiyun bt->line_bytes);
168*4882a593Smuzhiyun RISC_INSTR(bt->buf_dma + buf_pos);
169*4882a593Smuzhiyun buf_pos += bt->line_bytes;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun RISC_INSTR(RISC_SYNC | op_sync_orin | RISC_SYNC_VRO);
173*4882a593Smuzhiyun RISC_INSTR(0);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun RISC_INSTR(RISC_JUMP);
176*4882a593Smuzhiyun RISC_INSTR(bt->risc_dma);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun btwrite((bt->line_count << 16) | bt->line_bytes, BT878_APACK_LEN);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /*****************************/
182*4882a593Smuzhiyun /* Start/Stop grabbing funcs */
183*4882a593Smuzhiyun /*****************************/
184*4882a593Smuzhiyun
bt878_start(struct bt878 * bt,u32 controlreg,u32 op_sync_orin,u32 irq_err_ignore)185*4882a593Smuzhiyun void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
186*4882a593Smuzhiyun u32 irq_err_ignore)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun u32 int_mask;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun dprintk("bt878 debug: bt878_start (ctl=%8.8x)\n", controlreg);
191*4882a593Smuzhiyun /* complete the writing of the risc dma program now we have
192*4882a593Smuzhiyun * the card specifics
193*4882a593Smuzhiyun */
194*4882a593Smuzhiyun bt878_risc_program(bt, op_sync_orin);
195*4882a593Smuzhiyun controlreg &= ~0x1f;
196*4882a593Smuzhiyun controlreg |= 0x1b;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun btwrite(bt->risc_dma, BT878_ARISC_START);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun /* original int mask had :
201*4882a593Smuzhiyun * 6 2 8 4 0
202*4882a593Smuzhiyun * 1111 1111 1000 0000 0000
203*4882a593Smuzhiyun * SCERR|OCERR|PABORT|RIPERR|FDSR|FTRGT|FBUS|RISCI
204*4882a593Smuzhiyun * Hacked for DST to:
205*4882a593Smuzhiyun * SCERR | OCERR | FDSR | FTRGT | FBUS | RISCI
206*4882a593Smuzhiyun */
207*4882a593Smuzhiyun int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT |
208*4882a593Smuzhiyun BT878_ARIPERR | BT878_APPERR | BT878_AFDSR | BT878_AFTRGT |
209*4882a593Smuzhiyun BT878_AFBUS | BT878_ARISCI;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun /* ignore pesky bits */
213*4882a593Smuzhiyun int_mask &= ~irq_err_ignore;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun btwrite(int_mask, BT878_AINT_MASK);
216*4882a593Smuzhiyun btwrite(controlreg, BT878_AGPIO_DMA_CTL);
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
bt878_stop(struct bt878 * bt)219*4882a593Smuzhiyun void bt878_stop(struct bt878 *bt)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun u32 stat;
222*4882a593Smuzhiyun int i = 0;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun dprintk("bt878 debug: bt878_stop\n");
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun btwrite(0, BT878_AINT_MASK);
227*4882a593Smuzhiyun btand(~0x13, BT878_AGPIO_DMA_CTL);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun do {
230*4882a593Smuzhiyun stat = btread(BT878_AINT_STAT);
231*4882a593Smuzhiyun if (!(stat & BT878_ARISC_EN))
232*4882a593Smuzhiyun break;
233*4882a593Smuzhiyun i++;
234*4882a593Smuzhiyun } while (i < 500);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun dprintk("bt878(%d) debug: bt878_stop, i=%d, stat=0x%8.8x\n",
237*4882a593Smuzhiyun bt->nr, i, stat);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun EXPORT_SYMBOL(bt878_start);
241*4882a593Smuzhiyun EXPORT_SYMBOL(bt878_stop);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /*****************************/
244*4882a593Smuzhiyun /* Interrupt service routine */
245*4882a593Smuzhiyun /*****************************/
246*4882a593Smuzhiyun
bt878_irq(int irq,void * dev_id)247*4882a593Smuzhiyun static irqreturn_t bt878_irq(int irq, void *dev_id)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun u32 stat, astat, mask;
250*4882a593Smuzhiyun int count;
251*4882a593Smuzhiyun struct bt878 *bt;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun bt = (struct bt878 *) dev_id;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun count = 0;
256*4882a593Smuzhiyun while (1) {
257*4882a593Smuzhiyun stat = btread(BT878_AINT_STAT);
258*4882a593Smuzhiyun mask = btread(BT878_AINT_MASK);
259*4882a593Smuzhiyun if (!(astat = (stat & mask)))
260*4882a593Smuzhiyun return IRQ_NONE; /* this interrupt is not for me */
261*4882a593Smuzhiyun /* dprintk("bt878(%d) debug: irq count %d, stat 0x%8.8x, mask 0x%8.8x\n",bt->nr,count,stat,mask); */
262*4882a593Smuzhiyun btwrite(astat, BT878_AINT_STAT); /* try to clear interrupt condition */
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun if (astat & (BT878_ASCERR | BT878_AOCERR)) {
266*4882a593Smuzhiyun if (bt878_verbose) {
267*4882a593Smuzhiyun printk(KERN_INFO
268*4882a593Smuzhiyun "bt878(%d): irq%s%s risc_pc=%08x\n",
269*4882a593Smuzhiyun bt->nr,
270*4882a593Smuzhiyun (astat & BT878_ASCERR) ? " SCERR" :
271*4882a593Smuzhiyun "",
272*4882a593Smuzhiyun (astat & BT878_AOCERR) ? " OCERR" :
273*4882a593Smuzhiyun "", btread(BT878_ARISC_PC));
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun if (astat & (BT878_APABORT | BT878_ARIPERR | BT878_APPERR)) {
277*4882a593Smuzhiyun if (bt878_verbose) {
278*4882a593Smuzhiyun printk(KERN_INFO
279*4882a593Smuzhiyun "bt878(%d): irq%s%s%s risc_pc=%08x\n",
280*4882a593Smuzhiyun bt->nr,
281*4882a593Smuzhiyun (astat & BT878_APABORT) ? " PABORT" :
282*4882a593Smuzhiyun "",
283*4882a593Smuzhiyun (astat & BT878_ARIPERR) ? " RIPERR" :
284*4882a593Smuzhiyun "",
285*4882a593Smuzhiyun (astat & BT878_APPERR) ? " PPERR" :
286*4882a593Smuzhiyun "", btread(BT878_ARISC_PC));
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun if (astat & (BT878_AFDSR | BT878_AFTRGT | BT878_AFBUS)) {
290*4882a593Smuzhiyun if (bt878_verbose) {
291*4882a593Smuzhiyun printk(KERN_INFO
292*4882a593Smuzhiyun "bt878(%d): irq%s%s%s risc_pc=%08x\n",
293*4882a593Smuzhiyun bt->nr,
294*4882a593Smuzhiyun (astat & BT878_AFDSR) ? " FDSR" : "",
295*4882a593Smuzhiyun (astat & BT878_AFTRGT) ? " FTRGT" :
296*4882a593Smuzhiyun "",
297*4882a593Smuzhiyun (astat & BT878_AFBUS) ? " FBUS" : "",
298*4882a593Smuzhiyun btread(BT878_ARISC_PC));
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun if (astat & BT878_ARISCI) {
302*4882a593Smuzhiyun bt->finished_block = (stat & BT878_ARISCS) >> 28;
303*4882a593Smuzhiyun if (bt->tasklet.callback)
304*4882a593Smuzhiyun tasklet_schedule(&bt->tasklet);
305*4882a593Smuzhiyun break;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun count++;
308*4882a593Smuzhiyun if (count > 20) {
309*4882a593Smuzhiyun btwrite(0, BT878_AINT_MASK);
310*4882a593Smuzhiyun printk(KERN_ERR
311*4882a593Smuzhiyun "bt878(%d): IRQ lockup, cleared int mask\n",
312*4882a593Smuzhiyun bt->nr);
313*4882a593Smuzhiyun break;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun return IRQ_HANDLED;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun int
bt878_device_control(struct bt878 * bt,unsigned int cmd,union dst_gpio_packet * mp)320*4882a593Smuzhiyun bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun int retval;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun retval = 0;
325*4882a593Smuzhiyun if (mutex_lock_interruptible(&bt->gpio_lock))
326*4882a593Smuzhiyun return -ERESTARTSYS;
327*4882a593Smuzhiyun /* special gpio signal */
328*4882a593Smuzhiyun switch (cmd) {
329*4882a593Smuzhiyun case DST_IG_ENABLE:
330*4882a593Smuzhiyun // dprintk("dvb_bt8xx: dst enable mask 0x%02x enb 0x%02x \n", mp->dstg.enb.mask, mp->dstg.enb.enable);
331*4882a593Smuzhiyun retval = bttv_gpio_enable(bt->bttv_nr,
332*4882a593Smuzhiyun mp->enb.mask,
333*4882a593Smuzhiyun mp->enb.enable);
334*4882a593Smuzhiyun break;
335*4882a593Smuzhiyun case DST_IG_WRITE:
336*4882a593Smuzhiyun // dprintk("dvb_bt8xx: dst write gpio mask 0x%02x out 0x%02x\n", mp->dstg.outp.mask, mp->dstg.outp.highvals);
337*4882a593Smuzhiyun retval = bttv_write_gpio(bt->bttv_nr,
338*4882a593Smuzhiyun mp->outp.mask,
339*4882a593Smuzhiyun mp->outp.highvals);
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun break;
342*4882a593Smuzhiyun case DST_IG_READ:
343*4882a593Smuzhiyun /* read */
344*4882a593Smuzhiyun retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value);
345*4882a593Smuzhiyun // dprintk("dvb_bt8xx: dst read gpio 0x%02x\n", (unsigned)mp->dstg.rd.value);
346*4882a593Smuzhiyun break;
347*4882a593Smuzhiyun case DST_IG_TS:
348*4882a593Smuzhiyun /* Set packet size */
349*4882a593Smuzhiyun bt->TS_Size = mp->psize;
350*4882a593Smuzhiyun break;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun default:
353*4882a593Smuzhiyun retval = -EINVAL;
354*4882a593Smuzhiyun break;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun mutex_unlock(&bt->gpio_lock);
357*4882a593Smuzhiyun return retval;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun EXPORT_SYMBOL(bt878_device_control);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun #define BROOKTREE_878_DEVICE(vend, dev, name) \
363*4882a593Smuzhiyun { \
364*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_BROOKTREE, \
365*4882a593Smuzhiyun .device = PCI_DEVICE_ID_BROOKTREE_878, \
366*4882a593Smuzhiyun .subvendor = (vend), .subdevice = (dev), \
367*4882a593Smuzhiyun .driver_data = (unsigned long) name \
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun static const struct pci_device_id bt878_pci_tbl[] = {
371*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x0071, 0x0101, "Nebula Electronics DigiTV"),
372*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x1461, 0x0761, "AverMedia AverTV DVB-T 761"),
373*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x11bd, 0x001c, "Pinnacle PCTV Sat"),
374*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x11bd, 0x0026, "Pinnacle PCTV SAT CI"),
375*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x1822, 0x0001, "Twinhan VisionPlus DVB"),
376*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x270f, 0xfc00,
377*4882a593Smuzhiyun "ChainTech digitop DST-1000 DVB-S"),
378*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x1461, 0x0771, "AVermedia AverTV DVB-T 771"),
379*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x18ac, 0xdb10, "DViCO FusionHDTV DVB-T Lite"),
380*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x18ac, 0xdb11, "Ultraview DVB-T Lite"),
381*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x18ac, 0xd500, "DViCO FusionHDTV 5 Lite"),
382*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x7063, 0x2000, "pcHDTV HD-2000 TV"),
383*4882a593Smuzhiyun BROOKTREE_878_DEVICE(0x1822, 0x0026, "DNTV Live! Mini"),
384*4882a593Smuzhiyun { }
385*4882a593Smuzhiyun };
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, bt878_pci_tbl);
388*4882a593Smuzhiyun
card_name(const struct pci_device_id * id)389*4882a593Smuzhiyun static const char * card_name(const struct pci_device_id *id)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun return id->driver_data ? (const char *)id->driver_data : "Unknown";
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /***********************/
395*4882a593Smuzhiyun /* PCI device handling */
396*4882a593Smuzhiyun /***********************/
397*4882a593Smuzhiyun
bt878_probe(struct pci_dev * dev,const struct pci_device_id * pci_id)398*4882a593Smuzhiyun static int bt878_probe(struct pci_dev *dev, const struct pci_device_id *pci_id)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun int result = 0;
401*4882a593Smuzhiyun unsigned char lat;
402*4882a593Smuzhiyun struct bt878 *bt;
403*4882a593Smuzhiyun unsigned int cardid;
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
406*4882a593Smuzhiyun bt878_num);
407*4882a593Smuzhiyun if (bt878_num >= BT878_MAX) {
408*4882a593Smuzhiyun printk(KERN_ERR "bt878: Too many devices inserted\n");
409*4882a593Smuzhiyun return -ENOMEM;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun if (pci_enable_device(dev))
412*4882a593Smuzhiyun return -EIO;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun cardid = dev->subsystem_device << 16;
415*4882a593Smuzhiyun cardid |= dev->subsystem_vendor;
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun printk(KERN_INFO "%s: card id=[0x%x],[ %s ] has DVB functions.\n",
418*4882a593Smuzhiyun __func__, cardid, card_name(pci_id));
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun bt = &bt878[bt878_num];
421*4882a593Smuzhiyun bt->dev = dev;
422*4882a593Smuzhiyun bt->nr = bt878_num;
423*4882a593Smuzhiyun bt->shutdown = 0;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun bt->id = dev->device;
426*4882a593Smuzhiyun bt->irq = dev->irq;
427*4882a593Smuzhiyun bt->bt878_adr = pci_resource_start(dev, 0);
428*4882a593Smuzhiyun if (!request_mem_region(pci_resource_start(dev, 0),
429*4882a593Smuzhiyun pci_resource_len(dev, 0), "bt878")) {
430*4882a593Smuzhiyun result = -EBUSY;
431*4882a593Smuzhiyun goto fail0;
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun bt->revision = dev->revision;
435*4882a593Smuzhiyun pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ",
439*4882a593Smuzhiyun bt878_num, bt->id, bt->revision, dev->bus->number,
440*4882a593Smuzhiyun PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
441*4882a593Smuzhiyun printk("irq: %d, latency: %d, memory: 0x%lx\n",
442*4882a593Smuzhiyun bt->irq, lat, bt->bt878_adr);
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun #ifdef __sparc__
445*4882a593Smuzhiyun bt->bt878_mem = (unsigned char *) bt->bt878_adr;
446*4882a593Smuzhiyun #else
447*4882a593Smuzhiyun bt->bt878_mem = ioremap(bt->bt878_adr, 0x1000);
448*4882a593Smuzhiyun #endif
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun /* clear interrupt mask */
451*4882a593Smuzhiyun btwrite(0, BT848_INT_MASK);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun result = request_irq(bt->irq, bt878_irq,
454*4882a593Smuzhiyun IRQF_SHARED, "bt878", (void *) bt);
455*4882a593Smuzhiyun if (result == -EINVAL) {
456*4882a593Smuzhiyun printk(KERN_ERR "bt878(%d): Bad irq number or handler\n",
457*4882a593Smuzhiyun bt878_num);
458*4882a593Smuzhiyun goto fail1;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun if (result == -EBUSY) {
461*4882a593Smuzhiyun printk(KERN_ERR
462*4882a593Smuzhiyun "bt878(%d): IRQ %d busy, change your PnP config in BIOS\n",
463*4882a593Smuzhiyun bt878_num, bt->irq);
464*4882a593Smuzhiyun goto fail1;
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun if (result < 0)
467*4882a593Smuzhiyun goto fail1;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun pci_set_master(dev);
470*4882a593Smuzhiyun pci_set_drvdata(dev, bt);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun if ((result = bt878_mem_alloc(bt))) {
473*4882a593Smuzhiyun printk(KERN_ERR "bt878: failed to allocate memory!\n");
474*4882a593Smuzhiyun goto fail2;
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun bt878_make_risc(bt);
478*4882a593Smuzhiyun btwrite(0, BT878_AINT_MASK);
479*4882a593Smuzhiyun bt878_num++;
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun if (!bt->tasklet.func)
482*4882a593Smuzhiyun tasklet_disable(&bt->tasklet);
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun return 0;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun fail2:
487*4882a593Smuzhiyun free_irq(bt->irq, bt);
488*4882a593Smuzhiyun fail1:
489*4882a593Smuzhiyun release_mem_region(pci_resource_start(bt->dev, 0),
490*4882a593Smuzhiyun pci_resource_len(bt->dev, 0));
491*4882a593Smuzhiyun fail0:
492*4882a593Smuzhiyun pci_disable_device(dev);
493*4882a593Smuzhiyun return result;
494*4882a593Smuzhiyun }
495*4882a593Smuzhiyun
bt878_remove(struct pci_dev * pci_dev)496*4882a593Smuzhiyun static void bt878_remove(struct pci_dev *pci_dev)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun u8 command;
499*4882a593Smuzhiyun struct bt878 *bt = pci_get_drvdata(pci_dev);
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun if (bt878_verbose)
502*4882a593Smuzhiyun printk(KERN_INFO "bt878(%d): unloading\n", bt->nr);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun /* turn off all capturing, DMA and IRQs */
505*4882a593Smuzhiyun btand(~0x13, BT878_AGPIO_DMA_CTL);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun /* first disable interrupts before unmapping the memory! */
508*4882a593Smuzhiyun btwrite(0, BT878_AINT_MASK);
509*4882a593Smuzhiyun btwrite(~0U, BT878_AINT_STAT);
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /* disable PCI bus-mastering */
512*4882a593Smuzhiyun pci_read_config_byte(bt->dev, PCI_COMMAND, &command);
513*4882a593Smuzhiyun /* Should this be &=~ ?? */
514*4882a593Smuzhiyun command &= ~PCI_COMMAND_MASTER;
515*4882a593Smuzhiyun pci_write_config_byte(bt->dev, PCI_COMMAND, command);
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun free_irq(bt->irq, bt);
518*4882a593Smuzhiyun printk(KERN_DEBUG "bt878_mem: 0x%p.\n", bt->bt878_mem);
519*4882a593Smuzhiyun if (bt->bt878_mem)
520*4882a593Smuzhiyun iounmap(bt->bt878_mem);
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun release_mem_region(pci_resource_start(bt->dev, 0),
523*4882a593Smuzhiyun pci_resource_len(bt->dev, 0));
524*4882a593Smuzhiyun /* wake up any waiting processes
525*4882a593Smuzhiyun because shutdown flag is set, no new processes (in this queue)
526*4882a593Smuzhiyun are expected
527*4882a593Smuzhiyun */
528*4882a593Smuzhiyun bt->shutdown = 1;
529*4882a593Smuzhiyun bt878_mem_free(bt);
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun pci_disable_device(pci_dev);
532*4882a593Smuzhiyun return;
533*4882a593Smuzhiyun }
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun static struct pci_driver bt878_pci_driver = {
536*4882a593Smuzhiyun .name = "bt878",
537*4882a593Smuzhiyun .id_table = bt878_pci_tbl,
538*4882a593Smuzhiyun .probe = bt878_probe,
539*4882a593Smuzhiyun .remove = bt878_remove,
540*4882a593Smuzhiyun };
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun /*******************************/
543*4882a593Smuzhiyun /* Module management functions */
544*4882a593Smuzhiyun /*******************************/
545*4882a593Smuzhiyun
bt878_init_module(void)546*4882a593Smuzhiyun static int __init bt878_init_module(void)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun bt878_num = 0;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
551*4882a593Smuzhiyun (BT878_VERSION_CODE >> 16) & 0xff,
552*4882a593Smuzhiyun (BT878_VERSION_CODE >> 8) & 0xff,
553*4882a593Smuzhiyun BT878_VERSION_CODE & 0xff);
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun return pci_register_driver(&bt878_pci_driver);
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
bt878_cleanup_module(void)558*4882a593Smuzhiyun static void __exit bt878_cleanup_module(void)
559*4882a593Smuzhiyun {
560*4882a593Smuzhiyun pci_unregister_driver(&bt878_pci_driver);
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun module_init(bt878_init_module);
564*4882a593Smuzhiyun module_exit(bt878_cleanup_module);
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun MODULE_LICENSE("GPL");
567