xref: /OK3568_Linux_fs/kernel/drivers/media/pci/bt8xx/bt848.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun     bt848.h - Bt848 register offsets
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun     Copyright (C) 1996,97,98 Ralph Metzler (rjkm@thp.uni-koeln.de)
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef _BT848_H_
10*4882a593Smuzhiyun #define _BT848_H_
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #ifndef PCI_VENDOR_ID_BROOKTREE
13*4882a593Smuzhiyun #define PCI_VENDOR_ID_BROOKTREE 0x109e
14*4882a593Smuzhiyun #endif
15*4882a593Smuzhiyun #ifndef PCI_DEVICE_ID_BT848
16*4882a593Smuzhiyun #define PCI_DEVICE_ID_BT848     0x350
17*4882a593Smuzhiyun #endif
18*4882a593Smuzhiyun #ifndef PCI_DEVICE_ID_BT849
19*4882a593Smuzhiyun #define PCI_DEVICE_ID_BT849     0x351
20*4882a593Smuzhiyun #endif
21*4882a593Smuzhiyun #ifndef PCI_DEVICE_ID_FUSION879
22*4882a593Smuzhiyun #define PCI_DEVICE_ID_FUSION879	0x36c
23*4882a593Smuzhiyun #endif
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #ifndef PCI_DEVICE_ID_BT878
26*4882a593Smuzhiyun #define PCI_DEVICE_ID_BT878     0x36e
27*4882a593Smuzhiyun #endif
28*4882a593Smuzhiyun #ifndef PCI_DEVICE_ID_BT879
29*4882a593Smuzhiyun #define PCI_DEVICE_ID_BT879     0x36f
30*4882a593Smuzhiyun #endif
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* Brooktree 848 registers */
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define BT848_DSTATUS          0x000
35*4882a593Smuzhiyun #define BT848_DSTATUS_PRES     (1<<7)
36*4882a593Smuzhiyun #define BT848_DSTATUS_HLOC     (1<<6)
37*4882a593Smuzhiyun #define BT848_DSTATUS_FIELD    (1<<5)
38*4882a593Smuzhiyun #define BT848_DSTATUS_NUML     (1<<4)
39*4882a593Smuzhiyun #define BT848_DSTATUS_CSEL     (1<<3)
40*4882a593Smuzhiyun #define BT848_DSTATUS_PLOCK    (1<<2)
41*4882a593Smuzhiyun #define BT848_DSTATUS_LOF      (1<<1)
42*4882a593Smuzhiyun #define BT848_DSTATUS_COF      (1<<0)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define BT848_IFORM            0x004
45*4882a593Smuzhiyun #define BT848_IFORM_HACTIVE    (1<<7)
46*4882a593Smuzhiyun #define BT848_IFORM_MUXSEL     (3<<5)
47*4882a593Smuzhiyun #define BT848_IFORM_MUX0       (2<<5)
48*4882a593Smuzhiyun #define BT848_IFORM_MUX1       (3<<5)
49*4882a593Smuzhiyun #define BT848_IFORM_MUX2       (1<<5)
50*4882a593Smuzhiyun #define BT848_IFORM_XTSEL      (3<<3)
51*4882a593Smuzhiyun #define BT848_IFORM_XT0        (1<<3)
52*4882a593Smuzhiyun #define BT848_IFORM_XT1        (2<<3)
53*4882a593Smuzhiyun #define BT848_IFORM_XTAUTO     (3<<3)
54*4882a593Smuzhiyun #define BT848_IFORM_XTBOTH     (3<<3)
55*4882a593Smuzhiyun #define BT848_IFORM_NTSC       1
56*4882a593Smuzhiyun #define BT848_IFORM_NTSC_J     2
57*4882a593Smuzhiyun #define BT848_IFORM_PAL_BDGHI  3
58*4882a593Smuzhiyun #define BT848_IFORM_PAL_M      4
59*4882a593Smuzhiyun #define BT848_IFORM_PAL_N      5
60*4882a593Smuzhiyun #define BT848_IFORM_SECAM      6
61*4882a593Smuzhiyun #define BT848_IFORM_PAL_NC     7
62*4882a593Smuzhiyun #define BT848_IFORM_AUTO       0
63*4882a593Smuzhiyun #define BT848_IFORM_NORM       7
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define BT848_TDEC             0x008
66*4882a593Smuzhiyun #define BT848_TDEC_DEC_FIELD   (1<<7)
67*4882a593Smuzhiyun #define BT848_TDEC_FLDALIGN    (1<<6)
68*4882a593Smuzhiyun #define BT848_TDEC_DEC_RAT     (0x1f)
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define BT848_E_CROP           0x00C
71*4882a593Smuzhiyun #define BT848_O_CROP           0x08C
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun #define BT848_E_VDELAY_LO      0x010
74*4882a593Smuzhiyun #define BT848_O_VDELAY_LO      0x090
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define BT848_E_VACTIVE_LO     0x014
77*4882a593Smuzhiyun #define BT848_O_VACTIVE_LO     0x094
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define BT848_E_HDELAY_LO      0x018
80*4882a593Smuzhiyun #define BT848_O_HDELAY_LO      0x098
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun #define BT848_E_HACTIVE_LO     0x01C
83*4882a593Smuzhiyun #define BT848_O_HACTIVE_LO     0x09C
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun #define BT848_E_HSCALE_HI      0x020
86*4882a593Smuzhiyun #define BT848_O_HSCALE_HI      0x0A0
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define BT848_E_HSCALE_LO      0x024
89*4882a593Smuzhiyun #define BT848_O_HSCALE_LO      0x0A4
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun #define BT848_BRIGHT           0x028
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define BT848_E_CONTROL        0x02C
94*4882a593Smuzhiyun #define BT848_O_CONTROL        0x0AC
95*4882a593Smuzhiyun #define BT848_CONTROL_LNOTCH    (1<<7)
96*4882a593Smuzhiyun #define BT848_CONTROL_COMP      (1<<6)
97*4882a593Smuzhiyun #define BT848_CONTROL_LDEC      (1<<5)
98*4882a593Smuzhiyun #define BT848_CONTROL_CBSENSE   (1<<4)
99*4882a593Smuzhiyun #define BT848_CONTROL_CON_MSB   (1<<2)
100*4882a593Smuzhiyun #define BT848_CONTROL_SAT_U_MSB (1<<1)
101*4882a593Smuzhiyun #define BT848_CONTROL_SAT_V_MSB (1<<0)
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun #define BT848_CONTRAST_LO      0x030
104*4882a593Smuzhiyun #define BT848_SAT_U_LO         0x034
105*4882a593Smuzhiyun #define BT848_SAT_V_LO         0x038
106*4882a593Smuzhiyun #define BT848_HUE              0x03C
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define BT848_E_SCLOOP         0x040
109*4882a593Smuzhiyun #define BT848_O_SCLOOP         0x0C0
110*4882a593Smuzhiyun #define BT848_SCLOOP_CAGC       (1<<6)
111*4882a593Smuzhiyun #define BT848_SCLOOP_CKILL      (1<<5)
112*4882a593Smuzhiyun #define BT848_SCLOOP_HFILT_AUTO (0<<3)
113*4882a593Smuzhiyun #define BT848_SCLOOP_HFILT_CIF  (1<<3)
114*4882a593Smuzhiyun #define BT848_SCLOOP_HFILT_QCIF (2<<3)
115*4882a593Smuzhiyun #define BT848_SCLOOP_HFILT_ICON (3<<3)
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #define BT848_SCLOOP_PEAK       (1<<7)
118*4882a593Smuzhiyun #define BT848_SCLOOP_HFILT_MINP (1<<3)
119*4882a593Smuzhiyun #define BT848_SCLOOP_HFILT_MEDP (2<<3)
120*4882a593Smuzhiyun #define BT848_SCLOOP_HFILT_MAXP (3<<3)
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun #define BT848_OFORM            0x048
124*4882a593Smuzhiyun #define BT848_OFORM_RANGE      (1<<7)
125*4882a593Smuzhiyun #define BT848_OFORM_CORE0      (0<<5)
126*4882a593Smuzhiyun #define BT848_OFORM_CORE8      (1<<5)
127*4882a593Smuzhiyun #define BT848_OFORM_CORE16     (2<<5)
128*4882a593Smuzhiyun #define BT848_OFORM_CORE32     (3<<5)
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define BT848_E_VSCALE_HI      0x04C
131*4882a593Smuzhiyun #define BT848_O_VSCALE_HI      0x0CC
132*4882a593Smuzhiyun #define BT848_VSCALE_YCOMB     (1<<7)
133*4882a593Smuzhiyun #define BT848_VSCALE_COMB      (1<<6)
134*4882a593Smuzhiyun #define BT848_VSCALE_INT       (1<<5)
135*4882a593Smuzhiyun #define BT848_VSCALE_HI        15
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun #define BT848_E_VSCALE_LO      0x050
138*4882a593Smuzhiyun #define BT848_O_VSCALE_LO      0x0D0
139*4882a593Smuzhiyun #define BT848_TEST             0x054
140*4882a593Smuzhiyun #define BT848_ADELAY           0x060
141*4882a593Smuzhiyun #define BT848_BDELAY           0x064
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun #define BT848_ADC              0x068
144*4882a593Smuzhiyun #define BT848_ADC_RESERVED     (2<<6)
145*4882a593Smuzhiyun #define BT848_ADC_SYNC_T       (1<<5)
146*4882a593Smuzhiyun #define BT848_ADC_AGC_EN       (1<<4)
147*4882a593Smuzhiyun #define BT848_ADC_CLK_SLEEP    (1<<3)
148*4882a593Smuzhiyun #define BT848_ADC_Y_SLEEP      (1<<2)
149*4882a593Smuzhiyun #define BT848_ADC_C_SLEEP      (1<<1)
150*4882a593Smuzhiyun #define BT848_ADC_CRUSH        (1<<0)
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun #define BT848_WC_UP            0x044
153*4882a593Smuzhiyun #define BT848_WC_DOWN          0x078
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun #define BT848_E_VTC            0x06C
156*4882a593Smuzhiyun #define BT848_O_VTC            0x0EC
157*4882a593Smuzhiyun #define BT848_VTC_HSFMT        (1<<7)
158*4882a593Smuzhiyun #define BT848_VTC_VFILT_2TAP   0
159*4882a593Smuzhiyun #define BT848_VTC_VFILT_3TAP   1
160*4882a593Smuzhiyun #define BT848_VTC_VFILT_4TAP   2
161*4882a593Smuzhiyun #define BT848_VTC_VFILT_5TAP   3
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun #define BT848_SRESET           0x07C
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun #define BT848_COLOR_FMT             0x0D4
166*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_RGB32     (0<<4)
167*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_RGB24     (1<<4)
168*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_RGB16     (2<<4)
169*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_RGB15     (3<<4)
170*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_YUY2      (4<<4)
171*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_BtYUV     (5<<4)
172*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_Y8        (6<<4)
173*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_RGB8      (7<<4)
174*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_YCrCb422  (8<<4)
175*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_YCrCb411  (9<<4)
176*4882a593Smuzhiyun #define BT848_COLOR_FMT_O_RAW       (14<<4)
177*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_RGB32     0
178*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_RGB24     1
179*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_RGB16     2
180*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_RGB15     3
181*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_YUY2      4
182*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_BtYUV     5
183*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_Y8        6
184*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_RGB8      7
185*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_YCrCb422  8
186*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_YCrCb411  9
187*4882a593Smuzhiyun #define BT848_COLOR_FMT_E_RAW       14
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun #define BT848_COLOR_FMT_RGB32       0x00
190*4882a593Smuzhiyun #define BT848_COLOR_FMT_RGB24       0x11
191*4882a593Smuzhiyun #define BT848_COLOR_FMT_RGB16       0x22
192*4882a593Smuzhiyun #define BT848_COLOR_FMT_RGB15       0x33
193*4882a593Smuzhiyun #define BT848_COLOR_FMT_YUY2        0x44
194*4882a593Smuzhiyun #define BT848_COLOR_FMT_BtYUV       0x55
195*4882a593Smuzhiyun #define BT848_COLOR_FMT_Y8          0x66
196*4882a593Smuzhiyun #define BT848_COLOR_FMT_RGB8        0x77
197*4882a593Smuzhiyun #define BT848_COLOR_FMT_YCrCb422    0x88
198*4882a593Smuzhiyun #define BT848_COLOR_FMT_YCrCb411    0x99
199*4882a593Smuzhiyun #define BT848_COLOR_FMT_RAW         0xee
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun #define BT848_VTOTAL_LO             0xB0
202*4882a593Smuzhiyun #define BT848_VTOTAL_HI             0xB4
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun #define BT848_COLOR_CTL                0x0D8
205*4882a593Smuzhiyun #define BT848_COLOR_CTL_EXT_FRMRATE    (1<<7)
206*4882a593Smuzhiyun #define BT848_COLOR_CTL_COLOR_BARS     (1<<6)
207*4882a593Smuzhiyun #define BT848_COLOR_CTL_RGB_DED        (1<<5)
208*4882a593Smuzhiyun #define BT848_COLOR_CTL_GAMMA          (1<<4)
209*4882a593Smuzhiyun #define BT848_COLOR_CTL_WSWAP_ODD      (1<<3)
210*4882a593Smuzhiyun #define BT848_COLOR_CTL_WSWAP_EVEN     (1<<2)
211*4882a593Smuzhiyun #define BT848_COLOR_CTL_BSWAP_ODD      (1<<1)
212*4882a593Smuzhiyun #define BT848_COLOR_CTL_BSWAP_EVEN     (1<<0)
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun #define BT848_CAP_CTL                  0x0DC
215*4882a593Smuzhiyun #define BT848_CAP_CTL_DITH_FRAME       (1<<4)
216*4882a593Smuzhiyun #define BT848_CAP_CTL_CAPTURE_VBI_ODD  (1<<3)
217*4882a593Smuzhiyun #define BT848_CAP_CTL_CAPTURE_VBI_EVEN (1<<2)
218*4882a593Smuzhiyun #define BT848_CAP_CTL_CAPTURE_ODD      (1<<1)
219*4882a593Smuzhiyun #define BT848_CAP_CTL_CAPTURE_EVEN     (1<<0)
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun #define BT848_VBI_PACK_SIZE    0x0E0
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun #define BT848_VBI_PACK_DEL     0x0E4
224*4882a593Smuzhiyun #define BT848_VBI_PACK_DEL_VBI_HDELAY 0xfc
225*4882a593Smuzhiyun #define BT848_VBI_PACK_DEL_EXT_FRAME  2
226*4882a593Smuzhiyun #define BT848_VBI_PACK_DEL_VBI_PKT_HI 1
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun #define BT848_INT_STAT         0x100
230*4882a593Smuzhiyun #define BT848_INT_MASK         0x104
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun #define BT848_INT_ETBF         (1<<23)
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #define BT848_INT_RISCS   (0xf<<28)
235*4882a593Smuzhiyun #define BT848_INT_RISC_EN (1<<27)
236*4882a593Smuzhiyun #define BT848_INT_RACK    (1<<25)
237*4882a593Smuzhiyun #define BT848_INT_FIELD   (1<<24)
238*4882a593Smuzhiyun #define BT848_INT_SCERR   (1<<19)
239*4882a593Smuzhiyun #define BT848_INT_OCERR   (1<<18)
240*4882a593Smuzhiyun #define BT848_INT_PABORT  (1<<17)
241*4882a593Smuzhiyun #define BT848_INT_RIPERR  (1<<16)
242*4882a593Smuzhiyun #define BT848_INT_PPERR   (1<<15)
243*4882a593Smuzhiyun #define BT848_INT_FDSR    (1<<14)
244*4882a593Smuzhiyun #define BT848_INT_FTRGT   (1<<13)
245*4882a593Smuzhiyun #define BT848_INT_FBUS    (1<<12)
246*4882a593Smuzhiyun #define BT848_INT_RISCI   (1<<11)
247*4882a593Smuzhiyun #define BT848_INT_GPINT   (1<<9)
248*4882a593Smuzhiyun #define BT848_INT_I2CDONE (1<<8)
249*4882a593Smuzhiyun #define BT848_INT_VPRES   (1<<5)
250*4882a593Smuzhiyun #define BT848_INT_HLOCK   (1<<4)
251*4882a593Smuzhiyun #define BT848_INT_OFLOW   (1<<3)
252*4882a593Smuzhiyun #define BT848_INT_HSYNC   (1<<2)
253*4882a593Smuzhiyun #define BT848_INT_VSYNC   (1<<1)
254*4882a593Smuzhiyun #define BT848_INT_FMTCHG  (1<<0)
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL             0x10C
258*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_GPINTC      (1<<15)
259*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_GPINTI      (1<<14)
260*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_GPWEC       (1<<13)
261*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_GPIOMODE    (3<<11)
262*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_GPCLKMODE   (1<<10)
263*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP23_4    (0<<6)
264*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP23_8    (1<<6)
265*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP23_16   (2<<6)
266*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP23_32   (3<<6)
267*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP1_4     (0<<4)
268*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP1_8     (1<<4)
269*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP1_16    (2<<4)
270*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PLTP1_32    (3<<4)
271*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PKTP_4      (0<<2)
272*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PKTP_8      (1<<2)
273*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PKTP_16     (2<<2)
274*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_PKTP_32     (3<<2)
275*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_RISC_ENABLE (1<<1)
276*4882a593Smuzhiyun #define BT848_GPIO_DMA_CTL_FIFO_ENABLE (1<<0)
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun #define BT848_I2C              0x110
279*4882a593Smuzhiyun #define BT878_I2C_MODE         (1<<7)
280*4882a593Smuzhiyun #define BT878_I2C_RATE         (1<<6)
281*4882a593Smuzhiyun #define BT878_I2C_NOSTOP       (1<<5)
282*4882a593Smuzhiyun #define BT878_I2C_NOSTART      (1<<4)
283*4882a593Smuzhiyun #define BT848_I2C_DIV          (0xf<<4)
284*4882a593Smuzhiyun #define BT848_I2C_SYNC         (1<<3)
285*4882a593Smuzhiyun #define BT848_I2C_W3B	       (1<<2)
286*4882a593Smuzhiyun #define BT848_I2C_SCL          (1<<1)
287*4882a593Smuzhiyun #define BT848_I2C_SDA          (1<<0)
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun #define BT848_RISC_STRT_ADD    0x114
290*4882a593Smuzhiyun #define BT848_GPIO_OUT_EN      0x118
291*4882a593Smuzhiyun #define BT848_GPIO_REG_INP     0x11C
292*4882a593Smuzhiyun #define BT848_RISC_COUNT       0x120
293*4882a593Smuzhiyun #define BT848_GPIO_DATA        0x200
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun /* Bt848 RISC commands */
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun /* only for the SYNC RISC command */
299*4882a593Smuzhiyun #define BT848_FIFO_STATUS_FM1  0x06
300*4882a593Smuzhiyun #define BT848_FIFO_STATUS_FM3  0x0e
301*4882a593Smuzhiyun #define BT848_FIFO_STATUS_SOL  0x02
302*4882a593Smuzhiyun #define BT848_FIFO_STATUS_EOL4 0x01
303*4882a593Smuzhiyun #define BT848_FIFO_STATUS_EOL3 0x0d
304*4882a593Smuzhiyun #define BT848_FIFO_STATUS_EOL2 0x09
305*4882a593Smuzhiyun #define BT848_FIFO_STATUS_EOL1 0x05
306*4882a593Smuzhiyun #define BT848_FIFO_STATUS_VRE  0x04
307*4882a593Smuzhiyun #define BT848_FIFO_STATUS_VRO  0x0c
308*4882a593Smuzhiyun #define BT848_FIFO_STATUS_PXV  0x00
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun #define BT848_RISC_RESYNC      (1<<15)
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun /* WRITE and SKIP */
313*4882a593Smuzhiyun /* disable which bytes of each DWORD */
314*4882a593Smuzhiyun #define BT848_RISC_BYTE0       (1U<<12)
315*4882a593Smuzhiyun #define BT848_RISC_BYTE1       (1U<<13)
316*4882a593Smuzhiyun #define BT848_RISC_BYTE2       (1U<<14)
317*4882a593Smuzhiyun #define BT848_RISC_BYTE3       (1U<<15)
318*4882a593Smuzhiyun #define BT848_RISC_BYTE_ALL    (0x0fU<<12)
319*4882a593Smuzhiyun #define BT848_RISC_BYTE_NONE   0
320*4882a593Smuzhiyun /* cause RISCI */
321*4882a593Smuzhiyun #define BT848_RISC_IRQ         (1U<<24)
322*4882a593Smuzhiyun /* RISC command is last one in this line */
323*4882a593Smuzhiyun #define BT848_RISC_EOL         (1U<<26)
324*4882a593Smuzhiyun /* RISC command is first one in this line */
325*4882a593Smuzhiyun #define BT848_RISC_SOL         (1U<<27)
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun #define BT848_RISC_WRITE       (0x01U<<28)
328*4882a593Smuzhiyun #define BT848_RISC_SKIP        (0x02U<<28)
329*4882a593Smuzhiyun #define BT848_RISC_WRITEC      (0x05U<<28)
330*4882a593Smuzhiyun #define BT848_RISC_JUMP        (0x07U<<28)
331*4882a593Smuzhiyun #define BT848_RISC_SYNC        (0x08U<<28)
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun #define BT848_RISC_WRITE123    (0x09U<<28)
334*4882a593Smuzhiyun #define BT848_RISC_SKIP123     (0x0aU<<28)
335*4882a593Smuzhiyun #define BT848_RISC_WRITE1S23   (0x0bU<<28)
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun /* Bt848A and higher only !! */
339*4882a593Smuzhiyun #define BT848_TGLB             0x080
340*4882a593Smuzhiyun #define BT848_TGCTRL           0x084
341*4882a593Smuzhiyun #define BT848_FCAP             0x0E8
342*4882a593Smuzhiyun #define BT848_PLL_F_LO         0x0F0
343*4882a593Smuzhiyun #define BT848_PLL_F_HI         0x0F4
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun #define BT848_PLL_XCI          0x0F8
346*4882a593Smuzhiyun #define BT848_PLL_X            (1<<7)
347*4882a593Smuzhiyun #define BT848_PLL_C            (1<<6)
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun #define BT848_DVSIF            0x0FC
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun /* Bt878 register */
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun #define BT878_DEVCTRL 0x40
354*4882a593Smuzhiyun #define BT878_EN_TBFX 0x02
355*4882a593Smuzhiyun #define BT878_EN_VSFX 0x04
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun #endif
358