xref: /OK3568_Linux_fs/kernel/drivers/media/pci/b2c2/flexcop-dma.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III
4*4882a593Smuzhiyun  * flexcop-dma.c - configuring and controlling the DMA of the FlexCop
5*4882a593Smuzhiyun  * see flexcop.c for copyright information
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include "flexcop.h"
8*4882a593Smuzhiyun 
flexcop_dma_allocate(struct pci_dev * pdev,struct flexcop_dma * dma,u32 size)9*4882a593Smuzhiyun int flexcop_dma_allocate(struct pci_dev *pdev,
10*4882a593Smuzhiyun 		struct flexcop_dma *dma, u32 size)
11*4882a593Smuzhiyun {
12*4882a593Smuzhiyun 	u8 *tcpu;
13*4882a593Smuzhiyun 	dma_addr_t tdma = 0;
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun 	if (size % 2) {
16*4882a593Smuzhiyun 		err("dma buffersize has to be even.");
17*4882a593Smuzhiyun 		return -EINVAL;
18*4882a593Smuzhiyun 	}
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun 	tcpu = pci_alloc_consistent(pdev, size, &tdma);
21*4882a593Smuzhiyun 	if (tcpu != NULL) {
22*4882a593Smuzhiyun 		dma->pdev = pdev;
23*4882a593Smuzhiyun 		dma->cpu_addr0 = tcpu;
24*4882a593Smuzhiyun 		dma->dma_addr0 = tdma;
25*4882a593Smuzhiyun 		dma->cpu_addr1 = tcpu + size/2;
26*4882a593Smuzhiyun 		dma->dma_addr1 = tdma + size/2;
27*4882a593Smuzhiyun 		dma->size = size/2;
28*4882a593Smuzhiyun 		return 0;
29*4882a593Smuzhiyun 	}
30*4882a593Smuzhiyun 	return -ENOMEM;
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun EXPORT_SYMBOL(flexcop_dma_allocate);
33*4882a593Smuzhiyun 
flexcop_dma_free(struct flexcop_dma * dma)34*4882a593Smuzhiyun void flexcop_dma_free(struct flexcop_dma *dma)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	pci_free_consistent(dma->pdev, dma->size*2,
37*4882a593Smuzhiyun 			dma->cpu_addr0, dma->dma_addr0);
38*4882a593Smuzhiyun 	memset(dma, 0, sizeof(struct flexcop_dma));
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun EXPORT_SYMBOL(flexcop_dma_free);
41*4882a593Smuzhiyun 
flexcop_dma_config(struct flexcop_device * fc,struct flexcop_dma * dma,flexcop_dma_index_t dma_idx)42*4882a593Smuzhiyun int flexcop_dma_config(struct flexcop_device *fc,
43*4882a593Smuzhiyun 		struct flexcop_dma *dma,
44*4882a593Smuzhiyun 		flexcop_dma_index_t dma_idx)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun 	flexcop_ibi_value v0x0, v0x4, v0xc;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	v0x0.raw = v0x4.raw = v0xc.raw = 0;
49*4882a593Smuzhiyun 	v0x0.dma_0x0.dma_address0 = dma->dma_addr0 >> 2;
50*4882a593Smuzhiyun 	v0xc.dma_0xc.dma_address1 = dma->dma_addr1 >> 2;
51*4882a593Smuzhiyun 	v0x4.dma_0x4_write.dma_addr_size = dma->size / 4;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	if ((dma_idx & FC_DMA_1) == dma_idx) {
54*4882a593Smuzhiyun 		fc->write_ibi_reg(fc, dma1_000, v0x0);
55*4882a593Smuzhiyun 		fc->write_ibi_reg(fc, dma1_004, v0x4);
56*4882a593Smuzhiyun 		fc->write_ibi_reg(fc, dma1_00c, v0xc);
57*4882a593Smuzhiyun 	} else if ((dma_idx & FC_DMA_2) == dma_idx) {
58*4882a593Smuzhiyun 		fc->write_ibi_reg(fc, dma2_010, v0x0);
59*4882a593Smuzhiyun 		fc->write_ibi_reg(fc, dma2_014, v0x4);
60*4882a593Smuzhiyun 		fc->write_ibi_reg(fc, dma2_01c, v0xc);
61*4882a593Smuzhiyun 	} else {
62*4882a593Smuzhiyun 		err("either DMA1 or DMA2 can be configured within one %s call.",
63*4882a593Smuzhiyun 			__func__);
64*4882a593Smuzhiyun 		return -EINVAL;
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	return 0;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun EXPORT_SYMBOL(flexcop_dma_config);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* start the DMA transfers, but not the DMA IRQs */
flexcop_dma_xfer_control(struct flexcop_device * fc,flexcop_dma_index_t dma_idx,flexcop_dma_addr_index_t index,int onoff)72*4882a593Smuzhiyun int flexcop_dma_xfer_control(struct flexcop_device *fc,
73*4882a593Smuzhiyun 		flexcop_dma_index_t dma_idx,
74*4882a593Smuzhiyun 		flexcop_dma_addr_index_t index,
75*4882a593Smuzhiyun 		int onoff)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun 	flexcop_ibi_value v0x0, v0xc;
78*4882a593Smuzhiyun 	flexcop_ibi_register r0x0, r0xc;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	if ((dma_idx & FC_DMA_1) == dma_idx) {
81*4882a593Smuzhiyun 		r0x0 = dma1_000;
82*4882a593Smuzhiyun 		r0xc = dma1_00c;
83*4882a593Smuzhiyun 	} else if ((dma_idx & FC_DMA_2) == dma_idx) {
84*4882a593Smuzhiyun 		r0x0 = dma2_010;
85*4882a593Smuzhiyun 		r0xc = dma2_01c;
86*4882a593Smuzhiyun 	} else {
87*4882a593Smuzhiyun 		err("transfer DMA1 or DMA2 can be started within one %s call.",
88*4882a593Smuzhiyun 			__func__);
89*4882a593Smuzhiyun 		return -EINVAL;
90*4882a593Smuzhiyun 	}
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	v0x0 = fc->read_ibi_reg(fc, r0x0);
93*4882a593Smuzhiyun 	v0xc = fc->read_ibi_reg(fc, r0xc);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	deb_rdump("reg: %03x: %x\n", r0x0, v0x0.raw);
96*4882a593Smuzhiyun 	deb_rdump("reg: %03x: %x\n", r0xc, v0xc.raw);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	if (index & FC_DMA_SUBADDR_0)
99*4882a593Smuzhiyun 		v0x0.dma_0x0.dma_0start = onoff;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	if (index & FC_DMA_SUBADDR_1)
102*4882a593Smuzhiyun 		v0xc.dma_0xc.dma_1start = onoff;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	fc->write_ibi_reg(fc, r0x0, v0x0);
105*4882a593Smuzhiyun 	fc->write_ibi_reg(fc, r0xc, v0xc);
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	deb_rdump("reg: %03x: %x\n", r0x0, v0x0.raw);
108*4882a593Smuzhiyun 	deb_rdump("reg: %03x: %x\n", r0xc, v0xc.raw);
109*4882a593Smuzhiyun 	return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun EXPORT_SYMBOL(flexcop_dma_xfer_control);
112*4882a593Smuzhiyun 
flexcop_dma_remap(struct flexcop_device * fc,flexcop_dma_index_t dma_idx,int onoff)113*4882a593Smuzhiyun static int flexcop_dma_remap(struct flexcop_device *fc,
114*4882a593Smuzhiyun 		flexcop_dma_index_t dma_idx,
115*4882a593Smuzhiyun 		int onoff)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_00c : dma2_01c;
118*4882a593Smuzhiyun 	flexcop_ibi_value v = fc->read_ibi_reg(fc, r);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	deb_info("%s\n", __func__);
121*4882a593Smuzhiyun 	v.dma_0xc.remap_enable = onoff;
122*4882a593Smuzhiyun 	fc->write_ibi_reg(fc, r, v);
123*4882a593Smuzhiyun 	return 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun 
flexcop_dma_control_size_irq(struct flexcop_device * fc,flexcop_dma_index_t no,int onoff)126*4882a593Smuzhiyun int flexcop_dma_control_size_irq(struct flexcop_device *fc,
127*4882a593Smuzhiyun 		flexcop_dma_index_t no,
128*4882a593Smuzhiyun 		int onoff)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	flexcop_ibi_value v = fc->read_ibi_reg(fc, ctrl_208);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	if (no & FC_DMA_1)
133*4882a593Smuzhiyun 		v.ctrl_208.DMA1_IRQ_Enable_sig = onoff;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	if (no & FC_DMA_2)
136*4882a593Smuzhiyun 		v.ctrl_208.DMA2_IRQ_Enable_sig = onoff;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	fc->write_ibi_reg(fc, ctrl_208, v);
139*4882a593Smuzhiyun 	return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun EXPORT_SYMBOL(flexcop_dma_control_size_irq);
142*4882a593Smuzhiyun 
flexcop_dma_control_timer_irq(struct flexcop_device * fc,flexcop_dma_index_t no,int onoff)143*4882a593Smuzhiyun int flexcop_dma_control_timer_irq(struct flexcop_device *fc,
144*4882a593Smuzhiyun 		flexcop_dma_index_t no,
145*4882a593Smuzhiyun 		int onoff)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	flexcop_ibi_value v = fc->read_ibi_reg(fc, ctrl_208);
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	if (no & FC_DMA_1)
150*4882a593Smuzhiyun 		v.ctrl_208.DMA1_Timer_Enable_sig = onoff;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if (no & FC_DMA_2)
153*4882a593Smuzhiyun 		v.ctrl_208.DMA2_Timer_Enable_sig = onoff;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	fc->write_ibi_reg(fc, ctrl_208, v);
156*4882a593Smuzhiyun 	return 0;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun EXPORT_SYMBOL(flexcop_dma_control_timer_irq);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun /* 1 cycles = 1.97 msec */
flexcop_dma_config_timer(struct flexcop_device * fc,flexcop_dma_index_t dma_idx,u8 cycles)161*4882a593Smuzhiyun int flexcop_dma_config_timer(struct flexcop_device *fc,
162*4882a593Smuzhiyun 		flexcop_dma_index_t dma_idx, u8 cycles)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014;
165*4882a593Smuzhiyun 	flexcop_ibi_value v = fc->read_ibi_reg(fc, r);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	flexcop_dma_remap(fc, dma_idx, 0);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	deb_info("%s\n", __func__);
170*4882a593Smuzhiyun 	v.dma_0x4_write.dmatimer = cycles;
171*4882a593Smuzhiyun 	fc->write_ibi_reg(fc, r, v);
172*4882a593Smuzhiyun 	return 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun EXPORT_SYMBOL(flexcop_dma_config_timer);
175*4882a593Smuzhiyun 
176