1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2005-2006 Micronas USA Inc.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/module.h>
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/i2c.h>
9*4882a593Smuzhiyun #include <linux/videodev2.h>
10*4882a593Smuzhiyun #include <linux/ioctl.h>
11*4882a593Smuzhiyun #include <media/v4l2-device.h>
12*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun MODULE_DESCRIPTION("TW9903 I2C subdev driver");
16*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /*
19*4882a593Smuzhiyun * This driver is based on the wis-tw9903.c source that was in
20*4882a593Smuzhiyun * drivers/staging/media/go7007. That source had commented out code for
21*4882a593Smuzhiyun * saturation and scaling (neither seemed to work). If anyone ever gets
22*4882a593Smuzhiyun * hardware to test this driver, then that code might be useful to look at.
23*4882a593Smuzhiyun * You need to get the kernel sources of, say, kernel 3.8 where that
24*4882a593Smuzhiyun * wis-tw9903 driver is still present.
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct tw9903 {
28*4882a593Smuzhiyun struct v4l2_subdev sd;
29*4882a593Smuzhiyun struct v4l2_ctrl_handler hdl;
30*4882a593Smuzhiyun v4l2_std_id norm;
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
to_state(struct v4l2_subdev * sd)33*4882a593Smuzhiyun static inline struct tw9903 *to_state(struct v4l2_subdev *sd)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun return container_of(sd, struct tw9903, sd);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static const u8 initial_registers[] = {
39*4882a593Smuzhiyun 0x02, 0x44, /* input 1, composite */
40*4882a593Smuzhiyun 0x03, 0x92, /* correct digital format */
41*4882a593Smuzhiyun 0x04, 0x00,
42*4882a593Smuzhiyun 0x05, 0x80, /* or 0x00 for PAL */
43*4882a593Smuzhiyun 0x06, 0x40, /* second internal current reference */
44*4882a593Smuzhiyun 0x07, 0x02, /* window */
45*4882a593Smuzhiyun 0x08, 0x14, /* window */
46*4882a593Smuzhiyun 0x09, 0xf0, /* window */
47*4882a593Smuzhiyun 0x0a, 0x81, /* window */
48*4882a593Smuzhiyun 0x0b, 0xd0, /* window */
49*4882a593Smuzhiyun 0x0c, 0x8c,
50*4882a593Smuzhiyun 0x0d, 0x00, /* scaling */
51*4882a593Smuzhiyun 0x0e, 0x11, /* scaling */
52*4882a593Smuzhiyun 0x0f, 0x00, /* scaling */
53*4882a593Smuzhiyun 0x10, 0x00, /* brightness */
54*4882a593Smuzhiyun 0x11, 0x60, /* contrast */
55*4882a593Smuzhiyun 0x12, 0x01, /* sharpness */
56*4882a593Smuzhiyun 0x13, 0x7f, /* U gain */
57*4882a593Smuzhiyun 0x14, 0x5a, /* V gain */
58*4882a593Smuzhiyun 0x15, 0x00, /* hue */
59*4882a593Smuzhiyun 0x16, 0xc3, /* sharpness */
60*4882a593Smuzhiyun 0x18, 0x00,
61*4882a593Smuzhiyun 0x19, 0x58, /* vbi */
62*4882a593Smuzhiyun 0x1a, 0x80,
63*4882a593Smuzhiyun 0x1c, 0x0f, /* video norm */
64*4882a593Smuzhiyun 0x1d, 0x7f, /* video norm */
65*4882a593Smuzhiyun 0x20, 0xa0, /* clamping gain (working 0x50) */
66*4882a593Smuzhiyun 0x21, 0x22,
67*4882a593Smuzhiyun 0x22, 0xf0,
68*4882a593Smuzhiyun 0x23, 0xfe,
69*4882a593Smuzhiyun 0x24, 0x3c,
70*4882a593Smuzhiyun 0x25, 0x38,
71*4882a593Smuzhiyun 0x26, 0x44,
72*4882a593Smuzhiyun 0x27, 0x20,
73*4882a593Smuzhiyun 0x28, 0x00,
74*4882a593Smuzhiyun 0x29, 0x15,
75*4882a593Smuzhiyun 0x2a, 0xa0,
76*4882a593Smuzhiyun 0x2b, 0x44,
77*4882a593Smuzhiyun 0x2c, 0x37,
78*4882a593Smuzhiyun 0x2d, 0x00,
79*4882a593Smuzhiyun 0x2e, 0xa5, /* burst PLL control (working: a9) */
80*4882a593Smuzhiyun 0x2f, 0xe0, /* 0xea is blue test frame -- 0xe0 for normal */
81*4882a593Smuzhiyun 0x31, 0x00,
82*4882a593Smuzhiyun 0x33, 0x22,
83*4882a593Smuzhiyun 0x34, 0x11,
84*4882a593Smuzhiyun 0x35, 0x35,
85*4882a593Smuzhiyun 0x3b, 0x05,
86*4882a593Smuzhiyun 0x06, 0xc0, /* reset device */
87*4882a593Smuzhiyun 0x00, 0x00, /* Terminator (reg 0x00 is read-only) */
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun
write_reg(struct v4l2_subdev * sd,u8 reg,u8 value)90*4882a593Smuzhiyun static int write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun return i2c_smbus_write_byte_data(client, reg, value);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
write_regs(struct v4l2_subdev * sd,const u8 * regs)97*4882a593Smuzhiyun static int write_regs(struct v4l2_subdev *sd, const u8 *regs)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun int i;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun for (i = 0; regs[i] != 0x00; i += 2)
102*4882a593Smuzhiyun if (write_reg(sd, regs[i], regs[i + 1]) < 0)
103*4882a593Smuzhiyun return -1;
104*4882a593Smuzhiyun return 0;
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
tw9903_s_video_routing(struct v4l2_subdev * sd,u32 input,u32 output,u32 config)107*4882a593Smuzhiyun static int tw9903_s_video_routing(struct v4l2_subdev *sd, u32 input,
108*4882a593Smuzhiyun u32 output, u32 config)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun write_reg(sd, 0x02, 0x40 | (input << 1));
111*4882a593Smuzhiyun return 0;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
tw9903_s_std(struct v4l2_subdev * sd,v4l2_std_id norm)114*4882a593Smuzhiyun static int tw9903_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun struct tw9903 *dec = to_state(sd);
117*4882a593Smuzhiyun bool is_60hz = norm & V4L2_STD_525_60;
118*4882a593Smuzhiyun static const u8 config_60hz[] = {
119*4882a593Smuzhiyun 0x05, 0x80,
120*4882a593Smuzhiyun 0x07, 0x02,
121*4882a593Smuzhiyun 0x08, 0x14,
122*4882a593Smuzhiyun 0x09, 0xf0,
123*4882a593Smuzhiyun 0, 0,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun static const u8 config_50hz[] = {
126*4882a593Smuzhiyun 0x05, 0x00,
127*4882a593Smuzhiyun 0x07, 0x12,
128*4882a593Smuzhiyun 0x08, 0x18,
129*4882a593Smuzhiyun 0x09, 0x20,
130*4882a593Smuzhiyun 0, 0,
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun write_regs(sd, is_60hz ? config_60hz : config_50hz);
134*4882a593Smuzhiyun dec->norm = norm;
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun
tw9903_s_ctrl(struct v4l2_ctrl * ctrl)139*4882a593Smuzhiyun static int tw9903_s_ctrl(struct v4l2_ctrl *ctrl)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct tw9903 *dec = container_of(ctrl->handler, struct tw9903, hdl);
142*4882a593Smuzhiyun struct v4l2_subdev *sd = &dec->sd;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun switch (ctrl->id) {
145*4882a593Smuzhiyun case V4L2_CID_BRIGHTNESS:
146*4882a593Smuzhiyun write_reg(sd, 0x10, ctrl->val);
147*4882a593Smuzhiyun break;
148*4882a593Smuzhiyun case V4L2_CID_CONTRAST:
149*4882a593Smuzhiyun write_reg(sd, 0x11, ctrl->val);
150*4882a593Smuzhiyun break;
151*4882a593Smuzhiyun case V4L2_CID_HUE:
152*4882a593Smuzhiyun write_reg(sd, 0x15, ctrl->val);
153*4882a593Smuzhiyun break;
154*4882a593Smuzhiyun default:
155*4882a593Smuzhiyun return -EINVAL;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun return 0;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
tw9903_log_status(struct v4l2_subdev * sd)160*4882a593Smuzhiyun static int tw9903_log_status(struct v4l2_subdev *sd)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun struct tw9903 *dec = to_state(sd);
163*4882a593Smuzhiyun bool is_60hz = dec->norm & V4L2_STD_525_60;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun v4l2_info(sd, "Standard: %d Hz\n", is_60hz ? 60 : 50);
166*4882a593Smuzhiyun v4l2_ctrl_subdev_log_status(sd);
167*4882a593Smuzhiyun return 0;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun /* --------------------------------------------------------------------------*/
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun static const struct v4l2_ctrl_ops tw9903_ctrl_ops = {
173*4882a593Smuzhiyun .s_ctrl = tw9903_s_ctrl,
174*4882a593Smuzhiyun };
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops tw9903_core_ops = {
177*4882a593Smuzhiyun .log_status = tw9903_log_status,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops tw9903_video_ops = {
181*4882a593Smuzhiyun .s_std = tw9903_s_std,
182*4882a593Smuzhiyun .s_routing = tw9903_s_video_routing,
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun static const struct v4l2_subdev_ops tw9903_ops = {
186*4882a593Smuzhiyun .core = &tw9903_core_ops,
187*4882a593Smuzhiyun .video = &tw9903_video_ops,
188*4882a593Smuzhiyun };
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* --------------------------------------------------------------------------*/
191*4882a593Smuzhiyun
tw9903_probe(struct i2c_client * client,const struct i2c_device_id * id)192*4882a593Smuzhiyun static int tw9903_probe(struct i2c_client *client,
193*4882a593Smuzhiyun const struct i2c_device_id *id)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun struct tw9903 *dec;
196*4882a593Smuzhiyun struct v4l2_subdev *sd;
197*4882a593Smuzhiyun struct v4l2_ctrl_handler *hdl;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* Check if the adapter supports the needed features */
200*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
201*4882a593Smuzhiyun return -EIO;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun v4l_info(client, "chip found @ 0x%02x (%s)\n",
204*4882a593Smuzhiyun client->addr << 1, client->adapter->name);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun dec = devm_kzalloc(&client->dev, sizeof(*dec), GFP_KERNEL);
207*4882a593Smuzhiyun if (dec == NULL)
208*4882a593Smuzhiyun return -ENOMEM;
209*4882a593Smuzhiyun sd = &dec->sd;
210*4882a593Smuzhiyun v4l2_i2c_subdev_init(sd, client, &tw9903_ops);
211*4882a593Smuzhiyun hdl = &dec->hdl;
212*4882a593Smuzhiyun v4l2_ctrl_handler_init(hdl, 4);
213*4882a593Smuzhiyun v4l2_ctrl_new_std(hdl, &tw9903_ctrl_ops,
214*4882a593Smuzhiyun V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
215*4882a593Smuzhiyun v4l2_ctrl_new_std(hdl, &tw9903_ctrl_ops,
216*4882a593Smuzhiyun V4L2_CID_CONTRAST, 0, 255, 1, 0x60);
217*4882a593Smuzhiyun v4l2_ctrl_new_std(hdl, &tw9903_ctrl_ops,
218*4882a593Smuzhiyun V4L2_CID_HUE, -128, 127, 1, 0);
219*4882a593Smuzhiyun sd->ctrl_handler = hdl;
220*4882a593Smuzhiyun if (hdl->error) {
221*4882a593Smuzhiyun int err = hdl->error;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun v4l2_ctrl_handler_free(hdl);
224*4882a593Smuzhiyun return err;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun /* Initialize tw9903 */
228*4882a593Smuzhiyun dec->norm = V4L2_STD_NTSC;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (write_regs(sd, initial_registers) < 0) {
231*4882a593Smuzhiyun v4l2_err(client, "error initializing TW9903\n");
232*4882a593Smuzhiyun return -EINVAL;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun return 0;
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
tw9903_remove(struct i2c_client * client)238*4882a593Smuzhiyun static int tw9903_remove(struct i2c_client *client)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun struct v4l2_subdev *sd = i2c_get_clientdata(client);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun v4l2_device_unregister_subdev(sd);
243*4882a593Smuzhiyun v4l2_ctrl_handler_free(&to_state(sd)->hdl);
244*4882a593Smuzhiyun return 0;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun static const struct i2c_device_id tw9903_id[] = {
250*4882a593Smuzhiyun { "tw9903", 0 },
251*4882a593Smuzhiyun { }
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tw9903_id);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun static struct i2c_driver tw9903_driver = {
256*4882a593Smuzhiyun .driver = {
257*4882a593Smuzhiyun .name = "tw9903",
258*4882a593Smuzhiyun },
259*4882a593Smuzhiyun .probe = tw9903_probe,
260*4882a593Smuzhiyun .remove = tw9903_remove,
261*4882a593Smuzhiyun .id_table = tw9903_id,
262*4882a593Smuzhiyun };
263*4882a593Smuzhiyun module_i2c_driver(tw9903_driver);
264