xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/tvp5150.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // tvp5150 - Texas Instruments TVP5150A/AM1 and TVP5151 video decoder driver
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (c) 2005,2006 Mauro Carvalho Chehab <mchehab@kernel.org>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <dt-bindings/media/tvp5150.h>
8*4882a593Smuzhiyun #include <linux/i2c.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <linux/videodev2.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/of_graph.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <media/v4l2-async.h>
19*4882a593Smuzhiyun #include <media/v4l2-device.h>
20*4882a593Smuzhiyun #include <media/v4l2-event.h>
21*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
22*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
23*4882a593Smuzhiyun #include <media/v4l2-mc.h>
24*4882a593Smuzhiyun #include <media/v4l2-rect.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include "tvp5150_reg.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define TVP5150_H_MAX		720U
29*4882a593Smuzhiyun #define TVP5150_V_MAX_525_60	480U
30*4882a593Smuzhiyun #define TVP5150_V_MAX_OTHERS	576U
31*4882a593Smuzhiyun #define TVP5150_MAX_CROP_LEFT	511
32*4882a593Smuzhiyun #define TVP5150_MAX_CROP_TOP	127
33*4882a593Smuzhiyun #define TVP5150_CROP_SHIFT	2
34*4882a593Smuzhiyun #define TVP5150_MBUS_FMT	MEDIA_BUS_FMT_UYVY8_2X8
35*4882a593Smuzhiyun #define TVP5150_FIELD		V4L2_FIELD_ALTERNATE
36*4882a593Smuzhiyun #define TVP5150_COLORSPACE	V4L2_COLORSPACE_SMPTE170M
37*4882a593Smuzhiyun #define TVP5150_STD_MASK	(V4L2_STD_NTSC     | \
38*4882a593Smuzhiyun 				 V4L2_STD_NTSC_443 | \
39*4882a593Smuzhiyun 				 V4L2_STD_PAL      | \
40*4882a593Smuzhiyun 				 V4L2_STD_PAL_M    | \
41*4882a593Smuzhiyun 				 V4L2_STD_PAL_N    | \
42*4882a593Smuzhiyun 				 V4L2_STD_PAL_Nc   | \
43*4882a593Smuzhiyun 				 V4L2_STD_SECAM)
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #define TVP5150_MAX_CONNECTORS	3 /* Check dt-bindings for more information */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun MODULE_DESCRIPTION("Texas Instruments TVP5150A/TVP5150AM1/TVP5151 video decoder driver");
48*4882a593Smuzhiyun MODULE_AUTHOR("Mauro Carvalho Chehab");
49*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun static int debug;
53*4882a593Smuzhiyun module_param(debug, int, 0644);
54*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Debug level (0-2)");
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define dprintk0(__dev, __arg...) dev_dbg_lvl(__dev, 0, 0, __arg)
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun enum tvp5150_pads {
59*4882a593Smuzhiyun 	TVP5150_PAD_AIP1A,
60*4882a593Smuzhiyun 	TVP5150_PAD_AIP1B,
61*4882a593Smuzhiyun 	TVP5150_PAD_VID_OUT,
62*4882a593Smuzhiyun 	TVP5150_NUM_PADS
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun struct tvp5150_connector {
66*4882a593Smuzhiyun 	struct v4l2_fwnode_connector base;
67*4882a593Smuzhiyun 	struct media_entity ent;
68*4882a593Smuzhiyun 	struct media_pad pad;
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun struct tvp5150 {
72*4882a593Smuzhiyun 	struct v4l2_subdev sd;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	struct media_pad pads[TVP5150_NUM_PADS];
75*4882a593Smuzhiyun 	struct tvp5150_connector connectors[TVP5150_MAX_CONNECTORS];
76*4882a593Smuzhiyun 	struct tvp5150_connector *cur_connector;
77*4882a593Smuzhiyun 	unsigned int connectors_num;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	struct v4l2_ctrl_handler hdl;
80*4882a593Smuzhiyun 	struct v4l2_rect rect;
81*4882a593Smuzhiyun 	struct regmap *regmap;
82*4882a593Smuzhiyun 	int irq;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	v4l2_std_id norm;	/* Current set standard */
85*4882a593Smuzhiyun 	v4l2_std_id detected_norm;
86*4882a593Smuzhiyun 	u32 input;
87*4882a593Smuzhiyun 	u32 output;
88*4882a593Smuzhiyun 	u32 oe;
89*4882a593Smuzhiyun 	int enable;
90*4882a593Smuzhiyun 	bool lock;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	u16 dev_id;
93*4882a593Smuzhiyun 	u16 rom_ver;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	enum v4l2_mbus_type mbus_type;
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun 
to_tvp5150(struct v4l2_subdev * sd)98*4882a593Smuzhiyun static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	return container_of(sd, struct tvp5150, sd);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
to_sd(struct v4l2_ctrl * ctrl)103*4882a593Smuzhiyun static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	return &container_of(ctrl->handler, struct tvp5150, hdl)->sd;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
tvp5150_read(struct v4l2_subdev * sd,unsigned char addr)108*4882a593Smuzhiyun static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
111*4882a593Smuzhiyun 	int ret, val;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	ret = regmap_read(decoder->regmap, addr, &val);
114*4882a593Smuzhiyun 	if (ret < 0)
115*4882a593Smuzhiyun 		return ret;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	return val;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
dump_reg_range(struct v4l2_subdev * sd,char * s,u8 init,const u8 end,int max_line)120*4882a593Smuzhiyun static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init,
121*4882a593Smuzhiyun 				const u8 end, int max_line)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	u8 buf[16];
124*4882a593Smuzhiyun 	int i = 0, j, len;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	if (max_line > 16) {
127*4882a593Smuzhiyun 		dprintk0(sd->dev, "too much data to dump\n");
128*4882a593Smuzhiyun 		return;
129*4882a593Smuzhiyun 	}
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	for (i = init; i < end; i += max_line) {
132*4882a593Smuzhiyun 		len = (end - i > max_line) ? max_line : end - i;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 		for (j = 0; j < len; j++)
135*4882a593Smuzhiyun 			buf[j] = tvp5150_read(sd, i + j);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 		dprintk0(sd->dev, "%s reg %02x = %*ph\n", s, i, len, buf);
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun 
tvp5150_log_status(struct v4l2_subdev * sd)141*4882a593Smuzhiyun static int tvp5150_log_status(struct v4l2_subdev *sd)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Video input source selection #1 = 0x%02x\n",
144*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1));
145*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Analog channel controls = 0x%02x\n",
146*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_ANAL_CHL_CTL));
147*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Operation mode controls = 0x%02x\n",
148*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_OP_MODE_CTL));
149*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Miscellaneous controls = 0x%02x\n",
150*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_MISC_CTL));
151*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Autoswitch mask= 0x%02x\n",
152*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_AUTOSW_MSK));
153*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Color killer threshold control = 0x%02x\n",
154*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL));
155*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
156*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1),
157*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2),
158*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3));
159*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Brightness control = 0x%02x\n",
160*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_BRIGHT_CTL));
161*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Color saturation control = 0x%02x\n",
162*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_SATURATION_CTL));
163*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Hue control = 0x%02x\n",
164*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_HUE_CTL));
165*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Contrast control = 0x%02x\n",
166*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_CONTRAST_CTL));
167*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Outputs and data rates select = 0x%02x\n",
168*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_DATA_RATE_SEL));
169*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Configuration shared pins = 0x%02x\n",
170*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_CONF_SHARED_PIN));
171*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Active video cropping start = 0x%02x%02x\n",
172*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB),
173*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB));
174*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Active video cropping stop  = 0x%02x%02x\n",
175*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB),
176*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB));
177*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Genlock/RTC = 0x%02x\n",
178*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_GENLOCK));
179*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Horizontal sync start = 0x%02x\n",
180*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_HORIZ_SYNC_START));
181*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Vertical blanking start = 0x%02x\n",
182*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_VERT_BLANKING_START));
183*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Vertical blanking stop = 0x%02x\n",
184*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP));
185*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
186*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1),
187*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2));
188*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt reset register B = 0x%02x\n",
189*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INT_RESET_REG_B));
190*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt enable register B = 0x%02x\n",
191*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B));
192*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt configuration register B = 0x%02x\n",
193*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B));
194*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Video standard = 0x%02x\n",
195*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_VIDEO_STD));
196*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
197*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_CB_GAIN_FACT),
198*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR));
199*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Macrovision on counter = 0x%02x\n",
200*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR));
201*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Macrovision off counter = 0x%02x\n",
202*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR));
203*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
204*4882a593Smuzhiyun 		(tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4);
205*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Device ID = %02x%02x\n",
206*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_MSB_DEV_ID),
207*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_LSB_DEV_ID));
208*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: ROM version = (hex) %02x.%02x\n",
209*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_ROM_MAJOR_VER),
210*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_ROM_MINOR_VER));
211*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Vertical line count = 0x%02x%02x\n",
212*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB),
213*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB));
214*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt status register B = 0x%02x\n",
215*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INT_STATUS_REG_B));
216*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt active register B = 0x%02x\n",
217*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B));
218*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
219*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_STATUS_REG_1),
220*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_STATUS_REG_2),
221*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_STATUS_REG_3),
222*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_STATUS_REG_4),
223*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_STATUS_REG_5));
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	dump_reg_range(sd, "Teletext filter 1",   TVP5150_TELETEXT_FIL1_INI,
226*4882a593Smuzhiyun 			TVP5150_TELETEXT_FIL1_END, 8);
227*4882a593Smuzhiyun 	dump_reg_range(sd, "Teletext filter 2",   TVP5150_TELETEXT_FIL2_INI,
228*4882a593Smuzhiyun 			TVP5150_TELETEXT_FIL2_END, 8);
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Teletext filter enable = 0x%02x\n",
231*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA));
232*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt status register A = 0x%02x\n",
233*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INT_STATUS_REG_A));
234*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt enable register A = 0x%02x\n",
235*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A));
236*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Interrupt configuration = 0x%02x\n",
237*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_INT_CONF));
238*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: VDP status register = 0x%02x\n",
239*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_VDP_STATUS_REG));
240*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: FIFO word count = 0x%02x\n",
241*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT));
242*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: FIFO interrupt threshold = 0x%02x\n",
243*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD));
244*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: FIFO reset = 0x%02x\n",
245*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_FIFO_RESET));
246*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Line number interrupt = 0x%02x\n",
247*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_LINE_NUMBER_INT));
248*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Pixel alignment register = 0x%02x%02x\n",
249*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH),
250*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW));
251*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: FIFO output control = 0x%02x\n",
252*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL));
253*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Full field enable = 0x%02x\n",
254*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_FULL_FIELD_ENA));
255*4882a593Smuzhiyun 	dprintk0(sd->dev, "tvp5150: Full field mode register = 0x%02x\n",
256*4882a593Smuzhiyun 		tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG));
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	dump_reg_range(sd, "CC   data",   TVP5150_CC_DATA_INI,
259*4882a593Smuzhiyun 			TVP5150_CC_DATA_END, 8);
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	dump_reg_range(sd, "WSS  data",   TVP5150_WSS_DATA_INI,
262*4882a593Smuzhiyun 			TVP5150_WSS_DATA_END, 8);
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	dump_reg_range(sd, "VPS  data",   TVP5150_VPS_DATA_INI,
265*4882a593Smuzhiyun 			TVP5150_VPS_DATA_END, 8);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	dump_reg_range(sd, "VITC data",   TVP5150_VITC_DATA_INI,
268*4882a593Smuzhiyun 			TVP5150_VITC_DATA_END, 10);
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	dump_reg_range(sd, "Line mode",   TVP5150_LINE_MODE_INI,
271*4882a593Smuzhiyun 			TVP5150_LINE_MODE_END, 8);
272*4882a593Smuzhiyun 	return 0;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun /****************************************************************************
276*4882a593Smuzhiyun 			Basic functions
277*4882a593Smuzhiyun  ****************************************************************************/
278*4882a593Smuzhiyun 
tvp5150_selmux(struct v4l2_subdev * sd)279*4882a593Smuzhiyun static void tvp5150_selmux(struct v4l2_subdev *sd)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun 	int opmode = 0;
282*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
283*4882a593Smuzhiyun 	unsigned int mask, val;
284*4882a593Smuzhiyun 	int input = 0;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	/* Only tvp5150am1 and tvp5151 have signal generator support */
287*4882a593Smuzhiyun 	if ((decoder->dev_id == 0x5150 && decoder->rom_ver == 0x0400) ||
288*4882a593Smuzhiyun 	    (decoder->dev_id == 0x5151 && decoder->rom_ver == 0x0100)) {
289*4882a593Smuzhiyun 		if (!decoder->enable)
290*4882a593Smuzhiyun 			input = 8;
291*4882a593Smuzhiyun 	}
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	switch (decoder->input) {
294*4882a593Smuzhiyun 	case TVP5150_COMPOSITE1:
295*4882a593Smuzhiyun 		input |= 2;
296*4882a593Smuzhiyun 		fallthrough;
297*4882a593Smuzhiyun 	case TVP5150_COMPOSITE0:
298*4882a593Smuzhiyun 		break;
299*4882a593Smuzhiyun 	case TVP5150_SVIDEO:
300*4882a593Smuzhiyun 	default:
301*4882a593Smuzhiyun 		input |= 1;
302*4882a593Smuzhiyun 		break;
303*4882a593Smuzhiyun 	}
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	dev_dbg_lvl(sd->dev, 1, debug,
306*4882a593Smuzhiyun 		    "Selecting video route: route input=%s, output=%s => tvp5150 input=0x%02x, opmode=0x%02x\n",
307*4882a593Smuzhiyun 		    decoder->input == 0 ? "aip1a" :
308*4882a593Smuzhiyun 		    decoder->input == 2 ? "aip1b" : "svideo",
309*4882a593Smuzhiyun 		    decoder->output == 0 ? "normal" : "black-frame-gen",
310*4882a593Smuzhiyun 		    input, opmode);
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_OP_MODE_CTL, opmode);
313*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_VD_IN_SRC_SEL_1, input);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	/*
316*4882a593Smuzhiyun 	 * Setup the FID/GLCO/VLK/HVLK and INTREQ/GPCL/VBLK output signals. For
317*4882a593Smuzhiyun 	 * S-Video we output the vertical lock (VLK) signal on FID/GLCO/VLK/HVLK
318*4882a593Smuzhiyun 	 * and set INTREQ/GPCL/VBLK to logic 0. For composite we output the
319*4882a593Smuzhiyun 	 * field indicator (FID) signal on FID/GLCO/VLK/HVLK and set
320*4882a593Smuzhiyun 	 * INTREQ/GPCL/VBLK to logic 1.
321*4882a593Smuzhiyun 	 */
322*4882a593Smuzhiyun 	mask = TVP5150_MISC_CTL_GPCL | TVP5150_MISC_CTL_HVLK;
323*4882a593Smuzhiyun 	if (decoder->input == TVP5150_SVIDEO)
324*4882a593Smuzhiyun 		val = TVP5150_MISC_CTL_HVLK;
325*4882a593Smuzhiyun 	else
326*4882a593Smuzhiyun 		val = TVP5150_MISC_CTL_GPCL;
327*4882a593Smuzhiyun 	regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val);
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun struct i2c_reg_value {
331*4882a593Smuzhiyun 	unsigned char reg;
332*4882a593Smuzhiyun 	unsigned char value;
333*4882a593Smuzhiyun };
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun /* Default values as sugested at TVP5150AM1 datasheet */
336*4882a593Smuzhiyun static const struct i2c_reg_value tvp5150_init_default[] = {
337*4882a593Smuzhiyun 	{ /* 0x00 */
338*4882a593Smuzhiyun 		TVP5150_VD_IN_SRC_SEL_1, 0x00
339*4882a593Smuzhiyun 	},
340*4882a593Smuzhiyun 	{ /* 0x01 */
341*4882a593Smuzhiyun 		TVP5150_ANAL_CHL_CTL, 0x15
342*4882a593Smuzhiyun 	},
343*4882a593Smuzhiyun 	{ /* 0x02 */
344*4882a593Smuzhiyun 		TVP5150_OP_MODE_CTL, 0x00
345*4882a593Smuzhiyun 	},
346*4882a593Smuzhiyun 	{ /* 0x03 */
347*4882a593Smuzhiyun 		TVP5150_MISC_CTL, 0x01
348*4882a593Smuzhiyun 	},
349*4882a593Smuzhiyun 	{ /* 0x06 */
350*4882a593Smuzhiyun 		TVP5150_COLOR_KIL_THSH_CTL, 0x10
351*4882a593Smuzhiyun 	},
352*4882a593Smuzhiyun 	{ /* 0x07 */
353*4882a593Smuzhiyun 		TVP5150_LUMA_PROC_CTL_1, 0x60
354*4882a593Smuzhiyun 	},
355*4882a593Smuzhiyun 	{ /* 0x08 */
356*4882a593Smuzhiyun 		TVP5150_LUMA_PROC_CTL_2, 0x00
357*4882a593Smuzhiyun 	},
358*4882a593Smuzhiyun 	{ /* 0x09 */
359*4882a593Smuzhiyun 		TVP5150_BRIGHT_CTL, 0x80
360*4882a593Smuzhiyun 	},
361*4882a593Smuzhiyun 	{ /* 0x0a */
362*4882a593Smuzhiyun 		TVP5150_SATURATION_CTL, 0x80
363*4882a593Smuzhiyun 	},
364*4882a593Smuzhiyun 	{ /* 0x0b */
365*4882a593Smuzhiyun 		TVP5150_HUE_CTL, 0x00
366*4882a593Smuzhiyun 	},
367*4882a593Smuzhiyun 	{ /* 0x0c */
368*4882a593Smuzhiyun 		TVP5150_CONTRAST_CTL, 0x80
369*4882a593Smuzhiyun 	},
370*4882a593Smuzhiyun 	{ /* 0x0d */
371*4882a593Smuzhiyun 		TVP5150_DATA_RATE_SEL, 0x47
372*4882a593Smuzhiyun 	},
373*4882a593Smuzhiyun 	{ /* 0x0e */
374*4882a593Smuzhiyun 		TVP5150_LUMA_PROC_CTL_3, 0x00
375*4882a593Smuzhiyun 	},
376*4882a593Smuzhiyun 	{ /* 0x0f */
377*4882a593Smuzhiyun 		TVP5150_CONF_SHARED_PIN, 0x08
378*4882a593Smuzhiyun 	},
379*4882a593Smuzhiyun 	{ /* 0x11 */
380*4882a593Smuzhiyun 		TVP5150_ACT_VD_CROP_ST_MSB, 0x00
381*4882a593Smuzhiyun 	},
382*4882a593Smuzhiyun 	{ /* 0x12 */
383*4882a593Smuzhiyun 		TVP5150_ACT_VD_CROP_ST_LSB, 0x00
384*4882a593Smuzhiyun 	},
385*4882a593Smuzhiyun 	{ /* 0x13 */
386*4882a593Smuzhiyun 		TVP5150_ACT_VD_CROP_STP_MSB, 0x00
387*4882a593Smuzhiyun 	},
388*4882a593Smuzhiyun 	{ /* 0x14 */
389*4882a593Smuzhiyun 		TVP5150_ACT_VD_CROP_STP_LSB, 0x00
390*4882a593Smuzhiyun 	},
391*4882a593Smuzhiyun 	{ /* 0x15 */
392*4882a593Smuzhiyun 		TVP5150_GENLOCK, 0x01
393*4882a593Smuzhiyun 	},
394*4882a593Smuzhiyun 	{ /* 0x16 */
395*4882a593Smuzhiyun 		TVP5150_HORIZ_SYNC_START, 0x80
396*4882a593Smuzhiyun 	},
397*4882a593Smuzhiyun 	{ /* 0x18 */
398*4882a593Smuzhiyun 		TVP5150_VERT_BLANKING_START, 0x00
399*4882a593Smuzhiyun 	},
400*4882a593Smuzhiyun 	{ /* 0x19 */
401*4882a593Smuzhiyun 		TVP5150_VERT_BLANKING_STOP, 0x00
402*4882a593Smuzhiyun 	},
403*4882a593Smuzhiyun 	{ /* 0x1a */
404*4882a593Smuzhiyun 		TVP5150_CHROMA_PROC_CTL_1, 0x0c
405*4882a593Smuzhiyun 	},
406*4882a593Smuzhiyun 	{ /* 0x1b */
407*4882a593Smuzhiyun 		TVP5150_CHROMA_PROC_CTL_2, 0x14
408*4882a593Smuzhiyun 	},
409*4882a593Smuzhiyun 	{ /* 0x1c */
410*4882a593Smuzhiyun 		TVP5150_INT_RESET_REG_B, 0x00
411*4882a593Smuzhiyun 	},
412*4882a593Smuzhiyun 	{ /* 0x1d */
413*4882a593Smuzhiyun 		TVP5150_INT_ENABLE_REG_B, 0x00
414*4882a593Smuzhiyun 	},
415*4882a593Smuzhiyun 	{ /* 0x1e */
416*4882a593Smuzhiyun 		TVP5150_INTT_CONFIG_REG_B, 0x00
417*4882a593Smuzhiyun 	},
418*4882a593Smuzhiyun 	{ /* 0x28 */
419*4882a593Smuzhiyun 		TVP5150_VIDEO_STD, 0x00
420*4882a593Smuzhiyun 	},
421*4882a593Smuzhiyun 	{ /* 0x2e */
422*4882a593Smuzhiyun 		TVP5150_MACROVISION_ON_CTR, 0x0f
423*4882a593Smuzhiyun 	},
424*4882a593Smuzhiyun 	{ /* 0x2f */
425*4882a593Smuzhiyun 		TVP5150_MACROVISION_OFF_CTR, 0x01
426*4882a593Smuzhiyun 	},
427*4882a593Smuzhiyun 	{ /* 0xbb */
428*4882a593Smuzhiyun 		TVP5150_TELETEXT_FIL_ENA, 0x00
429*4882a593Smuzhiyun 	},
430*4882a593Smuzhiyun 	{ /* 0xc0 */
431*4882a593Smuzhiyun 		TVP5150_INT_STATUS_REG_A, 0x00
432*4882a593Smuzhiyun 	},
433*4882a593Smuzhiyun 	{ /* 0xc1 */
434*4882a593Smuzhiyun 		TVP5150_INT_ENABLE_REG_A, 0x00
435*4882a593Smuzhiyun 	},
436*4882a593Smuzhiyun 	{ /* 0xc2 */
437*4882a593Smuzhiyun 		TVP5150_INT_CONF, 0x04
438*4882a593Smuzhiyun 	},
439*4882a593Smuzhiyun 	{ /* 0xc8 */
440*4882a593Smuzhiyun 		TVP5150_FIFO_INT_THRESHOLD, 0x80
441*4882a593Smuzhiyun 	},
442*4882a593Smuzhiyun 	{ /* 0xc9 */
443*4882a593Smuzhiyun 		TVP5150_FIFO_RESET, 0x00
444*4882a593Smuzhiyun 	},
445*4882a593Smuzhiyun 	{ /* 0xca */
446*4882a593Smuzhiyun 		TVP5150_LINE_NUMBER_INT, 0x00
447*4882a593Smuzhiyun 	},
448*4882a593Smuzhiyun 	{ /* 0xcb */
449*4882a593Smuzhiyun 		TVP5150_PIX_ALIGN_REG_LOW, 0x4e
450*4882a593Smuzhiyun 	},
451*4882a593Smuzhiyun 	{ /* 0xcc */
452*4882a593Smuzhiyun 		TVP5150_PIX_ALIGN_REG_HIGH, 0x00
453*4882a593Smuzhiyun 	},
454*4882a593Smuzhiyun 	{ /* 0xcd */
455*4882a593Smuzhiyun 		TVP5150_FIFO_OUT_CTRL, 0x01
456*4882a593Smuzhiyun 	},
457*4882a593Smuzhiyun 	{ /* 0xcf */
458*4882a593Smuzhiyun 		TVP5150_FULL_FIELD_ENA, 0x00
459*4882a593Smuzhiyun 	},
460*4882a593Smuzhiyun 	{ /* 0xd0 */
461*4882a593Smuzhiyun 		TVP5150_LINE_MODE_INI, 0x00
462*4882a593Smuzhiyun 	},
463*4882a593Smuzhiyun 	{ /* 0xfc */
464*4882a593Smuzhiyun 		TVP5150_FULL_FIELD_MODE_REG, 0x7f
465*4882a593Smuzhiyun 	},
466*4882a593Smuzhiyun 	{ /* end of data */
467*4882a593Smuzhiyun 		0xff, 0xff
468*4882a593Smuzhiyun 	}
469*4882a593Smuzhiyun };
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun /* Default values as sugested at TVP5150AM1 datasheet */
472*4882a593Smuzhiyun static const struct i2c_reg_value tvp5150_init_enable[] = {
473*4882a593Smuzhiyun 	{	/* Automatic offset and AGC enabled */
474*4882a593Smuzhiyun 		TVP5150_ANAL_CHL_CTL, 0x15
475*4882a593Smuzhiyun 	}, {	/* Activate YCrCb output 0x9 or 0xd ? */
476*4882a593Smuzhiyun 		TVP5150_MISC_CTL, TVP5150_MISC_CTL_GPCL |
477*4882a593Smuzhiyun 				  TVP5150_MISC_CTL_INTREQ_OE |
478*4882a593Smuzhiyun 				  TVP5150_MISC_CTL_YCBCR_OE |
479*4882a593Smuzhiyun 				  TVP5150_MISC_CTL_SYNC_OE |
480*4882a593Smuzhiyun 				  TVP5150_MISC_CTL_VBLANK |
481*4882a593Smuzhiyun 				  TVP5150_MISC_CTL_CLOCK_OE,
482*4882a593Smuzhiyun 	}, {	/* Activates video std autodetection for all standards */
483*4882a593Smuzhiyun 		TVP5150_AUTOSW_MSK, 0x0
484*4882a593Smuzhiyun 	}, {	/* Default format: 0x47. For 4:2:2: 0x40 */
485*4882a593Smuzhiyun 		TVP5150_DATA_RATE_SEL, 0x47
486*4882a593Smuzhiyun 	}, {
487*4882a593Smuzhiyun 		TVP5150_CHROMA_PROC_CTL_1, 0x0c
488*4882a593Smuzhiyun 	}, {
489*4882a593Smuzhiyun 		TVP5150_CHROMA_PROC_CTL_2, 0x54
490*4882a593Smuzhiyun 	}, {	/* Non documented, but initialized on WinTV USB2 */
491*4882a593Smuzhiyun 		0x27, 0x20
492*4882a593Smuzhiyun 	}, {
493*4882a593Smuzhiyun 		0xff, 0xff
494*4882a593Smuzhiyun 	}
495*4882a593Smuzhiyun };
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun struct tvp5150_vbi_type {
498*4882a593Smuzhiyun 	unsigned int vbi_type;
499*4882a593Smuzhiyun 	unsigned int ini_line;
500*4882a593Smuzhiyun 	unsigned int end_line;
501*4882a593Smuzhiyun 	unsigned int by_field :1;
502*4882a593Smuzhiyun };
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun struct i2c_vbi_ram_value {
505*4882a593Smuzhiyun 	u16 reg;
506*4882a593Smuzhiyun 	struct tvp5150_vbi_type type;
507*4882a593Smuzhiyun 	unsigned char values[16];
508*4882a593Smuzhiyun };
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun /* This struct have the values for each supported VBI Standard
511*4882a593Smuzhiyun  * by
512*4882a593Smuzhiyun  tvp5150_vbi_types should follow the same order as vbi_ram_default
513*4882a593Smuzhiyun  * value 0 means rom position 0x10, value 1 means rom position 0x30
514*4882a593Smuzhiyun  * and so on. There are 16 possible locations from 0 to 15.
515*4882a593Smuzhiyun  */
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun static struct i2c_vbi_ram_value vbi_ram_default[] = {
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	/*
520*4882a593Smuzhiyun 	 * FIXME: Current api doesn't handle all VBI types, those not
521*4882a593Smuzhiyun 	 * yet supported are placed under #if 0
522*4882a593Smuzhiyun 	 */
523*4882a593Smuzhiyun #if 0
524*4882a593Smuzhiyun 	[0] = {0x010, /* Teletext, SECAM, WST System A */
525*4882a593Smuzhiyun 		{V4L2_SLICED_TELETEXT_SECAM, 6, 23, 1},
526*4882a593Smuzhiyun 		{ 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
527*4882a593Smuzhiyun 		  0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
528*4882a593Smuzhiyun 	},
529*4882a593Smuzhiyun #endif
530*4882a593Smuzhiyun 	[1] = {0x030, /* Teletext, PAL, WST System B */
531*4882a593Smuzhiyun 		{V4L2_SLICED_TELETEXT_B, 6, 22, 1},
532*4882a593Smuzhiyun 		{ 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
533*4882a593Smuzhiyun 		  0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
534*4882a593Smuzhiyun 	},
535*4882a593Smuzhiyun #if 0
536*4882a593Smuzhiyun 	[2] = {0x050, /* Teletext, PAL, WST System C */
537*4882a593Smuzhiyun 		{V4L2_SLICED_TELETEXT_PAL_C, 6, 22, 1},
538*4882a593Smuzhiyun 		{ 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
539*4882a593Smuzhiyun 		  0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
540*4882a593Smuzhiyun 	},
541*4882a593Smuzhiyun 	[3] = {0x070, /* Teletext, NTSC, WST System B */
542*4882a593Smuzhiyun 		{V4L2_SLICED_TELETEXT_NTSC_B, 10, 21, 1},
543*4882a593Smuzhiyun 		{ 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
544*4882a593Smuzhiyun 		  0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
545*4882a593Smuzhiyun 	},
546*4882a593Smuzhiyun 	[4] = {0x090, /* Tetetext, NTSC NABTS System C */
547*4882a593Smuzhiyun 		{V4L2_SLICED_TELETEXT_NTSC_C, 10, 21, 1},
548*4882a593Smuzhiyun 		{ 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
549*4882a593Smuzhiyun 		  0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
550*4882a593Smuzhiyun 	},
551*4882a593Smuzhiyun 	[5] = {0x0b0, /* Teletext, NTSC-J, NABTS System D */
552*4882a593Smuzhiyun 		{V4L2_SLICED_TELETEXT_NTSC_D, 10, 21, 1},
553*4882a593Smuzhiyun 		{ 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
554*4882a593Smuzhiyun 		  0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
555*4882a593Smuzhiyun 	},
556*4882a593Smuzhiyun 	[6] = {0x0d0, /* Closed Caption, PAL/SECAM */
557*4882a593Smuzhiyun 		{V4L2_SLICED_CAPTION_625, 22, 22, 1},
558*4882a593Smuzhiyun 		{ 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
559*4882a593Smuzhiyun 		  0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
560*4882a593Smuzhiyun 	},
561*4882a593Smuzhiyun #endif
562*4882a593Smuzhiyun 	[7] = {0x0f0, /* Closed Caption, NTSC */
563*4882a593Smuzhiyun 		{V4L2_SLICED_CAPTION_525, 21, 21, 1},
564*4882a593Smuzhiyun 		{ 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
565*4882a593Smuzhiyun 		  0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
566*4882a593Smuzhiyun 	},
567*4882a593Smuzhiyun 	[8] = {0x110, /* Wide Screen Signal, PAL/SECAM */
568*4882a593Smuzhiyun 		{V4L2_SLICED_WSS_625, 23, 23, 1},
569*4882a593Smuzhiyun 		{ 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
570*4882a593Smuzhiyun 		  0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
571*4882a593Smuzhiyun 	},
572*4882a593Smuzhiyun #if 0
573*4882a593Smuzhiyun 	[9] = {0x130, /* Wide Screen Signal, NTSC C */
574*4882a593Smuzhiyun 		{V4L2_SLICED_WSS_525, 20, 20, 1},
575*4882a593Smuzhiyun 		{ 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
576*4882a593Smuzhiyun 		  0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
577*4882a593Smuzhiyun 	},
578*4882a593Smuzhiyun 	[10] = {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
579*4882a593Smuzhiyun 		{V4l2_SLICED_VITC_625, 6, 22, 0},
580*4882a593Smuzhiyun 		{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
581*4882a593Smuzhiyun 		  0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
582*4882a593Smuzhiyun 	},
583*4882a593Smuzhiyun 	[11] = {0x170, /* Vertical Interval Timecode (VITC), NTSC */
584*4882a593Smuzhiyun 		{V4l2_SLICED_VITC_525, 10, 20, 0},
585*4882a593Smuzhiyun 		{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
586*4882a593Smuzhiyun 		  0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
587*4882a593Smuzhiyun 	},
588*4882a593Smuzhiyun #endif
589*4882a593Smuzhiyun 	[12] = {0x190, /* Video Program System (VPS), PAL */
590*4882a593Smuzhiyun 		{V4L2_SLICED_VPS, 16, 16, 0},
591*4882a593Smuzhiyun 		{ 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
592*4882a593Smuzhiyun 		  0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
593*4882a593Smuzhiyun 	},
594*4882a593Smuzhiyun 	/* 0x1d0 User programmable */
595*4882a593Smuzhiyun };
596*4882a593Smuzhiyun 
tvp5150_write_inittab(struct v4l2_subdev * sd,const struct i2c_reg_value * regs)597*4882a593Smuzhiyun static int tvp5150_write_inittab(struct v4l2_subdev *sd,
598*4882a593Smuzhiyun 				const struct i2c_reg_value *regs)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	while (regs->reg != 0xff) {
603*4882a593Smuzhiyun 		regmap_write(decoder->regmap, regs->reg, regs->value);
604*4882a593Smuzhiyun 		regs++;
605*4882a593Smuzhiyun 	}
606*4882a593Smuzhiyun 	return 0;
607*4882a593Smuzhiyun }
608*4882a593Smuzhiyun 
tvp5150_vdp_init(struct v4l2_subdev * sd)609*4882a593Smuzhiyun static int tvp5150_vdp_init(struct v4l2_subdev *sd)
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
612*4882a593Smuzhiyun 	struct regmap *map = decoder->regmap;
613*4882a593Smuzhiyun 	unsigned int i;
614*4882a593Smuzhiyun 	int j;
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun 	/* Disable Full Field */
617*4882a593Smuzhiyun 	regmap_write(map, TVP5150_FULL_FIELD_ENA, 0);
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	/* Before programming, Line mode should be at 0xff */
620*4882a593Smuzhiyun 	for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
621*4882a593Smuzhiyun 		regmap_write(map, i, 0xff);
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	/* Load Ram Table */
624*4882a593Smuzhiyun 	for (j = 0; j < ARRAY_SIZE(vbi_ram_default); j++) {
625*4882a593Smuzhiyun 		const struct i2c_vbi_ram_value *regs = &vbi_ram_default[j];
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 		if (!regs->type.vbi_type)
628*4882a593Smuzhiyun 			continue;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 		regmap_write(map, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8);
631*4882a593Smuzhiyun 		regmap_write(map, TVP5150_CONF_RAM_ADDR_LOW, regs->reg);
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 		for (i = 0; i < 16; i++)
634*4882a593Smuzhiyun 			regmap_write(map, TVP5150_VDP_CONF_RAM_DATA,
635*4882a593Smuzhiyun 				     regs->values[i]);
636*4882a593Smuzhiyun 	}
637*4882a593Smuzhiyun 	return 0;
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun /* Fills VBI capabilities based on i2c_vbi_ram_value struct */
tvp5150_g_sliced_vbi_cap(struct v4l2_subdev * sd,struct v4l2_sliced_vbi_cap * cap)641*4882a593Smuzhiyun static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd,
642*4882a593Smuzhiyun 				struct v4l2_sliced_vbi_cap *cap)
643*4882a593Smuzhiyun {
644*4882a593Smuzhiyun 	int line, i;
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	dev_dbg_lvl(sd->dev, 1, debug, "g_sliced_vbi_cap\n");
647*4882a593Smuzhiyun 	memset(cap, 0, sizeof(*cap));
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) {
650*4882a593Smuzhiyun 		const struct i2c_vbi_ram_value *regs = &vbi_ram_default[i];
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 		if (!regs->type.vbi_type)
653*4882a593Smuzhiyun 			continue;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 		for (line = regs->type.ini_line;
656*4882a593Smuzhiyun 		     line <= regs->type.end_line;
657*4882a593Smuzhiyun 		     line++) {
658*4882a593Smuzhiyun 			cap->service_lines[0][line] |= regs->type.vbi_type;
659*4882a593Smuzhiyun 		}
660*4882a593Smuzhiyun 		cap->service_set |= regs->type.vbi_type;
661*4882a593Smuzhiyun 	}
662*4882a593Smuzhiyun 	return 0;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun /* Set vbi processing
666*4882a593Smuzhiyun  * type - one of tvp5150_vbi_types
667*4882a593Smuzhiyun  * line - line to gather data
668*4882a593Smuzhiyun  * fields: bit 0 field1, bit 1, field2
669*4882a593Smuzhiyun  * flags (default=0xf0) is a bitmask, were set means:
670*4882a593Smuzhiyun  *	bit 7: enable filtering null bytes on CC
671*4882a593Smuzhiyun  *	bit 6: send data also to FIFO
672*4882a593Smuzhiyun  *	bit 5: don't allow data with errors on FIFO
673*4882a593Smuzhiyun  *	bit 4: enable ECC when possible
674*4882a593Smuzhiyun  * pix_align = pix alignment:
675*4882a593Smuzhiyun  *	LSB = field1
676*4882a593Smuzhiyun  *	MSB = field2
677*4882a593Smuzhiyun  */
tvp5150_set_vbi(struct v4l2_subdev * sd,unsigned int type,u8 flags,int line,const int fields)678*4882a593Smuzhiyun static int tvp5150_set_vbi(struct v4l2_subdev *sd,
679*4882a593Smuzhiyun 			unsigned int type, u8 flags, int line,
680*4882a593Smuzhiyun 			const int fields)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
683*4882a593Smuzhiyun 	v4l2_std_id std = decoder->norm;
684*4882a593Smuzhiyun 	u8 reg;
685*4882a593Smuzhiyun 	int i, pos = 0;
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 	if (std == V4L2_STD_ALL) {
688*4882a593Smuzhiyun 		dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
689*4882a593Smuzhiyun 		return 0;
690*4882a593Smuzhiyun 	} else if (std & V4L2_STD_625_50) {
691*4882a593Smuzhiyun 		/* Don't follow NTSC Line number convension */
692*4882a593Smuzhiyun 		line += 3;
693*4882a593Smuzhiyun 	}
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	if (line < 6 || line > 27)
696*4882a593Smuzhiyun 		return 0;
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) {
699*4882a593Smuzhiyun 		const struct i2c_vbi_ram_value *regs =  &vbi_ram_default[i];
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 		if (!regs->type.vbi_type)
702*4882a593Smuzhiyun 			continue;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 		if ((type & regs->type.vbi_type) &&
705*4882a593Smuzhiyun 		    (line >= regs->type.ini_line) &&
706*4882a593Smuzhiyun 		    (line <= regs->type.end_line))
707*4882a593Smuzhiyun 			break;
708*4882a593Smuzhiyun 		pos++;
709*4882a593Smuzhiyun 	}
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	type = pos | (flags & 0xf0);
712*4882a593Smuzhiyun 	reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun 	if (fields & 1)
715*4882a593Smuzhiyun 		regmap_write(decoder->regmap, reg, type);
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	if (fields & 2)
718*4882a593Smuzhiyun 		regmap_write(decoder->regmap, reg + 1, type);
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	return type;
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun 
tvp5150_get_vbi(struct v4l2_subdev * sd,int line)723*4882a593Smuzhiyun static int tvp5150_get_vbi(struct v4l2_subdev *sd, int line)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
726*4882a593Smuzhiyun 	v4l2_std_id std = decoder->norm;
727*4882a593Smuzhiyun 	u8 reg;
728*4882a593Smuzhiyun 	int pos, type = 0;
729*4882a593Smuzhiyun 	int i, ret = 0;
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	if (std == V4L2_STD_ALL) {
732*4882a593Smuzhiyun 		dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
733*4882a593Smuzhiyun 		return 0;
734*4882a593Smuzhiyun 	} else if (std & V4L2_STD_625_50) {
735*4882a593Smuzhiyun 		/* Don't follow NTSC Line number convension */
736*4882a593Smuzhiyun 		line += 3;
737*4882a593Smuzhiyun 	}
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	if (line < 6 || line > 27)
740*4882a593Smuzhiyun 		return 0;
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 	reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun 	for (i = 0; i <= 1; i++) {
745*4882a593Smuzhiyun 		ret = tvp5150_read(sd, reg + i);
746*4882a593Smuzhiyun 		if (ret < 0) {
747*4882a593Smuzhiyun 			dev_err(sd->dev, "%s: failed with error = %d\n",
748*4882a593Smuzhiyun 				 __func__, ret);
749*4882a593Smuzhiyun 			return 0;
750*4882a593Smuzhiyun 		}
751*4882a593Smuzhiyun 		pos = ret & 0x0f;
752*4882a593Smuzhiyun 		if (pos < ARRAY_SIZE(vbi_ram_default))
753*4882a593Smuzhiyun 			type |= vbi_ram_default[pos].type.vbi_type;
754*4882a593Smuzhiyun 	}
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun 	return type;
757*4882a593Smuzhiyun }
758*4882a593Smuzhiyun 
tvp5150_set_std(struct v4l2_subdev * sd,v4l2_std_id std)759*4882a593Smuzhiyun static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
760*4882a593Smuzhiyun {
761*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
762*4882a593Smuzhiyun 	int fmt = 0;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	/* First tests should be against specific std */
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	if (std == V4L2_STD_NTSC_443) {
767*4882a593Smuzhiyun 		fmt = VIDEO_STD_NTSC_4_43_BIT;
768*4882a593Smuzhiyun 	} else if (std == V4L2_STD_PAL_M) {
769*4882a593Smuzhiyun 		fmt = VIDEO_STD_PAL_M_BIT;
770*4882a593Smuzhiyun 	} else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) {
771*4882a593Smuzhiyun 		fmt = VIDEO_STD_PAL_COMBINATION_N_BIT;
772*4882a593Smuzhiyun 	} else {
773*4882a593Smuzhiyun 		/* Then, test against generic ones */
774*4882a593Smuzhiyun 		if (std & V4L2_STD_NTSC)
775*4882a593Smuzhiyun 			fmt = VIDEO_STD_NTSC_MJ_BIT;
776*4882a593Smuzhiyun 		else if (std & V4L2_STD_PAL)
777*4882a593Smuzhiyun 			fmt = VIDEO_STD_PAL_BDGHIN_BIT;
778*4882a593Smuzhiyun 		else if (std & V4L2_STD_SECAM)
779*4882a593Smuzhiyun 			fmt = VIDEO_STD_SECAM_BIT;
780*4882a593Smuzhiyun 	}
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun 	dev_dbg_lvl(sd->dev, 1, debug, "Set video std register to %d.\n", fmt);
783*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_VIDEO_STD, fmt);
784*4882a593Smuzhiyun 	return 0;
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun 
tvp5150_g_std(struct v4l2_subdev * sd,v4l2_std_id * std)787*4882a593Smuzhiyun static int tvp5150_g_std(struct v4l2_subdev *sd, v4l2_std_id *std)
788*4882a593Smuzhiyun {
789*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	*std = decoder->norm;
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	return 0;
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun 
tvp5150_s_std(struct v4l2_subdev * sd,v4l2_std_id std)796*4882a593Smuzhiyun static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
797*4882a593Smuzhiyun {
798*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
799*4882a593Smuzhiyun 	struct tvp5150_connector *cur_con = decoder->cur_connector;
800*4882a593Smuzhiyun 	v4l2_std_id supported_stds;
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 	if (decoder->norm == std)
803*4882a593Smuzhiyun 		return 0;
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	/* In case of no of-connectors are available no limitations are made */
806*4882a593Smuzhiyun 	if (!decoder->connectors_num)
807*4882a593Smuzhiyun 		supported_stds = V4L2_STD_ALL;
808*4882a593Smuzhiyun 	else
809*4882a593Smuzhiyun 		supported_stds = cur_con->base.connector.analog.sdtv_stds;
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun 	/*
812*4882a593Smuzhiyun 	 * Check if requested std or group of std's is/are supported by the
813*4882a593Smuzhiyun 	 * connector.
814*4882a593Smuzhiyun 	 */
815*4882a593Smuzhiyun 	if ((supported_stds & std) == 0)
816*4882a593Smuzhiyun 		return -EINVAL;
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 	/* Change cropping height limits */
819*4882a593Smuzhiyun 	if (std & V4L2_STD_525_60)
820*4882a593Smuzhiyun 		decoder->rect.height = TVP5150_V_MAX_525_60;
821*4882a593Smuzhiyun 	else
822*4882a593Smuzhiyun 		decoder->rect.height = TVP5150_V_MAX_OTHERS;
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	/* Set only the specific supported std in case of group of std's. */
825*4882a593Smuzhiyun 	decoder->norm = supported_stds & std;
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	return tvp5150_set_std(sd, std);
828*4882a593Smuzhiyun }
829*4882a593Smuzhiyun 
tvp5150_read_std(struct v4l2_subdev * sd)830*4882a593Smuzhiyun static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd)
831*4882a593Smuzhiyun {
832*4882a593Smuzhiyun 	int val = tvp5150_read(sd, TVP5150_STATUS_REG_5);
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 	switch (val & 0x0F) {
835*4882a593Smuzhiyun 	case 0x01:
836*4882a593Smuzhiyun 		return V4L2_STD_NTSC;
837*4882a593Smuzhiyun 	case 0x03:
838*4882a593Smuzhiyun 		return V4L2_STD_PAL;
839*4882a593Smuzhiyun 	case 0x05:
840*4882a593Smuzhiyun 		return V4L2_STD_PAL_M;
841*4882a593Smuzhiyun 	case 0x07:
842*4882a593Smuzhiyun 		return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc;
843*4882a593Smuzhiyun 	case 0x09:
844*4882a593Smuzhiyun 		return V4L2_STD_NTSC_443;
845*4882a593Smuzhiyun 	case 0xb:
846*4882a593Smuzhiyun 		return V4L2_STD_SECAM;
847*4882a593Smuzhiyun 	default:
848*4882a593Smuzhiyun 		return V4L2_STD_UNKNOWN;
849*4882a593Smuzhiyun 	}
850*4882a593Smuzhiyun }
851*4882a593Smuzhiyun 
query_lock(struct v4l2_subdev * sd)852*4882a593Smuzhiyun static int query_lock(struct v4l2_subdev *sd)
853*4882a593Smuzhiyun {
854*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
855*4882a593Smuzhiyun 	int status;
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	if (decoder->irq)
858*4882a593Smuzhiyun 		return decoder->lock;
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 	regmap_read(decoder->regmap, TVP5150_STATUS_REG_1, &status);
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun 	/* For standard detection, we need the 3 locks */
863*4882a593Smuzhiyun 	return (status & 0x0e) == 0x0e;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun 
tvp5150_querystd(struct v4l2_subdev * sd,v4l2_std_id * std_id)866*4882a593Smuzhiyun static int tvp5150_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun 	*std_id = query_lock(sd) ? tvp5150_read_std(sd) : V4L2_STD_UNKNOWN;
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun 	return 0;
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun static const struct v4l2_event tvp5150_ev_fmt = {
874*4882a593Smuzhiyun 	.type = V4L2_EVENT_SOURCE_CHANGE,
875*4882a593Smuzhiyun 	.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
876*4882a593Smuzhiyun };
877*4882a593Smuzhiyun 
tvp5150_isr(int irq,void * dev_id)878*4882a593Smuzhiyun static irqreturn_t tvp5150_isr(int irq, void *dev_id)
879*4882a593Smuzhiyun {
880*4882a593Smuzhiyun 	struct tvp5150 *decoder = dev_id;
881*4882a593Smuzhiyun 	struct regmap *map = decoder->regmap;
882*4882a593Smuzhiyun 	unsigned int mask, active = 0, status = 0;
883*4882a593Smuzhiyun 
884*4882a593Smuzhiyun 	mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE |
885*4882a593Smuzhiyun 	       TVP5150_MISC_CTL_CLOCK_OE;
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	regmap_read(map, TVP5150_INT_STATUS_REG_A, &status);
888*4882a593Smuzhiyun 	if (status) {
889*4882a593Smuzhiyun 		regmap_write(map, TVP5150_INT_STATUS_REG_A, status);
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 		if (status & TVP5150_INT_A_LOCK) {
892*4882a593Smuzhiyun 			decoder->lock = !!(status & TVP5150_INT_A_LOCK_STATUS);
893*4882a593Smuzhiyun 			dev_dbg_lvl(decoder->sd.dev, 1, debug,
894*4882a593Smuzhiyun 				    "sync lo%s signal\n",
895*4882a593Smuzhiyun 				    decoder->lock ? "ck" : "ss");
896*4882a593Smuzhiyun 			v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt);
897*4882a593Smuzhiyun 			regmap_update_bits(map, TVP5150_MISC_CTL, mask,
898*4882a593Smuzhiyun 					   decoder->lock ? decoder->oe : 0);
899*4882a593Smuzhiyun 		}
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 		return IRQ_HANDLED;
902*4882a593Smuzhiyun 	}
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	regmap_read(map, TVP5150_INT_ACTIVE_REG_B, &active);
905*4882a593Smuzhiyun 	if (active) {
906*4882a593Smuzhiyun 		status = 0;
907*4882a593Smuzhiyun 		regmap_read(map, TVP5150_INT_STATUS_REG_B, &status);
908*4882a593Smuzhiyun 		if (status)
909*4882a593Smuzhiyun 			regmap_write(map, TVP5150_INT_RESET_REG_B, status);
910*4882a593Smuzhiyun 	}
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun 	return IRQ_HANDLED;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun 
tvp5150_reset(struct v4l2_subdev * sd,u32 val)915*4882a593Smuzhiyun static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
916*4882a593Smuzhiyun {
917*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
918*4882a593Smuzhiyun 	struct regmap *map = decoder->regmap;
919*4882a593Smuzhiyun 
920*4882a593Smuzhiyun 	/* Initializes TVP5150 to its default values */
921*4882a593Smuzhiyun 	tvp5150_write_inittab(sd, tvp5150_init_default);
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun 	if (decoder->irq) {
924*4882a593Smuzhiyun 		/* Configure pins: FID, VSYNC, INTREQ, SCLK */
925*4882a593Smuzhiyun 		regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x0);
926*4882a593Smuzhiyun 		/* Set interrupt polarity to active high */
927*4882a593Smuzhiyun 		regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE | 0x1);
928*4882a593Smuzhiyun 		regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x1);
929*4882a593Smuzhiyun 	} else {
930*4882a593Smuzhiyun 		/* Configure pins: FID, VSYNC, GPCL/VBLK, SCLK */
931*4882a593Smuzhiyun 		regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x2);
932*4882a593Smuzhiyun 		/* Keep interrupt polarity active low */
933*4882a593Smuzhiyun 		regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE);
934*4882a593Smuzhiyun 		regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x0);
935*4882a593Smuzhiyun 	}
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	/* Initializes VDP registers */
938*4882a593Smuzhiyun 	tvp5150_vdp_init(sd);
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	/* Selects decoder input */
941*4882a593Smuzhiyun 	tvp5150_selmux(sd);
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun 	/* Initialize image preferences */
944*4882a593Smuzhiyun 	v4l2_ctrl_handler_setup(&decoder->hdl);
945*4882a593Smuzhiyun 
946*4882a593Smuzhiyun 	return 0;
947*4882a593Smuzhiyun }
948*4882a593Smuzhiyun 
tvp5150_enable(struct v4l2_subdev * sd)949*4882a593Smuzhiyun static int tvp5150_enable(struct v4l2_subdev *sd)
950*4882a593Smuzhiyun {
951*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
952*4882a593Smuzhiyun 	v4l2_std_id std;
953*4882a593Smuzhiyun 
954*4882a593Smuzhiyun 	/* Initializes TVP5150 to stream enabled values */
955*4882a593Smuzhiyun 	tvp5150_write_inittab(sd, tvp5150_init_enable);
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	if (decoder->norm == V4L2_STD_ALL)
958*4882a593Smuzhiyun 		std = tvp5150_read_std(sd);
959*4882a593Smuzhiyun 	else
960*4882a593Smuzhiyun 		std = decoder->norm;
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun 	/* Disable autoswitch mode */
963*4882a593Smuzhiyun 	tvp5150_set_std(sd, std);
964*4882a593Smuzhiyun 
965*4882a593Smuzhiyun 	/*
966*4882a593Smuzhiyun 	 * Enable the YCbCr and clock outputs. In discrete sync mode
967*4882a593Smuzhiyun 	 * (non-BT.656) additionally enable the the sync outputs.
968*4882a593Smuzhiyun 	 */
969*4882a593Smuzhiyun 	switch (decoder->mbus_type) {
970*4882a593Smuzhiyun 	case V4L2_MBUS_PARALLEL:
971*4882a593Smuzhiyun 		/* 8-bit 4:2:2 YUV with discrete sync output */
972*4882a593Smuzhiyun 		regmap_update_bits(decoder->regmap, TVP5150_DATA_RATE_SEL,
973*4882a593Smuzhiyun 				   0x7, 0x0);
974*4882a593Smuzhiyun 		decoder->oe = TVP5150_MISC_CTL_YCBCR_OE |
975*4882a593Smuzhiyun 			      TVP5150_MISC_CTL_CLOCK_OE |
976*4882a593Smuzhiyun 			      TVP5150_MISC_CTL_SYNC_OE;
977*4882a593Smuzhiyun 		break;
978*4882a593Smuzhiyun 	case V4L2_MBUS_BT656:
979*4882a593Smuzhiyun 		decoder->oe = TVP5150_MISC_CTL_YCBCR_OE |
980*4882a593Smuzhiyun 			      TVP5150_MISC_CTL_CLOCK_OE;
981*4882a593Smuzhiyun 		break;
982*4882a593Smuzhiyun 	default:
983*4882a593Smuzhiyun 		return -EINVAL;
984*4882a593Smuzhiyun 	}
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	return 0;
987*4882a593Smuzhiyun };
988*4882a593Smuzhiyun 
tvp5150_s_ctrl(struct v4l2_ctrl * ctrl)989*4882a593Smuzhiyun static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl)
990*4882a593Smuzhiyun {
991*4882a593Smuzhiyun 	struct v4l2_subdev *sd = to_sd(ctrl);
992*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun 	switch (ctrl->id) {
995*4882a593Smuzhiyun 	case V4L2_CID_BRIGHTNESS:
996*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_BRIGHT_CTL, ctrl->val);
997*4882a593Smuzhiyun 		return 0;
998*4882a593Smuzhiyun 	case V4L2_CID_CONTRAST:
999*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_CONTRAST_CTL, ctrl->val);
1000*4882a593Smuzhiyun 		return 0;
1001*4882a593Smuzhiyun 	case V4L2_CID_SATURATION:
1002*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_SATURATION_CTL,
1003*4882a593Smuzhiyun 			     ctrl->val);
1004*4882a593Smuzhiyun 		return 0;
1005*4882a593Smuzhiyun 	case V4L2_CID_HUE:
1006*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_HUE_CTL, ctrl->val);
1007*4882a593Smuzhiyun 		return 0;
1008*4882a593Smuzhiyun 	case V4L2_CID_TEST_PATTERN:
1009*4882a593Smuzhiyun 		decoder->enable = ctrl->val ? false : true;
1010*4882a593Smuzhiyun 		tvp5150_selmux(sd);
1011*4882a593Smuzhiyun 		return 0;
1012*4882a593Smuzhiyun 	}
1013*4882a593Smuzhiyun 	return -EINVAL;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun 
tvp5150_set_default(v4l2_std_id std,struct v4l2_rect * crop)1016*4882a593Smuzhiyun static void tvp5150_set_default(v4l2_std_id std, struct v4l2_rect *crop)
1017*4882a593Smuzhiyun {
1018*4882a593Smuzhiyun 	/* Default is no cropping */
1019*4882a593Smuzhiyun 	crop->top = 0;
1020*4882a593Smuzhiyun 	crop->left = 0;
1021*4882a593Smuzhiyun 	crop->width = TVP5150_H_MAX;
1022*4882a593Smuzhiyun 	if (std & V4L2_STD_525_60)
1023*4882a593Smuzhiyun 		crop->height = TVP5150_V_MAX_525_60;
1024*4882a593Smuzhiyun 	else
1025*4882a593Smuzhiyun 		crop->height = TVP5150_V_MAX_OTHERS;
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun static struct v4l2_rect *
tvp5150_get_pad_crop(struct tvp5150 * decoder,struct v4l2_subdev_pad_config * cfg,unsigned int pad,enum v4l2_subdev_format_whence which)1029*4882a593Smuzhiyun tvp5150_get_pad_crop(struct tvp5150 *decoder,
1030*4882a593Smuzhiyun 		     struct v4l2_subdev_pad_config *cfg, unsigned int pad,
1031*4882a593Smuzhiyun 		     enum v4l2_subdev_format_whence which)
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun 	switch (which) {
1034*4882a593Smuzhiyun 	case V4L2_SUBDEV_FORMAT_ACTIVE:
1035*4882a593Smuzhiyun 		return &decoder->rect;
1036*4882a593Smuzhiyun 	case V4L2_SUBDEV_FORMAT_TRY:
1037*4882a593Smuzhiyun #if defined(CONFIG_VIDEO_V4L2_SUBDEV_API)
1038*4882a593Smuzhiyun 		return v4l2_subdev_get_try_crop(&decoder->sd, cfg, pad);
1039*4882a593Smuzhiyun #else
1040*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
1041*4882a593Smuzhiyun #endif
1042*4882a593Smuzhiyun 	default:
1043*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
1044*4882a593Smuzhiyun 	}
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun 
tvp5150_fill_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)1047*4882a593Smuzhiyun static int tvp5150_fill_fmt(struct v4l2_subdev *sd,
1048*4882a593Smuzhiyun 			    struct v4l2_subdev_pad_config *cfg,
1049*4882a593Smuzhiyun 			    struct v4l2_subdev_format *format)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *f;
1052*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1053*4882a593Smuzhiyun 
1054*4882a593Smuzhiyun 	if (!format || (format->pad != TVP5150_PAD_VID_OUT))
1055*4882a593Smuzhiyun 		return -EINVAL;
1056*4882a593Smuzhiyun 
1057*4882a593Smuzhiyun 	f = &format->format;
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun 	f->width = decoder->rect.width;
1060*4882a593Smuzhiyun 	f->height = decoder->rect.height / 2;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	f->code = TVP5150_MBUS_FMT;
1063*4882a593Smuzhiyun 	f->field = TVP5150_FIELD;
1064*4882a593Smuzhiyun 	f->colorspace = TVP5150_COLORSPACE;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	dev_dbg_lvl(sd->dev, 1, debug, "width = %d, height = %d\n", f->width,
1067*4882a593Smuzhiyun 		    f->height);
1068*4882a593Smuzhiyun 	return 0;
1069*4882a593Smuzhiyun }
1070*4882a593Smuzhiyun 
tvp5150_get_hmax(struct v4l2_subdev * sd)1071*4882a593Smuzhiyun static unsigned int tvp5150_get_hmax(struct v4l2_subdev *sd)
1072*4882a593Smuzhiyun {
1073*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1074*4882a593Smuzhiyun 	v4l2_std_id std;
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	/* Calculate height based on current standard */
1077*4882a593Smuzhiyun 	if (decoder->norm == V4L2_STD_ALL)
1078*4882a593Smuzhiyun 		std = tvp5150_read_std(sd);
1079*4882a593Smuzhiyun 	else
1080*4882a593Smuzhiyun 		std = decoder->norm;
1081*4882a593Smuzhiyun 
1082*4882a593Smuzhiyun 	return (std & V4L2_STD_525_60) ?
1083*4882a593Smuzhiyun 		TVP5150_V_MAX_525_60 : TVP5150_V_MAX_OTHERS;
1084*4882a593Smuzhiyun }
1085*4882a593Smuzhiyun 
tvp5150_set_hw_selection(struct v4l2_subdev * sd,struct v4l2_rect * rect)1086*4882a593Smuzhiyun static void tvp5150_set_hw_selection(struct v4l2_subdev *sd,
1087*4882a593Smuzhiyun 				     struct v4l2_rect *rect)
1088*4882a593Smuzhiyun {
1089*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1090*4882a593Smuzhiyun 	unsigned int hmax = tvp5150_get_hmax(sd);
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START, rect->top);
1093*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP,
1094*4882a593Smuzhiyun 		     rect->top + rect->height - hmax);
1095*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_MSB,
1096*4882a593Smuzhiyun 		     rect->left >> TVP5150_CROP_SHIFT);
1097*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_LSB,
1098*4882a593Smuzhiyun 		     rect->left | (1 << TVP5150_CROP_SHIFT));
1099*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_MSB,
1100*4882a593Smuzhiyun 		     (rect->left + rect->width - TVP5150_MAX_CROP_LEFT) >>
1101*4882a593Smuzhiyun 		     TVP5150_CROP_SHIFT);
1102*4882a593Smuzhiyun 	regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_LSB,
1103*4882a593Smuzhiyun 		     rect->left + rect->width - TVP5150_MAX_CROP_LEFT);
1104*4882a593Smuzhiyun }
1105*4882a593Smuzhiyun 
tvp5150_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1106*4882a593Smuzhiyun static int tvp5150_set_selection(struct v4l2_subdev *sd,
1107*4882a593Smuzhiyun 				 struct v4l2_subdev_pad_config *cfg,
1108*4882a593Smuzhiyun 				 struct v4l2_subdev_selection *sel)
1109*4882a593Smuzhiyun {
1110*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1111*4882a593Smuzhiyun 	struct v4l2_rect *rect = &sel->r;
1112*4882a593Smuzhiyun 	struct v4l2_rect *crop;
1113*4882a593Smuzhiyun 	unsigned int hmax;
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 	if (sel->target != V4L2_SEL_TGT_CROP)
1116*4882a593Smuzhiyun 		return -EINVAL;
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	dev_dbg_lvl(sd->dev, 1, debug, "%s left=%d, top=%d, width=%d, height=%d\n",
1119*4882a593Smuzhiyun 		__func__, rect->left, rect->top, rect->width, rect->height);
1120*4882a593Smuzhiyun 
1121*4882a593Smuzhiyun 	/* tvp5150 has some special limits */
1122*4882a593Smuzhiyun 	rect->left = clamp(rect->left, 0, TVP5150_MAX_CROP_LEFT);
1123*4882a593Smuzhiyun 	rect->top = clamp(rect->top, 0, TVP5150_MAX_CROP_TOP);
1124*4882a593Smuzhiyun 	hmax = tvp5150_get_hmax(sd);
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 	/*
1127*4882a593Smuzhiyun 	 * alignments:
1128*4882a593Smuzhiyun 	 *  - width = 2 due to UYVY colorspace
1129*4882a593Smuzhiyun 	 *  - height, image = no special alignment
1130*4882a593Smuzhiyun 	 */
1131*4882a593Smuzhiyun 	v4l_bound_align_image(&rect->width,
1132*4882a593Smuzhiyun 			      TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect->left,
1133*4882a593Smuzhiyun 			      TVP5150_H_MAX - rect->left, 1, &rect->height,
1134*4882a593Smuzhiyun 			      hmax - TVP5150_MAX_CROP_TOP - rect->top,
1135*4882a593Smuzhiyun 			      hmax - rect->top, 0, 0);
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun 	if (!IS_ENABLED(CONFIG_VIDEO_V4L2_SUBDEV_API) &&
1138*4882a593Smuzhiyun 	    sel->which == V4L2_SUBDEV_FORMAT_TRY)
1139*4882a593Smuzhiyun 		return 0;
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 	crop = tvp5150_get_pad_crop(decoder, cfg, sel->pad, sel->which);
1142*4882a593Smuzhiyun 	if (IS_ERR(crop))
1143*4882a593Smuzhiyun 		return PTR_ERR(crop);
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	/*
1146*4882a593Smuzhiyun 	 * Update output image size if the selection (crop) rectangle size or
1147*4882a593Smuzhiyun 	 * position has been modified.
1148*4882a593Smuzhiyun 	 */
1149*4882a593Smuzhiyun 	if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE &&
1150*4882a593Smuzhiyun 	    !v4l2_rect_equal(rect, crop))
1151*4882a593Smuzhiyun 		tvp5150_set_hw_selection(sd, rect);
1152*4882a593Smuzhiyun 
1153*4882a593Smuzhiyun 	*crop = *rect;
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun 	return 0;
1156*4882a593Smuzhiyun }
1157*4882a593Smuzhiyun 
tvp5150_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1158*4882a593Smuzhiyun static int tvp5150_get_selection(struct v4l2_subdev *sd,
1159*4882a593Smuzhiyun 				 struct v4l2_subdev_pad_config *cfg,
1160*4882a593Smuzhiyun 				 struct v4l2_subdev_selection *sel)
1161*4882a593Smuzhiyun {
1162*4882a593Smuzhiyun 	struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd);
1163*4882a593Smuzhiyun 	struct v4l2_rect *crop;
1164*4882a593Smuzhiyun 	v4l2_std_id std;
1165*4882a593Smuzhiyun 
1166*4882a593Smuzhiyun 	switch (sel->target) {
1167*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP_BOUNDS:
1168*4882a593Smuzhiyun 		sel->r.left = 0;
1169*4882a593Smuzhiyun 		sel->r.top = 0;
1170*4882a593Smuzhiyun 		sel->r.width = TVP5150_H_MAX;
1171*4882a593Smuzhiyun 
1172*4882a593Smuzhiyun 		/* Calculate height based on current standard */
1173*4882a593Smuzhiyun 		if (decoder->norm == V4L2_STD_ALL)
1174*4882a593Smuzhiyun 			std = tvp5150_read_std(sd);
1175*4882a593Smuzhiyun 		else
1176*4882a593Smuzhiyun 			std = decoder->norm;
1177*4882a593Smuzhiyun 		if (std & V4L2_STD_525_60)
1178*4882a593Smuzhiyun 			sel->r.height = TVP5150_V_MAX_525_60;
1179*4882a593Smuzhiyun 		else
1180*4882a593Smuzhiyun 			sel->r.height = TVP5150_V_MAX_OTHERS;
1181*4882a593Smuzhiyun 		return 0;
1182*4882a593Smuzhiyun 	case V4L2_SEL_TGT_CROP:
1183*4882a593Smuzhiyun 		crop = tvp5150_get_pad_crop(decoder, cfg, sel->pad,
1184*4882a593Smuzhiyun 					    sel->which);
1185*4882a593Smuzhiyun 		if (IS_ERR(crop))
1186*4882a593Smuzhiyun 			return PTR_ERR(crop);
1187*4882a593Smuzhiyun 		sel->r = *crop;
1188*4882a593Smuzhiyun 		return 0;
1189*4882a593Smuzhiyun 	default:
1190*4882a593Smuzhiyun 		return -EINVAL;
1191*4882a593Smuzhiyun 	}
1192*4882a593Smuzhiyun }
1193*4882a593Smuzhiyun 
tvp5150_get_mbus_config(struct v4l2_subdev * sd,unsigned int pad,struct v4l2_mbus_config * cfg)1194*4882a593Smuzhiyun static int tvp5150_get_mbus_config(struct v4l2_subdev *sd,
1195*4882a593Smuzhiyun 				   unsigned int pad,
1196*4882a593Smuzhiyun 				   struct v4l2_mbus_config *cfg)
1197*4882a593Smuzhiyun {
1198*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1199*4882a593Smuzhiyun 
1200*4882a593Smuzhiyun 	cfg->type = decoder->mbus_type;
1201*4882a593Smuzhiyun 	cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING
1202*4882a593Smuzhiyun 		   | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH;
1203*4882a593Smuzhiyun 
1204*4882a593Smuzhiyun 	return 0;
1205*4882a593Smuzhiyun }
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun /****************************************************************************
1208*4882a593Smuzhiyun 			V4L2 subdev pad ops
1209*4882a593Smuzhiyun  ****************************************************************************/
tvp5150_init_cfg(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg)1210*4882a593Smuzhiyun static int tvp5150_init_cfg(struct v4l2_subdev *sd,
1211*4882a593Smuzhiyun 			    struct v4l2_subdev_pad_config *cfg)
1212*4882a593Smuzhiyun {
1213*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1214*4882a593Smuzhiyun 	v4l2_std_id std;
1215*4882a593Smuzhiyun 
1216*4882a593Smuzhiyun 	/*
1217*4882a593Smuzhiyun 	 * Reset selection to maximum on subdev_open() if autodetection is on
1218*4882a593Smuzhiyun 	 * and a standard change is detected.
1219*4882a593Smuzhiyun 	 */
1220*4882a593Smuzhiyun 	if (decoder->norm == V4L2_STD_ALL) {
1221*4882a593Smuzhiyun 		std = tvp5150_read_std(sd);
1222*4882a593Smuzhiyun 		if (std != decoder->detected_norm) {
1223*4882a593Smuzhiyun 			decoder->detected_norm = std;
1224*4882a593Smuzhiyun 			tvp5150_set_default(std, &decoder->rect);
1225*4882a593Smuzhiyun 		}
1226*4882a593Smuzhiyun 	}
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 	return 0;
1229*4882a593Smuzhiyun }
1230*4882a593Smuzhiyun 
tvp5150_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1231*4882a593Smuzhiyun static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd,
1232*4882a593Smuzhiyun 		struct v4l2_subdev_pad_config *cfg,
1233*4882a593Smuzhiyun 		struct v4l2_subdev_mbus_code_enum *code)
1234*4882a593Smuzhiyun {
1235*4882a593Smuzhiyun 	if (code->pad || code->index)
1236*4882a593Smuzhiyun 		return -EINVAL;
1237*4882a593Smuzhiyun 
1238*4882a593Smuzhiyun 	code->code = TVP5150_MBUS_FMT;
1239*4882a593Smuzhiyun 	return 0;
1240*4882a593Smuzhiyun }
1241*4882a593Smuzhiyun 
tvp5150_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)1242*4882a593Smuzhiyun static int tvp5150_enum_frame_size(struct v4l2_subdev *sd,
1243*4882a593Smuzhiyun 				   struct v4l2_subdev_pad_config *cfg,
1244*4882a593Smuzhiyun 				   struct v4l2_subdev_frame_size_enum *fse)
1245*4882a593Smuzhiyun {
1246*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 	if (fse->index >= 8 || fse->code != TVP5150_MBUS_FMT)
1249*4882a593Smuzhiyun 		return -EINVAL;
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun 	fse->code = TVP5150_MBUS_FMT;
1252*4882a593Smuzhiyun 	fse->min_width = decoder->rect.width;
1253*4882a593Smuzhiyun 	fse->max_width = decoder->rect.width;
1254*4882a593Smuzhiyun 	fse->min_height = decoder->rect.height / 2;
1255*4882a593Smuzhiyun 	fse->max_height = decoder->rect.height / 2;
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun 	return 0;
1258*4882a593Smuzhiyun }
1259*4882a593Smuzhiyun 
1260*4882a593Smuzhiyun /****************************************************************************
1261*4882a593Smuzhiyun  *			Media entity ops
1262*4882a593Smuzhiyun  ****************************************************************************/
1263*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
tvp5150_set_link(struct media_pad * connector_pad,struct media_pad * tvp5150_pad,u32 flags)1264*4882a593Smuzhiyun static int tvp5150_set_link(struct media_pad *connector_pad,
1265*4882a593Smuzhiyun 			    struct media_pad *tvp5150_pad, u32 flags)
1266*4882a593Smuzhiyun {
1267*4882a593Smuzhiyun 	struct media_link *link;
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun 	link = media_entity_find_link(connector_pad, tvp5150_pad);
1270*4882a593Smuzhiyun 	if (!link)
1271*4882a593Smuzhiyun 		return -EINVAL;
1272*4882a593Smuzhiyun 
1273*4882a593Smuzhiyun 	link->flags = flags;
1274*4882a593Smuzhiyun 	link->reverse->flags = link->flags;
1275*4882a593Smuzhiyun 
1276*4882a593Smuzhiyun 	return 0;
1277*4882a593Smuzhiyun }
1278*4882a593Smuzhiyun 
tvp5150_disable_all_input_links(struct tvp5150 * decoder)1279*4882a593Smuzhiyun static int tvp5150_disable_all_input_links(struct tvp5150 *decoder)
1280*4882a593Smuzhiyun {
1281*4882a593Smuzhiyun 	struct media_pad *connector_pad;
1282*4882a593Smuzhiyun 	unsigned int i;
1283*4882a593Smuzhiyun 	int err;
1284*4882a593Smuzhiyun 
1285*4882a593Smuzhiyun 	for (i = 0; i < TVP5150_NUM_PADS - 1; i++) {
1286*4882a593Smuzhiyun 		connector_pad = media_entity_remote_pad(&decoder->pads[i]);
1287*4882a593Smuzhiyun 		if (!connector_pad)
1288*4882a593Smuzhiyun 			continue;
1289*4882a593Smuzhiyun 
1290*4882a593Smuzhiyun 		err = tvp5150_set_link(connector_pad, &decoder->pads[i], 0);
1291*4882a593Smuzhiyun 		if (err)
1292*4882a593Smuzhiyun 			return err;
1293*4882a593Smuzhiyun 	}
1294*4882a593Smuzhiyun 
1295*4882a593Smuzhiyun 	return 0;
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun 
1298*4882a593Smuzhiyun static int tvp5150_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
1299*4882a593Smuzhiyun 			     u32 config);
1300*4882a593Smuzhiyun 
tvp5150_link_setup(struct media_entity * entity,const struct media_pad * tvp5150_pad,const struct media_pad * remote,u32 flags)1301*4882a593Smuzhiyun static int tvp5150_link_setup(struct media_entity *entity,
1302*4882a593Smuzhiyun 			      const struct media_pad *tvp5150_pad,
1303*4882a593Smuzhiyun 			      const struct media_pad *remote, u32 flags)
1304*4882a593Smuzhiyun {
1305*4882a593Smuzhiyun 	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1306*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1307*4882a593Smuzhiyun 	struct media_pad *other_tvp5150_pad =
1308*4882a593Smuzhiyun 		&decoder->pads[tvp5150_pad->index ^ 1];
1309*4882a593Smuzhiyun 	struct v4l2_fwnode_connector *v4l2c;
1310*4882a593Smuzhiyun 	bool is_svideo = false;
1311*4882a593Smuzhiyun 	unsigned int i;
1312*4882a593Smuzhiyun 	int err;
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun 	/*
1315*4882a593Smuzhiyun 	 * The TVP5150 state is determined by the enabled sink pad link(s).
1316*4882a593Smuzhiyun 	 * Enabling or disabling the source pad link has no effect.
1317*4882a593Smuzhiyun 	 */
1318*4882a593Smuzhiyun 	if (tvp5150_pad->flags & MEDIA_PAD_FL_SOURCE)
1319*4882a593Smuzhiyun 		return 0;
1320*4882a593Smuzhiyun 
1321*4882a593Smuzhiyun 	/* Check if the svideo connector should be enabled */
1322*4882a593Smuzhiyun 	for (i = 0; i < decoder->connectors_num; i++) {
1323*4882a593Smuzhiyun 		if (remote->entity == &decoder->connectors[i].ent) {
1324*4882a593Smuzhiyun 			v4l2c = &decoder->connectors[i].base;
1325*4882a593Smuzhiyun 			is_svideo = v4l2c->type == V4L2_CONN_SVIDEO;
1326*4882a593Smuzhiyun 			break;
1327*4882a593Smuzhiyun 		}
1328*4882a593Smuzhiyun 	}
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun 	dev_dbg_lvl(sd->dev, 1, debug, "link setup '%s':%d->'%s':%d[%d]",
1331*4882a593Smuzhiyun 		    remote->entity->name, remote->index,
1332*4882a593Smuzhiyun 		    tvp5150_pad->entity->name, tvp5150_pad->index,
1333*4882a593Smuzhiyun 		    flags & MEDIA_LNK_FL_ENABLED);
1334*4882a593Smuzhiyun 	if (is_svideo)
1335*4882a593Smuzhiyun 		dev_dbg_lvl(sd->dev, 1, debug,
1336*4882a593Smuzhiyun 			    "link setup '%s':%d->'%s':%d[%d]",
1337*4882a593Smuzhiyun 			    remote->entity->name, remote->index,
1338*4882a593Smuzhiyun 			    other_tvp5150_pad->entity->name,
1339*4882a593Smuzhiyun 			    other_tvp5150_pad->index,
1340*4882a593Smuzhiyun 			    flags & MEDIA_LNK_FL_ENABLED);
1341*4882a593Smuzhiyun 
1342*4882a593Smuzhiyun 	/*
1343*4882a593Smuzhiyun 	 * The TVP5150 has an internal mux which allows the following setup:
1344*4882a593Smuzhiyun 	 *
1345*4882a593Smuzhiyun 	 * comp-connector1  --\
1346*4882a593Smuzhiyun 	 *		       |---> AIP1A
1347*4882a593Smuzhiyun 	 *		      /
1348*4882a593Smuzhiyun 	 * svideo-connector -|
1349*4882a593Smuzhiyun 	 *		      \
1350*4882a593Smuzhiyun 	 *		       |---> AIP1B
1351*4882a593Smuzhiyun 	 * comp-connector2  --/
1352*4882a593Smuzhiyun 	 *
1353*4882a593Smuzhiyun 	 * We can't rely on user space that the current connector gets disabled
1354*4882a593Smuzhiyun 	 * first before enabling the new connector. Disable all active
1355*4882a593Smuzhiyun 	 * connector links to be on the safe side.
1356*4882a593Smuzhiyun 	 */
1357*4882a593Smuzhiyun 	err = tvp5150_disable_all_input_links(decoder);
1358*4882a593Smuzhiyun 	if (err)
1359*4882a593Smuzhiyun 		return err;
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun 	tvp5150_s_routing(sd, is_svideo ? TVP5150_SVIDEO : tvp5150_pad->index,
1362*4882a593Smuzhiyun 			  flags & MEDIA_LNK_FL_ENABLED ? TVP5150_NORMAL :
1363*4882a593Smuzhiyun 			  TVP5150_BLACK_SCREEN, 0);
1364*4882a593Smuzhiyun 
1365*4882a593Smuzhiyun 	if (flags & MEDIA_LNK_FL_ENABLED) {
1366*4882a593Smuzhiyun 		struct v4l2_fwnode_connector_analog *v4l2ca;
1367*4882a593Smuzhiyun 		u32 new_norm;
1368*4882a593Smuzhiyun 
1369*4882a593Smuzhiyun 		/*
1370*4882a593Smuzhiyun 		 * S-Video connector is conneted to both ports AIP1A and AIP1B.
1371*4882a593Smuzhiyun 		 * Both links must be enabled in one-shot regardless which link
1372*4882a593Smuzhiyun 		 * the user requests.
1373*4882a593Smuzhiyun 		 */
1374*4882a593Smuzhiyun 		if (is_svideo) {
1375*4882a593Smuzhiyun 			err = tvp5150_set_link((struct media_pad *)remote,
1376*4882a593Smuzhiyun 					       other_tvp5150_pad, flags);
1377*4882a593Smuzhiyun 			if (err)
1378*4882a593Smuzhiyun 				return err;
1379*4882a593Smuzhiyun 		}
1380*4882a593Smuzhiyun 
1381*4882a593Smuzhiyun 		if (!decoder->connectors_num)
1382*4882a593Smuzhiyun 			return 0;
1383*4882a593Smuzhiyun 
1384*4882a593Smuzhiyun 		/* Update the current connector */
1385*4882a593Smuzhiyun 		decoder->cur_connector =
1386*4882a593Smuzhiyun 			container_of(remote, struct tvp5150_connector, pad);
1387*4882a593Smuzhiyun 
1388*4882a593Smuzhiyun 		/*
1389*4882a593Smuzhiyun 		 * Do nothing if the new connector supports the same tv-norms as
1390*4882a593Smuzhiyun 		 * the old one.
1391*4882a593Smuzhiyun 		 */
1392*4882a593Smuzhiyun 		v4l2ca = &decoder->cur_connector->base.connector.analog;
1393*4882a593Smuzhiyun 		new_norm = decoder->norm & v4l2ca->sdtv_stds;
1394*4882a593Smuzhiyun 		if (decoder->norm == new_norm)
1395*4882a593Smuzhiyun 			return 0;
1396*4882a593Smuzhiyun 
1397*4882a593Smuzhiyun 		/*
1398*4882a593Smuzhiyun 		 * Fallback to the new connector tv-norms if we can't find any
1399*4882a593Smuzhiyun 		 * common between the current tv-norm and the new one.
1400*4882a593Smuzhiyun 		 */
1401*4882a593Smuzhiyun 		tvp5150_s_std(sd, new_norm ? new_norm : v4l2ca->sdtv_stds);
1402*4882a593Smuzhiyun 	}
1403*4882a593Smuzhiyun 
1404*4882a593Smuzhiyun 	return 0;
1405*4882a593Smuzhiyun }
1406*4882a593Smuzhiyun 
1407*4882a593Smuzhiyun static const struct media_entity_operations tvp5150_sd_media_ops = {
1408*4882a593Smuzhiyun 	.link_setup = tvp5150_link_setup,
1409*4882a593Smuzhiyun };
1410*4882a593Smuzhiyun #endif
1411*4882a593Smuzhiyun /****************************************************************************
1412*4882a593Smuzhiyun 			I2C Command
1413*4882a593Smuzhiyun  ****************************************************************************/
tvp5150_runtime_suspend(struct device * dev)1414*4882a593Smuzhiyun static int __maybe_unused tvp5150_runtime_suspend(struct device *dev)
1415*4882a593Smuzhiyun {
1416*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1417*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1418*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1419*4882a593Smuzhiyun 
1420*4882a593Smuzhiyun 	if (decoder->irq)
1421*4882a593Smuzhiyun 		/* Disable lock interrupt */
1422*4882a593Smuzhiyun 		return regmap_update_bits(decoder->regmap,
1423*4882a593Smuzhiyun 					  TVP5150_INT_ENABLE_REG_A,
1424*4882a593Smuzhiyun 					  TVP5150_INT_A_LOCK, 0);
1425*4882a593Smuzhiyun 	return 0;
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun 
tvp5150_runtime_resume(struct device * dev)1428*4882a593Smuzhiyun static int __maybe_unused tvp5150_runtime_resume(struct device *dev)
1429*4882a593Smuzhiyun {
1430*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1431*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1432*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1433*4882a593Smuzhiyun 
1434*4882a593Smuzhiyun 	if (decoder->irq)
1435*4882a593Smuzhiyun 		/* Enable lock interrupt */
1436*4882a593Smuzhiyun 		return regmap_update_bits(decoder->regmap,
1437*4882a593Smuzhiyun 					  TVP5150_INT_ENABLE_REG_A,
1438*4882a593Smuzhiyun 					  TVP5150_INT_A_LOCK,
1439*4882a593Smuzhiyun 					  TVP5150_INT_A_LOCK);
1440*4882a593Smuzhiyun 	return 0;
1441*4882a593Smuzhiyun }
1442*4882a593Smuzhiyun 
tvp5150_s_stream(struct v4l2_subdev * sd,int enable)1443*4882a593Smuzhiyun static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable)
1444*4882a593Smuzhiyun {
1445*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1446*4882a593Smuzhiyun 	unsigned int mask, val = 0;
1447*4882a593Smuzhiyun 	int ret;
1448*4882a593Smuzhiyun 
1449*4882a593Smuzhiyun 	mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE |
1450*4882a593Smuzhiyun 	       TVP5150_MISC_CTL_CLOCK_OE;
1451*4882a593Smuzhiyun 
1452*4882a593Smuzhiyun 	if (enable) {
1453*4882a593Smuzhiyun 		ret = pm_runtime_get_sync(sd->dev);
1454*4882a593Smuzhiyun 		if (ret < 0) {
1455*4882a593Smuzhiyun 			pm_runtime_put_noidle(sd->dev);
1456*4882a593Smuzhiyun 			return ret;
1457*4882a593Smuzhiyun 		}
1458*4882a593Smuzhiyun 
1459*4882a593Smuzhiyun 		tvp5150_enable(sd);
1460*4882a593Smuzhiyun 
1461*4882a593Smuzhiyun 		/* Enable outputs if decoder is locked */
1462*4882a593Smuzhiyun 		if (decoder->irq)
1463*4882a593Smuzhiyun 			val = decoder->lock ? decoder->oe : 0;
1464*4882a593Smuzhiyun 		else
1465*4882a593Smuzhiyun 			val = decoder->oe;
1466*4882a593Smuzhiyun 
1467*4882a593Smuzhiyun 		v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt);
1468*4882a593Smuzhiyun 	} else {
1469*4882a593Smuzhiyun 		pm_runtime_put(sd->dev);
1470*4882a593Smuzhiyun 	}
1471*4882a593Smuzhiyun 
1472*4882a593Smuzhiyun 	regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val);
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	return 0;
1475*4882a593Smuzhiyun }
1476*4882a593Smuzhiyun 
tvp5150_s_routing(struct v4l2_subdev * sd,u32 input,u32 output,u32 config)1477*4882a593Smuzhiyun static int tvp5150_s_routing(struct v4l2_subdev *sd,
1478*4882a593Smuzhiyun 			     u32 input, u32 output, u32 config)
1479*4882a593Smuzhiyun {
1480*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1481*4882a593Smuzhiyun 
1482*4882a593Smuzhiyun 	decoder->input = input;
1483*4882a593Smuzhiyun 	decoder->output = output;
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun 	if (output == TVP5150_BLACK_SCREEN)
1486*4882a593Smuzhiyun 		decoder->enable = false;
1487*4882a593Smuzhiyun 	else
1488*4882a593Smuzhiyun 		decoder->enable = true;
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun 	tvp5150_selmux(sd);
1491*4882a593Smuzhiyun 	return 0;
1492*4882a593Smuzhiyun }
1493*4882a593Smuzhiyun 
tvp5150_s_raw_fmt(struct v4l2_subdev * sd,struct v4l2_vbi_format * fmt)1494*4882a593Smuzhiyun static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
1495*4882a593Smuzhiyun {
1496*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1497*4882a593Smuzhiyun 
1498*4882a593Smuzhiyun 	/*
1499*4882a593Smuzhiyun 	 * this is for capturing 36 raw vbi lines
1500*4882a593Smuzhiyun 	 * if there's a way to cut off the beginning 2 vbi lines
1501*4882a593Smuzhiyun 	 * with the tvp5150 then the vbi line count could be lowered
1502*4882a593Smuzhiyun 	 * to 17 lines/field again, although I couldn't find a register
1503*4882a593Smuzhiyun 	 * which could do that cropping
1504*4882a593Smuzhiyun 	 */
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	if (fmt->sample_format == V4L2_PIX_FMT_GREY)
1507*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_LUMA_PROC_CTL_1, 0x70);
1508*4882a593Smuzhiyun 	if (fmt->count[0] == 18 && fmt->count[1] == 18) {
1509*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START,
1510*4882a593Smuzhiyun 			     0x00);
1511*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP, 0x01);
1512*4882a593Smuzhiyun 	}
1513*4882a593Smuzhiyun 	return 0;
1514*4882a593Smuzhiyun }
1515*4882a593Smuzhiyun 
tvp5150_s_sliced_fmt(struct v4l2_subdev * sd,struct v4l2_sliced_vbi_format * svbi)1516*4882a593Smuzhiyun static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1517*4882a593Smuzhiyun {
1518*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1519*4882a593Smuzhiyun 	int i;
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun 	if (svbi->service_set != 0) {
1522*4882a593Smuzhiyun 		for (i = 0; i <= 23; i++) {
1523*4882a593Smuzhiyun 			svbi->service_lines[1][i] = 0;
1524*4882a593Smuzhiyun 			svbi->service_lines[0][i] =
1525*4882a593Smuzhiyun 				tvp5150_set_vbi(sd, svbi->service_lines[0][i],
1526*4882a593Smuzhiyun 						0xf0, i, 3);
1527*4882a593Smuzhiyun 		}
1528*4882a593Smuzhiyun 		/* Enables FIFO */
1529*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 1);
1530*4882a593Smuzhiyun 	} else {
1531*4882a593Smuzhiyun 		/* Disables FIFO*/
1532*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 0);
1533*4882a593Smuzhiyun 
1534*4882a593Smuzhiyun 		/* Disable Full Field */
1535*4882a593Smuzhiyun 		regmap_write(decoder->regmap, TVP5150_FULL_FIELD_ENA, 0);
1536*4882a593Smuzhiyun 
1537*4882a593Smuzhiyun 		/* Disable Line modes */
1538*4882a593Smuzhiyun 		for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
1539*4882a593Smuzhiyun 			regmap_write(decoder->regmap, i, 0xff);
1540*4882a593Smuzhiyun 	}
1541*4882a593Smuzhiyun 	return 0;
1542*4882a593Smuzhiyun }
1543*4882a593Smuzhiyun 
tvp5150_g_sliced_fmt(struct v4l2_subdev * sd,struct v4l2_sliced_vbi_format * svbi)1544*4882a593Smuzhiyun static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1545*4882a593Smuzhiyun {
1546*4882a593Smuzhiyun 	int i, mask = 0;
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 	memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 	for (i = 0; i <= 23; i++) {
1551*4882a593Smuzhiyun 		svbi->service_lines[0][i] =
1552*4882a593Smuzhiyun 			tvp5150_get_vbi(sd, i);
1553*4882a593Smuzhiyun 		mask |= svbi->service_lines[0][i];
1554*4882a593Smuzhiyun 	}
1555*4882a593Smuzhiyun 	svbi->service_set = mask;
1556*4882a593Smuzhiyun 	return 0;
1557*4882a593Smuzhiyun }
1558*4882a593Smuzhiyun 
1559*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_ADV_DEBUG
tvp5150_g_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)1560*4882a593Smuzhiyun static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1561*4882a593Smuzhiyun {
1562*4882a593Smuzhiyun 	int res;
1563*4882a593Smuzhiyun 
1564*4882a593Smuzhiyun 	res = tvp5150_read(sd, reg->reg & 0xff);
1565*4882a593Smuzhiyun 	if (res < 0) {
1566*4882a593Smuzhiyun 		dev_err(sd->dev, "%s: failed with error = %d\n", __func__, res);
1567*4882a593Smuzhiyun 		return res;
1568*4882a593Smuzhiyun 	}
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun 	reg->val = res;
1571*4882a593Smuzhiyun 	reg->size = 1;
1572*4882a593Smuzhiyun 	return 0;
1573*4882a593Smuzhiyun }
1574*4882a593Smuzhiyun 
tvp5150_s_register(struct v4l2_subdev * sd,const struct v4l2_dbg_register * reg)1575*4882a593Smuzhiyun static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
1576*4882a593Smuzhiyun {
1577*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1578*4882a593Smuzhiyun 
1579*4882a593Smuzhiyun 	return regmap_write(decoder->regmap, reg->reg & 0xff, reg->val & 0xff);
1580*4882a593Smuzhiyun }
1581*4882a593Smuzhiyun #endif
1582*4882a593Smuzhiyun 
tvp5150_subscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1583*4882a593Smuzhiyun static int tvp5150_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1584*4882a593Smuzhiyun 				   struct v4l2_event_subscription *sub)
1585*4882a593Smuzhiyun {
1586*4882a593Smuzhiyun 	switch (sub->type) {
1587*4882a593Smuzhiyun 	case V4L2_EVENT_SOURCE_CHANGE:
1588*4882a593Smuzhiyun 		return v4l2_src_change_event_subdev_subscribe(sd, fh, sub);
1589*4882a593Smuzhiyun 	case V4L2_EVENT_CTRL:
1590*4882a593Smuzhiyun 		return v4l2_ctrl_subdev_subscribe_event(sd, fh, sub);
1591*4882a593Smuzhiyun 	default:
1592*4882a593Smuzhiyun 		return -EINVAL;
1593*4882a593Smuzhiyun 	}
1594*4882a593Smuzhiyun }
1595*4882a593Smuzhiyun 
tvp5150_g_tuner(struct v4l2_subdev * sd,struct v4l2_tuner * vt)1596*4882a593Smuzhiyun static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1597*4882a593Smuzhiyun {
1598*4882a593Smuzhiyun 	int status = tvp5150_read(sd, 0x88);
1599*4882a593Smuzhiyun 
1600*4882a593Smuzhiyun 	vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
1601*4882a593Smuzhiyun 	return 0;
1602*4882a593Smuzhiyun }
1603*4882a593Smuzhiyun 
tvp5150_registered(struct v4l2_subdev * sd)1604*4882a593Smuzhiyun static int tvp5150_registered(struct v4l2_subdev *sd)
1605*4882a593Smuzhiyun {
1606*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1607*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
1608*4882a593Smuzhiyun 	unsigned int i;
1609*4882a593Smuzhiyun 	int ret;
1610*4882a593Smuzhiyun 
1611*4882a593Smuzhiyun 	/*
1612*4882a593Smuzhiyun 	 * Setup connector pads and links. Enable the link to the first
1613*4882a593Smuzhiyun 	 * available connector per default.
1614*4882a593Smuzhiyun 	 */
1615*4882a593Smuzhiyun 	for (i = 0; i < decoder->connectors_num; i++) {
1616*4882a593Smuzhiyun 		struct media_entity *con = &decoder->connectors[i].ent;
1617*4882a593Smuzhiyun 		struct media_pad *pad = &decoder->connectors[i].pad;
1618*4882a593Smuzhiyun 		struct v4l2_fwnode_connector *v4l2c =
1619*4882a593Smuzhiyun 			&decoder->connectors[i].base;
1620*4882a593Smuzhiyun 		struct v4l2_connector_link *link =
1621*4882a593Smuzhiyun 			v4l2_connector_first_link(v4l2c);
1622*4882a593Smuzhiyun 		unsigned int port = link->fwnode_link.remote_port;
1623*4882a593Smuzhiyun 		unsigned int flags = i ? 0 : MEDIA_LNK_FL_ENABLED;
1624*4882a593Smuzhiyun 		bool is_svideo = v4l2c->type == V4L2_CONN_SVIDEO;
1625*4882a593Smuzhiyun 
1626*4882a593Smuzhiyun 		pad->flags = MEDIA_PAD_FL_SOURCE;
1627*4882a593Smuzhiyun 		ret = media_entity_pads_init(con, 1, pad);
1628*4882a593Smuzhiyun 		if (ret < 0)
1629*4882a593Smuzhiyun 			goto err;
1630*4882a593Smuzhiyun 
1631*4882a593Smuzhiyun 		ret = media_device_register_entity(sd->v4l2_dev->mdev, con);
1632*4882a593Smuzhiyun 		if (ret < 0)
1633*4882a593Smuzhiyun 			goto err;
1634*4882a593Smuzhiyun 
1635*4882a593Smuzhiyun 		ret = media_create_pad_link(con, 0, &sd->entity, port, flags);
1636*4882a593Smuzhiyun 		if (ret < 0)
1637*4882a593Smuzhiyun 			goto err;
1638*4882a593Smuzhiyun 
1639*4882a593Smuzhiyun 		if (is_svideo) {
1640*4882a593Smuzhiyun 			/*
1641*4882a593Smuzhiyun 			 * Check tvp5150_link_setup() comments for more
1642*4882a593Smuzhiyun 			 * information.
1643*4882a593Smuzhiyun 			 */
1644*4882a593Smuzhiyun 			link = v4l2_connector_last_link(v4l2c);
1645*4882a593Smuzhiyun 			port = link->fwnode_link.remote_port;
1646*4882a593Smuzhiyun 			ret = media_create_pad_link(con, 0, &sd->entity, port,
1647*4882a593Smuzhiyun 						    flags);
1648*4882a593Smuzhiyun 			if (ret < 0)
1649*4882a593Smuzhiyun 				goto err;
1650*4882a593Smuzhiyun 		}
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun 		/* Enable default input. */
1653*4882a593Smuzhiyun 		if (flags == MEDIA_LNK_FL_ENABLED) {
1654*4882a593Smuzhiyun 			decoder->input =
1655*4882a593Smuzhiyun 				is_svideo ? TVP5150_SVIDEO :
1656*4882a593Smuzhiyun 				port == 0 ? TVP5150_COMPOSITE0 :
1657*4882a593Smuzhiyun 				TVP5150_COMPOSITE1;
1658*4882a593Smuzhiyun 
1659*4882a593Smuzhiyun 			tvp5150_selmux(sd);
1660*4882a593Smuzhiyun 			decoder->cur_connector = &decoder->connectors[i];
1661*4882a593Smuzhiyun 			tvp5150_s_std(sd, v4l2c->connector.analog.sdtv_stds);
1662*4882a593Smuzhiyun 		}
1663*4882a593Smuzhiyun 	}
1664*4882a593Smuzhiyun 
1665*4882a593Smuzhiyun 	return 0;
1666*4882a593Smuzhiyun 
1667*4882a593Smuzhiyun err:
1668*4882a593Smuzhiyun 	for (i = 0; i < decoder->connectors_num; i++) {
1669*4882a593Smuzhiyun 		media_device_unregister_entity(&decoder->connectors[i].ent);
1670*4882a593Smuzhiyun 		media_entity_cleanup(&decoder->connectors[i].ent);
1671*4882a593Smuzhiyun 	}
1672*4882a593Smuzhiyun 	return ret;
1673*4882a593Smuzhiyun #endif
1674*4882a593Smuzhiyun 
1675*4882a593Smuzhiyun 	return 0;
1676*4882a593Smuzhiyun }
1677*4882a593Smuzhiyun 
tvp5150_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1678*4882a593Smuzhiyun static int tvp5150_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1679*4882a593Smuzhiyun {
1680*4882a593Smuzhiyun 	int ret;
1681*4882a593Smuzhiyun 
1682*4882a593Smuzhiyun 	ret = pm_runtime_get_sync(sd->dev);
1683*4882a593Smuzhiyun 	if (ret < 0) {
1684*4882a593Smuzhiyun 		pm_runtime_put_noidle(sd->dev);
1685*4882a593Smuzhiyun 		return ret;
1686*4882a593Smuzhiyun 	}
1687*4882a593Smuzhiyun 
1688*4882a593Smuzhiyun 	return 0;
1689*4882a593Smuzhiyun }
1690*4882a593Smuzhiyun 
tvp5150_close(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1691*4882a593Smuzhiyun static int tvp5150_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1692*4882a593Smuzhiyun {
1693*4882a593Smuzhiyun 	pm_runtime_put(sd->dev);
1694*4882a593Smuzhiyun 
1695*4882a593Smuzhiyun 	return 0;
1696*4882a593Smuzhiyun }
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
1699*4882a593Smuzhiyun 
1700*4882a593Smuzhiyun static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = {
1701*4882a593Smuzhiyun 	.s_ctrl = tvp5150_s_ctrl,
1702*4882a593Smuzhiyun };
1703*4882a593Smuzhiyun 
1704*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops tvp5150_core_ops = {
1705*4882a593Smuzhiyun 	.log_status = tvp5150_log_status,
1706*4882a593Smuzhiyun 	.reset = tvp5150_reset,
1707*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_ADV_DEBUG
1708*4882a593Smuzhiyun 	.g_register = tvp5150_g_register,
1709*4882a593Smuzhiyun 	.s_register = tvp5150_s_register,
1710*4882a593Smuzhiyun #endif
1711*4882a593Smuzhiyun 	.subscribe_event = tvp5150_subscribe_event,
1712*4882a593Smuzhiyun 	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
1713*4882a593Smuzhiyun };
1714*4882a593Smuzhiyun 
1715*4882a593Smuzhiyun static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = {
1716*4882a593Smuzhiyun 	.g_tuner = tvp5150_g_tuner,
1717*4882a593Smuzhiyun };
1718*4882a593Smuzhiyun 
1719*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
1720*4882a593Smuzhiyun 	.s_std = tvp5150_s_std,
1721*4882a593Smuzhiyun 	.g_std = tvp5150_g_std,
1722*4882a593Smuzhiyun 	.querystd = tvp5150_querystd,
1723*4882a593Smuzhiyun 	.s_stream = tvp5150_s_stream,
1724*4882a593Smuzhiyun 	.s_routing = tvp5150_s_routing,
1725*4882a593Smuzhiyun };
1726*4882a593Smuzhiyun 
1727*4882a593Smuzhiyun static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = {
1728*4882a593Smuzhiyun 	.g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap,
1729*4882a593Smuzhiyun 	.g_sliced_fmt = tvp5150_g_sliced_fmt,
1730*4882a593Smuzhiyun 	.s_sliced_fmt = tvp5150_s_sliced_fmt,
1731*4882a593Smuzhiyun 	.s_raw_fmt = tvp5150_s_raw_fmt,
1732*4882a593Smuzhiyun };
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = {
1735*4882a593Smuzhiyun 	.init_cfg = tvp5150_init_cfg,
1736*4882a593Smuzhiyun 	.enum_mbus_code = tvp5150_enum_mbus_code,
1737*4882a593Smuzhiyun 	.enum_frame_size = tvp5150_enum_frame_size,
1738*4882a593Smuzhiyun 	.set_fmt = tvp5150_fill_fmt,
1739*4882a593Smuzhiyun 	.get_fmt = tvp5150_fill_fmt,
1740*4882a593Smuzhiyun 	.get_selection = tvp5150_get_selection,
1741*4882a593Smuzhiyun 	.set_selection = tvp5150_set_selection,
1742*4882a593Smuzhiyun 	.get_mbus_config = tvp5150_get_mbus_config,
1743*4882a593Smuzhiyun };
1744*4882a593Smuzhiyun 
1745*4882a593Smuzhiyun static const struct v4l2_subdev_ops tvp5150_ops = {
1746*4882a593Smuzhiyun 	.core = &tvp5150_core_ops,
1747*4882a593Smuzhiyun 	.tuner = &tvp5150_tuner_ops,
1748*4882a593Smuzhiyun 	.video = &tvp5150_video_ops,
1749*4882a593Smuzhiyun 	.vbi = &tvp5150_vbi_ops,
1750*4882a593Smuzhiyun 	.pad = &tvp5150_pad_ops,
1751*4882a593Smuzhiyun };
1752*4882a593Smuzhiyun 
1753*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops tvp5150_internal_ops = {
1754*4882a593Smuzhiyun 	.registered = tvp5150_registered,
1755*4882a593Smuzhiyun 	.open = tvp5150_open,
1756*4882a593Smuzhiyun 	.close = tvp5150_close,
1757*4882a593Smuzhiyun };
1758*4882a593Smuzhiyun 
1759*4882a593Smuzhiyun /****************************************************************************
1760*4882a593Smuzhiyun 			I2C Client & Driver
1761*4882a593Smuzhiyun  ****************************************************************************/
1762*4882a593Smuzhiyun 
1763*4882a593Smuzhiyun static const struct regmap_range tvp5150_readable_ranges[] = {
1764*4882a593Smuzhiyun 	{
1765*4882a593Smuzhiyun 		.range_min = TVP5150_VD_IN_SRC_SEL_1,
1766*4882a593Smuzhiyun 		.range_max = TVP5150_AUTOSW_MSK,
1767*4882a593Smuzhiyun 	}, {
1768*4882a593Smuzhiyun 		.range_min = TVP5150_COLOR_KIL_THSH_CTL,
1769*4882a593Smuzhiyun 		.range_max = TVP5150_CONF_SHARED_PIN,
1770*4882a593Smuzhiyun 	}, {
1771*4882a593Smuzhiyun 		.range_min = TVP5150_ACT_VD_CROP_ST_MSB,
1772*4882a593Smuzhiyun 		.range_max = TVP5150_HORIZ_SYNC_START,
1773*4882a593Smuzhiyun 	}, {
1774*4882a593Smuzhiyun 		.range_min = TVP5150_VERT_BLANKING_START,
1775*4882a593Smuzhiyun 		.range_max = TVP5150_INTT_CONFIG_REG_B,
1776*4882a593Smuzhiyun 	}, {
1777*4882a593Smuzhiyun 		.range_min = TVP5150_VIDEO_STD,
1778*4882a593Smuzhiyun 		.range_max = TVP5150_VIDEO_STD,
1779*4882a593Smuzhiyun 	}, {
1780*4882a593Smuzhiyun 		.range_min = TVP5150_CB_GAIN_FACT,
1781*4882a593Smuzhiyun 		.range_max = TVP5150_REV_SELECT,
1782*4882a593Smuzhiyun 	}, {
1783*4882a593Smuzhiyun 		.range_min = TVP5150_MSB_DEV_ID,
1784*4882a593Smuzhiyun 		.range_max = TVP5150_STATUS_REG_5,
1785*4882a593Smuzhiyun 	}, {
1786*4882a593Smuzhiyun 		.range_min = TVP5150_CC_DATA_INI,
1787*4882a593Smuzhiyun 		.range_max = TVP5150_TELETEXT_FIL_ENA,
1788*4882a593Smuzhiyun 	}, {
1789*4882a593Smuzhiyun 		.range_min = TVP5150_INT_STATUS_REG_A,
1790*4882a593Smuzhiyun 		.range_max = TVP5150_FIFO_OUT_CTRL,
1791*4882a593Smuzhiyun 	}, {
1792*4882a593Smuzhiyun 		.range_min = TVP5150_FULL_FIELD_ENA,
1793*4882a593Smuzhiyun 		.range_max = TVP5150_FULL_FIELD_MODE_REG,
1794*4882a593Smuzhiyun 	},
1795*4882a593Smuzhiyun };
1796*4882a593Smuzhiyun 
tvp5150_volatile_reg(struct device * dev,unsigned int reg)1797*4882a593Smuzhiyun static bool tvp5150_volatile_reg(struct device *dev, unsigned int reg)
1798*4882a593Smuzhiyun {
1799*4882a593Smuzhiyun 	switch (reg) {
1800*4882a593Smuzhiyun 	case TVP5150_VERT_LN_COUNT_MSB:
1801*4882a593Smuzhiyun 	case TVP5150_VERT_LN_COUNT_LSB:
1802*4882a593Smuzhiyun 	case TVP5150_INT_STATUS_REG_A:
1803*4882a593Smuzhiyun 	case TVP5150_INT_STATUS_REG_B:
1804*4882a593Smuzhiyun 	case TVP5150_INT_ACTIVE_REG_B:
1805*4882a593Smuzhiyun 	case TVP5150_STATUS_REG_1:
1806*4882a593Smuzhiyun 	case TVP5150_STATUS_REG_2:
1807*4882a593Smuzhiyun 	case TVP5150_STATUS_REG_3:
1808*4882a593Smuzhiyun 	case TVP5150_STATUS_REG_4:
1809*4882a593Smuzhiyun 	case TVP5150_STATUS_REG_5:
1810*4882a593Smuzhiyun 	/* CC, WSS, VPS, VITC data? */
1811*4882a593Smuzhiyun 	case TVP5150_VBI_FIFO_READ_DATA:
1812*4882a593Smuzhiyun 	case TVP5150_VDP_STATUS_REG:
1813*4882a593Smuzhiyun 	case TVP5150_FIFO_WORD_COUNT:
1814*4882a593Smuzhiyun 		return true;
1815*4882a593Smuzhiyun 	default:
1816*4882a593Smuzhiyun 		return false;
1817*4882a593Smuzhiyun 	}
1818*4882a593Smuzhiyun }
1819*4882a593Smuzhiyun 
1820*4882a593Smuzhiyun static const struct regmap_access_table tvp5150_readable_table = {
1821*4882a593Smuzhiyun 	.yes_ranges = tvp5150_readable_ranges,
1822*4882a593Smuzhiyun 	.n_yes_ranges = ARRAY_SIZE(tvp5150_readable_ranges),
1823*4882a593Smuzhiyun };
1824*4882a593Smuzhiyun 
1825*4882a593Smuzhiyun static struct regmap_config tvp5150_config = {
1826*4882a593Smuzhiyun 	.reg_bits = 8,
1827*4882a593Smuzhiyun 	.val_bits = 8,
1828*4882a593Smuzhiyun 	.max_register = 0xff,
1829*4882a593Smuzhiyun 
1830*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
1831*4882a593Smuzhiyun 
1832*4882a593Smuzhiyun 	.rd_table = &tvp5150_readable_table,
1833*4882a593Smuzhiyun 	.volatile_reg = tvp5150_volatile_reg,
1834*4882a593Smuzhiyun };
1835*4882a593Smuzhiyun 
tvp5150_detect_version(struct tvp5150 * core)1836*4882a593Smuzhiyun static int tvp5150_detect_version(struct tvp5150 *core)
1837*4882a593Smuzhiyun {
1838*4882a593Smuzhiyun 	struct v4l2_subdev *sd = &core->sd;
1839*4882a593Smuzhiyun 	struct i2c_client *c = v4l2_get_subdevdata(sd);
1840*4882a593Smuzhiyun 	u8 regs[4];
1841*4882a593Smuzhiyun 	int res;
1842*4882a593Smuzhiyun 
1843*4882a593Smuzhiyun 	/*
1844*4882a593Smuzhiyun 	 * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID,
1845*4882a593Smuzhiyun 	 * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER
1846*4882a593Smuzhiyun 	 */
1847*4882a593Smuzhiyun 	res = regmap_bulk_read(core->regmap, TVP5150_MSB_DEV_ID, regs, 4);
1848*4882a593Smuzhiyun 	if (res < 0) {
1849*4882a593Smuzhiyun 		dev_err(&c->dev, "reading ID registers failed: %d\n", res);
1850*4882a593Smuzhiyun 		return res;
1851*4882a593Smuzhiyun 	}
1852*4882a593Smuzhiyun 
1853*4882a593Smuzhiyun 	core->dev_id = (regs[0] << 8) | regs[1];
1854*4882a593Smuzhiyun 	core->rom_ver = (regs[2] << 8) | regs[3];
1855*4882a593Smuzhiyun 
1856*4882a593Smuzhiyun 	dev_info(sd->dev, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n",
1857*4882a593Smuzhiyun 		  core->dev_id, regs[2], regs[3], c->addr << 1,
1858*4882a593Smuzhiyun 		  c->adapter->name);
1859*4882a593Smuzhiyun 
1860*4882a593Smuzhiyun 	if (core->dev_id == 0x5150 && core->rom_ver == 0x0321) {
1861*4882a593Smuzhiyun 		dev_info(sd->dev, "tvp5150a detected.\n");
1862*4882a593Smuzhiyun 	} else if (core->dev_id == 0x5150 && core->rom_ver == 0x0400) {
1863*4882a593Smuzhiyun 		dev_info(sd->dev, "tvp5150am1 detected.\n");
1864*4882a593Smuzhiyun 
1865*4882a593Smuzhiyun 		/* ITU-T BT.656.4 timing */
1866*4882a593Smuzhiyun 		regmap_write(core->regmap, TVP5150_REV_SELECT, 0);
1867*4882a593Smuzhiyun 	} else if (core->dev_id == 0x5151 && core->rom_ver == 0x0100) {
1868*4882a593Smuzhiyun 		dev_info(sd->dev, "tvp5151 detected.\n");
1869*4882a593Smuzhiyun 	} else {
1870*4882a593Smuzhiyun 		dev_info(sd->dev, "*** unknown tvp%04x chip detected.\n",
1871*4882a593Smuzhiyun 			  core->dev_id);
1872*4882a593Smuzhiyun 	}
1873*4882a593Smuzhiyun 
1874*4882a593Smuzhiyun 	return 0;
1875*4882a593Smuzhiyun }
1876*4882a593Smuzhiyun 
tvp5150_init(struct i2c_client * c)1877*4882a593Smuzhiyun static int tvp5150_init(struct i2c_client *c)
1878*4882a593Smuzhiyun {
1879*4882a593Smuzhiyun 	struct gpio_desc *pdn_gpio;
1880*4882a593Smuzhiyun 	struct gpio_desc *reset_gpio;
1881*4882a593Smuzhiyun 
1882*4882a593Smuzhiyun 	pdn_gpio = devm_gpiod_get_optional(&c->dev, "pdn", GPIOD_OUT_HIGH);
1883*4882a593Smuzhiyun 	if (IS_ERR(pdn_gpio))
1884*4882a593Smuzhiyun 		return PTR_ERR(pdn_gpio);
1885*4882a593Smuzhiyun 
1886*4882a593Smuzhiyun 	if (pdn_gpio) {
1887*4882a593Smuzhiyun 		gpiod_set_value_cansleep(pdn_gpio, 0);
1888*4882a593Smuzhiyun 		/* Delay time between power supplies active and reset */
1889*4882a593Smuzhiyun 		msleep(20);
1890*4882a593Smuzhiyun 	}
1891*4882a593Smuzhiyun 
1892*4882a593Smuzhiyun 	reset_gpio = devm_gpiod_get_optional(&c->dev, "reset", GPIOD_OUT_HIGH);
1893*4882a593Smuzhiyun 	if (IS_ERR(reset_gpio))
1894*4882a593Smuzhiyun 		return PTR_ERR(reset_gpio);
1895*4882a593Smuzhiyun 
1896*4882a593Smuzhiyun 	if (reset_gpio) {
1897*4882a593Smuzhiyun 		/* RESETB pulse duration */
1898*4882a593Smuzhiyun 		ndelay(500);
1899*4882a593Smuzhiyun 		gpiod_set_value_cansleep(reset_gpio, 0);
1900*4882a593Smuzhiyun 		/* Delay time between end of reset to I2C active */
1901*4882a593Smuzhiyun 		usleep_range(200, 250);
1902*4882a593Smuzhiyun 	}
1903*4882a593Smuzhiyun 
1904*4882a593Smuzhiyun 	return 0;
1905*4882a593Smuzhiyun }
1906*4882a593Smuzhiyun 
1907*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
tvp5150_mc_init(struct tvp5150 * decoder)1908*4882a593Smuzhiyun static int tvp5150_mc_init(struct tvp5150 *decoder)
1909*4882a593Smuzhiyun {
1910*4882a593Smuzhiyun 	struct v4l2_subdev *sd = &decoder->sd;
1911*4882a593Smuzhiyun 	unsigned int i;
1912*4882a593Smuzhiyun 
1913*4882a593Smuzhiyun 	sd->entity.ops = &tvp5150_sd_media_ops;
1914*4882a593Smuzhiyun 	sd->entity.function = MEDIA_ENT_F_ATV_DECODER;
1915*4882a593Smuzhiyun 
1916*4882a593Smuzhiyun 	for (i = 0; i < TVP5150_NUM_PADS - 1; i++) {
1917*4882a593Smuzhiyun 		decoder->pads[i].flags = MEDIA_PAD_FL_SINK;
1918*4882a593Smuzhiyun 		decoder->pads[i].sig_type = PAD_SIGNAL_ANALOG;
1919*4882a593Smuzhiyun 	}
1920*4882a593Smuzhiyun 
1921*4882a593Smuzhiyun 	decoder->pads[i].flags = MEDIA_PAD_FL_SOURCE;
1922*4882a593Smuzhiyun 	decoder->pads[i].sig_type = PAD_SIGNAL_DV;
1923*4882a593Smuzhiyun 
1924*4882a593Smuzhiyun 	return media_entity_pads_init(&sd->entity, TVP5150_NUM_PADS,
1925*4882a593Smuzhiyun 				      decoder->pads);
1926*4882a593Smuzhiyun }
1927*4882a593Smuzhiyun 
1928*4882a593Smuzhiyun #else /* !defined(CONFIG_MEDIA_CONTROLLER) */
1929*4882a593Smuzhiyun 
tvp5150_mc_init(struct tvp5150 * decoder)1930*4882a593Smuzhiyun static inline int tvp5150_mc_init(struct tvp5150 *decoder)
1931*4882a593Smuzhiyun {
1932*4882a593Smuzhiyun 	return 0;
1933*4882a593Smuzhiyun }
1934*4882a593Smuzhiyun #endif /* defined(CONFIG_MEDIA_CONTROLLER) */
1935*4882a593Smuzhiyun 
tvp5150_validate_connectors(struct tvp5150 * decoder)1936*4882a593Smuzhiyun static int tvp5150_validate_connectors(struct tvp5150 *decoder)
1937*4882a593Smuzhiyun {
1938*4882a593Smuzhiyun 	struct device *dev = decoder->sd.dev;
1939*4882a593Smuzhiyun 	struct tvp5150_connector *tvpc;
1940*4882a593Smuzhiyun 	struct v4l2_fwnode_connector *v4l2c;
1941*4882a593Smuzhiyun 	unsigned int i;
1942*4882a593Smuzhiyun 
1943*4882a593Smuzhiyun 	if (!decoder->connectors_num) {
1944*4882a593Smuzhiyun 		dev_err(dev, "No valid connector found\n");
1945*4882a593Smuzhiyun 		return -ENODEV;
1946*4882a593Smuzhiyun 	}
1947*4882a593Smuzhiyun 
1948*4882a593Smuzhiyun 	for (i = 0; i < decoder->connectors_num; i++) {
1949*4882a593Smuzhiyun 		struct v4l2_connector_link *link0 = NULL;
1950*4882a593Smuzhiyun 		struct v4l2_connector_link *link1;
1951*4882a593Smuzhiyun 
1952*4882a593Smuzhiyun 		tvpc = &decoder->connectors[i];
1953*4882a593Smuzhiyun 		v4l2c = &tvpc->base;
1954*4882a593Smuzhiyun 
1955*4882a593Smuzhiyun 		if (v4l2c->type == V4L2_CONN_COMPOSITE) {
1956*4882a593Smuzhiyun 			if (v4l2c->nr_of_links != 1) {
1957*4882a593Smuzhiyun 				dev_err(dev, "Composite: connector needs 1 link\n");
1958*4882a593Smuzhiyun 				return -EINVAL;
1959*4882a593Smuzhiyun 			}
1960*4882a593Smuzhiyun 			link0 = v4l2_connector_first_link(v4l2c);
1961*4882a593Smuzhiyun 			if (!link0) {
1962*4882a593Smuzhiyun 				dev_err(dev, "Composite: invalid first link\n");
1963*4882a593Smuzhiyun 				return -EINVAL;
1964*4882a593Smuzhiyun 			}
1965*4882a593Smuzhiyun 			if (link0->fwnode_link.remote_id == 1) {
1966*4882a593Smuzhiyun 				dev_err(dev, "Composite: invalid endpoint id\n");
1967*4882a593Smuzhiyun 				return -EINVAL;
1968*4882a593Smuzhiyun 			}
1969*4882a593Smuzhiyun 		}
1970*4882a593Smuzhiyun 
1971*4882a593Smuzhiyun 		if (v4l2c->type == V4L2_CONN_SVIDEO) {
1972*4882a593Smuzhiyun 			if (v4l2c->nr_of_links != 2) {
1973*4882a593Smuzhiyun 				dev_err(dev, "SVideo: connector needs 2 links\n");
1974*4882a593Smuzhiyun 				return -EINVAL;
1975*4882a593Smuzhiyun 			}
1976*4882a593Smuzhiyun 			link0 = v4l2_connector_first_link(v4l2c);
1977*4882a593Smuzhiyun 			if (!link0) {
1978*4882a593Smuzhiyun 				dev_err(dev, "SVideo: invalid first link\n");
1979*4882a593Smuzhiyun 				return -EINVAL;
1980*4882a593Smuzhiyun 			}
1981*4882a593Smuzhiyun 			link1 = v4l2_connector_last_link(v4l2c);
1982*4882a593Smuzhiyun 			if (link0->fwnode_link.remote_port ==
1983*4882a593Smuzhiyun 			    link1->fwnode_link.remote_port) {
1984*4882a593Smuzhiyun 				dev_err(dev, "SVideo: invalid link setup\n");
1985*4882a593Smuzhiyun 				return -EINVAL;
1986*4882a593Smuzhiyun 			}
1987*4882a593Smuzhiyun 		}
1988*4882a593Smuzhiyun 
1989*4882a593Smuzhiyun 		if (!(v4l2c->connector.analog.sdtv_stds & TVP5150_STD_MASK)) {
1990*4882a593Smuzhiyun 			dev_err(dev, "Unsupported tv-norm on connector %s\n",
1991*4882a593Smuzhiyun 				v4l2c->name);
1992*4882a593Smuzhiyun 			return -EINVAL;
1993*4882a593Smuzhiyun 		}
1994*4882a593Smuzhiyun 	}
1995*4882a593Smuzhiyun 
1996*4882a593Smuzhiyun 	return 0;
1997*4882a593Smuzhiyun }
1998*4882a593Smuzhiyun 
tvp5150_parse_dt(struct tvp5150 * decoder,struct device_node * np)1999*4882a593Smuzhiyun static int tvp5150_parse_dt(struct tvp5150 *decoder, struct device_node *np)
2000*4882a593Smuzhiyun {
2001*4882a593Smuzhiyun 	struct device *dev = decoder->sd.dev;
2002*4882a593Smuzhiyun 	struct v4l2_fwnode_endpoint bus_cfg = {
2003*4882a593Smuzhiyun 		.bus_type = V4L2_MBUS_UNKNOWN
2004*4882a593Smuzhiyun 	};
2005*4882a593Smuzhiyun 	struct device_node *ep_np;
2006*4882a593Smuzhiyun 	struct tvp5150_connector *tvpc;
2007*4882a593Smuzhiyun 	struct v4l2_fwnode_connector *v4l2c;
2008*4882a593Smuzhiyun 	unsigned int flags, ep_num;
2009*4882a593Smuzhiyun 	unsigned int i;
2010*4882a593Smuzhiyun 	int ret;
2011*4882a593Smuzhiyun 
2012*4882a593Smuzhiyun 	/* At least 1 output and 1 input */
2013*4882a593Smuzhiyun 	ep_num = of_graph_get_endpoint_count(np);
2014*4882a593Smuzhiyun 	if (ep_num < 2 || ep_num > 5) {
2015*4882a593Smuzhiyun 		dev_err(dev, "At least 1 input and 1 output must be connected to the device.\n");
2016*4882a593Smuzhiyun 		return -EINVAL;
2017*4882a593Smuzhiyun 	}
2018*4882a593Smuzhiyun 
2019*4882a593Smuzhiyun 	/* Layout if all connectors are used:
2020*4882a593Smuzhiyun 	 *
2021*4882a593Smuzhiyun 	 * tvp-5150 port@0 (AIP1A)
2022*4882a593Smuzhiyun 	 *	endpoint@0 -----------> Comp0-Con  port
2023*4882a593Smuzhiyun 	 *	endpoint@1 --------+--> Svideo-Con port
2024*4882a593Smuzhiyun 	 * tvp-5150 port@1 (AIP1B) |
2025*4882a593Smuzhiyun 	 *	endpoint@1 --------+
2026*4882a593Smuzhiyun 	 *	endpoint@0 -----------> Comp1-Con  port
2027*4882a593Smuzhiyun 	 * tvp-5150 port@2
2028*4882a593Smuzhiyun 	 *	endpoint (video bitstream output at YOUT[0-7] parallel bus)
2029*4882a593Smuzhiyun 	 */
2030*4882a593Smuzhiyun 	for_each_endpoint_of_node(np, ep_np) {
2031*4882a593Smuzhiyun 		struct fwnode_handle *ep_fwnode = of_fwnode_handle(ep_np);
2032*4882a593Smuzhiyun 		unsigned int next_connector = decoder->connectors_num;
2033*4882a593Smuzhiyun 		struct of_endpoint ep;
2034*4882a593Smuzhiyun 
2035*4882a593Smuzhiyun 		of_graph_parse_endpoint(ep_np, &ep);
2036*4882a593Smuzhiyun 		if (ep.port > 1 || ep.id > 1) {
2037*4882a593Smuzhiyun 			dev_dbg(dev, "Ignore connector on port@%u/ep@%u\n",
2038*4882a593Smuzhiyun 				ep.port, ep.id);
2039*4882a593Smuzhiyun 			continue;
2040*4882a593Smuzhiyun 		}
2041*4882a593Smuzhiyun 
2042*4882a593Smuzhiyun 		tvpc = &decoder->connectors[next_connector];
2043*4882a593Smuzhiyun 		v4l2c = &tvpc->base;
2044*4882a593Smuzhiyun 
2045*4882a593Smuzhiyun 		if (ep.port == 0 || (ep.port == 1 && ep.id == 0)) {
2046*4882a593Smuzhiyun 			ret = v4l2_fwnode_connector_parse(ep_fwnode, v4l2c);
2047*4882a593Smuzhiyun 			if (ret)
2048*4882a593Smuzhiyun 				goto err_put;
2049*4882a593Smuzhiyun 			ret = v4l2_fwnode_connector_add_link(ep_fwnode, v4l2c);
2050*4882a593Smuzhiyun 			if (ret)
2051*4882a593Smuzhiyun 				goto err_put;
2052*4882a593Smuzhiyun 			decoder->connectors_num++;
2053*4882a593Smuzhiyun 		} else {
2054*4882a593Smuzhiyun 			/* Adding the 2nd svideo link */
2055*4882a593Smuzhiyun 			for (i = 0; i < TVP5150_MAX_CONNECTORS; i++) {
2056*4882a593Smuzhiyun 				tvpc = &decoder->connectors[i];
2057*4882a593Smuzhiyun 				v4l2c = &tvpc->base;
2058*4882a593Smuzhiyun 				if (v4l2c->type == V4L2_CONN_SVIDEO)
2059*4882a593Smuzhiyun 					break;
2060*4882a593Smuzhiyun 			}
2061*4882a593Smuzhiyun 
2062*4882a593Smuzhiyun 			ret = v4l2_fwnode_connector_add_link(ep_fwnode, v4l2c);
2063*4882a593Smuzhiyun 			if (ret)
2064*4882a593Smuzhiyun 				goto err_put;
2065*4882a593Smuzhiyun 		}
2066*4882a593Smuzhiyun 	}
2067*4882a593Smuzhiyun 
2068*4882a593Smuzhiyun 	ret = tvp5150_validate_connectors(decoder);
2069*4882a593Smuzhiyun 	if (ret)
2070*4882a593Smuzhiyun 		goto err_free;
2071*4882a593Smuzhiyun 
2072*4882a593Smuzhiyun 	for (i = 0; i < decoder->connectors_num; i++) {
2073*4882a593Smuzhiyun 		tvpc = &decoder->connectors[i];
2074*4882a593Smuzhiyun 		v4l2c = &tvpc->base;
2075*4882a593Smuzhiyun 		tvpc->ent.flags = MEDIA_ENT_FL_CONNECTOR;
2076*4882a593Smuzhiyun 		tvpc->ent.function = v4l2c->type == V4L2_CONN_SVIDEO ?
2077*4882a593Smuzhiyun 			MEDIA_ENT_F_CONN_SVIDEO : MEDIA_ENT_F_CONN_COMPOSITE;
2078*4882a593Smuzhiyun 		tvpc->ent.name = devm_kasprintf(dev, GFP_KERNEL, "%s %s",
2079*4882a593Smuzhiyun 						v4l2c->name, v4l2c->label ?
2080*4882a593Smuzhiyun 						v4l2c->label : "");
2081*4882a593Smuzhiyun 	}
2082*4882a593Smuzhiyun 
2083*4882a593Smuzhiyun 	ep_np = of_graph_get_endpoint_by_regs(np, TVP5150_PAD_VID_OUT, 0);
2084*4882a593Smuzhiyun 	if (!ep_np) {
2085*4882a593Smuzhiyun 		ret = -EINVAL;
2086*4882a593Smuzhiyun 		dev_err(dev, "Error no output endpoint available\n");
2087*4882a593Smuzhiyun 		goto err_free;
2088*4882a593Smuzhiyun 	}
2089*4882a593Smuzhiyun 	ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep_np), &bus_cfg);
2090*4882a593Smuzhiyun 	of_node_put(ep_np);
2091*4882a593Smuzhiyun 	if (ret)
2092*4882a593Smuzhiyun 		goto err_free;
2093*4882a593Smuzhiyun 
2094*4882a593Smuzhiyun 	flags = bus_cfg.bus.parallel.flags;
2095*4882a593Smuzhiyun 	if (bus_cfg.bus_type == V4L2_MBUS_PARALLEL &&
2096*4882a593Smuzhiyun 	    !(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH &&
2097*4882a593Smuzhiyun 	      flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH &&
2098*4882a593Smuzhiyun 	      flags & V4L2_MBUS_FIELD_EVEN_LOW)) {
2099*4882a593Smuzhiyun 		ret = -EINVAL;
2100*4882a593Smuzhiyun 		goto err_free;
2101*4882a593Smuzhiyun 	}
2102*4882a593Smuzhiyun 
2103*4882a593Smuzhiyun 	decoder->mbus_type = bus_cfg.bus_type;
2104*4882a593Smuzhiyun 
2105*4882a593Smuzhiyun 	return 0;
2106*4882a593Smuzhiyun 
2107*4882a593Smuzhiyun err_put:
2108*4882a593Smuzhiyun 	of_node_put(ep_np);
2109*4882a593Smuzhiyun err_free:
2110*4882a593Smuzhiyun 	for (i = 0; i < TVP5150_MAX_CONNECTORS; i++)
2111*4882a593Smuzhiyun 		v4l2_fwnode_connector_free(&decoder->connectors[i].base);
2112*4882a593Smuzhiyun 
2113*4882a593Smuzhiyun 	return ret;
2114*4882a593Smuzhiyun }
2115*4882a593Smuzhiyun 
2116*4882a593Smuzhiyun static const char * const tvp5150_test_patterns[2] = {
2117*4882a593Smuzhiyun 	"Disabled",
2118*4882a593Smuzhiyun 	"Black screen"
2119*4882a593Smuzhiyun };
2120*4882a593Smuzhiyun 
tvp5150_probe(struct i2c_client * c)2121*4882a593Smuzhiyun static int tvp5150_probe(struct i2c_client *c)
2122*4882a593Smuzhiyun {
2123*4882a593Smuzhiyun 	struct tvp5150 *core;
2124*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
2125*4882a593Smuzhiyun 	struct device_node *np = c->dev.of_node;
2126*4882a593Smuzhiyun 	struct regmap *map;
2127*4882a593Smuzhiyun 	unsigned int i;
2128*4882a593Smuzhiyun 	int res;
2129*4882a593Smuzhiyun 
2130*4882a593Smuzhiyun 	/* Check if the adapter supports the needed features */
2131*4882a593Smuzhiyun 	if (!i2c_check_functionality(c->adapter,
2132*4882a593Smuzhiyun 	     I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
2133*4882a593Smuzhiyun 		return -EIO;
2134*4882a593Smuzhiyun 
2135*4882a593Smuzhiyun 	res = tvp5150_init(c);
2136*4882a593Smuzhiyun 	if (res)
2137*4882a593Smuzhiyun 		return res;
2138*4882a593Smuzhiyun 
2139*4882a593Smuzhiyun 	core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL);
2140*4882a593Smuzhiyun 	if (!core)
2141*4882a593Smuzhiyun 		return -ENOMEM;
2142*4882a593Smuzhiyun 
2143*4882a593Smuzhiyun 	map = devm_regmap_init_i2c(c, &tvp5150_config);
2144*4882a593Smuzhiyun 	if (IS_ERR(map))
2145*4882a593Smuzhiyun 		return PTR_ERR(map);
2146*4882a593Smuzhiyun 
2147*4882a593Smuzhiyun 	core->regmap = map;
2148*4882a593Smuzhiyun 	sd = &core->sd;
2149*4882a593Smuzhiyun 	v4l2_i2c_subdev_init(sd, c, &tvp5150_ops);
2150*4882a593Smuzhiyun 	sd->internal_ops = &tvp5150_internal_ops;
2151*4882a593Smuzhiyun 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
2152*4882a593Smuzhiyun 
2153*4882a593Smuzhiyun 	if (IS_ENABLED(CONFIG_OF) && np) {
2154*4882a593Smuzhiyun 		res = tvp5150_parse_dt(core, np);
2155*4882a593Smuzhiyun 		if (res) {
2156*4882a593Smuzhiyun 			dev_err(sd->dev, "DT parsing error: %d\n", res);
2157*4882a593Smuzhiyun 			return res;
2158*4882a593Smuzhiyun 		}
2159*4882a593Smuzhiyun 	} else {
2160*4882a593Smuzhiyun 		/* Default to BT.656 embedded sync */
2161*4882a593Smuzhiyun 		core->mbus_type = V4L2_MBUS_BT656;
2162*4882a593Smuzhiyun 	}
2163*4882a593Smuzhiyun 
2164*4882a593Smuzhiyun 	res = tvp5150_mc_init(core);
2165*4882a593Smuzhiyun 	if (res)
2166*4882a593Smuzhiyun 		return res;
2167*4882a593Smuzhiyun 
2168*4882a593Smuzhiyun 	res = tvp5150_detect_version(core);
2169*4882a593Smuzhiyun 	if (res < 0)
2170*4882a593Smuzhiyun 		return res;
2171*4882a593Smuzhiyun 
2172*4882a593Smuzhiyun 	/*
2173*4882a593Smuzhiyun 	 * Iterate over all available connectors in case they are supported and
2174*4882a593Smuzhiyun 	 * successfully parsed. Fallback to default autodetect in case they
2175*4882a593Smuzhiyun 	 * aren't supported.
2176*4882a593Smuzhiyun 	 */
2177*4882a593Smuzhiyun 	for (i = 0; i < core->connectors_num; i++) {
2178*4882a593Smuzhiyun 		struct v4l2_fwnode_connector *v4l2c;
2179*4882a593Smuzhiyun 
2180*4882a593Smuzhiyun 		v4l2c = &core->connectors[i].base;
2181*4882a593Smuzhiyun 		core->norm |= v4l2c->connector.analog.sdtv_stds;
2182*4882a593Smuzhiyun 	}
2183*4882a593Smuzhiyun 
2184*4882a593Smuzhiyun 	if (!core->connectors_num)
2185*4882a593Smuzhiyun 		core->norm = V4L2_STD_ALL;
2186*4882a593Smuzhiyun 
2187*4882a593Smuzhiyun 	core->detected_norm = V4L2_STD_UNKNOWN;
2188*4882a593Smuzhiyun 	core->input = TVP5150_COMPOSITE1;
2189*4882a593Smuzhiyun 	core->enable = true;
2190*4882a593Smuzhiyun 
2191*4882a593Smuzhiyun 	v4l2_ctrl_handler_init(&core->hdl, 5);
2192*4882a593Smuzhiyun 	v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
2193*4882a593Smuzhiyun 			V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
2194*4882a593Smuzhiyun 	v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
2195*4882a593Smuzhiyun 			V4L2_CID_CONTRAST, 0, 255, 1, 128);
2196*4882a593Smuzhiyun 	v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
2197*4882a593Smuzhiyun 			V4L2_CID_SATURATION, 0, 255, 1, 128);
2198*4882a593Smuzhiyun 	v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
2199*4882a593Smuzhiyun 			V4L2_CID_HUE, -128, 127, 1, 0);
2200*4882a593Smuzhiyun 	v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
2201*4882a593Smuzhiyun 			V4L2_CID_PIXEL_RATE, 27000000,
2202*4882a593Smuzhiyun 			27000000, 1, 27000000);
2203*4882a593Smuzhiyun 	v4l2_ctrl_new_std_menu_items(&core->hdl, &tvp5150_ctrl_ops,
2204*4882a593Smuzhiyun 				     V4L2_CID_TEST_PATTERN,
2205*4882a593Smuzhiyun 				     ARRAY_SIZE(tvp5150_test_patterns) - 1,
2206*4882a593Smuzhiyun 				     0, 0, tvp5150_test_patterns);
2207*4882a593Smuzhiyun 	sd->ctrl_handler = &core->hdl;
2208*4882a593Smuzhiyun 	if (core->hdl.error) {
2209*4882a593Smuzhiyun 		res = core->hdl.error;
2210*4882a593Smuzhiyun 		goto err;
2211*4882a593Smuzhiyun 	}
2212*4882a593Smuzhiyun 
2213*4882a593Smuzhiyun 	tvp5150_set_default(tvp5150_read_std(sd), &core->rect);
2214*4882a593Smuzhiyun 
2215*4882a593Smuzhiyun 	core->irq = c->irq;
2216*4882a593Smuzhiyun 	tvp5150_reset(sd, 0);	/* Calls v4l2_ctrl_handler_setup() */
2217*4882a593Smuzhiyun 	if (c->irq) {
2218*4882a593Smuzhiyun 		res = devm_request_threaded_irq(&c->dev, c->irq, NULL,
2219*4882a593Smuzhiyun 						tvp5150_isr, IRQF_TRIGGER_HIGH |
2220*4882a593Smuzhiyun 						IRQF_ONESHOT, "tvp5150", core);
2221*4882a593Smuzhiyun 		if (res)
2222*4882a593Smuzhiyun 			goto err;
2223*4882a593Smuzhiyun 	}
2224*4882a593Smuzhiyun 
2225*4882a593Smuzhiyun 	res = v4l2_async_register_subdev(sd);
2226*4882a593Smuzhiyun 	if (res < 0)
2227*4882a593Smuzhiyun 		goto err;
2228*4882a593Smuzhiyun 
2229*4882a593Smuzhiyun 	if (debug > 1)
2230*4882a593Smuzhiyun 		tvp5150_log_status(sd);
2231*4882a593Smuzhiyun 
2232*4882a593Smuzhiyun 	pm_runtime_set_active(&c->dev);
2233*4882a593Smuzhiyun 	pm_runtime_enable(&c->dev);
2234*4882a593Smuzhiyun 	pm_runtime_idle(&c->dev);
2235*4882a593Smuzhiyun 
2236*4882a593Smuzhiyun 	return 0;
2237*4882a593Smuzhiyun 
2238*4882a593Smuzhiyun err:
2239*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&core->hdl);
2240*4882a593Smuzhiyun 	return res;
2241*4882a593Smuzhiyun }
2242*4882a593Smuzhiyun 
tvp5150_remove(struct i2c_client * c)2243*4882a593Smuzhiyun static int tvp5150_remove(struct i2c_client *c)
2244*4882a593Smuzhiyun {
2245*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(c);
2246*4882a593Smuzhiyun 	struct tvp5150 *decoder = to_tvp5150(sd);
2247*4882a593Smuzhiyun 	unsigned int i;
2248*4882a593Smuzhiyun 
2249*4882a593Smuzhiyun 	dev_dbg_lvl(sd->dev, 1, debug,
2250*4882a593Smuzhiyun 		"tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
2251*4882a593Smuzhiyun 		c->addr << 1);
2252*4882a593Smuzhiyun 
2253*4882a593Smuzhiyun 	for (i = 0; i < decoder->connectors_num; i++)
2254*4882a593Smuzhiyun 		v4l2_fwnode_connector_free(&decoder->connectors[i].base);
2255*4882a593Smuzhiyun 	for (i = 0; i < decoder->connectors_num; i++) {
2256*4882a593Smuzhiyun 		media_device_unregister_entity(&decoder->connectors[i].ent);
2257*4882a593Smuzhiyun 		media_entity_cleanup(&decoder->connectors[i].ent);
2258*4882a593Smuzhiyun 	}
2259*4882a593Smuzhiyun 	v4l2_async_unregister_subdev(sd);
2260*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&decoder->hdl);
2261*4882a593Smuzhiyun 	pm_runtime_disable(&c->dev);
2262*4882a593Smuzhiyun 	pm_runtime_set_suspended(&c->dev);
2263*4882a593Smuzhiyun 
2264*4882a593Smuzhiyun 	return 0;
2265*4882a593Smuzhiyun }
2266*4882a593Smuzhiyun 
2267*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
2268*4882a593Smuzhiyun 
2269*4882a593Smuzhiyun static const struct dev_pm_ops tvp5150_pm_ops = {
2270*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(tvp5150_runtime_suspend,
2271*4882a593Smuzhiyun 			   tvp5150_runtime_resume,
2272*4882a593Smuzhiyun 			   NULL)
2273*4882a593Smuzhiyun };
2274*4882a593Smuzhiyun 
2275*4882a593Smuzhiyun static const struct i2c_device_id tvp5150_id[] = {
2276*4882a593Smuzhiyun 	{ "tvp5150", 0 },
2277*4882a593Smuzhiyun 	{ }
2278*4882a593Smuzhiyun };
2279*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, tvp5150_id);
2280*4882a593Smuzhiyun 
2281*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
2282*4882a593Smuzhiyun static const struct of_device_id tvp5150_of_match[] = {
2283*4882a593Smuzhiyun 	{ .compatible = "ti,tvp5150", },
2284*4882a593Smuzhiyun 	{ /* sentinel */ },
2285*4882a593Smuzhiyun };
2286*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tvp5150_of_match);
2287*4882a593Smuzhiyun #endif
2288*4882a593Smuzhiyun 
2289*4882a593Smuzhiyun static struct i2c_driver tvp5150_driver = {
2290*4882a593Smuzhiyun 	.driver = {
2291*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(tvp5150_of_match),
2292*4882a593Smuzhiyun 		.name	= "tvp5150",
2293*4882a593Smuzhiyun 		.pm	= &tvp5150_pm_ops,
2294*4882a593Smuzhiyun 	},
2295*4882a593Smuzhiyun 	.probe_new	= tvp5150_probe,
2296*4882a593Smuzhiyun 	.remove		= tvp5150_remove,
2297*4882a593Smuzhiyun 	.id_table	= tvp5150_id,
2298*4882a593Smuzhiyun };
2299*4882a593Smuzhiyun 
2300*4882a593Smuzhiyun module_i2c_driver(tvp5150_driver);
2301