xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/techpoint/techpoint_tp9930.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * techpoint lib
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2023 Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include "techpoint_tp9930.h"
9*4882a593Smuzhiyun #include "techpoint_dev.h"
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun static __maybe_unused const struct regval common_setting_148M_1080p_25fps_regs[] = {
12*4882a593Smuzhiyun 	{ 0x40, 0x04 },
13*4882a593Smuzhiyun 	{ 0x02, 0x44 },
14*4882a593Smuzhiyun 	{ 0x05, 0x00 },
15*4882a593Smuzhiyun 	{ 0x06, 0x32 },
16*4882a593Smuzhiyun 	{ 0x07, 0x80 },
17*4882a593Smuzhiyun 	{ 0x08, 0x00 },
18*4882a593Smuzhiyun 	{ 0x09, 0x24 },
19*4882a593Smuzhiyun 	{ 0x0a, 0x48 },
20*4882a593Smuzhiyun 	{ 0x0b, 0xc0 },
21*4882a593Smuzhiyun 	{ 0x0c, 0x03 },
22*4882a593Smuzhiyun 	{ 0x0d, 0x73 },
23*4882a593Smuzhiyun 	{ 0x10, 0x00 },
24*4882a593Smuzhiyun 	{ 0x11, 0x40 },
25*4882a593Smuzhiyun 	{ 0x12, 0x40 },
26*4882a593Smuzhiyun 	{ 0x13, 0x00 },
27*4882a593Smuzhiyun 	{ 0x14, 0x00 },
28*4882a593Smuzhiyun 	{ 0x15, 0x01 },
29*4882a593Smuzhiyun 	{ 0x16, 0xf0 },
30*4882a593Smuzhiyun 	{ 0x17, 0x80 },
31*4882a593Smuzhiyun 	{ 0x18, 0x29 },
32*4882a593Smuzhiyun 	{ 0x19, 0x38 },
33*4882a593Smuzhiyun 	{ 0x1a, 0x47 },
34*4882a593Smuzhiyun 	{ 0x1c, 0x0a },
35*4882a593Smuzhiyun 	{ 0x1d, 0x50 },
36*4882a593Smuzhiyun 	{ 0x20, 0x3c },
37*4882a593Smuzhiyun 	{ 0x21, 0x46 },
38*4882a593Smuzhiyun 	{ 0x22, 0x36 },
39*4882a593Smuzhiyun 	{ 0x23, 0x3c },
40*4882a593Smuzhiyun 	{ 0x24, 0x04 },
41*4882a593Smuzhiyun 	{ 0x25, 0xfe },
42*4882a593Smuzhiyun 	{ 0x26, 0x0d },
43*4882a593Smuzhiyun 	{ 0x27, 0x2d },
44*4882a593Smuzhiyun 	{ 0x28, 0x00 },
45*4882a593Smuzhiyun 	{ 0x29, 0x48 },
46*4882a593Smuzhiyun #if TECHPOINT_TEST_PATTERN
47*4882a593Smuzhiyun 	{ 0x2a, 0x3c },
48*4882a593Smuzhiyun #else
49*4882a593Smuzhiyun 	{ 0x2a, 0x30 },
50*4882a593Smuzhiyun #endif
51*4882a593Smuzhiyun 	{ 0x2b, 0x60 },
52*4882a593Smuzhiyun 	{ 0x2c, 0x3a },
53*4882a593Smuzhiyun 	{ 0x2d, 0x54 },
54*4882a593Smuzhiyun 	{ 0x2e, 0x40 },
55*4882a593Smuzhiyun 	{ 0x30, 0xa5 },
56*4882a593Smuzhiyun 	{ 0x31, 0x86 },
57*4882a593Smuzhiyun 	{ 0x32, 0xfb },
58*4882a593Smuzhiyun 	{ 0x33, 0x60 },
59*4882a593Smuzhiyun 	{ 0x35, 0x05 },
60*4882a593Smuzhiyun 	{ 0x36, 0xca },
61*4882a593Smuzhiyun 	{ 0x38, 0x00 },
62*4882a593Smuzhiyun 	{ 0x39, 0x1c },
63*4882a593Smuzhiyun 	{ 0x3a, 0x32 },
64*4882a593Smuzhiyun 	{ 0x3b, 0x26 },
65*4882a593Smuzhiyun 	{ 0x40, 0x00 },
66*4882a593Smuzhiyun 	{ 0x34, 0x10 },
67*4882a593Smuzhiyun 	{ 0x40, 0x01 },
68*4882a593Smuzhiyun 	{ 0x34, 0x11 },
69*4882a593Smuzhiyun 	{ 0x40, 0x02 },
70*4882a593Smuzhiyun 	{ 0x34, 0x12 },
71*4882a593Smuzhiyun 	{ 0x40, 0x03 },
72*4882a593Smuzhiyun 	{ 0x34, 0x13 },
73*4882a593Smuzhiyun 	{ 0x4f, 0x03 },
74*4882a593Smuzhiyun 	{ 0x50, 0xb2 },
75*4882a593Smuzhiyun 	{ 0x52, 0xf6 },
76*4882a593Smuzhiyun 	{ 0xf1, 0x04 },
77*4882a593Smuzhiyun 	{ 0xf2, 0x77 },
78*4882a593Smuzhiyun 	{ 0xf3, 0x77 },
79*4882a593Smuzhiyun 	{ 0xf5, 0xf0 },
80*4882a593Smuzhiyun 	{ 0xf6, 0x10 },
81*4882a593Smuzhiyun 	{ 0xf8, 0x54 },
82*4882a593Smuzhiyun 	{ 0xfa, 0x88 },
83*4882a593Smuzhiyun 	{ 0xfb, 0x88 },
84*4882a593Smuzhiyun 	{ 0x4d, 0x07 },
85*4882a593Smuzhiyun 	{ 0x4e, 0x05 },
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static __maybe_unused const struct regval common_setting_148M_1080p_30fps_regs[] = {
89*4882a593Smuzhiyun 	{ 0x40, 0x04 },
90*4882a593Smuzhiyun 	{ 0x02, 0x44 },
91*4882a593Smuzhiyun 	{ 0x07, 0x80 },
92*4882a593Smuzhiyun 	{ 0x0b, 0xc0 },
93*4882a593Smuzhiyun 	{ 0x0c, 0x03 },
94*4882a593Smuzhiyun 	{ 0x0d, 0x72 },
95*4882a593Smuzhiyun 	{ 0x10, 0x00 },
96*4882a593Smuzhiyun 	{ 0x11, 0x40 },
97*4882a593Smuzhiyun 	{ 0x12, 0x40 },
98*4882a593Smuzhiyun 	{ 0x13, 0x00 },
99*4882a593Smuzhiyun 	{ 0x14, 0x00 },
100*4882a593Smuzhiyun 	{ 0x15, 0x01 },
101*4882a593Smuzhiyun 	{ 0x16, 0xf0 },
102*4882a593Smuzhiyun 	{ 0x17, 0x80 },
103*4882a593Smuzhiyun 	{ 0x18, 0x29 },
104*4882a593Smuzhiyun 	{ 0x19, 0x38 },
105*4882a593Smuzhiyun 	{ 0x1a, 0x47 },
106*4882a593Smuzhiyun 	{ 0x1c, 0x08 },
107*4882a593Smuzhiyun 	{ 0x1d, 0x98 },
108*4882a593Smuzhiyun 	{ 0x20, 0x38 },
109*4882a593Smuzhiyun 	{ 0x21, 0x46 },
110*4882a593Smuzhiyun 	{ 0x22, 0x36 },
111*4882a593Smuzhiyun 	{ 0x23, 0x3c },
112*4882a593Smuzhiyun 	{ 0x24, 0x04 },
113*4882a593Smuzhiyun 	{ 0x25, 0xfe },
114*4882a593Smuzhiyun 	{ 0x26, 0x0d },
115*4882a593Smuzhiyun 	{ 0x27, 0x2d },
116*4882a593Smuzhiyun 	{ 0x28, 0x00 },
117*4882a593Smuzhiyun 	{ 0x29, 0x48 },
118*4882a593Smuzhiyun #if TECHPOINT_TEST_PATTERN
119*4882a593Smuzhiyun 	{ 0x2a, 0x3c },
120*4882a593Smuzhiyun #else
121*4882a593Smuzhiyun 	{ 0x2a, 0x30 },
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun 	{ 0x2b, 0x60 },
124*4882a593Smuzhiyun 	{ 0x2c, 0x3a },
125*4882a593Smuzhiyun 	{ 0x2d, 0x54 },
126*4882a593Smuzhiyun 	{ 0x2e, 0x40 },
127*4882a593Smuzhiyun 	{ 0x30, 0xa5 },
128*4882a593Smuzhiyun 	{ 0x31, 0x95 },
129*4882a593Smuzhiyun 	{ 0x32, 0xe0 },
130*4882a593Smuzhiyun 	{ 0x33, 0x60 },
131*4882a593Smuzhiyun 	{ 0x35, 0x45 },
132*4882a593Smuzhiyun 	{ 0x36, 0xca },
133*4882a593Smuzhiyun 	{ 0x38, 0x00 },
134*4882a593Smuzhiyun 	{ 0x39, 0x1c },
135*4882a593Smuzhiyun 	{ 0x3a, 0x32 },
136*4882a593Smuzhiyun 	{ 0x3b, 0x26 },
137*4882a593Smuzhiyun 	{ 0x40, 0x00 },
138*4882a593Smuzhiyun 	{ 0x34, 0x10 },
139*4882a593Smuzhiyun 	{ 0x40, 0x01 },
140*4882a593Smuzhiyun 	{ 0x34, 0x11 },
141*4882a593Smuzhiyun 	{ 0x40, 0x02 },
142*4882a593Smuzhiyun 	{ 0x34, 0x12 },
143*4882a593Smuzhiyun 	{ 0x40, 0x03 },
144*4882a593Smuzhiyun 	{ 0x34, 0x13 },
145*4882a593Smuzhiyun 	{ 0x4f, 0x03 },
146*4882a593Smuzhiyun 	{ 0x50, 0xA3 },
147*4882a593Smuzhiyun 	{ 0x52, 0xE7 },
148*4882a593Smuzhiyun 	{ 0xf1, 0x04 },
149*4882a593Smuzhiyun 	{ 0xf2, 0x77 },
150*4882a593Smuzhiyun 	{ 0xf3, 0x77 },
151*4882a593Smuzhiyun 	{ 0xf4, 0x00 },
152*4882a593Smuzhiyun 	{ 0xf5, 0xf0 },
153*4882a593Smuzhiyun 	{ 0xf6, 0x10 },
154*4882a593Smuzhiyun 	{ 0xf8, 0x54 },
155*4882a593Smuzhiyun 	{ 0xfa, 0x99 },
156*4882a593Smuzhiyun 	{ 0xfb, 0x99 },
157*4882a593Smuzhiyun 	{ 0x4d, 0x07 },
158*4882a593Smuzhiyun 	{ 0x4e, 0x05 },
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun static __maybe_unused const struct regval common_setting_148M_720p_25fps_regs[] = {
162*4882a593Smuzhiyun 	{ 0x40, 0x04 },
163*4882a593Smuzhiyun 	{ 0x02, 0x4e },
164*4882a593Smuzhiyun 	{ 0x05, 0x00 },
165*4882a593Smuzhiyun 	{ 0x06, 0x32 },
166*4882a593Smuzhiyun 	{ 0x07, 0xc0 },
167*4882a593Smuzhiyun 	{ 0x08, 0x00 },
168*4882a593Smuzhiyun 	{ 0x09, 0x24 },
169*4882a593Smuzhiyun 	{ 0x0a, 0x48 },
170*4882a593Smuzhiyun 	{ 0x0b, 0xc0 },
171*4882a593Smuzhiyun 	{ 0x0c, 0x13 },
172*4882a593Smuzhiyun 	{ 0x0d, 0x71 },
173*4882a593Smuzhiyun 	{ 0x0e, 0x00 },
174*4882a593Smuzhiyun 	{ 0x0f, 0x00 },
175*4882a593Smuzhiyun 	{ 0x10, 0x00 },
176*4882a593Smuzhiyun 	{ 0x11, 0x40 },
177*4882a593Smuzhiyun 	{ 0x12, 0x40 },
178*4882a593Smuzhiyun 	{ 0x13, 0x00 },
179*4882a593Smuzhiyun 	{ 0x14, 0x00 },
180*4882a593Smuzhiyun 	{ 0x15, 0x13 },
181*4882a593Smuzhiyun 	{ 0x16, 0x16 },
182*4882a593Smuzhiyun 	{ 0x17, 0x00 },
183*4882a593Smuzhiyun 	{ 0x18, 0x19 },
184*4882a593Smuzhiyun 	{ 0x19, 0xd0 },
185*4882a593Smuzhiyun 	{ 0x1a, 0x25 },
186*4882a593Smuzhiyun 	{ 0x1b, 0x00 },
187*4882a593Smuzhiyun 	{ 0x1c, 0x07 },
188*4882a593Smuzhiyun 	{ 0x1d, 0xbc },
189*4882a593Smuzhiyun 	{ 0x1e, 0x60 },
190*4882a593Smuzhiyun 	{ 0x1f, 0x06 },
191*4882a593Smuzhiyun 	{ 0x20, 0x40 },
192*4882a593Smuzhiyun 	{ 0x21, 0x46 },
193*4882a593Smuzhiyun 	{ 0x22, 0x36 },
194*4882a593Smuzhiyun 	{ 0x23, 0x3c },
195*4882a593Smuzhiyun 	{ 0x24, 0x04 },
196*4882a593Smuzhiyun 	{ 0x25, 0xfe },
197*4882a593Smuzhiyun 	{ 0x26, 0x01 },
198*4882a593Smuzhiyun 	{ 0x27, 0x2d },
199*4882a593Smuzhiyun 	{ 0x28, 0x00 },
200*4882a593Smuzhiyun 	{ 0x29, 0x48 },
201*4882a593Smuzhiyun #if TECHPOINT_TEST_PATTERN
202*4882a593Smuzhiyun 	{ 0x2a, 0x3c },
203*4882a593Smuzhiyun #else
204*4882a593Smuzhiyun 	{ 0x2a, 0x30 },
205*4882a593Smuzhiyun #endif
206*4882a593Smuzhiyun 	{ 0x2b, 0x60 },
207*4882a593Smuzhiyun 	{ 0x2c, 0x3a },
208*4882a593Smuzhiyun 	{ 0x2d, 0x5a },
209*4882a593Smuzhiyun 	{ 0x2e, 0x40 },
210*4882a593Smuzhiyun 	{ 0x2f, 0x06 },
211*4882a593Smuzhiyun 	{ 0x30, 0x9e },
212*4882a593Smuzhiyun 	{ 0x31, 0x20 },
213*4882a593Smuzhiyun 	{ 0x32, 0x01 },
214*4882a593Smuzhiyun 	{ 0x33, 0x90 },
215*4882a593Smuzhiyun 	{ 0x35, 0x25 },
216*4882a593Smuzhiyun 	{ 0x36, 0xca },
217*4882a593Smuzhiyun 	{ 0x37, 0x00 },
218*4882a593Smuzhiyun 	{ 0x38, 0x00 },
219*4882a593Smuzhiyun 	{ 0x39, 0x18 },
220*4882a593Smuzhiyun 	{ 0x3a, 0x32 },
221*4882a593Smuzhiyun 	{ 0x3b, 0x26 },
222*4882a593Smuzhiyun 	{ 0x3c, 0x00 },
223*4882a593Smuzhiyun 	{ 0x3d, 0x60 },
224*4882a593Smuzhiyun 	{ 0x3e, 0x00 },
225*4882a593Smuzhiyun 	{ 0x3f, 0x00 },
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	{ 0x40, 0x00 },
228*4882a593Smuzhiyun 	{ 0x34, 0x10 },
229*4882a593Smuzhiyun 	{ 0x40, 0x01 },
230*4882a593Smuzhiyun 	{ 0x34, 0x11 },
231*4882a593Smuzhiyun 	{ 0x40, 0x02 },
232*4882a593Smuzhiyun 	{ 0x34, 0x12 },
233*4882a593Smuzhiyun 	{ 0x40, 0x03 },
234*4882a593Smuzhiyun 	{ 0x34, 0x13 },
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	{ 0x4f, 0x03 },
237*4882a593Smuzhiyun 	{ 0x50, 0xA3 },
238*4882a593Smuzhiyun 	{ 0x52, 0xE7 },
239*4882a593Smuzhiyun 	{ 0xf1, 0x04 },
240*4882a593Smuzhiyun 	{ 0xf2, 0x77 },
241*4882a593Smuzhiyun 	{ 0xf3, 0x77 },
242*4882a593Smuzhiyun 	{ 0xf4, 0x00 },
243*4882a593Smuzhiyun 	{ 0xf5, 0xff },
244*4882a593Smuzhiyun 	{ 0xf6, 0x10 },
245*4882a593Smuzhiyun 	{ 0xf8, 0x54 },
246*4882a593Smuzhiyun 	{ 0xfa, 0x99 },
247*4882a593Smuzhiyun 	{ 0xfb, 0x99 },
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	{ 0x4d, 0x07 },
250*4882a593Smuzhiyun 	{ 0x4e, 0x05 },
251*4882a593Smuzhiyun };
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun static __maybe_unused const struct regval common_setting_148M_720p_30fps_regs[] = {
254*4882a593Smuzhiyun 	{ 0x40, 0x04 },
255*4882a593Smuzhiyun 	{ 0x02, 0x4e },
256*4882a593Smuzhiyun 	{ 0x05, 0x00 },
257*4882a593Smuzhiyun 	{ 0x06, 0x32 },
258*4882a593Smuzhiyun 	{ 0x07, 0xc0 },
259*4882a593Smuzhiyun 	{ 0x08, 0x00 },
260*4882a593Smuzhiyun 	{ 0x09, 0x24 },
261*4882a593Smuzhiyun 	{ 0x0a, 0x48 },
262*4882a593Smuzhiyun 	{ 0x0b, 0xc0 },
263*4882a593Smuzhiyun 	{ 0x0c, 0x13 },
264*4882a593Smuzhiyun 	{ 0x0d, 0x70 },
265*4882a593Smuzhiyun 	{ 0x0e, 0x00 },
266*4882a593Smuzhiyun 	{ 0x0f, 0x00 },
267*4882a593Smuzhiyun 	{ 0x10, 0x00 },
268*4882a593Smuzhiyun 	{ 0x11, 0x40 },
269*4882a593Smuzhiyun 	{ 0x12, 0x40 },
270*4882a593Smuzhiyun 	{ 0x13, 0x00 },
271*4882a593Smuzhiyun 	{ 0x14, 0x00 },
272*4882a593Smuzhiyun 	{ 0x15, 0x13 },
273*4882a593Smuzhiyun 	{ 0x16, 0x16 },
274*4882a593Smuzhiyun 	{ 0x17, 0x00 },
275*4882a593Smuzhiyun 	{ 0x18, 0x19 },
276*4882a593Smuzhiyun 	{ 0x19, 0xd0 },
277*4882a593Smuzhiyun 	{ 0x1a, 0x25 },
278*4882a593Smuzhiyun 	{ 0x1b, 0x00 },
279*4882a593Smuzhiyun 	{ 0x1c, 0x06 },
280*4882a593Smuzhiyun 	{ 0x1d, 0x72 },
281*4882a593Smuzhiyun 	{ 0x1e, 0x60 },
282*4882a593Smuzhiyun 	{ 0x1f, 0x06 },
283*4882a593Smuzhiyun 	{ 0x20, 0x40 },
284*4882a593Smuzhiyun 	{ 0x21, 0x46 },
285*4882a593Smuzhiyun 	{ 0x22, 0x36 },
286*4882a593Smuzhiyun 	{ 0x23, 0x3c },
287*4882a593Smuzhiyun 	{ 0x24, 0x04 },
288*4882a593Smuzhiyun 	{ 0x25, 0xfe },
289*4882a593Smuzhiyun 	{ 0x26, 0x01 },
290*4882a593Smuzhiyun 	{ 0x27, 0x2d },
291*4882a593Smuzhiyun 	{ 0x28, 0x00 },
292*4882a593Smuzhiyun 	{ 0x29, 0x48 },
293*4882a593Smuzhiyun #if TECHPOINT_TEST_PATTERN
294*4882a593Smuzhiyun 	{ 0x2a, 0x3c },
295*4882a593Smuzhiyun #else
296*4882a593Smuzhiyun 	{ 0x2a, 0x30 },
297*4882a593Smuzhiyun #endif
298*4882a593Smuzhiyun 	{ 0x2b, 0x60 },
299*4882a593Smuzhiyun 	{ 0x2c, 0x3a },
300*4882a593Smuzhiyun 	{ 0x2d, 0x5a },
301*4882a593Smuzhiyun 	{ 0x2e, 0x40 },
302*4882a593Smuzhiyun 	{ 0x2f, 0x06 },
303*4882a593Smuzhiyun 	{ 0x30, 0x9d },
304*4882a593Smuzhiyun 	{ 0x31, 0xca },
305*4882a593Smuzhiyun 	{ 0x32, 0x01 },
306*4882a593Smuzhiyun 	{ 0x33, 0xd0 },
307*4882a593Smuzhiyun 	{ 0x35, 0x25 },
308*4882a593Smuzhiyun 	{ 0x36, 0xca },
309*4882a593Smuzhiyun 	{ 0x37, 0x00 },
310*4882a593Smuzhiyun 	{ 0x38, 0x00 },
311*4882a593Smuzhiyun 	{ 0x39, 0x18 },
312*4882a593Smuzhiyun 	{ 0x3a, 0x32 },
313*4882a593Smuzhiyun 	{ 0x3b, 0x26 },
314*4882a593Smuzhiyun 	{ 0x3c, 0x00 },
315*4882a593Smuzhiyun 	{ 0x3d, 0x60 },
316*4882a593Smuzhiyun 	{ 0x3e, 0x00 },
317*4882a593Smuzhiyun 	{ 0x3f, 0x00 },
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	{ 0x40, 0x00 },
320*4882a593Smuzhiyun 	{ 0x34, 0x10 },
321*4882a593Smuzhiyun 	{ 0x40, 0x01 },
322*4882a593Smuzhiyun 	{ 0x34, 0x11 },
323*4882a593Smuzhiyun 	{ 0x40, 0x02 },
324*4882a593Smuzhiyun 	{ 0x34, 0x12 },
325*4882a593Smuzhiyun 	{ 0x40, 0x03 },
326*4882a593Smuzhiyun 	{ 0x34, 0x13 },
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	{ 0x4f, 0x03 },
329*4882a593Smuzhiyun 	{ 0x50, 0xA3 },
330*4882a593Smuzhiyun 	{ 0x52, 0xE7 },
331*4882a593Smuzhiyun 	{ 0xf1, 0x04 },
332*4882a593Smuzhiyun 	{ 0xf2, 0x77 },
333*4882a593Smuzhiyun 	{ 0xf3, 0x77 },
334*4882a593Smuzhiyun 	{ 0xf4, 0x00 },
335*4882a593Smuzhiyun 	{ 0xf5, 0xff },
336*4882a593Smuzhiyun 	{ 0xf6, 0x10 },
337*4882a593Smuzhiyun 	{ 0xf8, 0x54 },
338*4882a593Smuzhiyun 	{ 0xfa, 0x99 },
339*4882a593Smuzhiyun 	{ 0xfb, 0x99 },
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	{ 0x4d, 0x07 },
342*4882a593Smuzhiyun 	{ 0x4e, 0x05 },
343*4882a593Smuzhiyun };
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun static struct techpoint_video_modes supported_modes[] = {
346*4882a593Smuzhiyun #if DEF_1080P
347*4882a593Smuzhiyun 	{
348*4882a593Smuzhiyun 	 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
349*4882a593Smuzhiyun 	 .width = 1920,
350*4882a593Smuzhiyun 	 .height = 1080,
351*4882a593Smuzhiyun 	 .max_fps = {
352*4882a593Smuzhiyun 		     .numerator = 10000,
353*4882a593Smuzhiyun 		     .denominator = 250000,
354*4882a593Smuzhiyun 		     },
355*4882a593Smuzhiyun 	 .link_freq_value = TP9930_LINK_FREQ_297M,
356*4882a593Smuzhiyun 	 .common_reg_list = common_setting_148M_1080p_25fps_regs,
357*4882a593Smuzhiyun 	 .common_reg_size = ARRAY_SIZE(common_setting_148M_1080p_25fps_regs),
358*4882a593Smuzhiyun 	 },
359*4882a593Smuzhiyun 	{
360*4882a593Smuzhiyun 	 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
361*4882a593Smuzhiyun 	 .width = 1920,
362*4882a593Smuzhiyun 	 .height = 1080,
363*4882a593Smuzhiyun 	 .max_fps = {
364*4882a593Smuzhiyun 		     .numerator = 10000,
365*4882a593Smuzhiyun 		     .denominator = 300000,
366*4882a593Smuzhiyun 		     },
367*4882a593Smuzhiyun 	 .link_freq_value = TP9930_LINK_FREQ_297M,
368*4882a593Smuzhiyun 	 .common_reg_list = common_setting_148M_1080p_30fps_regs,
369*4882a593Smuzhiyun 	 .common_reg_size = ARRAY_SIZE(common_setting_148M_1080p_30fps_regs),
370*4882a593Smuzhiyun 	 },
371*4882a593Smuzhiyun #endif
372*4882a593Smuzhiyun 	{
373*4882a593Smuzhiyun 	 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
374*4882a593Smuzhiyun 	 .width = 1280,
375*4882a593Smuzhiyun 	 .height = 720,
376*4882a593Smuzhiyun 	 .max_fps = {
377*4882a593Smuzhiyun 		     .numerator = 10000,
378*4882a593Smuzhiyun 		     .denominator = 250000,
379*4882a593Smuzhiyun 		     },
380*4882a593Smuzhiyun 	 .link_freq_value = TP9930_LINK_FREQ_148M5,
381*4882a593Smuzhiyun 	 .common_reg_list = common_setting_148M_720p_25fps_regs,
382*4882a593Smuzhiyun 	 .common_reg_size = ARRAY_SIZE(common_setting_148M_720p_25fps_regs),
383*4882a593Smuzhiyun 	 },
384*4882a593Smuzhiyun 	{
385*4882a593Smuzhiyun 	 .bus_fmt = MEDIA_BUS_FMT_UYVY8_2X8,
386*4882a593Smuzhiyun 	 .width = 1280,
387*4882a593Smuzhiyun 	 .height = 720,
388*4882a593Smuzhiyun 	 .max_fps = {
389*4882a593Smuzhiyun 		     .numerator = 10000,
390*4882a593Smuzhiyun 		     .denominator = 300000,
391*4882a593Smuzhiyun 		     },
392*4882a593Smuzhiyun 	 .link_freq_value = TP9930_LINK_FREQ_148M5,
393*4882a593Smuzhiyun 	 .common_reg_list = common_setting_148M_720p_30fps_regs,
394*4882a593Smuzhiyun 	 .common_reg_size = ARRAY_SIZE(common_setting_148M_720p_30fps_regs),
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun };
397*4882a593Smuzhiyun 
tp9930_initialize(struct techpoint * techpoint)398*4882a593Smuzhiyun int tp9930_initialize(struct techpoint *techpoint)
399*4882a593Smuzhiyun {
400*4882a593Smuzhiyun 	int array_size = 0;
401*4882a593Smuzhiyun 	struct i2c_client *client = techpoint->client;
402*4882a593Smuzhiyun 	struct device *dev = &client->dev;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	techpoint->video_modes_num = ARRAY_SIZE(supported_modes);
405*4882a593Smuzhiyun 	array_size =
406*4882a593Smuzhiyun 	    sizeof(struct techpoint_video_modes) * techpoint->video_modes_num;
407*4882a593Smuzhiyun 	techpoint->video_modes = devm_kzalloc(dev, array_size, GFP_KERNEL);
408*4882a593Smuzhiyun 	memcpy(techpoint->video_modes, supported_modes, array_size);
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	techpoint->cur_video_mode = &techpoint->video_modes[0];
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	return 0;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun 
tp9930_do_reset_pll(struct i2c_client * client)415*4882a593Smuzhiyun int tp9930_do_reset_pll(struct i2c_client *client)
416*4882a593Smuzhiyun {
417*4882a593Smuzhiyun 	u8 val_0x44 = 0, val_0x43 = 0, val_0xf4 = 0;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	techpoint_read_reg(client, 0x43, &val_0x43);
420*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x43, val_0x43 | 0x40);
421*4882a593Smuzhiyun 	techpoint_read_reg(client, 0x44, &val_0x44);
422*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x44, val_0x44 | 0x40);
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	techpoint_read_reg(client, 0xf4, &val_0xf4);
425*4882a593Smuzhiyun 	techpoint_write_reg(client, 0xf4, val_0xf4 | 0x80);
426*4882a593Smuzhiyun 	usleep_range(10000, 12000);
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x43, val_0x43);
429*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x44, val_0x44);
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	return 0;
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun 
tp9930_pll_reset(struct i2c_client * client)434*4882a593Smuzhiyun int tp9930_pll_reset(struct i2c_client *client)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x40, 0x00);
437*4882a593Smuzhiyun 	// output disable
438*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x4d, 0x00);
439*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x4e, 0x00);
440*4882a593Smuzhiyun 	// PLL reset
441*4882a593Smuzhiyun 	tp9930_do_reset_pll(client);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x40, 0x04);
444*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x3b, 0x20);
445*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x3d, 0xe0);
446*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x3d, 0x60);
447*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x3b, 0x25);
448*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x40, 0x40);
449*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x7a, 0x20);
450*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x3c, 0x20);
451*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x3c, 0x00);
452*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x7a, 0x25);
453*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x40, 0x00);
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun #if DEF_1080P
456*4882a593Smuzhiyun // 25FPS
457*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x44, 0x07);
458*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x43, 0x17);
459*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x45, 0x09);
460*4882a593Smuzhiyun 	techpoint_write_reg(client, 0xf4, 0xa0);
461*4882a593Smuzhiyun #else
462*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x44, 0x17);
463*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x43, 0x17);
464*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x45, 0x09);
465*4882a593Smuzhiyun #endif
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	return 0;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
tp9930_set_decoder_mode(struct i2c_client * client,int ch,int status)470*4882a593Smuzhiyun int tp9930_set_decoder_mode(struct i2c_client *client, int ch, int status)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun 	u8 val = 0;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	techpoint_write_reg(client, PAGE_REG, ch);
475*4882a593Smuzhiyun 	techpoint_read_reg(client, 0x26, &val);
476*4882a593Smuzhiyun 	if (status)
477*4882a593Smuzhiyun 		val |= 0x1;
478*4882a593Smuzhiyun 	else
479*4882a593Smuzhiyun 		val &= ~0x1;
480*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x26, val);
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	return 0;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun 
tp9930_get_channel_input_status(struct techpoint * techpoint,u8 ch)485*4882a593Smuzhiyun int tp9930_get_channel_input_status(struct techpoint *techpoint, u8 ch)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun 	struct i2c_client *client = techpoint->client;
488*4882a593Smuzhiyun 	u8 val = 0;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	mutex_lock(&techpoint->mutex);
491*4882a593Smuzhiyun 	techpoint_write_reg(client, PAGE_REG, ch);
492*4882a593Smuzhiyun 	techpoint_read_reg(client, INPUT_STATUS_REG, &val);
493*4882a593Smuzhiyun 	mutex_unlock(&techpoint->mutex);
494*4882a593Smuzhiyun 	dev_dbg(&client->dev, "input_status ch %d : %x\n", ch, val);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun // inaccuracy
497*4882a593Smuzhiyun 	return (val == INPUT_STATUS_MATCH) ? 1 : 0;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
tp9930_get_all_input_status(struct techpoint * techpoint,u8 * detect_status)500*4882a593Smuzhiyun int tp9930_get_all_input_status(struct techpoint *techpoint, u8 *detect_status)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun 	struct i2c_client *client = techpoint->client;
503*4882a593Smuzhiyun 	u8 val = 0, i;
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	for (i = 0; i < PAD_MAX; i++) {
506*4882a593Smuzhiyun 		techpoint_write_reg(client, PAGE_REG, i);
507*4882a593Smuzhiyun 		techpoint_read_reg(client, INPUT_STATUS_REG, &val);
508*4882a593Smuzhiyun 		detect_status[i] = tp9930_get_channel_input_status(techpoint, i);
509*4882a593Smuzhiyun 	}
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	return 0;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun 
tp9930_set_channel_reso(struct i2c_client * client,int ch,enum techpoint_support_reso reso)514*4882a593Smuzhiyun int tp9930_set_channel_reso(struct i2c_client *client, int ch,
515*4882a593Smuzhiyun 			    enum techpoint_support_reso reso)
516*4882a593Smuzhiyun {
517*4882a593Smuzhiyun 	int val = reso;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	switch (val) {
520*4882a593Smuzhiyun 	case TECHPOINT_S_RESO_1080P_30:
521*4882a593Smuzhiyun 		dev_err(&client->dev, "set channel %d 1080P_30, TBD", ch);
522*4882a593Smuzhiyun 		break;
523*4882a593Smuzhiyun 	case TECHPOINT_S_RESO_1080P_25:
524*4882a593Smuzhiyun 		dev_err(&client->dev, "set channel %d 1080P_25, TBD", ch);
525*4882a593Smuzhiyun 		break;
526*4882a593Smuzhiyun 	case TECHPOINT_S_RESO_720P_30:
527*4882a593Smuzhiyun 		dev_err(&client->dev, "set channel %d 720P_30, TBD", ch);
528*4882a593Smuzhiyun 		break;
529*4882a593Smuzhiyun 	case TECHPOINT_S_RESO_720P_25:
530*4882a593Smuzhiyun 		dev_err(&client->dev, "set channel %d 720P_25, TBD", ch);
531*4882a593Smuzhiyun 		break;
532*4882a593Smuzhiyun 	default:
533*4882a593Smuzhiyun #if DEF_1080P
534*4882a593Smuzhiyun 		dev_err(&client->dev,
535*4882a593Smuzhiyun 			"set channel %d is not supported, default 1080P_25, TBD", ch);
536*4882a593Smuzhiyun #else
537*4882a593Smuzhiyun 		dev_err(&client->dev,
538*4882a593Smuzhiyun 			"set channel %d is not supported, default 720P_25, TBD", ch);
539*4882a593Smuzhiyun #endif
540*4882a593Smuzhiyun 		break;
541*4882a593Smuzhiyun 	}
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	return 0;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
tp9930_get_channel_reso(struct i2c_client * client,int ch)546*4882a593Smuzhiyun int tp9930_get_channel_reso(struct i2c_client *client, int ch)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun 	u8 detect_fmt = 0xff;
549*4882a593Smuzhiyun 	u8 reso = 0xff;
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	techpoint_write_reg(client, 0x40, ch);
552*4882a593Smuzhiyun 	techpoint_read_reg(client, 0x03, &detect_fmt);
553*4882a593Smuzhiyun 	reso = detect_fmt & 0x7;
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	switch (reso) {
556*4882a593Smuzhiyun 	case TP9930_CVSTD_1080P_30:
557*4882a593Smuzhiyun 		dev_err(&client->dev, "detect channel %d 1080P_30", ch);
558*4882a593Smuzhiyun 		return TECHPOINT_S_RESO_1080P_30;
559*4882a593Smuzhiyun 	case TP9930_CVSTD_1080P_25:
560*4882a593Smuzhiyun 		dev_err(&client->dev, "detect channel %d 1080P_25", ch);
561*4882a593Smuzhiyun 		return TECHPOINT_S_RESO_1080P_25;
562*4882a593Smuzhiyun 	case TP9930_CVSTD_720P_30:
563*4882a593Smuzhiyun 		dev_err(&client->dev, "detect channel %d 720P_30", ch);
564*4882a593Smuzhiyun 		return TECHPOINT_S_RESO_720P_30;
565*4882a593Smuzhiyun 	case TP9930_CVSTD_720P_25:
566*4882a593Smuzhiyun 		dev_err(&client->dev, "detect channel %d 720P_25", ch);
567*4882a593Smuzhiyun 		return TECHPOINT_S_RESO_720P_25;
568*4882a593Smuzhiyun 	case TP9930_CVSTD_720P_60:
569*4882a593Smuzhiyun 	case TP9930_CVSTD_720P_50:
570*4882a593Smuzhiyun 	default:
571*4882a593Smuzhiyun #if DEF_1080P
572*4882a593Smuzhiyun 		dev_err(&client->dev,
573*4882a593Smuzhiyun 			"detect channel %d is not supported, default 1080P_25", ch);
574*4882a593Smuzhiyun 		return TECHPOINT_S_RESO_1080P_25;
575*4882a593Smuzhiyun #else
576*4882a593Smuzhiyun 		dev_err(&client->dev,
577*4882a593Smuzhiyun 			"detect channel %d is not supported, default 720P_25", ch);
578*4882a593Smuzhiyun 		return TECHPOINT_S_RESO_720P_25;
579*4882a593Smuzhiyun #endif
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	return reso;
583*4882a593Smuzhiyun }
584