xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/sc210iot.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * sc210iot sensor driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2020 Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * V0.0X01.0X00 first version.
8*4882a593Smuzhiyun  * V0.0X01.0X01 add quick stream on/off
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/pm_runtime.h>
16*4882a593Smuzhiyun #include <linux/of_graph.h>
17*4882a593Smuzhiyun #include <linux/regmap.h>
18*4882a593Smuzhiyun #include <linux/pinctrl/consumer.h>
19*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
20*4882a593Smuzhiyun #include <linux/version.h>
21*4882a593Smuzhiyun #include <linux/rk-camera-module.h>
22*4882a593Smuzhiyun #include <linux/rk-preisp.h>
23*4882a593Smuzhiyun #include <media/v4l2-async.h>
24*4882a593Smuzhiyun #include <media/media-entity.h>
25*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
26*4882a593Smuzhiyun #include <media/v4l2-device.h>
27*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
28*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
29*4882a593Smuzhiyun #include "../platform/rockchip/isp/rkisp_tb_helper.h"
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define DRIVER_VERSION		KERNEL_VERSION(0, 0x01, 0x01)
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #define OF_CAMERA_PINCTRL_STATE_DEFAULT	"rockchip,camera_default"
34*4882a593Smuzhiyun #define OF_CAMERA_PINCTRL_STATE_SLEEP	"rockchip,camera_sleep"
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define SC210IOT_NAME		"sc210iot"
37*4882a593Smuzhiyun #define SC210IOT_MEDIA_BUS_FMT	MEDIA_BUS_FMT_SBGGR10_1X10
38*4882a593Smuzhiyun #define MIPI_FREQ		371250000
39*4882a593Smuzhiyun #define SC210IOT_XVCLK_FREQ	27000000
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define SC210IOT_REG_CHIP_ID_H	0x3108
42*4882a593Smuzhiyun #define SC210IOT_REG_CHIP_ID_L	0x3107
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define SC210IOT_REG_EXP_LONG_H	0x3e00
45*4882a593Smuzhiyun #define SC210IOT_REG_EXP_LONG_M	0x3e01
46*4882a593Smuzhiyun #define SC210IOT_REG_EXP_LONG_L	0x3e02
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define SC210IOT_REG_GAIN_LONG_3	0x3e06
49*4882a593Smuzhiyun #define SC210IOT_REG_GAIN_LONG_2	0x3e07
50*4882a593Smuzhiyun #define SC210IOT_REG_GAIN_LONG_1	0x3e08
51*4882a593Smuzhiyun #define SC210IOT_REG_GAIN_LONG_0	0x3e09
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define SC210IOT_REG_MIRROR_FLIP	0x3221
54*4882a593Smuzhiyun #define MIRROR_MASK		0x6
55*4882a593Smuzhiyun #define FLIP_MASK		0x60
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define SC210IOT_REG_CTRL_MODE	0x0100
58*4882a593Smuzhiyun #define SC210IOT_MODE_SW_STANDBY	0x0
59*4882a593Smuzhiyun #define SC210IOT_MODE_STREAMING	BIT(0)
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun #define SC210IOT_CHIP_ID		0x17cb
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #define SC210IOT_REG_VTS_H	0x320e
64*4882a593Smuzhiyun #define SC210IOT_REG_VTS_L	0x320f
65*4882a593Smuzhiyun #define SC210IOT_VTS_MAX		0x3FFF
66*4882a593Smuzhiyun #define SC210IOT_HTS_MAX		0xFFF
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define SC210IOT_EXPOSURE_MAX	0x3FFF
69*4882a593Smuzhiyun #define SC210IOT_EXPOSURE_MIN	1
70*4882a593Smuzhiyun #define SC210IOT_EXPOSURE_STEP	1
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #define SC210IOT_GAIN_MIN		0x40
73*4882a593Smuzhiyun #define SC210IOT_GAIN_MAX		0x8000
74*4882a593Smuzhiyun #define SC210IOT_GAIN_STEP		1
75*4882a593Smuzhiyun #define SC210IOT_GAIN_DEFAULT	64
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun #define SC210IOT_SOFTWARE_RESET_REG	0x0103
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #define SC210IOT_LANES		2
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun static const char * const sc210iot_supply_names[] = {
82*4882a593Smuzhiyun 	"dovdd",    /* Digital I/O power */
83*4882a593Smuzhiyun 	"avdd",     /* Analog power */
84*4882a593Smuzhiyun 	"dvdd",     /* Digital power */
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun #define SC210IOT_NUM_SUPPLIES ARRAY_SIZE(sc210iot_supply_names)
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define to_sc210iot(sd) container_of(sd, struct sc210iot, subdev)
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun enum {
92*4882a593Smuzhiyun 	LINK_FREQ_INDEX,
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun struct gain_section {
96*4882a593Smuzhiyun 	u16 min_gain;
97*4882a593Smuzhiyun 	u16 max_gain;
98*4882a593Smuzhiyun 	u16 again_regs_start;
99*4882a593Smuzhiyun 	u16 again_regs_stop;
100*4882a593Smuzhiyun 	u16 again_deviation;
101*4882a593Smuzhiyun 	u16 dgain_regs_start;
102*4882a593Smuzhiyun 	u16 dgain_regs_stop;
103*4882a593Smuzhiyun 	u16 dgain_deviation;
104*4882a593Smuzhiyun 	u16 steps;
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun struct sc210iot_mode {
108*4882a593Smuzhiyun 	u32 width;
109*4882a593Smuzhiyun 	u32 height;
110*4882a593Smuzhiyun 	struct v4l2_fract max_fps;
111*4882a593Smuzhiyun 	u32 hts_def;
112*4882a593Smuzhiyun 	u32 vts_def;
113*4882a593Smuzhiyun 	u32 exp_def;
114*4882a593Smuzhiyun 	u32 link_freq_index;
115*4882a593Smuzhiyun 	const struct reg_sequence *reg_list;
116*4882a593Smuzhiyun 	u32 reg_num;
117*4882a593Smuzhiyun 	u32 hdr_mode;
118*4882a593Smuzhiyun 	u32 vc[PAD_MAX];
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun struct sc210iot {
122*4882a593Smuzhiyun 	struct device	*dev;
123*4882a593Smuzhiyun 	struct clk	*xvclk;
124*4882a593Smuzhiyun 	struct regmap	*regmap;
125*4882a593Smuzhiyun 	struct gpio_desc *reset_gpio;
126*4882a593Smuzhiyun 	struct gpio_desc *pwdn_gpio;
127*4882a593Smuzhiyun 	struct regulator_bulk_data supplies[SC210IOT_NUM_SUPPLIES];
128*4882a593Smuzhiyun 	struct pinctrl		*pinctrl;
129*4882a593Smuzhiyun 	struct pinctrl_state	*pins_default;
130*4882a593Smuzhiyun 	struct pinctrl_state	*pins_sleep;
131*4882a593Smuzhiyun 	struct v4l2_subdev  subdev;
132*4882a593Smuzhiyun 	struct media_pad    pad;
133*4882a593Smuzhiyun 	struct v4l2_ctrl_handler ctrl_handler;
134*4882a593Smuzhiyun 	struct v4l2_ctrl    *exposure;
135*4882a593Smuzhiyun 	struct v4l2_ctrl    *anal_gain;
136*4882a593Smuzhiyun 	struct v4l2_ctrl    *hblank;
137*4882a593Smuzhiyun 	struct v4l2_ctrl    *vblank;
138*4882a593Smuzhiyun 	struct v4l2_ctrl    *h_flip;
139*4882a593Smuzhiyun 	struct v4l2_ctrl    *v_flip;
140*4882a593Smuzhiyun 	struct v4l2_ctrl    *link_freq;
141*4882a593Smuzhiyun 	struct v4l2_ctrl    *pixel_rate;
142*4882a593Smuzhiyun 	struct mutex        lock;
143*4882a593Smuzhiyun 	struct v4l2_fract cur_fps;
144*4882a593Smuzhiyun 	u32		cur_vts;
145*4882a593Smuzhiyun 	bool		streaming;
146*4882a593Smuzhiyun 	bool		power_on;
147*4882a593Smuzhiyun 	bool		is_thunderboot;
148*4882a593Smuzhiyun 	bool		is_thunderboot_ng;
149*4882a593Smuzhiyun 	bool		is_first_streamoff;
150*4882a593Smuzhiyun 	unsigned int	cfg_num;
151*4882a593Smuzhiyun 	const struct sc210iot_mode *cur_mode;
152*4882a593Smuzhiyun 	u32		module_index;
153*4882a593Smuzhiyun 	const char      *module_facing;
154*4882a593Smuzhiyun 	const char      *module_name;
155*4882a593Smuzhiyun 	const char      *len_name;
156*4882a593Smuzhiyun 	bool		has_init_exp;
157*4882a593Smuzhiyun 	struct preisp_hdrae_exp_s init_hdrae_exp;
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static const struct regmap_config sc210iot_regmap_config = {
161*4882a593Smuzhiyun 	.reg_bits = 16,
162*4882a593Smuzhiyun 	.val_bits = 8,
163*4882a593Smuzhiyun 	.max_register = 0x6f00,
164*4882a593Smuzhiyun };
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun static const s64 link_freq_menu_items[] = {
167*4882a593Smuzhiyun 	MIPI_FREQ,
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun /*
171*4882a593Smuzhiyun  * window size=1920*1080 mipi@2lane
172*4882a593Smuzhiyun  * mclk=27M mipi_clk=371.25Mbps
173*4882a593Smuzhiyun  * pixel_line_total=2200 line_frame_total=1125
174*4882a593Smuzhiyun  * row_time=29.62us frame_rate=30fps
175*4882a593Smuzhiyun  */
176*4882a593Smuzhiyun static const struct reg_sequence sc210iot_1080p_liner_30fps_settings[] = {
177*4882a593Smuzhiyun 	{0x0103, 0x01},
178*4882a593Smuzhiyun 	{0x0100, 0x00},
179*4882a593Smuzhiyun 	{0x36e9, 0x80},
180*4882a593Smuzhiyun 	{0x36f9, 0x80},
181*4882a593Smuzhiyun 	{0x301c, 0x78},
182*4882a593Smuzhiyun 	{0x3208, 0x07},
183*4882a593Smuzhiyun 	{0x3209, 0x80},
184*4882a593Smuzhiyun 	{0x320a, 0x04},
185*4882a593Smuzhiyun 	{0x320b, 0x38},
186*4882a593Smuzhiyun 	{0x320e, 0x04},
187*4882a593Smuzhiyun 	{0x320f, 0x65},
188*4882a593Smuzhiyun 	{0x3214, 0x11},
189*4882a593Smuzhiyun 	{0x3215, 0x11},
190*4882a593Smuzhiyun 	{0x3253, 0x0c},
191*4882a593Smuzhiyun 	{0x3274, 0x09},
192*4882a593Smuzhiyun 	{0x3301, 0x05},
193*4882a593Smuzhiyun 	{0x3304, 0x68},
194*4882a593Smuzhiyun 	{0x3306, 0x40},
195*4882a593Smuzhiyun 	{0x330b, 0xcc},
196*4882a593Smuzhiyun 	{0x331c, 0x01},
197*4882a593Smuzhiyun 	{0x331e, 0x61},
198*4882a593Smuzhiyun 	{0x3333, 0x10},
199*4882a593Smuzhiyun 	{0x3364, 0x17},
200*4882a593Smuzhiyun 	{0x3391, 0x18},
201*4882a593Smuzhiyun 	{0x3392, 0x38},
202*4882a593Smuzhiyun 	{0x3393, 0x08},
203*4882a593Smuzhiyun 	{0x3394, 0x0b},
204*4882a593Smuzhiyun 	{0x3395, 0x50},
205*4882a593Smuzhiyun 	{0x3620, 0x88},
206*4882a593Smuzhiyun 	{0x3622, 0x06},
207*4882a593Smuzhiyun 	{0x3630, 0xf8},
208*4882a593Smuzhiyun 	{0x3634, 0x44},
209*4882a593Smuzhiyun 	{0x3637, 0x16},
210*4882a593Smuzhiyun 	{0x363a, 0x1f},
211*4882a593Smuzhiyun 	{0x3670, 0x1c},
212*4882a593Smuzhiyun 	{0x3677, 0x84},
213*4882a593Smuzhiyun 	{0x3678, 0x86},
214*4882a593Smuzhiyun 	{0x3679, 0x8b},
215*4882a593Smuzhiyun 	{0x367e, 0x18},
216*4882a593Smuzhiyun 	{0x367f, 0x38},
217*4882a593Smuzhiyun 	{0x3690, 0x53},
218*4882a593Smuzhiyun 	{0x3691, 0x63},
219*4882a593Smuzhiyun 	{0x3692, 0x63},
220*4882a593Smuzhiyun 	{0x369c, 0x08},
221*4882a593Smuzhiyun 	{0x369d, 0x38},
222*4882a593Smuzhiyun 	{0x36a4, 0x08},
223*4882a593Smuzhiyun 	{0x36a5, 0x18},
224*4882a593Smuzhiyun 	{0x36a8, 0x08},
225*4882a593Smuzhiyun 	{0x36a9, 0x28},
226*4882a593Smuzhiyun 	{0x36aa, 0x2a},
227*4882a593Smuzhiyun 	{0x36fc, 0x11},
228*4882a593Smuzhiyun 	{0x36fd, 0x14},
229*4882a593Smuzhiyun 	{0x3e01, 0x8c},
230*4882a593Smuzhiyun 	{0x3e03, 0x0b},
231*4882a593Smuzhiyun 	{0x3e08, 0x03},
232*4882a593Smuzhiyun 	{0x3e09, 0x20},
233*4882a593Smuzhiyun 	{0x3e1b, 0x15},
234*4882a593Smuzhiyun 	{0x3f03, 0x01},
235*4882a593Smuzhiyun 	{0x36e9, 0x20},
236*4882a593Smuzhiyun 	{0x36f9, 0x24},
237*4882a593Smuzhiyun 	{0x0100, 0x01},
238*4882a593Smuzhiyun };
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun static const struct sc210iot_mode supported_modes[] = {
241*4882a593Smuzhiyun 	{
242*4882a593Smuzhiyun 		.width = 1920,
243*4882a593Smuzhiyun 		.height = 1080,
244*4882a593Smuzhiyun 		.max_fps = {
245*4882a593Smuzhiyun 			.numerator = 10000,
246*4882a593Smuzhiyun 			.denominator = 300000,
247*4882a593Smuzhiyun 		},
248*4882a593Smuzhiyun 		.exp_def = 0x460,
249*4882a593Smuzhiyun 		.hts_def = 0x898,
250*4882a593Smuzhiyun 		.vts_def = 0x465,
251*4882a593Smuzhiyun 		.link_freq_index = LINK_FREQ_INDEX,
252*4882a593Smuzhiyun 		.reg_list = sc210iot_1080p_liner_30fps_settings,
253*4882a593Smuzhiyun 		.reg_num = ARRAY_SIZE(sc210iot_1080p_liner_30fps_settings),
254*4882a593Smuzhiyun 		.hdr_mode = NO_HDR,
255*4882a593Smuzhiyun 		.vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
256*4882a593Smuzhiyun 	},
257*4882a593Smuzhiyun };
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
to_pixel_rate(u32 index)260*4882a593Smuzhiyun static u64 to_pixel_rate(u32 index)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun 	u64 pixel_rate = link_freq_menu_items[index] * 2 * SC210IOT_LANES;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	do_div(pixel_rate, 10);
265*4882a593Smuzhiyun 	return pixel_rate;
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun 
sc210iot_read_reg(struct sc210iot * sc210iot,u16 addr,u8 * value)268*4882a593Smuzhiyun static inline int sc210iot_read_reg(struct sc210iot *sc210iot, u16 addr, u8 *value)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun 	unsigned int val;
271*4882a593Smuzhiyun 	int ret;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	ret = regmap_read(sc210iot->regmap, addr, &val);
274*4882a593Smuzhiyun 	if (ret) {
275*4882a593Smuzhiyun 		dev_err(sc210iot->dev, "i2c read failed at addr: %x\n", addr);
276*4882a593Smuzhiyun 		return ret;
277*4882a593Smuzhiyun 	}
278*4882a593Smuzhiyun 	*value = val & 0xff;
279*4882a593Smuzhiyun 	return 0;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun static int __sc210iot_power_on(struct sc210iot *sc210iot);
283*4882a593Smuzhiyun 
sc210iot_write_reg(struct sc210iot * sc210iot,u16 addr,u8 value)284*4882a593Smuzhiyun static inline int sc210iot_write_reg(struct sc210iot *sc210iot, u16 addr, u8 value)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun 	int ret;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	ret = regmap_write(sc210iot->regmap, addr, value);
289*4882a593Smuzhiyun 	if (ret) {
290*4882a593Smuzhiyun 		dev_err(sc210iot->dev, "i2c write failed at addr: %x\n", addr);
291*4882a593Smuzhiyun 		return ret;
292*4882a593Smuzhiyun 	}
293*4882a593Smuzhiyun 	return ret;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun static const struct gain_section gain_sections[] = {
297*4882a593Smuzhiyun 	{    64,   128, 0x0320, 0x033f,  64, 0x0080, 0x0080,     0, 32 },
298*4882a593Smuzhiyun 	{   128,   256, 0x0720, 0x073f, 128, 0x0080, 0x0080,     0, 32 },
299*4882a593Smuzhiyun 	{   256,   512, 0x0f20, 0x0f3f, 256, 0x0080, 0x0080,     0, 32 },
300*4882a593Smuzhiyun 	{   512,  1024, 0x1f20, 0x1f3f, 512, 0x0080, 0x0080,     0, 32 },
301*4882a593Smuzhiyun 	{  1024,  2048, 0x1f3f, 0x1f3f,   0, 0x0080, 0x00fc,  1024, 32 },
302*4882a593Smuzhiyun 	{  2048,  4096, 0x1f3f, 0x1f3f,   0, 0x0180, 0x01fc,  2048, 32 },
303*4882a593Smuzhiyun 	{  4096,  8192, 0x1f3f, 0x1f3f,   0, 0x0380, 0x03fc,  4096, 32 },
304*4882a593Smuzhiyun 	{  8192, 16384, 0x1f3f, 0x1f3f,   0, 0x0780, 0x07fc,  8192, 32 },
305*4882a593Smuzhiyun 	{ 16384, 32768, 0x1f3f, 0x1f3f,   0, 0x0f80, 0x0ffc, 16384, 32 }
306*4882a593Smuzhiyun };
307*4882a593Smuzhiyun 
sc210iot_set_gain(struct sc210iot * sc210iot,u32 gain)308*4882a593Smuzhiyun static int sc210iot_set_gain(struct sc210iot *sc210iot, u32 gain)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun 	int ret, i = 0;
311*4882a593Smuzhiyun 	int offset, step, step_len, reg_step_len;
312*4882a593Smuzhiyun 	int a_gain = 0, d_gain = 0;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	dev_dbg(sc210iot->dev, "%s: gain : %d\n", __func__, gain);
315*4882a593Smuzhiyun 	if (sc210iot->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
316*4882a593Smuzhiyun 		sc210iot->is_thunderboot = false;
317*4882a593Smuzhiyun 		sc210iot->is_thunderboot_ng = true;
318*4882a593Smuzhiyun 		__sc210iot_power_on(sc210iot);
319*4882a593Smuzhiyun 	}
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(gain_sections) - 1; i++)
322*4882a593Smuzhiyun 		if ((gain_sections[i].min_gain <= gain) && (gain < gain_sections[i].max_gain))
323*4882a593Smuzhiyun 			break;
324*4882a593Smuzhiyun 	if (gain_sections[i].again_deviation) {
325*4882a593Smuzhiyun 		offset = gain - gain_sections[i].min_gain;
326*4882a593Smuzhiyun 		step_len = gain_sections[i].again_deviation / gain_sections[i].steps;
327*4882a593Smuzhiyun 		reg_step_len = 1;
328*4882a593Smuzhiyun 		step = offset / step_len;
329*4882a593Smuzhiyun 		a_gain = gain_sections[i].again_regs_start + step * reg_step_len;
330*4882a593Smuzhiyun 		d_gain = gain_sections[i].dgain_regs_start;
331*4882a593Smuzhiyun 	} else {
332*4882a593Smuzhiyun 		offset = gain - gain_sections[i].min_gain;
333*4882a593Smuzhiyun 		step_len = gain_sections[i].dgain_deviation / gain_sections[i].steps;
334*4882a593Smuzhiyun 		step = offset / step_len;
335*4882a593Smuzhiyun 		reg_step_len = 4;
336*4882a593Smuzhiyun 		a_gain = gain_sections[i].again_regs_start;
337*4882a593Smuzhiyun 		d_gain = gain_sections[i].dgain_regs_start + step * reg_step_len;
338*4882a593Smuzhiyun 	}
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	if (a_gain > gain_sections[i].again_regs_stop)
341*4882a593Smuzhiyun 		a_gain = gain_sections[i].again_regs_stop;
342*4882a593Smuzhiyun 	if (d_gain > gain_sections[i].dgain_regs_stop)
343*4882a593Smuzhiyun 		d_gain = gain_sections[i].dgain_regs_stop;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	dev_dbg(sc210iot->dev, "%s: a_gain: 0x%x d_gain: 0x%x\n", __func__, a_gain, d_gain);
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	ret  = sc210iot_write_reg(sc210iot, SC210IOT_REG_GAIN_LONG_1, a_gain >> 8);
348*4882a593Smuzhiyun 	ret |= sc210iot_write_reg(sc210iot, SC210IOT_REG_GAIN_LONG_0, a_gain & 0xff);
349*4882a593Smuzhiyun 	ret |= sc210iot_write_reg(sc210iot, SC210IOT_REG_GAIN_LONG_3, d_gain >> 8);
350*4882a593Smuzhiyun 	ret |= sc210iot_write_reg(sc210iot, SC210IOT_REG_GAIN_LONG_2, d_gain & 0xff);
351*4882a593Smuzhiyun 	return ret;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun 
sc210iot_set_exp(struct sc210iot * sc210iot,u32 exp)354*4882a593Smuzhiyun static int sc210iot_set_exp(struct sc210iot *sc210iot, u32 exp)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun 	int ret;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	dev_dbg(sc210iot->dev, "%s: exp : %d\n", __func__, exp);
359*4882a593Smuzhiyun 	ret  = sc210iot_write_reg(sc210iot, SC210IOT_REG_EXP_LONG_H,
360*4882a593Smuzhiyun 					(exp >> 12) & 0xf);
361*4882a593Smuzhiyun 	ret |= sc210iot_write_reg(sc210iot, SC210IOT_REG_EXP_LONG_M,
362*4882a593Smuzhiyun 					(exp >> 4) & 0xff);
363*4882a593Smuzhiyun 	ret |= sc210iot_write_reg(sc210iot, SC210IOT_REG_EXP_LONG_L,
364*4882a593Smuzhiyun 					(exp & 0xf) << 4);
365*4882a593Smuzhiyun 	return ret;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun 
sc210iot_modify_fps_info(struct sc210iot * sc210iot)368*4882a593Smuzhiyun static void sc210iot_modify_fps_info(struct sc210iot *sc210iot)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun 	const struct sc210iot_mode *mode = sc210iot->cur_mode;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	sc210iot->cur_fps.denominator = mode->max_fps.denominator * mode->vts_def /
373*4882a593Smuzhiyun 					sc210iot->cur_vts;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
sc210iot_set_ctrl(struct v4l2_ctrl * ctrl)376*4882a593Smuzhiyun static int sc210iot_set_ctrl(struct v4l2_ctrl *ctrl)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	struct sc210iot *sc210iot = container_of(ctrl->handler,
379*4882a593Smuzhiyun 					     struct sc210iot, ctrl_handler);
380*4882a593Smuzhiyun 	s64 max;
381*4882a593Smuzhiyun 	int ret = 0;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	/* Propagate change of current control to all related controls */
384*4882a593Smuzhiyun 	switch (ctrl->id) {
385*4882a593Smuzhiyun 	case V4L2_CID_VBLANK:
386*4882a593Smuzhiyun 		/* Update max exposure while meeting expected vblanking */
387*4882a593Smuzhiyun 		max = sc210iot->cur_mode->height + ctrl->val - 4;
388*4882a593Smuzhiyun 		__v4l2_ctrl_modify_range(sc210iot->exposure,
389*4882a593Smuzhiyun 					 sc210iot->exposure->minimum, max,
390*4882a593Smuzhiyun 					 sc210iot->exposure->step,
391*4882a593Smuzhiyun 					 sc210iot->exposure->default_value);
392*4882a593Smuzhiyun 		break;
393*4882a593Smuzhiyun 	}
394*4882a593Smuzhiyun 	if (!pm_runtime_get_if_in_use(sc210iot->dev))
395*4882a593Smuzhiyun 		return 0;
396*4882a593Smuzhiyun 	switch (ctrl->id) {
397*4882a593Smuzhiyun 	case V4L2_CID_EXPOSURE:
398*4882a593Smuzhiyun 		ret = sc210iot_set_exp(sc210iot, ctrl->val << 1);
399*4882a593Smuzhiyun 		break;
400*4882a593Smuzhiyun 	case V4L2_CID_ANALOGUE_GAIN:
401*4882a593Smuzhiyun 		ret = sc210iot_set_gain(sc210iot, ctrl->val);
402*4882a593Smuzhiyun 		break;
403*4882a593Smuzhiyun 	case V4L2_CID_VBLANK:
404*4882a593Smuzhiyun 		dev_dbg(sc210iot->dev, "set vblank 0x%x\n", ctrl->val);
405*4882a593Smuzhiyun 		ret = sc210iot_write_reg(sc210iot, SC210IOT_REG_VTS_H,
406*4882a593Smuzhiyun 					(ctrl->val + sc210iot->cur_mode->height) >> 8);
407*4882a593Smuzhiyun 		ret |= sc210iot_write_reg(sc210iot, SC210IOT_REG_VTS_L,
408*4882a593Smuzhiyun 					(ctrl->val + sc210iot->cur_mode->height) & 0xff);
409*4882a593Smuzhiyun 		if (!ret)
410*4882a593Smuzhiyun 			sc210iot->cur_vts = ctrl->val + sc210iot->cur_mode->height;
411*4882a593Smuzhiyun 		sc210iot_modify_fps_info(sc210iot);
412*4882a593Smuzhiyun 		break;
413*4882a593Smuzhiyun 	case V4L2_CID_HFLIP:
414*4882a593Smuzhiyun 		regmap_update_bits(sc210iot->regmap, SC210IOT_REG_MIRROR_FLIP,
415*4882a593Smuzhiyun 				   MIRROR_MASK, ctrl->val ? MIRROR_MASK : 0);
416*4882a593Smuzhiyun 		break;
417*4882a593Smuzhiyun 	case V4L2_CID_VFLIP:
418*4882a593Smuzhiyun 		regmap_update_bits(sc210iot->regmap, SC210IOT_REG_MIRROR_FLIP,
419*4882a593Smuzhiyun 				   FLIP_MASK,  ctrl->val ? FLIP_MASK : 0);
420*4882a593Smuzhiyun 		break;
421*4882a593Smuzhiyun 	default:
422*4882a593Smuzhiyun 		dev_warn(sc210iot->dev, "%s Unhandled id:0x%x, val:0x%x\n",
423*4882a593Smuzhiyun 			 __func__, ctrl->id, ctrl->val);
424*4882a593Smuzhiyun 		break;
425*4882a593Smuzhiyun 	}
426*4882a593Smuzhiyun 	pm_runtime_put(sc210iot->dev);
427*4882a593Smuzhiyun 	return ret;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun static const struct v4l2_ctrl_ops sc210iot_ctrl_ops = {
431*4882a593Smuzhiyun 	.s_ctrl = sc210iot_set_ctrl,
432*4882a593Smuzhiyun };
433*4882a593Smuzhiyun 
sc210iot_get_regulators(struct sc210iot * sc210iot)434*4882a593Smuzhiyun static int sc210iot_get_regulators(struct sc210iot *sc210iot)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun 	unsigned int i;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	for (i = 0; i < SC210IOT_NUM_SUPPLIES; i++)
439*4882a593Smuzhiyun 		sc210iot->supplies[i].supply = sc210iot_supply_names[i];
440*4882a593Smuzhiyun 	return devm_regulator_bulk_get(sc210iot->dev,
441*4882a593Smuzhiyun 				       SC210IOT_NUM_SUPPLIES,
442*4882a593Smuzhiyun 				       sc210iot->supplies);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun 
sc210iot_initialize_controls(struct sc210iot * sc210iot)445*4882a593Smuzhiyun static int sc210iot_initialize_controls(struct sc210iot *sc210iot)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun 	const struct sc210iot_mode *mode;
448*4882a593Smuzhiyun 	struct v4l2_ctrl_handler *handler;
449*4882a593Smuzhiyun 	s64 exposure_max, vblank_def;
450*4882a593Smuzhiyun 	u32 h_blank;
451*4882a593Smuzhiyun 	int ret;
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	handler = &sc210iot->ctrl_handler;
454*4882a593Smuzhiyun 	mode = sc210iot->cur_mode;
455*4882a593Smuzhiyun 	ret = v4l2_ctrl_handler_init(handler, 8);
456*4882a593Smuzhiyun 	if (ret)
457*4882a593Smuzhiyun 		return ret;
458*4882a593Smuzhiyun 	handler->lock = &sc210iot->lock;
459*4882a593Smuzhiyun 	sc210iot->link_freq = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
460*4882a593Smuzhiyun 						  ARRAY_SIZE(link_freq_menu_items) - 1, 0,
461*4882a593Smuzhiyun 						  link_freq_menu_items);
462*4882a593Smuzhiyun 	sc210iot->pixel_rate = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
463*4882a593Smuzhiyun 					      0, to_pixel_rate(LINK_FREQ_INDEX),
464*4882a593Smuzhiyun 					      1, to_pixel_rate(LINK_FREQ_INDEX));
465*4882a593Smuzhiyun 	h_blank = mode->hts_def - mode->width;
466*4882a593Smuzhiyun 	sc210iot->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
467*4882a593Smuzhiyun 					  h_blank, h_blank, 1, h_blank);
468*4882a593Smuzhiyun 	if (sc210iot->hblank)
469*4882a593Smuzhiyun 		sc210iot->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
470*4882a593Smuzhiyun 	vblank_def = mode->vts_def - mode->height;
471*4882a593Smuzhiyun 	sc210iot->vblank = v4l2_ctrl_new_std(handler, &sc210iot_ctrl_ops,
472*4882a593Smuzhiyun 					  V4L2_CID_VBLANK, vblank_def,
473*4882a593Smuzhiyun 					  SC210IOT_VTS_MAX - mode->height,
474*4882a593Smuzhiyun 					  1, vblank_def);
475*4882a593Smuzhiyun 	exposure_max = mode->vts_def - 4;
476*4882a593Smuzhiyun 	sc210iot->exposure = v4l2_ctrl_new_std(handler, &sc210iot_ctrl_ops,
477*4882a593Smuzhiyun 					    V4L2_CID_EXPOSURE, SC210IOT_EXPOSURE_MIN,
478*4882a593Smuzhiyun 					    exposure_max, SC210IOT_EXPOSURE_STEP,
479*4882a593Smuzhiyun 					    mode->exp_def);
480*4882a593Smuzhiyun 	sc210iot->anal_gain = v4l2_ctrl_new_std(handler, &sc210iot_ctrl_ops,
481*4882a593Smuzhiyun 					     V4L2_CID_ANALOGUE_GAIN, SC210IOT_GAIN_MIN,
482*4882a593Smuzhiyun 					     SC210IOT_GAIN_MAX, SC210IOT_GAIN_STEP,
483*4882a593Smuzhiyun 					     SC210IOT_GAIN_DEFAULT);
484*4882a593Smuzhiyun 	sc210iot->h_flip = v4l2_ctrl_new_std(handler, &sc210iot_ctrl_ops,
485*4882a593Smuzhiyun 					  V4L2_CID_HFLIP, 0, 1, 1, 0);
486*4882a593Smuzhiyun 	sc210iot->v_flip = v4l2_ctrl_new_std(handler, &sc210iot_ctrl_ops,
487*4882a593Smuzhiyun 					  V4L2_CID_VFLIP, 0, 1, 1, 0);
488*4882a593Smuzhiyun 	if (handler->error) {
489*4882a593Smuzhiyun 		ret = handler->error;
490*4882a593Smuzhiyun 		dev_err(sc210iot->dev, "Failed to init controls(%d)\n", ret);
491*4882a593Smuzhiyun 		goto err_free_handler;
492*4882a593Smuzhiyun 	}
493*4882a593Smuzhiyun 	sc210iot->subdev.ctrl_handler = handler;
494*4882a593Smuzhiyun 	sc210iot->has_init_exp = false;
495*4882a593Smuzhiyun 	sc210iot->cur_fps = mode->max_fps;
496*4882a593Smuzhiyun 	sc210iot->cur_vts = mode->vts_def;
497*4882a593Smuzhiyun 	return 0;
498*4882a593Smuzhiyun err_free_handler:
499*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(handler);
500*4882a593Smuzhiyun 	return ret;
501*4882a593Smuzhiyun }
502*4882a593Smuzhiyun 
__sc210iot_power_on(struct sc210iot * sc210iot)503*4882a593Smuzhiyun static int __sc210iot_power_on(struct sc210iot *sc210iot)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun 	int ret;
506*4882a593Smuzhiyun 	struct device *dev = sc210iot->dev;
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	if (sc210iot->is_thunderboot)
509*4882a593Smuzhiyun 		return 0;
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	if (!IS_ERR_OR_NULL(sc210iot->pins_default)) {
512*4882a593Smuzhiyun 		ret = pinctrl_select_state(sc210iot->pinctrl,
513*4882a593Smuzhiyun 					   sc210iot->pins_default);
514*4882a593Smuzhiyun 		if (ret < 0)
515*4882a593Smuzhiyun 			dev_err(dev, "could not set pins\n");
516*4882a593Smuzhiyun 	}
517*4882a593Smuzhiyun 	ret = clk_set_rate(sc210iot->xvclk, SC210IOT_XVCLK_FREQ);
518*4882a593Smuzhiyun 	if (ret < 0)
519*4882a593Smuzhiyun 		dev_warn(dev, "Failed to set xvclk rate\n");
520*4882a593Smuzhiyun 	if (clk_get_rate(sc210iot->xvclk) != SC210IOT_XVCLK_FREQ)
521*4882a593Smuzhiyun 		dev_warn(dev, "xvclk mismatched, modes are based on 27MHz\n");
522*4882a593Smuzhiyun 	ret = clk_prepare_enable(sc210iot->xvclk);
523*4882a593Smuzhiyun 	if (ret < 0) {
524*4882a593Smuzhiyun 		dev_err(dev, "Failed to enable xvclk\n");
525*4882a593Smuzhiyun 		return ret;
526*4882a593Smuzhiyun 	}
527*4882a593Smuzhiyun 	ret = regulator_bulk_enable(SC210IOT_NUM_SUPPLIES, sc210iot->supplies);
528*4882a593Smuzhiyun 	if (ret < 0) {
529*4882a593Smuzhiyun 		dev_err(dev, "Failed to enable regulators\n");
530*4882a593Smuzhiyun 		goto disable_clk;
531*4882a593Smuzhiyun 	}
532*4882a593Smuzhiyun 	if (!IS_ERR(sc210iot->reset_gpio))
533*4882a593Smuzhiyun 		gpiod_direction_output(sc210iot->reset_gpio, 1);
534*4882a593Smuzhiyun 	usleep_range(1000, 2000);
535*4882a593Smuzhiyun 	if (!IS_ERR(sc210iot->pwdn_gpio))
536*4882a593Smuzhiyun 		gpiod_direction_output(sc210iot->pwdn_gpio, 1);
537*4882a593Smuzhiyun 	if (!IS_ERR(sc210iot->reset_gpio))
538*4882a593Smuzhiyun 		gpiod_direction_output(sc210iot->reset_gpio, 0);
539*4882a593Smuzhiyun 	usleep_range(10000, 20000);
540*4882a593Smuzhiyun 	return 0;
541*4882a593Smuzhiyun disable_clk:
542*4882a593Smuzhiyun 	clk_disable_unprepare(sc210iot->xvclk);
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	if (!IS_ERR_OR_NULL(sc210iot->pins_sleep))
545*4882a593Smuzhiyun 		pinctrl_select_state(sc210iot->pinctrl, sc210iot->pins_sleep);
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun 	return ret;
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun 
__sc210iot_power_off(struct sc210iot * sc210iot)550*4882a593Smuzhiyun static void __sc210iot_power_off(struct sc210iot *sc210iot)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	int ret;
553*4882a593Smuzhiyun 	struct device *dev = sc210iot->dev;
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	if (sc210iot->is_thunderboot) {
556*4882a593Smuzhiyun 		if (sc210iot->is_first_streamoff) {
557*4882a593Smuzhiyun 			sc210iot->is_thunderboot = false;
558*4882a593Smuzhiyun 			sc210iot->is_first_streamoff = false;
559*4882a593Smuzhiyun 		} else {
560*4882a593Smuzhiyun 			return;
561*4882a593Smuzhiyun 		}
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 	if (!IS_ERR_OR_NULL(sc210iot->pins_sleep)) {
564*4882a593Smuzhiyun 		ret = pinctrl_select_state(sc210iot->pinctrl,
565*4882a593Smuzhiyun 					   sc210iot->pins_sleep);
566*4882a593Smuzhiyun 		if (ret < 0)
567*4882a593Smuzhiyun 			dev_dbg(dev, "could not set pins\n");
568*4882a593Smuzhiyun 	}
569*4882a593Smuzhiyun 	if (!IS_ERR(sc210iot->reset_gpio))
570*4882a593Smuzhiyun 		gpiod_direction_output(sc210iot->reset_gpio, 1);
571*4882a593Smuzhiyun 	if (!IS_ERR(sc210iot->pwdn_gpio))
572*4882a593Smuzhiyun 		gpiod_direction_output(sc210iot->pwdn_gpio, 0);
573*4882a593Smuzhiyun 	if (sc210iot->is_thunderboot_ng) {
574*4882a593Smuzhiyun 		sc210iot->is_thunderboot_ng = false;
575*4882a593Smuzhiyun 		regulator_bulk_disable(SC210IOT_NUM_SUPPLIES, sc210iot->supplies);
576*4882a593Smuzhiyun 	}
577*4882a593Smuzhiyun 	clk_disable_unprepare(sc210iot->xvclk);
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
sc210iot_check_sensor_id(struct sc210iot * sc210iot)580*4882a593Smuzhiyun static int sc210iot_check_sensor_id(struct sc210iot *sc210iot)
581*4882a593Smuzhiyun {
582*4882a593Smuzhiyun 	u8 id_h = 0, id_l = 0;
583*4882a593Smuzhiyun 	u16 id = 0;
584*4882a593Smuzhiyun 	int ret = 0;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	if (sc210iot->is_thunderboot) {
587*4882a593Smuzhiyun 		dev_info(sc210iot->dev, "Enable thunderboot mode, skip sensor id check\n");
588*4882a593Smuzhiyun 		return 0;
589*4882a593Smuzhiyun 	}
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	ret = sc210iot_read_reg(sc210iot, SC210IOT_REG_CHIP_ID_H, &id_h);
592*4882a593Smuzhiyun 	ret |= sc210iot_read_reg(sc210iot, SC210IOT_REG_CHIP_ID_L, &id_l);
593*4882a593Smuzhiyun 	if (ret) {
594*4882a593Smuzhiyun 		dev_err(sc210iot->dev, "Failed to read sensor id, (%d)\n", ret);
595*4882a593Smuzhiyun 		return ret;
596*4882a593Smuzhiyun 	}
597*4882a593Smuzhiyun 	id = id_h << 8 | id_l;
598*4882a593Smuzhiyun 	if (id != SC210IOT_CHIP_ID) {
599*4882a593Smuzhiyun 		dev_err(sc210iot->dev, "sensor id: %04X mismatched\n", id);
600*4882a593Smuzhiyun 		return -ENODEV;
601*4882a593Smuzhiyun 	}
602*4882a593Smuzhiyun 	dev_info(sc210iot->dev, "Detected SC210IOT sensor\n");
603*4882a593Smuzhiyun 	return 0;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun 
sc210iot_get_module_inf(struct sc210iot * sc210iot,struct rkmodule_inf * inf)606*4882a593Smuzhiyun static void sc210iot_get_module_inf(struct sc210iot *sc210iot,
607*4882a593Smuzhiyun 				  struct rkmodule_inf *inf)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun 	memset(inf, 0, sizeof(*inf));
610*4882a593Smuzhiyun 	strlcpy(inf->base.lens, sc210iot->len_name, sizeof(inf->base.lens));
611*4882a593Smuzhiyun 	strlcpy(inf->base.sensor, SC210IOT_NAME, sizeof(inf->base.sensor));
612*4882a593Smuzhiyun 	strlcpy(inf->base.module, sc210iot->module_name, sizeof(inf->base.module));
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun 
sc210iot_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)615*4882a593Smuzhiyun static long sc210iot_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
618*4882a593Smuzhiyun 	struct rkmodule_hdr_cfg *hdr_cfg;
619*4882a593Smuzhiyun 	long ret = 0;
620*4882a593Smuzhiyun 	u32 stream = 0;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	switch (cmd) {
623*4882a593Smuzhiyun 	case RKMODULE_GET_HDR_CFG:
624*4882a593Smuzhiyun 		hdr_cfg = (struct rkmodule_hdr_cfg *)arg;
625*4882a593Smuzhiyun 		hdr_cfg->esp.mode = HDR_NORMAL_VC;
626*4882a593Smuzhiyun 		hdr_cfg->hdr_mode = sc210iot->cur_mode->hdr_mode;
627*4882a593Smuzhiyun 		break;
628*4882a593Smuzhiyun 	case RKMODULE_GET_MODULE_INFO:
629*4882a593Smuzhiyun 		sc210iot_get_module_inf(sc210iot, (struct rkmodule_inf *)arg);
630*4882a593Smuzhiyun 		break;
631*4882a593Smuzhiyun 	case RKMODULE_SET_HDR_CFG:
632*4882a593Smuzhiyun 		break;
633*4882a593Smuzhiyun 	case RKMODULE_SET_QUICK_STREAM:
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 		stream = *((u32 *)arg);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 		if (stream)
638*4882a593Smuzhiyun 			ret = sc210iot_write_reg(sc210iot,
639*4882a593Smuzhiyun 						 SC210IOT_REG_CTRL_MODE,
640*4882a593Smuzhiyun 						 SC210IOT_MODE_STREAMING);
641*4882a593Smuzhiyun 		else
642*4882a593Smuzhiyun 			ret = sc210iot_write_reg(sc210iot,
643*4882a593Smuzhiyun 						 SC210IOT_REG_CTRL_MODE,
644*4882a593Smuzhiyun 						 SC210IOT_MODE_SW_STANDBY);
645*4882a593Smuzhiyun 		break;
646*4882a593Smuzhiyun 	default:
647*4882a593Smuzhiyun 		ret = -ENOIOCTLCMD;
648*4882a593Smuzhiyun 		break;
649*4882a593Smuzhiyun 	}
650*4882a593Smuzhiyun 	return ret;
651*4882a593Smuzhiyun }
652*4882a593Smuzhiyun 
__sc210iot_start_stream(struct sc210iot * sc210iot)653*4882a593Smuzhiyun static int __sc210iot_start_stream(struct sc210iot *sc210iot)
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun 	int ret = 0;
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	if (!sc210iot->is_thunderboot) {
658*4882a593Smuzhiyun 		ret = regmap_multi_reg_write(sc210iot->regmap,
659*4882a593Smuzhiyun 					     sc210iot->cur_mode->reg_list,
660*4882a593Smuzhiyun 					     sc210iot->cur_mode->reg_num);
661*4882a593Smuzhiyun 		if (ret)
662*4882a593Smuzhiyun 			return ret;
663*4882a593Smuzhiyun 	}
664*4882a593Smuzhiyun 	__v4l2_ctrl_handler_setup(&sc210iot->ctrl_handler);
665*4882a593Smuzhiyun 	return sc210iot_write_reg(sc210iot,
666*4882a593Smuzhiyun 				  SC210IOT_REG_CTRL_MODE,
667*4882a593Smuzhiyun 				  SC210IOT_MODE_STREAMING);
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun 
__sc210iot_stop_stream(struct sc210iot * sc210iot)670*4882a593Smuzhiyun static int __sc210iot_stop_stream(struct sc210iot *sc210iot)
671*4882a593Smuzhiyun {
672*4882a593Smuzhiyun 	sc210iot->has_init_exp = false;
673*4882a593Smuzhiyun 	if (sc210iot->is_thunderboot)
674*4882a593Smuzhiyun 		sc210iot->is_first_streamoff = true;
675*4882a593Smuzhiyun 	return sc210iot_write_reg(sc210iot, SC210IOT_REG_CTRL_MODE,
676*4882a593Smuzhiyun 				  SC210IOT_MODE_SW_STANDBY);
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
sc210iot_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)680*4882a593Smuzhiyun static long sc210iot_compat_ioctl32(struct v4l2_subdev *sd,
681*4882a593Smuzhiyun 				  unsigned int cmd, unsigned long arg)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun 	void __user *up = compat_ptr(arg);
684*4882a593Smuzhiyun 	struct rkmodule_inf *inf;
685*4882a593Smuzhiyun 	struct rkmodule_hdr_cfg *hdr;
686*4882a593Smuzhiyun 	long ret = 0;
687*4882a593Smuzhiyun 	u32 stream = 0;
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	switch (cmd) {
690*4882a593Smuzhiyun 	case RKMODULE_GET_MODULE_INFO:
691*4882a593Smuzhiyun 		inf = kzalloc(sizeof(*inf), GFP_KERNEL);
692*4882a593Smuzhiyun 		if (!inf) {
693*4882a593Smuzhiyun 			ret = -ENOMEM;
694*4882a593Smuzhiyun 			return ret;
695*4882a593Smuzhiyun 		}
696*4882a593Smuzhiyun 		ret = sc210iot_ioctl(sd, cmd, inf);
697*4882a593Smuzhiyun 		if (!ret) {
698*4882a593Smuzhiyun 			ret = copy_to_user(up, inf, sizeof(*inf));
699*4882a593Smuzhiyun 			if (ret)
700*4882a593Smuzhiyun 				ret = -EFAULT;
701*4882a593Smuzhiyun 		}
702*4882a593Smuzhiyun 		kfree(inf);
703*4882a593Smuzhiyun 		break;
704*4882a593Smuzhiyun 	case RKMODULE_GET_HDR_CFG:
705*4882a593Smuzhiyun 		hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
706*4882a593Smuzhiyun 		if (!hdr) {
707*4882a593Smuzhiyun 			ret = -ENOMEM;
708*4882a593Smuzhiyun 			return ret;
709*4882a593Smuzhiyun 		}
710*4882a593Smuzhiyun 		ret = sc210iot_ioctl(sd, cmd, hdr);
711*4882a593Smuzhiyun 		if (!ret) {
712*4882a593Smuzhiyun 			ret = copy_to_user(up, hdr, sizeof(*hdr));
713*4882a593Smuzhiyun 			if (ret)
714*4882a593Smuzhiyun 				ret = -EFAULT;
715*4882a593Smuzhiyun 		}
716*4882a593Smuzhiyun 		kfree(hdr);
717*4882a593Smuzhiyun 		break;
718*4882a593Smuzhiyun 	case RKMODULE_SET_QUICK_STREAM:
719*4882a593Smuzhiyun 		ret = copy_from_user(&stream, up, sizeof(u32));
720*4882a593Smuzhiyun 		if (!ret)
721*4882a593Smuzhiyun 			ret = sc210iot_ioctl(sd, cmd, &stream);
722*4882a593Smuzhiyun 		else
723*4882a593Smuzhiyun 			ret = -EFAULT;
724*4882a593Smuzhiyun 		break;
725*4882a593Smuzhiyun 	default:
726*4882a593Smuzhiyun 		ret = -ENOIOCTLCMD;
727*4882a593Smuzhiyun 		break;
728*4882a593Smuzhiyun 	}
729*4882a593Smuzhiyun 	return ret;
730*4882a593Smuzhiyun }
731*4882a593Smuzhiyun #endif
732*4882a593Smuzhiyun 
sc210iot_s_stream(struct v4l2_subdev * sd,int on)733*4882a593Smuzhiyun static int sc210iot_s_stream(struct v4l2_subdev *sd, int on)
734*4882a593Smuzhiyun {
735*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
736*4882a593Smuzhiyun 	int ret = 0;
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun 	mutex_lock(&sc210iot->lock);
739*4882a593Smuzhiyun 	on = !!on;
740*4882a593Smuzhiyun 	if (on == sc210iot->streaming)
741*4882a593Smuzhiyun 		goto unlock_and_return;
742*4882a593Smuzhiyun 	if (on) {
743*4882a593Smuzhiyun 		if (sc210iot->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
744*4882a593Smuzhiyun 			sc210iot->is_thunderboot = false;
745*4882a593Smuzhiyun 			__sc210iot_power_on(sc210iot);
746*4882a593Smuzhiyun 		}
747*4882a593Smuzhiyun 		ret = pm_runtime_get_sync(sc210iot->dev);
748*4882a593Smuzhiyun 		if (ret < 0) {
749*4882a593Smuzhiyun 			pm_runtime_put_noidle(sc210iot->dev);
750*4882a593Smuzhiyun 			goto unlock_and_return;
751*4882a593Smuzhiyun 		}
752*4882a593Smuzhiyun 		ret = __sc210iot_start_stream(sc210iot);
753*4882a593Smuzhiyun 		if (ret) {
754*4882a593Smuzhiyun 			dev_err(sc210iot->dev, "Failed to start sc210iot stream\n");
755*4882a593Smuzhiyun 			pm_runtime_put(sc210iot->dev);
756*4882a593Smuzhiyun 			goto unlock_and_return;
757*4882a593Smuzhiyun 		}
758*4882a593Smuzhiyun 	} else {
759*4882a593Smuzhiyun 		__sc210iot_stop_stream(sc210iot);
760*4882a593Smuzhiyun 		pm_runtime_put(sc210iot->dev);
761*4882a593Smuzhiyun 	}
762*4882a593Smuzhiyun 	sc210iot->streaming = on;
763*4882a593Smuzhiyun unlock_and_return:
764*4882a593Smuzhiyun 	mutex_unlock(&sc210iot->lock);
765*4882a593Smuzhiyun 	return 0;
766*4882a593Smuzhiyun }
767*4882a593Smuzhiyun 
sc210iot_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)768*4882a593Smuzhiyun static int sc210iot_g_frame_interval(struct v4l2_subdev *sd,
769*4882a593Smuzhiyun 				   struct v4l2_subdev_frame_interval *fi)
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
772*4882a593Smuzhiyun 	const struct sc210iot_mode *mode = sc210iot->cur_mode;
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 	if (sc210iot->streaming)
775*4882a593Smuzhiyun 		fi->interval = sc210iot->cur_fps;
776*4882a593Smuzhiyun 	else
777*4882a593Smuzhiyun 		fi->interval = mode->max_fps;
778*4882a593Smuzhiyun 	return 0;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun 
sc210iot_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)781*4882a593Smuzhiyun static int sc210iot_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
782*4882a593Smuzhiyun 				struct v4l2_mbus_config *config)
783*4882a593Smuzhiyun {
784*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
785*4882a593Smuzhiyun 
786*4882a593Smuzhiyun 	u32 val = 1 << (SC210IOT_LANES - 1) | V4L2_MBUS_CSI2_CHANNEL_0 |
787*4882a593Smuzhiyun 		  V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
788*4882a593Smuzhiyun 	config->type = V4L2_MBUS_CSI2_DPHY;
789*4882a593Smuzhiyun 	config->flags = (sc210iot->cur_mode->hdr_mode == NO_HDR) ?
790*4882a593Smuzhiyun 			val : (val | V4L2_MBUS_CSI2_CHANNEL_1);
791*4882a593Smuzhiyun 	return 0;
792*4882a593Smuzhiyun }
793*4882a593Smuzhiyun 
sc210iot_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)794*4882a593Smuzhiyun static int sc210iot_enum_mbus_code(struct v4l2_subdev *sd,
795*4882a593Smuzhiyun 				 struct v4l2_subdev_pad_config *cfg,
796*4882a593Smuzhiyun 				 struct v4l2_subdev_mbus_code_enum *code)
797*4882a593Smuzhiyun {
798*4882a593Smuzhiyun 	if (code->index != 0)
799*4882a593Smuzhiyun 		return -EINVAL;
800*4882a593Smuzhiyun 	code->code = SC210IOT_MEDIA_BUS_FMT;
801*4882a593Smuzhiyun 	return 0;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun 
sc210iot_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)804*4882a593Smuzhiyun static int sc210iot_enum_frame_sizes(struct v4l2_subdev *sd,
805*4882a593Smuzhiyun 				   struct v4l2_subdev_pad_config *cfg,
806*4882a593Smuzhiyun 				   struct v4l2_subdev_frame_size_enum *fse)
807*4882a593Smuzhiyun {
808*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun 	if (fse->index >= sc210iot->cfg_num)
811*4882a593Smuzhiyun 		return -EINVAL;
812*4882a593Smuzhiyun 	if (fse->code != SC210IOT_MEDIA_BUS_FMT)
813*4882a593Smuzhiyun 		return -EINVAL;
814*4882a593Smuzhiyun 	fse->min_width  = supported_modes[fse->index].width;
815*4882a593Smuzhiyun 	fse->max_width  = supported_modes[fse->index].width;
816*4882a593Smuzhiyun 	fse->max_height = supported_modes[fse->index].height;
817*4882a593Smuzhiyun 	fse->min_height = supported_modes[fse->index].height;
818*4882a593Smuzhiyun 	return 0;
819*4882a593Smuzhiyun }
820*4882a593Smuzhiyun 
sc210iot_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)821*4882a593Smuzhiyun static int sc210iot_enum_frame_interval(struct v4l2_subdev *sd,
822*4882a593Smuzhiyun 						  struct v4l2_subdev_pad_config *cfg,
823*4882a593Smuzhiyun 						  struct v4l2_subdev_frame_interval_enum *fie)
824*4882a593Smuzhiyun {
825*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	if (fie->index >= sc210iot->cfg_num)
828*4882a593Smuzhiyun 		return -EINVAL;
829*4882a593Smuzhiyun 	fie->code = SC210IOT_MEDIA_BUS_FMT;
830*4882a593Smuzhiyun 	fie->width = supported_modes[fie->index].width;
831*4882a593Smuzhiyun 	fie->height = supported_modes[fie->index].height;
832*4882a593Smuzhiyun 	fie->interval = supported_modes[fie->index].max_fps;
833*4882a593Smuzhiyun 	fie->reserved[0] = supported_modes[fie->index].hdr_mode;
834*4882a593Smuzhiyun 	return 0;
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun 
sc210iot_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)837*4882a593Smuzhiyun static int sc210iot_set_fmt(struct v4l2_subdev *sd,
838*4882a593Smuzhiyun 			  struct v4l2_subdev_pad_config *cfg,
839*4882a593Smuzhiyun 			  struct v4l2_subdev_format *fmt)
840*4882a593Smuzhiyun {
841*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
842*4882a593Smuzhiyun 	const struct sc210iot_mode *mode;
843*4882a593Smuzhiyun 	s64 h_blank, vblank_def;
844*4882a593Smuzhiyun 
845*4882a593Smuzhiyun 	mutex_lock(&sc210iot->lock);
846*4882a593Smuzhiyun 	mode = v4l2_find_nearest_size(supported_modes,
847*4882a593Smuzhiyun 				      ARRAY_SIZE(supported_modes),
848*4882a593Smuzhiyun 				      width, height,
849*4882a593Smuzhiyun 				      fmt->format.width, fmt->format.height);
850*4882a593Smuzhiyun 	fmt->format.code = SC210IOT_MEDIA_BUS_FMT;
851*4882a593Smuzhiyun 	fmt->format.width = mode->width;
852*4882a593Smuzhiyun 	fmt->format.height = mode->height;
853*4882a593Smuzhiyun 	fmt->format.field = V4L2_FIELD_NONE;
854*4882a593Smuzhiyun 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
855*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
856*4882a593Smuzhiyun 		*v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
857*4882a593Smuzhiyun #else
858*4882a593Smuzhiyun 		mutex_unlock(&sc210iot->lock);
859*4882a593Smuzhiyun 		return -ENOTTY;
860*4882a593Smuzhiyun #endif
861*4882a593Smuzhiyun 	} else {
862*4882a593Smuzhiyun 		sc210iot->cur_mode = mode;
863*4882a593Smuzhiyun 		__v4l2_ctrl_s_ctrl(sc210iot->link_freq, mode->link_freq_index);
864*4882a593Smuzhiyun 		__v4l2_ctrl_s_ctrl_int64(sc210iot->pixel_rate,
865*4882a593Smuzhiyun 					 to_pixel_rate(mode->link_freq_index));
866*4882a593Smuzhiyun 		h_blank = mode->hts_def - mode->width;
867*4882a593Smuzhiyun 		__v4l2_ctrl_modify_range(sc210iot->hblank, h_blank,
868*4882a593Smuzhiyun 					 h_blank, 1, h_blank);
869*4882a593Smuzhiyun 		vblank_def = mode->vts_def - mode->height;
870*4882a593Smuzhiyun 		__v4l2_ctrl_modify_range(sc210iot->vblank, vblank_def,
871*4882a593Smuzhiyun 					 SC210IOT_VTS_MAX - mode->height,
872*4882a593Smuzhiyun 					 1, vblank_def);
873*4882a593Smuzhiyun 		sc210iot->cur_fps = mode->max_fps;
874*4882a593Smuzhiyun 		sc210iot->cur_vts = mode->vts_def;
875*4882a593Smuzhiyun 	}
876*4882a593Smuzhiyun 	mutex_unlock(&sc210iot->lock);
877*4882a593Smuzhiyun 	return 0;
878*4882a593Smuzhiyun }
879*4882a593Smuzhiyun 
sc210iot_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)880*4882a593Smuzhiyun static int sc210iot_get_fmt(struct v4l2_subdev *sd,
881*4882a593Smuzhiyun 			  struct v4l2_subdev_pad_config *cfg,
882*4882a593Smuzhiyun 			  struct v4l2_subdev_format *fmt)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
885*4882a593Smuzhiyun 	const struct sc210iot_mode *mode = sc210iot->cur_mode;
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	mutex_lock(&sc210iot->lock);
888*4882a593Smuzhiyun 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
889*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
890*4882a593Smuzhiyun 		fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
891*4882a593Smuzhiyun #else
892*4882a593Smuzhiyun 		mutex_unlock(&sc210iot->lock);
893*4882a593Smuzhiyun 		return -ENOTTY;
894*4882a593Smuzhiyun #endif
895*4882a593Smuzhiyun 	} else {
896*4882a593Smuzhiyun 		fmt->format.width = mode->width;
897*4882a593Smuzhiyun 		fmt->format.height = mode->height;
898*4882a593Smuzhiyun 		fmt->format.code = SC210IOT_MEDIA_BUS_FMT;
899*4882a593Smuzhiyun 		fmt->format.field = V4L2_FIELD_NONE;
900*4882a593Smuzhiyun 		fmt->reserved[0] = mode->vc[PAD0];
901*4882a593Smuzhiyun 	}
902*4882a593Smuzhiyun 	mutex_unlock(&sc210iot->lock);
903*4882a593Smuzhiyun 	return 0;
904*4882a593Smuzhiyun }
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
sc210iot_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)907*4882a593Smuzhiyun static int sc210iot_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
910*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *try_fmt =
911*4882a593Smuzhiyun 				v4l2_subdev_get_try_format(sd, fh->pad, 0);
912*4882a593Smuzhiyun 	const struct sc210iot_mode *def_mode = &supported_modes[0];
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	mutex_lock(&sc210iot->lock);
915*4882a593Smuzhiyun 	/* Initialize try_fmt */
916*4882a593Smuzhiyun 	try_fmt->width = def_mode->width;
917*4882a593Smuzhiyun 	try_fmt->height = def_mode->height;
918*4882a593Smuzhiyun 	try_fmt->code = SC210IOT_MEDIA_BUS_FMT;
919*4882a593Smuzhiyun 	try_fmt->field = V4L2_FIELD_NONE;
920*4882a593Smuzhiyun 	mutex_unlock(&sc210iot->lock);
921*4882a593Smuzhiyun 	return 0;
922*4882a593Smuzhiyun }
923*4882a593Smuzhiyun #endif
924*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
925*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops sc210iot_internal_ops = {
926*4882a593Smuzhiyun 	.open = sc210iot_open,
927*4882a593Smuzhiyun };
928*4882a593Smuzhiyun #endif
929*4882a593Smuzhiyun 
sc210iot_s_power(struct v4l2_subdev * sd,int on)930*4882a593Smuzhiyun static int sc210iot_s_power(struct v4l2_subdev *sd, int on)
931*4882a593Smuzhiyun {
932*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
933*4882a593Smuzhiyun 	int ret = 0;
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun 	mutex_lock(&sc210iot->lock);
936*4882a593Smuzhiyun 	if (sc210iot->power_on == !!on)
937*4882a593Smuzhiyun 		goto unlock_and_return;
938*4882a593Smuzhiyun 	if (on) {
939*4882a593Smuzhiyun 		ret = pm_runtime_get_sync(sc210iot->dev);
940*4882a593Smuzhiyun 		if (ret < 0) {
941*4882a593Smuzhiyun 			pm_runtime_put_noidle(sc210iot->dev);
942*4882a593Smuzhiyun 			goto unlock_and_return;
943*4882a593Smuzhiyun 		}
944*4882a593Smuzhiyun 		if (!sc210iot->is_thunderboot) {
945*4882a593Smuzhiyun 			ret |= sc210iot_write_reg(sc210iot,
946*4882a593Smuzhiyun 						  SC210IOT_SOFTWARE_RESET_REG, 0x01);
947*4882a593Smuzhiyun 			usleep_range(100, 200);
948*4882a593Smuzhiyun 		}
949*4882a593Smuzhiyun 		sc210iot->power_on = true;
950*4882a593Smuzhiyun 	} else {
951*4882a593Smuzhiyun 		pm_runtime_put(sc210iot->dev);
952*4882a593Smuzhiyun 		sc210iot->power_on = false;
953*4882a593Smuzhiyun 	}
954*4882a593Smuzhiyun unlock_and_return:
955*4882a593Smuzhiyun 	mutex_unlock(&sc210iot->lock);
956*4882a593Smuzhiyun 	return ret;
957*4882a593Smuzhiyun }
958*4882a593Smuzhiyun 
959*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops sc210iot_core_ops = {
960*4882a593Smuzhiyun 	.s_power = sc210iot_s_power,
961*4882a593Smuzhiyun 	.ioctl = sc210iot_ioctl,
962*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
963*4882a593Smuzhiyun 	.compat_ioctl32 = sc210iot_compat_ioctl32,
964*4882a593Smuzhiyun #endif
965*4882a593Smuzhiyun };
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops sc210iot_video_ops = {
968*4882a593Smuzhiyun 	.s_stream = sc210iot_s_stream,
969*4882a593Smuzhiyun 	.g_frame_interval = sc210iot_g_frame_interval,
970*4882a593Smuzhiyun };
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops sc210iot_pad_ops = {
973*4882a593Smuzhiyun 	.enum_mbus_code = sc210iot_enum_mbus_code,
974*4882a593Smuzhiyun 	.enum_frame_size = sc210iot_enum_frame_sizes,
975*4882a593Smuzhiyun 	.enum_frame_interval = sc210iot_enum_frame_interval,
976*4882a593Smuzhiyun 	.get_fmt = sc210iot_get_fmt,
977*4882a593Smuzhiyun 	.set_fmt = sc210iot_set_fmt,
978*4882a593Smuzhiyun 	.get_mbus_config = sc210iot_g_mbus_config,
979*4882a593Smuzhiyun };
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun static const struct v4l2_subdev_ops sc210iot_subdev_ops = {
982*4882a593Smuzhiyun 	.core   = &sc210iot_core_ops,
983*4882a593Smuzhiyun 	.video  = &sc210iot_video_ops,
984*4882a593Smuzhiyun 	.pad    = &sc210iot_pad_ops,
985*4882a593Smuzhiyun };
986*4882a593Smuzhiyun 
sc210iot_runtime_resume(struct device * dev)987*4882a593Smuzhiyun static int sc210iot_runtime_resume(struct device *dev)
988*4882a593Smuzhiyun {
989*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
990*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
991*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 	__sc210iot_power_on(sc210iot);
994*4882a593Smuzhiyun 	return 0;
995*4882a593Smuzhiyun }
996*4882a593Smuzhiyun 
sc210iot_runtime_suspend(struct device * dev)997*4882a593Smuzhiyun static int sc210iot_runtime_suspend(struct device *dev)
998*4882a593Smuzhiyun {
999*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1000*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1001*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
1002*4882a593Smuzhiyun 
1003*4882a593Smuzhiyun 	__sc210iot_power_off(sc210iot);
1004*4882a593Smuzhiyun 	return 0;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun static const struct dev_pm_ops sc210iot_pm_ops = {
1008*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(sc210iot_runtime_suspend,
1009*4882a593Smuzhiyun 			   sc210iot_runtime_resume, NULL)
1010*4882a593Smuzhiyun };
1011*4882a593Smuzhiyun 
sc210iot_probe(struct i2c_client * client,const struct i2c_device_id * id)1012*4882a593Smuzhiyun static int sc210iot_probe(struct i2c_client *client,
1013*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
1014*4882a593Smuzhiyun {
1015*4882a593Smuzhiyun 	struct device *dev = &client->dev;
1016*4882a593Smuzhiyun 	struct device_node *node = dev->of_node;
1017*4882a593Smuzhiyun 	struct sc210iot *sc210iot;
1018*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
1019*4882a593Smuzhiyun 	char facing[2];
1020*4882a593Smuzhiyun 	int ret;
1021*4882a593Smuzhiyun 
1022*4882a593Smuzhiyun 	dev_info(dev, "driver version: %02x.%02x.%02x",
1023*4882a593Smuzhiyun 		 DRIVER_VERSION >> 16,
1024*4882a593Smuzhiyun 		 (DRIVER_VERSION & 0xff00) >> 8,
1025*4882a593Smuzhiyun 		 DRIVER_VERSION & 0x00ff);
1026*4882a593Smuzhiyun 	sc210iot = devm_kzalloc(dev, sizeof(*sc210iot), GFP_KERNEL);
1027*4882a593Smuzhiyun 	if (!sc210iot)
1028*4882a593Smuzhiyun 		return -ENOMEM;
1029*4882a593Smuzhiyun 	sc210iot->dev = dev;
1030*4882a593Smuzhiyun 	sc210iot->regmap = devm_regmap_init_i2c(client, &sc210iot_regmap_config);
1031*4882a593Smuzhiyun 	if (IS_ERR(sc210iot->regmap)) {
1032*4882a593Smuzhiyun 		dev_err(dev, "Failed to initialize I2C\n");
1033*4882a593Smuzhiyun 		return -ENODEV;
1034*4882a593Smuzhiyun 	}
1035*4882a593Smuzhiyun 	ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1036*4882a593Smuzhiyun 				   &sc210iot->module_index);
1037*4882a593Smuzhiyun 	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1038*4882a593Smuzhiyun 				       &sc210iot->module_facing);
1039*4882a593Smuzhiyun 	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1040*4882a593Smuzhiyun 				       &sc210iot->module_name);
1041*4882a593Smuzhiyun 	ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1042*4882a593Smuzhiyun 				       &sc210iot->len_name);
1043*4882a593Smuzhiyun 	if (ret) {
1044*4882a593Smuzhiyun 		dev_err(dev, "Failed to get module information\n");
1045*4882a593Smuzhiyun 		return -EINVAL;
1046*4882a593Smuzhiyun 	}
1047*4882a593Smuzhiyun 
1048*4882a593Smuzhiyun 	sc210iot->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun 	sc210iot->xvclk = devm_clk_get(sc210iot->dev, "xvclk");
1051*4882a593Smuzhiyun 	if (IS_ERR(sc210iot->xvclk)) {
1052*4882a593Smuzhiyun 		dev_err(sc210iot->dev, "Failed to get xvclk\n");
1053*4882a593Smuzhiyun 		return -EINVAL;
1054*4882a593Smuzhiyun 	}
1055*4882a593Smuzhiyun 	sc210iot->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_ASIS);
1056*4882a593Smuzhiyun 	if (IS_ERR(sc210iot->reset_gpio))
1057*4882a593Smuzhiyun 		dev_warn(dev, "Failed to get reset-gpios\n");
1058*4882a593Smuzhiyun 	sc210iot->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_ASIS);
1059*4882a593Smuzhiyun 	if (IS_ERR(sc210iot->pwdn_gpio))
1060*4882a593Smuzhiyun 		dev_warn(dev, "Failed to get pwdn-gpios\n");
1061*4882a593Smuzhiyun 	ret = sc210iot_get_regulators(sc210iot);
1062*4882a593Smuzhiyun 	if (ret) {
1063*4882a593Smuzhiyun 		dev_err(dev, "Failed to get regulators\n");
1064*4882a593Smuzhiyun 		return ret;
1065*4882a593Smuzhiyun 	}
1066*4882a593Smuzhiyun 	sc210iot->pinctrl = devm_pinctrl_get(dev);
1067*4882a593Smuzhiyun 	if (!IS_ERR(sc210iot->pinctrl)) {
1068*4882a593Smuzhiyun 		sc210iot->pins_default =
1069*4882a593Smuzhiyun 			pinctrl_lookup_state(sc210iot->pinctrl,
1070*4882a593Smuzhiyun 					     OF_CAMERA_PINCTRL_STATE_DEFAULT);
1071*4882a593Smuzhiyun 		if (IS_ERR(sc210iot->pins_default))
1072*4882a593Smuzhiyun 			dev_info(dev, "could not get default pinstate\n");
1073*4882a593Smuzhiyun 
1074*4882a593Smuzhiyun 		sc210iot->pins_sleep =
1075*4882a593Smuzhiyun 			pinctrl_lookup_state(sc210iot->pinctrl,
1076*4882a593Smuzhiyun 					     OF_CAMERA_PINCTRL_STATE_SLEEP);
1077*4882a593Smuzhiyun 		if (IS_ERR(sc210iot->pins_sleep))
1078*4882a593Smuzhiyun 			dev_info(dev, "could not get sleep pinstate\n");
1079*4882a593Smuzhiyun 	} else {
1080*4882a593Smuzhiyun 		dev_info(dev, "no pinctrl\n");
1081*4882a593Smuzhiyun 	}
1082*4882a593Smuzhiyun 	mutex_init(&sc210iot->lock);
1083*4882a593Smuzhiyun 	/* set default mode */
1084*4882a593Smuzhiyun 	sc210iot->cur_mode = &supported_modes[0];
1085*4882a593Smuzhiyun 	sc210iot->cfg_num = ARRAY_SIZE(supported_modes);
1086*4882a593Smuzhiyun 	sd = &sc210iot->subdev;
1087*4882a593Smuzhiyun 	v4l2_i2c_subdev_init(sd, client, &sc210iot_subdev_ops);
1088*4882a593Smuzhiyun 	ret = sc210iot_initialize_controls(sc210iot);
1089*4882a593Smuzhiyun 	if (ret)
1090*4882a593Smuzhiyun 		goto err_destroy_mutex;
1091*4882a593Smuzhiyun 	ret = __sc210iot_power_on(sc210iot);
1092*4882a593Smuzhiyun 	if (ret)
1093*4882a593Smuzhiyun 		goto err_free_handler;
1094*4882a593Smuzhiyun 	ret = sc210iot_check_sensor_id(sc210iot);
1095*4882a593Smuzhiyun 	if (ret)
1096*4882a593Smuzhiyun 		goto err_power_off;
1097*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1098*4882a593Smuzhiyun 	sd->internal_ops = &sc210iot_internal_ops;
1099*4882a593Smuzhiyun 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1100*4882a593Smuzhiyun #endif
1101*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
1102*4882a593Smuzhiyun 	sc210iot->pad.flags = MEDIA_PAD_FL_SOURCE;
1103*4882a593Smuzhiyun 	sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1104*4882a593Smuzhiyun 	ret = media_entity_pads_init(&sd->entity, 1, &sc210iot->pad);
1105*4882a593Smuzhiyun 	if (ret < 0)
1106*4882a593Smuzhiyun 		goto err_power_off;
1107*4882a593Smuzhiyun #endif
1108*4882a593Smuzhiyun 	memset(facing, 0, sizeof(facing));
1109*4882a593Smuzhiyun 	if (strcmp(sc210iot->module_facing, "back") == 0)
1110*4882a593Smuzhiyun 		facing[0] = 'b';
1111*4882a593Smuzhiyun 	else
1112*4882a593Smuzhiyun 		facing[0] = 'f';
1113*4882a593Smuzhiyun 	snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1114*4882a593Smuzhiyun 		 sc210iot->module_index, facing,
1115*4882a593Smuzhiyun 		 SC210IOT_NAME, dev_name(sd->dev));
1116*4882a593Smuzhiyun 	ret = v4l2_async_register_subdev_sensor_common(sd);
1117*4882a593Smuzhiyun 	if (ret) {
1118*4882a593Smuzhiyun 		dev_err(dev, "Failed to register v4l2 async subdev\n");
1119*4882a593Smuzhiyun 		goto err_clean_entity;
1120*4882a593Smuzhiyun 	}
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun 	pm_runtime_set_active(dev);
1123*4882a593Smuzhiyun 	pm_runtime_enable(dev);
1124*4882a593Smuzhiyun 	pm_runtime_idle(dev);
1125*4882a593Smuzhiyun 	return 0;
1126*4882a593Smuzhiyun err_clean_entity:
1127*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
1128*4882a593Smuzhiyun 	media_entity_cleanup(&sd->entity);
1129*4882a593Smuzhiyun #endif
1130*4882a593Smuzhiyun err_power_off:
1131*4882a593Smuzhiyun 	__sc210iot_power_off(sc210iot);
1132*4882a593Smuzhiyun err_free_handler:
1133*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&sc210iot->ctrl_handler);
1134*4882a593Smuzhiyun err_destroy_mutex:
1135*4882a593Smuzhiyun 	mutex_destroy(&sc210iot->lock);
1136*4882a593Smuzhiyun 	return ret;
1137*4882a593Smuzhiyun }
1138*4882a593Smuzhiyun 
sc210iot_remove(struct i2c_client * client)1139*4882a593Smuzhiyun static int sc210iot_remove(struct i2c_client *client)
1140*4882a593Smuzhiyun {
1141*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1142*4882a593Smuzhiyun 	struct sc210iot *sc210iot = to_sc210iot(sd);
1143*4882a593Smuzhiyun 
1144*4882a593Smuzhiyun 	v4l2_async_unregister_subdev(sd);
1145*4882a593Smuzhiyun #ifdef CONFIG_MEDIA_CONTROLLER
1146*4882a593Smuzhiyun 	media_entity_cleanup(&sd->entity);
1147*4882a593Smuzhiyun #endif
1148*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&sc210iot->ctrl_handler);
1149*4882a593Smuzhiyun 	mutex_destroy(&sc210iot->lock);
1150*4882a593Smuzhiyun 	pm_runtime_disable(&client->dev);
1151*4882a593Smuzhiyun 	if (!pm_runtime_status_suspended(&client->dev))
1152*4882a593Smuzhiyun 		__sc210iot_power_off(sc210iot);
1153*4882a593Smuzhiyun 	pm_runtime_set_suspended(&client->dev);
1154*4882a593Smuzhiyun 	return 0;
1155*4882a593Smuzhiyun }
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun static const struct i2c_device_id sc210iot_match_id[] = {
1158*4882a593Smuzhiyun 	{ "sc210iot", 0 },
1159*4882a593Smuzhiyun 	{ },
1160*4882a593Smuzhiyun };
1161*4882a593Smuzhiyun 
1162*4882a593Smuzhiyun static const struct of_device_id sc210iot_of_match[] = {
1163*4882a593Smuzhiyun 	{ .compatible = "smartsens,sc210iot" },
1164*4882a593Smuzhiyun 	{},
1165*4882a593Smuzhiyun };
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, sc210iot_of_match);
1168*4882a593Smuzhiyun 
1169*4882a593Smuzhiyun static struct i2c_driver sc210iot_i2c_driver = {
1170*4882a593Smuzhiyun 	.driver = {
1171*4882a593Smuzhiyun 		.name = SC210IOT_NAME,
1172*4882a593Smuzhiyun 		.pm = &sc210iot_pm_ops,
1173*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(sc210iot_of_match),
1174*4882a593Smuzhiyun 	},
1175*4882a593Smuzhiyun 	.probe      = &sc210iot_probe,
1176*4882a593Smuzhiyun 	.remove     = &sc210iot_remove,
1177*4882a593Smuzhiyun 	.id_table   = sc210iot_match_id,
1178*4882a593Smuzhiyun };
1179*4882a593Smuzhiyun 
sensor_mod_init(void)1180*4882a593Smuzhiyun static int __init sensor_mod_init(void)
1181*4882a593Smuzhiyun {
1182*4882a593Smuzhiyun 	return i2c_add_driver(&sc210iot_i2c_driver);
1183*4882a593Smuzhiyun }
1184*4882a593Smuzhiyun 
sensor_mod_exit(void)1185*4882a593Smuzhiyun static void __exit sensor_mod_exit(void)
1186*4882a593Smuzhiyun {
1187*4882a593Smuzhiyun 	i2c_del_driver(&sc210iot_i2c_driver);
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun device_initcall_sync(sensor_mod_init);
1191*4882a593Smuzhiyun module_exit(sensor_mod_exit);
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun MODULE_DESCRIPTION("Smartsens sc210iot Image Sensor driver");
1194*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1195