1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * ov7725 driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/clk.h>
9*4882a593Smuzhiyun #include <linux/device.h>
10*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/pm_runtime.h>
14*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
15*4882a593Smuzhiyun #include <linux/sysfs.h>
16*4882a593Smuzhiyun #include <media/media-entity.h>
17*4882a593Smuzhiyun #include <media/v4l2-async.h>
18*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
19*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define REG_CHIP_ID_H 0x0a
22*4882a593Smuzhiyun #define REG_CHIP_ID_L 0x0b
23*4882a593Smuzhiyun #define CHIP_ID_H 0x77
24*4882a593Smuzhiyun #define CHIP_ID_L 0x21
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define REG_NULL 0xFF
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define ov7725_XVCLK_FREQ 24000000
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun static const char * const ov7725_supply_names[] = {
31*4882a593Smuzhiyun "avdd",
32*4882a593Smuzhiyun "dovdd",
33*4882a593Smuzhiyun "dvdd",
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define ov7725_NUM_SUPPLIES ARRAY_SIZE(ov7725_supply_names)
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct regval {
39*4882a593Smuzhiyun u8 addr;
40*4882a593Smuzhiyun u8 val;
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun struct ov7725_mode {
44*4882a593Smuzhiyun u32 width;
45*4882a593Smuzhiyun u32 height;
46*4882a593Smuzhiyun const struct regval *reg_list;
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun struct ov7725 {
50*4882a593Smuzhiyun struct i2c_client *client;
51*4882a593Smuzhiyun struct clk *xvclk;
52*4882a593Smuzhiyun struct gpio_desc *reset_gpio;
53*4882a593Smuzhiyun struct gpio_desc *pwdn_gpio;
54*4882a593Smuzhiyun struct regulator_bulk_data supplies[ov7725_NUM_SUPPLIES];
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun bool streaming;
57*4882a593Smuzhiyun struct mutex mutex; /* lock to serialize v4l2 callback */
58*4882a593Smuzhiyun struct v4l2_subdev subdev;
59*4882a593Smuzhiyun struct media_pad pad;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun const struct ov7725_mode *cur_mode;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #define to_ov7725(sd) container_of(sd, struct ov7725, subdev)
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /* 30fps at 24MHz input clock,4x maximum gain */
67*4882a593Smuzhiyun static struct regval ov7725_640x480_30fps[] = {
68*4882a593Smuzhiyun {0x12, 0x80},
69*4882a593Smuzhiyun {0x3d, 0x03},
70*4882a593Smuzhiyun {0x17, 0x25}, /* Raw: 0x17,0x22 */
71*4882a593Smuzhiyun {0x18, 0xa4}, /* Raw: 0x18,0xa4 */
72*4882a593Smuzhiyun {0x19, 0x06}, /* Raw: 0x19,0x07 */
73*4882a593Smuzhiyun {0x1a, 0xf0},
74*4882a593Smuzhiyun {0x32, 0x60}, /* Raw: 0x32,0x00 */
75*4882a593Smuzhiyun {0x29, 0xa0},
76*4882a593Smuzhiyun {0x2c, 0xf0},
77*4882a593Smuzhiyun {0x2a, 0x00},
78*4882a593Smuzhiyun {0x11, 0x01},
79*4882a593Smuzhiyun {0x42, 0x7f},
80*4882a593Smuzhiyun {0x4d, 0x00},
81*4882a593Smuzhiyun {0x63, 0xe0},
82*4882a593Smuzhiyun {0x64, 0xff},
83*4882a593Smuzhiyun {0x65, 0x20},
84*4882a593Smuzhiyun {0x66, 0x00},
85*4882a593Smuzhiyun {0x67, 0x48},
86*4882a593Smuzhiyun {0x13, 0xf0},
87*4882a593Smuzhiyun {0x0d, 0x41},
88*4882a593Smuzhiyun {0x0f, 0xc5},
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun {0x14, 0x17}, /* 0x14,0x11 */
91*4882a593Smuzhiyun {0x22, 0x3f},
92*4882a593Smuzhiyun {0x23, 0x07},
93*4882a593Smuzhiyun {0x24, 0x44},
94*4882a593Smuzhiyun {0x25, 0x3c},
95*4882a593Smuzhiyun {0x26, 0xa1},
96*4882a593Smuzhiyun {0x2b, 0x00},
97*4882a593Smuzhiyun {0x6b, 0xaa},
98*4882a593Smuzhiyun {0x13, 0xff},
99*4882a593Smuzhiyun {0x90, 0x05},
100*4882a593Smuzhiyun {0x91, 0x01},
101*4882a593Smuzhiyun {0x92, 0x03},
102*4882a593Smuzhiyun {0x93, 0x00},
103*4882a593Smuzhiyun {0x94, 0x40},
104*4882a593Smuzhiyun {0x95, 0x40},
105*4882a593Smuzhiyun {0x96, 0x00},
106*4882a593Smuzhiyun {0x97, 0x11},
107*4882a593Smuzhiyun {0x98, 0x2f},
108*4882a593Smuzhiyun {0x99, 0x40},
109*4882a593Smuzhiyun {0x9a, 0x9e},
110*4882a593Smuzhiyun {0x9b, 0x08},
111*4882a593Smuzhiyun {0x9c, 0x20},
112*4882a593Smuzhiyun {0x9e, 0x81},
113*4882a593Smuzhiyun {0xa6, 0x06},
114*4882a593Smuzhiyun {0x7e, 0x0c},
115*4882a593Smuzhiyun {0x7f, 0x16},
116*4882a593Smuzhiyun {0x80, 0x2a},
117*4882a593Smuzhiyun {0x81, 0x4e},
118*4882a593Smuzhiyun {0x82, 0x61},
119*4882a593Smuzhiyun {0x83, 0x6f},
120*4882a593Smuzhiyun {0x84, 0x7b},
121*4882a593Smuzhiyun {0x85, 0x86},
122*4882a593Smuzhiyun {0x86, 0x8e},
123*4882a593Smuzhiyun {0x87, 0x97},
124*4882a593Smuzhiyun {0x88, 0xa4},
125*4882a593Smuzhiyun {0x89, 0xaf},
126*4882a593Smuzhiyun {0x8a, 0xc5},
127*4882a593Smuzhiyun {0x8b, 0xd7},
128*4882a593Smuzhiyun {0x8c, 0xe8},
129*4882a593Smuzhiyun {0x8d, 0x20},
130*4882a593Smuzhiyun {0x33, 0x00},
131*4882a593Smuzhiyun {0x22, 0x99},
132*4882a593Smuzhiyun {0x23, 0x03},
133*4882a593Smuzhiyun {0x4a, 0x00},
134*4882a593Smuzhiyun {0x49, 0x13},
135*4882a593Smuzhiyun {0x47, 0x08},
136*4882a593Smuzhiyun {0x4b, 0x14},
137*4882a593Smuzhiyun {0x4c, 0x17},
138*4882a593Smuzhiyun {0x46, 0x05},
139*4882a593Smuzhiyun {0x0e, 0x65},
140*4882a593Smuzhiyun {0x0c, 0x00},
141*4882a593Smuzhiyun {REG_NULL, 0x0},
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun static struct regval ov7725_1600x1200_7fps[] = {
145*4882a593Smuzhiyun {REG_NULL, 0x0},
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static const struct ov7725_mode supported_modes[] = {
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun .width = 640,
151*4882a593Smuzhiyun .height = 480,
152*4882a593Smuzhiyun .reg_list = ov7725_640x480_30fps,
153*4882a593Smuzhiyun },
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun .width = 1600,
156*4882a593Smuzhiyun .height = 1200,
157*4882a593Smuzhiyun .reg_list = ov7725_1600x1200_7fps,
158*4882a593Smuzhiyun },
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun
ov7725_write_reg(struct i2c_client * client,u8 reg,u8 val)161*4882a593Smuzhiyun static int ov7725_write_reg(struct i2c_client *client, u8 reg, u8 val)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun int ret;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun ret = i2c_smbus_write_byte_data(client, reg, val);
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun if (ret < 0)
168*4882a593Smuzhiyun dev_err(&client->dev, "write reg error: %d\n", ret);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun return ret;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
ov7725_write_array(struct i2c_client * client,const struct regval * regs)173*4882a593Smuzhiyun static int ov7725_write_array(struct i2c_client *client,
174*4882a593Smuzhiyun const struct regval *regs)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun int i, ret = 0;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
179*4882a593Smuzhiyun ret = ov7725_write_reg(client, regs[i].addr, regs[i].val);
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun return ret;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
ov7725_read_reg(struct i2c_client * client,u8 reg)184*4882a593Smuzhiyun static inline u8 ov7725_read_reg(struct i2c_client *client, u8 reg)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun return i2c_smbus_read_byte_data(client, reg);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
ov7725_get_reso_dist(const struct ov7725_mode * mode,struct v4l2_mbus_framefmt * framefmt)189*4882a593Smuzhiyun static int ov7725_get_reso_dist(const struct ov7725_mode *mode,
190*4882a593Smuzhiyun struct v4l2_mbus_framefmt *framefmt)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun return abs(mode->width - framefmt->width) +
193*4882a593Smuzhiyun abs(mode->height - framefmt->height);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun static const struct ov7725_mode *
ov7725_find_best_fit(struct v4l2_subdev_format * fmt)197*4882a593Smuzhiyun ov7725_find_best_fit(struct v4l2_subdev_format *fmt)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun struct v4l2_mbus_framefmt *framefmt = &fmt->format;
200*4882a593Smuzhiyun int dist;
201*4882a593Smuzhiyun int cur_best_fit = 0;
202*4882a593Smuzhiyun int cur_best_fit_dist = -1;
203*4882a593Smuzhiyun size_t i;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
206*4882a593Smuzhiyun dist = ov7725_get_reso_dist(&supported_modes[i], framefmt);
207*4882a593Smuzhiyun if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
208*4882a593Smuzhiyun cur_best_fit_dist = dist;
209*4882a593Smuzhiyun cur_best_fit = i;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun return &supported_modes[cur_best_fit];
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
ov7725_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)216*4882a593Smuzhiyun static int ov7725_set_fmt(struct v4l2_subdev *sd,
217*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
218*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun struct ov7725 *ov7725 = to_ov7725(sd);
221*4882a593Smuzhiyun const struct ov7725_mode *mode;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun mutex_lock(&ov7725->mutex);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun mode = ov7725_find_best_fit(fmt);
226*4882a593Smuzhiyun fmt->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
227*4882a593Smuzhiyun fmt->format.width = mode->width;
228*4882a593Smuzhiyun fmt->format.height = mode->height;
229*4882a593Smuzhiyun fmt->format.field = V4L2_FIELD_NONE;
230*4882a593Smuzhiyun fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
231*4882a593Smuzhiyun if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
232*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
233*4882a593Smuzhiyun *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
234*4882a593Smuzhiyun #else
235*4882a593Smuzhiyun mutex_unlock(&ov7725->mutex);
236*4882a593Smuzhiyun return -ENOTTY;
237*4882a593Smuzhiyun #endif
238*4882a593Smuzhiyun } else {
239*4882a593Smuzhiyun ov7725->cur_mode = mode;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun mutex_unlock(&ov7725->mutex);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun return 0;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
ov7725_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)247*4882a593Smuzhiyun static int ov7725_get_fmt(struct v4l2_subdev *sd,
248*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
249*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun struct ov7725 *ov7725 = to_ov7725(sd);
252*4882a593Smuzhiyun const struct ov7725_mode *mode = ov7725->cur_mode;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun mutex_lock(&ov7725->mutex);
255*4882a593Smuzhiyun if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
256*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
257*4882a593Smuzhiyun fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
258*4882a593Smuzhiyun #else
259*4882a593Smuzhiyun mutex_unlock(&ov7725->mutex);
260*4882a593Smuzhiyun return -ENOTTY;
261*4882a593Smuzhiyun #endif
262*4882a593Smuzhiyun } else {
263*4882a593Smuzhiyun fmt->format.width = mode->width;
264*4882a593Smuzhiyun fmt->format.height = mode->height;
265*4882a593Smuzhiyun fmt->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
266*4882a593Smuzhiyun fmt->format.field = V4L2_FIELD_NONE;
267*4882a593Smuzhiyun fmt->format.colorspace = V4L2_COLORSPACE_JPEG;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun mutex_unlock(&ov7725->mutex);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun return 0;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
ov7725_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)274*4882a593Smuzhiyun static int ov7725_enum_mbus_code(struct v4l2_subdev *sd,
275*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
276*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun if (code->index >= ARRAY_SIZE(supported_modes))
279*4882a593Smuzhiyun return -EINVAL;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun code->code = MEDIA_BUS_FMT_UYVY8_2X8;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun return 0;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
ov7725_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)286*4882a593Smuzhiyun static int ov7725_enum_frame_sizes(struct v4l2_subdev *sd,
287*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
288*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun u32 index = fse->index;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun if (index >= ARRAY_SIZE(supported_modes))
293*4882a593Smuzhiyun return -EINVAL;
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun fse->code = MEDIA_BUS_FMT_UYVY8_2X8;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun fse->min_width = supported_modes[index].width;
298*4882a593Smuzhiyun fse->max_width = supported_modes[index].width;
299*4882a593Smuzhiyun fse->max_height = supported_modes[index].height;
300*4882a593Smuzhiyun fse->min_height = supported_modes[index].height;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun return 0;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
__ov7725_power_on(struct ov7725 * ov7725)305*4882a593Smuzhiyun static int __ov7725_power_on(struct ov7725 *ov7725)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun int ret;
308*4882a593Smuzhiyun struct device *dev = &ov7725->client->dev;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun if (!IS_ERR(ov7725->reset_gpio))
311*4882a593Smuzhiyun gpiod_set_value_cansleep(ov7725->reset_gpio, 0);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun ret = regulator_bulk_enable(ov7725_NUM_SUPPLIES, ov7725->supplies);
314*4882a593Smuzhiyun if (ret < 0) {
315*4882a593Smuzhiyun dev_err(dev, "Failed to enable regulators\n");
316*4882a593Smuzhiyun return ret;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun if (!IS_ERR(ov7725->xvclk)) {
320*4882a593Smuzhiyun ret = clk_prepare_enable(ov7725->xvclk);
321*4882a593Smuzhiyun if (ret < 0) {
322*4882a593Smuzhiyun dev_err(dev, "Failed to enable xvclk\n");
323*4882a593Smuzhiyun return ret;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun if (!IS_ERR(ov7725->pwdn_gpio))
328*4882a593Smuzhiyun gpiod_set_value_cansleep(ov7725->pwdn_gpio, 0);
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun if (!IS_ERR(ov7725->reset_gpio))
331*4882a593Smuzhiyun gpiod_set_value_cansleep(ov7725->reset_gpio, 1);
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun return 0;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
__ov7725_power_off(struct ov7725 * ov7725)336*4882a593Smuzhiyun static void __ov7725_power_off(struct ov7725 *ov7725)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun if (!IS_ERR(ov7725->reset_gpio))
339*4882a593Smuzhiyun gpiod_set_value_cansleep(ov7725->reset_gpio, 0);
340*4882a593Smuzhiyun if (!IS_ERR(ov7725->pwdn_gpio))
341*4882a593Smuzhiyun gpiod_set_value_cansleep(ov7725->pwdn_gpio, 1);
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun if (!IS_ERR(ov7725->xvclk))
344*4882a593Smuzhiyun clk_disable_unprepare(ov7725->xvclk);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun regulator_bulk_disable(ov7725_NUM_SUPPLIES, ov7725->supplies);
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
ov7725_s_stream(struct v4l2_subdev * sd,int on)349*4882a593Smuzhiyun static int ov7725_s_stream(struct v4l2_subdev *sd, int on)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct ov7725 *ov7725 = to_ov7725(sd);
352*4882a593Smuzhiyun struct i2c_client *client = ov7725->client;
353*4882a593Smuzhiyun int ret = 0;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun mutex_lock(&ov7725->mutex);
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun on = !!on;
358*4882a593Smuzhiyun if (on == ov7725->streaming)
359*4882a593Smuzhiyun goto unlock_and_return;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun if (on) {
362*4882a593Smuzhiyun ret = pm_runtime_get_sync(&ov7725->client->dev);
363*4882a593Smuzhiyun if (ret < 0) {
364*4882a593Smuzhiyun pm_runtime_put_noidle(&client->dev);
365*4882a593Smuzhiyun goto unlock_and_return;
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun ret = ov7725_write_array(ov7725->client,
369*4882a593Smuzhiyun ov7725->cur_mode->reg_list);
370*4882a593Smuzhiyun if (ret) {
371*4882a593Smuzhiyun pm_runtime_put(&client->dev);
372*4882a593Smuzhiyun goto unlock_and_return;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun } else {
376*4882a593Smuzhiyun pm_runtime_put(&client->dev);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun ov7725->streaming = on;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun unlock_and_return:
382*4882a593Smuzhiyun mutex_unlock(&ov7725->mutex);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun return ret;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ov7725_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)388*4882a593Smuzhiyun static int ov7725_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun struct ov7725 *ov7725 = to_ov7725(sd);
391*4882a593Smuzhiyun struct v4l2_mbus_framefmt *try_fmt =
392*4882a593Smuzhiyun v4l2_subdev_get_try_format(sd, fh->pad, 0);
393*4882a593Smuzhiyun const struct ov7725_mode *def_mode = &supported_modes[0];
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun mutex_lock(&ov7725->mutex);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun try_fmt->width = def_mode->width;
398*4882a593Smuzhiyun try_fmt->height = def_mode->height;
399*4882a593Smuzhiyun try_fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
400*4882a593Smuzhiyun try_fmt->field = V4L2_FIELD_NONE;
401*4882a593Smuzhiyun try_fmt->colorspace = V4L2_COLORSPACE_JPEG;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun mutex_unlock(&ov7725->mutex);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun return 0;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun #endif
408*4882a593Smuzhiyun
ov7725_runtime_resume(struct device * dev)409*4882a593Smuzhiyun static int ov7725_runtime_resume(struct device *dev)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
412*4882a593Smuzhiyun struct v4l2_subdev *sd = i2c_get_clientdata(client);
413*4882a593Smuzhiyun struct ov7725 *ov7725 = to_ov7725(sd);
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun return __ov7725_power_on(ov7725);
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
ov7725_runtime_suspend(struct device * dev)418*4882a593Smuzhiyun static int ov7725_runtime_suspend(struct device *dev)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
421*4882a593Smuzhiyun struct v4l2_subdev *sd = i2c_get_clientdata(client);
422*4882a593Smuzhiyun struct ov7725 *ov7725 = to_ov7725(sd);
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun __ov7725_power_off(ov7725);
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun return 0;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun static const struct dev_pm_ops ov7725_pm_ops = {
430*4882a593Smuzhiyun SET_RUNTIME_PM_OPS(ov7725_runtime_suspend,
431*4882a593Smuzhiyun ov7725_runtime_resume, NULL)
432*4882a593Smuzhiyun };
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops ov7725_video_ops = {
435*4882a593Smuzhiyun .s_stream = ov7725_s_stream,
436*4882a593Smuzhiyun };
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops ov7725_pad_ops = {
439*4882a593Smuzhiyun .enum_mbus_code = ov7725_enum_mbus_code,
440*4882a593Smuzhiyun .enum_frame_size = ov7725_enum_frame_sizes,
441*4882a593Smuzhiyun .get_fmt = ov7725_get_fmt,
442*4882a593Smuzhiyun .set_fmt = ov7725_set_fmt,
443*4882a593Smuzhiyun };
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun static const struct v4l2_subdev_ops ov7725_subdev_ops = {
446*4882a593Smuzhiyun .video = &ov7725_video_ops,
447*4882a593Smuzhiyun .pad = &ov7725_pad_ops,
448*4882a593Smuzhiyun };
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
451*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops ov7725_internal_ops = {
452*4882a593Smuzhiyun .open = ov7725_open,
453*4882a593Smuzhiyun };
454*4882a593Smuzhiyun #endif
455*4882a593Smuzhiyun
ov7725_check_sensor_id(struct ov7725 * ov7725,struct i2c_client * client)456*4882a593Smuzhiyun static int ov7725_check_sensor_id(struct ov7725 *ov7725,
457*4882a593Smuzhiyun struct i2c_client *client)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun struct device *dev = &ov7725->client->dev;
460*4882a593Smuzhiyun u8 id_h = 0, id_l = 0;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun id_h = ov7725_read_reg(client, REG_CHIP_ID_H);
463*4882a593Smuzhiyun id_l = ov7725_read_reg(client, REG_CHIP_ID_L);
464*4882a593Smuzhiyun if (id_h != CHIP_ID_H && id_l != CHIP_ID_L) {
465*4882a593Smuzhiyun dev_err(dev, "Wrong camera sensor id(0x%02x%02x)\n",
466*4882a593Smuzhiyun id_h, id_l);
467*4882a593Smuzhiyun return -EINVAL;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun dev_info(dev, "Detected ov7725 (0x%02x%02x) sensor\n",
471*4882a593Smuzhiyun CHIP_ID_H, CHIP_ID_L);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun return 0;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun
ov7725_configure_regulators(struct ov7725 * ov7725)476*4882a593Smuzhiyun static int ov7725_configure_regulators(struct ov7725 *ov7725)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun u32 i;
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun for (i = 0; i < ov7725_NUM_SUPPLIES; i++)
481*4882a593Smuzhiyun ov7725->supplies[i].supply = ov7725_supply_names[i];
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun return devm_regulator_bulk_get(&ov7725->client->dev,
484*4882a593Smuzhiyun ov7725_NUM_SUPPLIES,
485*4882a593Smuzhiyun ov7725->supplies);
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
ov7725_probe(struct i2c_client * client,const struct i2c_device_id * id)488*4882a593Smuzhiyun static int ov7725_probe(struct i2c_client *client,
489*4882a593Smuzhiyun const struct i2c_device_id *id)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun struct device *dev = &client->dev;
492*4882a593Smuzhiyun struct ov7725 *ov7725;
493*4882a593Smuzhiyun int ret;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun ov7725 = devm_kzalloc(dev, sizeof(*ov7725), GFP_KERNEL);
496*4882a593Smuzhiyun if (!ov7725)
497*4882a593Smuzhiyun return -ENOMEM;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun ov7725->client = client;
500*4882a593Smuzhiyun ov7725->cur_mode = &supported_modes[0];
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun ov7725->xvclk = devm_clk_get(dev, "xvclk");
503*4882a593Smuzhiyun if (IS_ERR(ov7725->xvclk)) {
504*4882a593Smuzhiyun dev_err(dev, "Failed to get xvclk\n");
505*4882a593Smuzhiyun return -EINVAL;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun ret = clk_set_rate(ov7725->xvclk, ov7725_XVCLK_FREQ);
508*4882a593Smuzhiyun if (ret < 0) {
509*4882a593Smuzhiyun dev_err(dev, "Failed to set xvclk rate (24MHz)\n");
510*4882a593Smuzhiyun return ret;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun if (clk_get_rate(ov7725->xvclk) != ov7725_XVCLK_FREQ)
513*4882a593Smuzhiyun dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun ov7725->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
516*4882a593Smuzhiyun if (IS_ERR(ov7725->reset_gpio))
517*4882a593Smuzhiyun dev_warn(dev, "Failed to get reset-gpios\n");
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun ov7725->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
520*4882a593Smuzhiyun if (IS_ERR(ov7725->pwdn_gpio))
521*4882a593Smuzhiyun dev_warn(dev, "Failed to get ov7725-gpios\n");
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun ret = ov7725_configure_regulators(ov7725);
524*4882a593Smuzhiyun if (ret) {
525*4882a593Smuzhiyun dev_warn(dev, "Failed to get power regulators\n");
526*4882a593Smuzhiyun return ret;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun mutex_init(&ov7725->mutex);
530*4882a593Smuzhiyun v4l2_i2c_subdev_init(&ov7725->subdev, client, &ov7725_subdev_ops);
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun ret = __ov7725_power_on(ov7725);
533*4882a593Smuzhiyun if (ret)
534*4882a593Smuzhiyun goto err_destroy_mutex;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun ret = ov7725_check_sensor_id(ov7725, client);
537*4882a593Smuzhiyun if (ret)
538*4882a593Smuzhiyun goto err_power_off;
539*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
540*4882a593Smuzhiyun ov7725->subdev.internal_ops = &ov7725_internal_ops;
541*4882a593Smuzhiyun ov7725->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
542*4882a593Smuzhiyun #endif
543*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
544*4882a593Smuzhiyun ov7725->pad.flags = MEDIA_PAD_FL_SOURCE;
545*4882a593Smuzhiyun ov7725->subdev.entity.type = MEDIA_ENT_T_V4L2_SUBDEV_SENSOR;
546*4882a593Smuzhiyun ret = media_entity_init(&ov7725->subdev.entity, 1, &ov7725->pad, 0);
547*4882a593Smuzhiyun if (ret < 0)
548*4882a593Smuzhiyun goto err_power_off;
549*4882a593Smuzhiyun #endif
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun ret = v4l2_async_register_subdev(&ov7725->subdev);
552*4882a593Smuzhiyun if (ret) {
553*4882a593Smuzhiyun dev_err(dev, "v4l2 async register subdev failed\n");
554*4882a593Smuzhiyun goto err_clean_entity;
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun pm_runtime_set_active(dev);
558*4882a593Smuzhiyun pm_runtime_enable(dev);
559*4882a593Smuzhiyun pm_runtime_idle(dev);
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun return 0;
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun err_clean_entity:
564*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
565*4882a593Smuzhiyun media_entity_cleanup(&ov7725->subdev.entity);
566*4882a593Smuzhiyun #endif
567*4882a593Smuzhiyun err_power_off:
568*4882a593Smuzhiyun __ov7725_power_off(ov7725);
569*4882a593Smuzhiyun err_destroy_mutex:
570*4882a593Smuzhiyun mutex_destroy(&ov7725->mutex);
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun return ret;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun
ov7725_remove(struct i2c_client * client)575*4882a593Smuzhiyun static int ov7725_remove(struct i2c_client *client)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun struct v4l2_subdev *sd = i2c_get_clientdata(client);
578*4882a593Smuzhiyun struct ov7725 *ov7725 = to_ov7725(sd);
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun v4l2_async_unregister_subdev(sd);
581*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
582*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
583*4882a593Smuzhiyun #endif
584*4882a593Smuzhiyun mutex_destroy(&ov7725->mutex);
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun pm_runtime_disable(&client->dev);
587*4882a593Smuzhiyun if (!pm_runtime_status_suspended(&client->dev))
588*4882a593Smuzhiyun __ov7725_power_off(ov7725);
589*4882a593Smuzhiyun pm_runtime_set_suspended(&client->dev);
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun return 0;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
595*4882a593Smuzhiyun static const struct of_device_id ov7725_of_match[] = {
596*4882a593Smuzhiyun { .compatible = "ovti,ov7725" },
597*4882a593Smuzhiyun {},
598*4882a593Smuzhiyun };
599*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ov7725_of_match);
600*4882a593Smuzhiyun #endif
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun static const struct i2c_device_id ov7725_match_id[] = {
603*4882a593Smuzhiyun {"ovti,ov7251", 0},
604*4882a593Smuzhiyun {},
605*4882a593Smuzhiyun };
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun static struct i2c_driver ov7725_i2c_driver = {
608*4882a593Smuzhiyun .driver = {
609*4882a593Smuzhiyun .name = "ov7725",
610*4882a593Smuzhiyun .pm = &ov7725_pm_ops,
611*4882a593Smuzhiyun .of_match_table = of_match_ptr(ov7725_of_match),
612*4882a593Smuzhiyun },
613*4882a593Smuzhiyun .probe = ov7725_probe,
614*4882a593Smuzhiyun .remove = ov7725_remove,
615*4882a593Smuzhiyun .id_table = ov7725_match_id,
616*4882a593Smuzhiyun };
617*4882a593Smuzhiyun
sensor_mod_init(void)618*4882a593Smuzhiyun static int __init sensor_mod_init(void)
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun return i2c_add_driver(&ov7725_i2c_driver);
621*4882a593Smuzhiyun }
622*4882a593Smuzhiyun
sensor_mod_exit(void)623*4882a593Smuzhiyun static void __exit sensor_mod_exit(void)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun i2c_del_driver(&ov7725_i2c_driver);
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun
628*4882a593Smuzhiyun device_initcall_sync(sensor_mod_init);
629*4882a593Smuzhiyun module_exit(sensor_mod_exit);
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun MODULE_DESCRIPTION("OmniVision ov7725 sensor driver");
632*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");