xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/ov5647.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * A V4L2 driver for OmniVision OV5647 cameras.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Based on Samsung S5K6AAFX SXGA 1/6" 1.3M CMOS Image Sensor driver
5*4882a593Smuzhiyun  * Copyright (C) 2011 Sylwester Nawrocki <s.nawrocki@samsung.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on Omnivision OV7670 Camera Driver
8*4882a593Smuzhiyun  * Copyright (C) 2006-7 Jonathan Corbet <corbet@lwn.net>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * Copyright (C) 2016, Synopsys, Inc.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
13*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License as
14*4882a593Smuzhiyun  * published by the Free Software Foundation version 2.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * This program is distributed .as is. WITHOUT ANY WARRANTY of any
17*4882a593Smuzhiyun  * kind, whether express or implied; without even the implied warranty
18*4882a593Smuzhiyun  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19*4882a593Smuzhiyun  * GNU General Public License for more details.
20*4882a593Smuzhiyun  */
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <linux/clk.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/i2c.h>
25*4882a593Smuzhiyun #include <linux/init.h>
26*4882a593Smuzhiyun #include <linux/io.h>
27*4882a593Smuzhiyun #include <linux/module.h>
28*4882a593Smuzhiyun #include <linux/of_graph.h>
29*4882a593Smuzhiyun #include <linux/slab.h>
30*4882a593Smuzhiyun #include <linux/videodev2.h>
31*4882a593Smuzhiyun #include <media/v4l2-device.h>
32*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
33*4882a593Smuzhiyun #include <media/v4l2-image-sizes.h>
34*4882a593Smuzhiyun #include <media/v4l2-mediabus.h>
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define SENSOR_NAME "ov5647"
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define MIPI_CTRL00_CLOCK_LANE_GATE		BIT(5)
39*4882a593Smuzhiyun #define MIPI_CTRL00_BUS_IDLE			BIT(2)
40*4882a593Smuzhiyun #define MIPI_CTRL00_CLOCK_LANE_DISABLE		BIT(0)
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #define OV5647_SW_STANDBY		0x0100
43*4882a593Smuzhiyun #define OV5647_SW_RESET			0x0103
44*4882a593Smuzhiyun #define OV5647_REG_CHIPID_H		0x300A
45*4882a593Smuzhiyun #define OV5647_REG_CHIPID_L		0x300B
46*4882a593Smuzhiyun #define OV5640_REG_PAD_OUT		0x300D
47*4882a593Smuzhiyun #define OV5647_REG_FRAME_OFF_NUMBER	0x4202
48*4882a593Smuzhiyun #define OV5647_REG_MIPI_CTRL00		0x4800
49*4882a593Smuzhiyun #define OV5647_REG_MIPI_CTRL14		0x4814
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define REG_TERM 0xfffe
52*4882a593Smuzhiyun #define VAL_TERM 0xfe
53*4882a593Smuzhiyun #define REG_DLY  0xffff
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun #define OV5647_ROW_START		0x01
56*4882a593Smuzhiyun #define OV5647_ROW_START_MIN		0
57*4882a593Smuzhiyun #define OV5647_ROW_START_MAX		2004
58*4882a593Smuzhiyun #define OV5647_ROW_START_DEF		54
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define OV5647_COLUMN_START		0x02
61*4882a593Smuzhiyun #define OV5647_COLUMN_START_MIN		0
62*4882a593Smuzhiyun #define OV5647_COLUMN_START_MAX		2750
63*4882a593Smuzhiyun #define OV5647_COLUMN_START_DEF		16
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define OV5647_WINDOW_HEIGHT		0x03
66*4882a593Smuzhiyun #define OV5647_WINDOW_HEIGHT_MIN	2
67*4882a593Smuzhiyun #define OV5647_WINDOW_HEIGHT_MAX	2006
68*4882a593Smuzhiyun #define OV5647_WINDOW_HEIGHT_DEF	1944
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #define OV5647_WINDOW_WIDTH		0x04
71*4882a593Smuzhiyun #define OV5647_WINDOW_WIDTH_MIN		2
72*4882a593Smuzhiyun #define OV5647_WINDOW_WIDTH_MAX		2752
73*4882a593Smuzhiyun #define OV5647_WINDOW_WIDTH_DEF		2592
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun struct regval_list {
76*4882a593Smuzhiyun 	u16 addr;
77*4882a593Smuzhiyun 	u8 data;
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun struct ov5647 {
81*4882a593Smuzhiyun 	struct v4l2_subdev		sd;
82*4882a593Smuzhiyun 	struct media_pad		pad;
83*4882a593Smuzhiyun 	struct mutex			lock;
84*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt	format;
85*4882a593Smuzhiyun 	unsigned int			width;
86*4882a593Smuzhiyun 	unsigned int			height;
87*4882a593Smuzhiyun 	int				power_count;
88*4882a593Smuzhiyun 	struct clk			*xclk;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun 
to_state(struct v4l2_subdev * sd)91*4882a593Smuzhiyun static inline struct ov5647 *to_state(struct v4l2_subdev *sd)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	return container_of(sd, struct ov5647, sd);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun static struct regval_list sensor_oe_disable_regs[] = {
97*4882a593Smuzhiyun 	{0x3000, 0x00},
98*4882a593Smuzhiyun 	{0x3001, 0x00},
99*4882a593Smuzhiyun 	{0x3002, 0x00},
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun static struct regval_list sensor_oe_enable_regs[] = {
103*4882a593Smuzhiyun 	{0x3000, 0x0f},
104*4882a593Smuzhiyun 	{0x3001, 0xff},
105*4882a593Smuzhiyun 	{0x3002, 0xe4},
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun static struct regval_list ov5647_640x480[] = {
109*4882a593Smuzhiyun 	{0x0100, 0x00},
110*4882a593Smuzhiyun 	{0x0103, 0x01},
111*4882a593Smuzhiyun 	{0x3034, 0x08},
112*4882a593Smuzhiyun 	{0x3035, 0x21},
113*4882a593Smuzhiyun 	{0x3036, 0x46},
114*4882a593Smuzhiyun 	{0x303c, 0x11},
115*4882a593Smuzhiyun 	{0x3106, 0xf5},
116*4882a593Smuzhiyun 	{0x3821, 0x07},
117*4882a593Smuzhiyun 	{0x3820, 0x41},
118*4882a593Smuzhiyun 	{0x3827, 0xec},
119*4882a593Smuzhiyun 	{0x370c, 0x0f},
120*4882a593Smuzhiyun 	{0x3612, 0x59},
121*4882a593Smuzhiyun 	{0x3618, 0x00},
122*4882a593Smuzhiyun 	{0x5000, 0x06},
123*4882a593Smuzhiyun 	{0x5001, 0x01},
124*4882a593Smuzhiyun 	{0x5002, 0x41},
125*4882a593Smuzhiyun 	{0x5003, 0x08},
126*4882a593Smuzhiyun 	{0x5a00, 0x08},
127*4882a593Smuzhiyun 	{0x3000, 0x00},
128*4882a593Smuzhiyun 	{0x3001, 0x00},
129*4882a593Smuzhiyun 	{0x3002, 0x00},
130*4882a593Smuzhiyun 	{0x3016, 0x08},
131*4882a593Smuzhiyun 	{0x3017, 0xe0},
132*4882a593Smuzhiyun 	{0x3018, 0x44},
133*4882a593Smuzhiyun 	{0x301c, 0xf8},
134*4882a593Smuzhiyun 	{0x301d, 0xf0},
135*4882a593Smuzhiyun 	{0x3a18, 0x00},
136*4882a593Smuzhiyun 	{0x3a19, 0xf8},
137*4882a593Smuzhiyun 	{0x3c01, 0x80},
138*4882a593Smuzhiyun 	{0x3b07, 0x0c},
139*4882a593Smuzhiyun 	{0x380c, 0x07},
140*4882a593Smuzhiyun 	{0x380d, 0x68},
141*4882a593Smuzhiyun 	{0x380e, 0x03},
142*4882a593Smuzhiyun 	{0x380f, 0xd8},
143*4882a593Smuzhiyun 	{0x3814, 0x31},
144*4882a593Smuzhiyun 	{0x3815, 0x31},
145*4882a593Smuzhiyun 	{0x3708, 0x64},
146*4882a593Smuzhiyun 	{0x3709, 0x52},
147*4882a593Smuzhiyun 	{0x3808, 0x02},
148*4882a593Smuzhiyun 	{0x3809, 0x80},
149*4882a593Smuzhiyun 	{0x380a, 0x01},
150*4882a593Smuzhiyun 	{0x380b, 0xE0},
151*4882a593Smuzhiyun 	{0x3801, 0x00},
152*4882a593Smuzhiyun 	{0x3802, 0x00},
153*4882a593Smuzhiyun 	{0x3803, 0x00},
154*4882a593Smuzhiyun 	{0x3804, 0x0a},
155*4882a593Smuzhiyun 	{0x3805, 0x3f},
156*4882a593Smuzhiyun 	{0x3806, 0x07},
157*4882a593Smuzhiyun 	{0x3807, 0xa1},
158*4882a593Smuzhiyun 	{0x3811, 0x08},
159*4882a593Smuzhiyun 	{0x3813, 0x02},
160*4882a593Smuzhiyun 	{0x3630, 0x2e},
161*4882a593Smuzhiyun 	{0x3632, 0xe2},
162*4882a593Smuzhiyun 	{0x3633, 0x23},
163*4882a593Smuzhiyun 	{0x3634, 0x44},
164*4882a593Smuzhiyun 	{0x3636, 0x06},
165*4882a593Smuzhiyun 	{0x3620, 0x64},
166*4882a593Smuzhiyun 	{0x3621, 0xe0},
167*4882a593Smuzhiyun 	{0x3600, 0x37},
168*4882a593Smuzhiyun 	{0x3704, 0xa0},
169*4882a593Smuzhiyun 	{0x3703, 0x5a},
170*4882a593Smuzhiyun 	{0x3715, 0x78},
171*4882a593Smuzhiyun 	{0x3717, 0x01},
172*4882a593Smuzhiyun 	{0x3731, 0x02},
173*4882a593Smuzhiyun 	{0x370b, 0x60},
174*4882a593Smuzhiyun 	{0x3705, 0x1a},
175*4882a593Smuzhiyun 	{0x3f05, 0x02},
176*4882a593Smuzhiyun 	{0x3f06, 0x10},
177*4882a593Smuzhiyun 	{0x3f01, 0x0a},
178*4882a593Smuzhiyun 	{0x3a08, 0x01},
179*4882a593Smuzhiyun 	{0x3a09, 0x27},
180*4882a593Smuzhiyun 	{0x3a0a, 0x00},
181*4882a593Smuzhiyun 	{0x3a0b, 0xf6},
182*4882a593Smuzhiyun 	{0x3a0d, 0x04},
183*4882a593Smuzhiyun 	{0x3a0e, 0x03},
184*4882a593Smuzhiyun 	{0x3a0f, 0x58},
185*4882a593Smuzhiyun 	{0x3a10, 0x50},
186*4882a593Smuzhiyun 	{0x3a1b, 0x58},
187*4882a593Smuzhiyun 	{0x3a1e, 0x50},
188*4882a593Smuzhiyun 	{0x3a11, 0x60},
189*4882a593Smuzhiyun 	{0x3a1f, 0x28},
190*4882a593Smuzhiyun 	{0x4001, 0x02},
191*4882a593Smuzhiyun 	{0x4004, 0x02},
192*4882a593Smuzhiyun 	{0x4000, 0x09},
193*4882a593Smuzhiyun 	{0x4837, 0x24},
194*4882a593Smuzhiyun 	{0x4050, 0x6e},
195*4882a593Smuzhiyun 	{0x4051, 0x8f},
196*4882a593Smuzhiyun 	{0x0100, 0x01},
197*4882a593Smuzhiyun };
198*4882a593Smuzhiyun 
ov5647_write(struct v4l2_subdev * sd,u16 reg,u8 val)199*4882a593Smuzhiyun static int ov5647_write(struct v4l2_subdev *sd, u16 reg, u8 val)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	int ret;
202*4882a593Smuzhiyun 	unsigned char data[3] = { reg >> 8, reg & 0xff, val};
203*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	ret = i2c_master_send(client, data, 3);
206*4882a593Smuzhiyun 	if (ret < 0)
207*4882a593Smuzhiyun 		dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
208*4882a593Smuzhiyun 				__func__, reg);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	return ret;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
ov5647_read(struct v4l2_subdev * sd,u16 reg,u8 * val)213*4882a593Smuzhiyun static int ov5647_read(struct v4l2_subdev *sd, u16 reg, u8 *val)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	int ret;
216*4882a593Smuzhiyun 	unsigned char data_w[2] = { reg >> 8, reg & 0xff };
217*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	ret = i2c_master_send(client, data_w, 2);
220*4882a593Smuzhiyun 	if (ret < 0) {
221*4882a593Smuzhiyun 		dev_dbg(&client->dev, "%s: i2c write error, reg: %x\n",
222*4882a593Smuzhiyun 			__func__, reg);
223*4882a593Smuzhiyun 		return ret;
224*4882a593Smuzhiyun 	}
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	ret = i2c_master_recv(client, val, 1);
227*4882a593Smuzhiyun 	if (ret < 0)
228*4882a593Smuzhiyun 		dev_dbg(&client->dev, "%s: i2c read error, reg: %x\n",
229*4882a593Smuzhiyun 				__func__, reg);
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	return ret;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
ov5647_write_array(struct v4l2_subdev * sd,struct regval_list * regs,int array_size)234*4882a593Smuzhiyun static int ov5647_write_array(struct v4l2_subdev *sd,
235*4882a593Smuzhiyun 				struct regval_list *regs, int array_size)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	int i, ret;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	for (i = 0; i < array_size; i++) {
240*4882a593Smuzhiyun 		ret = ov5647_write(sd, regs[i].addr, regs[i].data);
241*4882a593Smuzhiyun 		if (ret < 0)
242*4882a593Smuzhiyun 			return ret;
243*4882a593Smuzhiyun 	}
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	return 0;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
ov5647_set_virtual_channel(struct v4l2_subdev * sd,int channel)248*4882a593Smuzhiyun static int ov5647_set_virtual_channel(struct v4l2_subdev *sd, int channel)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	u8 channel_id;
251*4882a593Smuzhiyun 	int ret;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	ret = ov5647_read(sd, OV5647_REG_MIPI_CTRL14, &channel_id);
254*4882a593Smuzhiyun 	if (ret < 0)
255*4882a593Smuzhiyun 		return ret;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	channel_id &= ~(3 << 6);
258*4882a593Smuzhiyun 	return ov5647_write(sd, OV5647_REG_MIPI_CTRL14, channel_id | (channel << 6));
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun 
ov5647_stream_on(struct v4l2_subdev * sd)261*4882a593Smuzhiyun static int ov5647_stream_on(struct v4l2_subdev *sd)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun 	int ret;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_BUS_IDLE);
266*4882a593Smuzhiyun 	if (ret < 0)
267*4882a593Smuzhiyun 		return ret;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	ret = ov5647_write(sd, OV5647_REG_FRAME_OFF_NUMBER, 0x00);
270*4882a593Smuzhiyun 	if (ret < 0)
271*4882a593Smuzhiyun 		return ret;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	return ov5647_write(sd, OV5640_REG_PAD_OUT, 0x00);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun 
ov5647_stream_off(struct v4l2_subdev * sd)276*4882a593Smuzhiyun static int ov5647_stream_off(struct v4l2_subdev *sd)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	int ret;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	ret = ov5647_write(sd, OV5647_REG_MIPI_CTRL00, MIPI_CTRL00_CLOCK_LANE_GATE
281*4882a593Smuzhiyun 			   | MIPI_CTRL00_BUS_IDLE | MIPI_CTRL00_CLOCK_LANE_DISABLE);
282*4882a593Smuzhiyun 	if (ret < 0)
283*4882a593Smuzhiyun 		return ret;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	ret = ov5647_write(sd, OV5647_REG_FRAME_OFF_NUMBER, 0x0f);
286*4882a593Smuzhiyun 	if (ret < 0)
287*4882a593Smuzhiyun 		return ret;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	return ov5647_write(sd, OV5640_REG_PAD_OUT, 0x01);
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
set_sw_standby(struct v4l2_subdev * sd,bool standby)292*4882a593Smuzhiyun static int set_sw_standby(struct v4l2_subdev *sd, bool standby)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	int ret;
295*4882a593Smuzhiyun 	u8 rdval;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	ret = ov5647_read(sd, OV5647_SW_STANDBY, &rdval);
298*4882a593Smuzhiyun 	if (ret < 0)
299*4882a593Smuzhiyun 		return ret;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	if (standby)
302*4882a593Smuzhiyun 		rdval &= ~0x01;
303*4882a593Smuzhiyun 	else
304*4882a593Smuzhiyun 		rdval |= 0x01;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	return ov5647_write(sd, OV5647_SW_STANDBY, rdval);
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun 
__sensor_init(struct v4l2_subdev * sd)309*4882a593Smuzhiyun static int __sensor_init(struct v4l2_subdev *sd)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun 	int ret;
312*4882a593Smuzhiyun 	u8 resetval, rdval;
313*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	ret = ov5647_read(sd, OV5647_SW_STANDBY, &rdval);
316*4882a593Smuzhiyun 	if (ret < 0)
317*4882a593Smuzhiyun 		return ret;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	ret = ov5647_write_array(sd, ov5647_640x480,
320*4882a593Smuzhiyun 					ARRAY_SIZE(ov5647_640x480));
321*4882a593Smuzhiyun 	if (ret < 0) {
322*4882a593Smuzhiyun 		dev_err(&client->dev, "write sensor default regs error\n");
323*4882a593Smuzhiyun 		return ret;
324*4882a593Smuzhiyun 	}
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	ret = ov5647_set_virtual_channel(sd, 0);
327*4882a593Smuzhiyun 	if (ret < 0)
328*4882a593Smuzhiyun 		return ret;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	ret = ov5647_read(sd, OV5647_SW_STANDBY, &resetval);
331*4882a593Smuzhiyun 	if (ret < 0)
332*4882a593Smuzhiyun 		return ret;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	if (!(resetval & 0x01)) {
335*4882a593Smuzhiyun 		dev_err(&client->dev, "Device was in SW standby");
336*4882a593Smuzhiyun 		ret = ov5647_write(sd, OV5647_SW_STANDBY, 0x01);
337*4882a593Smuzhiyun 		if (ret < 0)
338*4882a593Smuzhiyun 			return ret;
339*4882a593Smuzhiyun 	}
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	/*
342*4882a593Smuzhiyun 	 * stream off to make the clock lane into LP-11 state.
343*4882a593Smuzhiyun 	 */
344*4882a593Smuzhiyun 	return ov5647_stream_off(sd);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun 
ov5647_sensor_power(struct v4l2_subdev * sd,int on)347*4882a593Smuzhiyun static int ov5647_sensor_power(struct v4l2_subdev *sd, int on)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun 	int ret = 0;
350*4882a593Smuzhiyun 	struct ov5647 *ov5647 = to_state(sd);
351*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	mutex_lock(&ov5647->lock);
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	if (on && !ov5647->power_count)	{
356*4882a593Smuzhiyun 		dev_dbg(&client->dev, "OV5647 power on\n");
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 		ret = clk_prepare_enable(ov5647->xclk);
359*4882a593Smuzhiyun 		if (ret < 0) {
360*4882a593Smuzhiyun 			dev_err(&client->dev, "clk prepare enable failed\n");
361*4882a593Smuzhiyun 			goto out;
362*4882a593Smuzhiyun 		}
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 		ret = ov5647_write_array(sd, sensor_oe_enable_regs,
365*4882a593Smuzhiyun 				ARRAY_SIZE(sensor_oe_enable_regs));
366*4882a593Smuzhiyun 		if (ret < 0) {
367*4882a593Smuzhiyun 			clk_disable_unprepare(ov5647->xclk);
368*4882a593Smuzhiyun 			dev_err(&client->dev,
369*4882a593Smuzhiyun 				"write sensor_oe_enable_regs error\n");
370*4882a593Smuzhiyun 			goto out;
371*4882a593Smuzhiyun 		}
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 		ret = __sensor_init(sd);
374*4882a593Smuzhiyun 		if (ret < 0) {
375*4882a593Smuzhiyun 			clk_disable_unprepare(ov5647->xclk);
376*4882a593Smuzhiyun 			dev_err(&client->dev,
377*4882a593Smuzhiyun 				"Camera not available, check Power\n");
378*4882a593Smuzhiyun 			goto out;
379*4882a593Smuzhiyun 		}
380*4882a593Smuzhiyun 	} else if (!on && ov5647->power_count == 1) {
381*4882a593Smuzhiyun 		dev_dbg(&client->dev, "OV5647 power off\n");
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 		ret = ov5647_write_array(sd, sensor_oe_disable_regs,
384*4882a593Smuzhiyun 				ARRAY_SIZE(sensor_oe_disable_regs));
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 		if (ret < 0)
387*4882a593Smuzhiyun 			dev_dbg(&client->dev, "disable oe failed\n");
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 		ret = set_sw_standby(sd, true);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 		if (ret < 0)
392*4882a593Smuzhiyun 			dev_dbg(&client->dev, "soft stby failed\n");
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 		clk_disable_unprepare(ov5647->xclk);
395*4882a593Smuzhiyun 	}
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	/* Update the power count. */
398*4882a593Smuzhiyun 	ov5647->power_count += on ? 1 : -1;
399*4882a593Smuzhiyun 	WARN_ON(ov5647->power_count < 0);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun out:
402*4882a593Smuzhiyun 	mutex_unlock(&ov5647->lock);
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	return ret;
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_ADV_DEBUG
ov5647_sensor_get_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)408*4882a593Smuzhiyun static int ov5647_sensor_get_register(struct v4l2_subdev *sd,
409*4882a593Smuzhiyun 				struct v4l2_dbg_register *reg)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun 	u8 val;
412*4882a593Smuzhiyun 	int ret;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	ret = ov5647_read(sd, reg->reg & 0xff, &val);
415*4882a593Smuzhiyun 	if (ret < 0)
416*4882a593Smuzhiyun 		return ret;
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 	reg->val = val;
419*4882a593Smuzhiyun 	reg->size = 1;
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	return 0;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
ov5647_sensor_set_register(struct v4l2_subdev * sd,const struct v4l2_dbg_register * reg)424*4882a593Smuzhiyun static int ov5647_sensor_set_register(struct v4l2_subdev *sd,
425*4882a593Smuzhiyun 				const struct v4l2_dbg_register *reg)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun 	return ov5647_write(sd, reg->reg & 0xff, reg->val & 0xff);
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun #endif
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun /*
432*4882a593Smuzhiyun  * Subdev core operations registration
433*4882a593Smuzhiyun  */
434*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops ov5647_subdev_core_ops = {
435*4882a593Smuzhiyun 	.s_power		= ov5647_sensor_power,
436*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_ADV_DEBUG
437*4882a593Smuzhiyun 	.g_register		= ov5647_sensor_get_register,
438*4882a593Smuzhiyun 	.s_register		= ov5647_sensor_set_register,
439*4882a593Smuzhiyun #endif
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun 
ov5647_s_stream(struct v4l2_subdev * sd,int enable)442*4882a593Smuzhiyun static int ov5647_s_stream(struct v4l2_subdev *sd, int enable)
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun 	if (enable)
445*4882a593Smuzhiyun 		return ov5647_stream_on(sd);
446*4882a593Smuzhiyun 	else
447*4882a593Smuzhiyun 		return ov5647_stream_off(sd);
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops ov5647_subdev_video_ops = {
451*4882a593Smuzhiyun 	.s_stream =		ov5647_s_stream,
452*4882a593Smuzhiyun };
453*4882a593Smuzhiyun 
ov5647_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)454*4882a593Smuzhiyun static int ov5647_enum_mbus_code(struct v4l2_subdev *sd,
455*4882a593Smuzhiyun 				struct v4l2_subdev_pad_config *cfg,
456*4882a593Smuzhiyun 				struct v4l2_subdev_mbus_code_enum *code)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun 	if (code->index > 0)
459*4882a593Smuzhiyun 		return -EINVAL;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	code->code = MEDIA_BUS_FMT_SBGGR8_1X8;
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 	return 0;
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops ov5647_subdev_pad_ops = {
467*4882a593Smuzhiyun 	.enum_mbus_code = ov5647_enum_mbus_code,
468*4882a593Smuzhiyun };
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun static const struct v4l2_subdev_ops ov5647_subdev_ops = {
471*4882a593Smuzhiyun 	.core		= &ov5647_subdev_core_ops,
472*4882a593Smuzhiyun 	.video		= &ov5647_subdev_video_ops,
473*4882a593Smuzhiyun 	.pad		= &ov5647_subdev_pad_ops,
474*4882a593Smuzhiyun };
475*4882a593Smuzhiyun 
ov5647_detect(struct v4l2_subdev * sd)476*4882a593Smuzhiyun static int ov5647_detect(struct v4l2_subdev *sd)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun 	u8 read;
479*4882a593Smuzhiyun 	int ret;
480*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	ret = ov5647_write(sd, OV5647_SW_RESET, 0x01);
483*4882a593Smuzhiyun 	if (ret < 0)
484*4882a593Smuzhiyun 		return ret;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	ret = ov5647_read(sd, OV5647_REG_CHIPID_H, &read);
487*4882a593Smuzhiyun 	if (ret < 0)
488*4882a593Smuzhiyun 		return ret;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	if (read != 0x56) {
491*4882a593Smuzhiyun 		dev_err(&client->dev, "ID High expected 0x56 got %x", read);
492*4882a593Smuzhiyun 		return -ENODEV;
493*4882a593Smuzhiyun 	}
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 	ret = ov5647_read(sd, OV5647_REG_CHIPID_L, &read);
496*4882a593Smuzhiyun 	if (ret < 0)
497*4882a593Smuzhiyun 		return ret;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	if (read != 0x47) {
500*4882a593Smuzhiyun 		dev_err(&client->dev, "ID Low expected 0x47 got %x", read);
501*4882a593Smuzhiyun 		return -ENODEV;
502*4882a593Smuzhiyun 	}
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	return ov5647_write(sd, OV5647_SW_RESET, 0x00);
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun 
ov5647_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)507*4882a593Smuzhiyun static int ov5647_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *format =
510*4882a593Smuzhiyun 				v4l2_subdev_get_try_format(sd, fh->pad, 0);
511*4882a593Smuzhiyun 	struct v4l2_rect *crop =
512*4882a593Smuzhiyun 				v4l2_subdev_get_try_crop(sd, fh->pad, 0);
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	crop->left = OV5647_COLUMN_START_DEF;
515*4882a593Smuzhiyun 	crop->top = OV5647_ROW_START_DEF;
516*4882a593Smuzhiyun 	crop->width = OV5647_WINDOW_WIDTH_DEF;
517*4882a593Smuzhiyun 	crop->height = OV5647_WINDOW_HEIGHT_DEF;
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	format->code = MEDIA_BUS_FMT_SBGGR8_1X8;
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	format->width = OV5647_WINDOW_WIDTH_DEF;
522*4882a593Smuzhiyun 	format->height = OV5647_WINDOW_HEIGHT_DEF;
523*4882a593Smuzhiyun 	format->field = V4L2_FIELD_NONE;
524*4882a593Smuzhiyun 	format->colorspace = V4L2_COLORSPACE_SRGB;
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	return 0;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops ov5647_subdev_internal_ops = {
530*4882a593Smuzhiyun 	.open = ov5647_open,
531*4882a593Smuzhiyun };
532*4882a593Smuzhiyun 
ov5647_parse_dt(struct device_node * np)533*4882a593Smuzhiyun static int ov5647_parse_dt(struct device_node *np)
534*4882a593Smuzhiyun {
535*4882a593Smuzhiyun 	struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
536*4882a593Smuzhiyun 	struct device_node *ep;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	int ret;
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	ep = of_graph_get_next_endpoint(np, NULL);
541*4882a593Smuzhiyun 	if (!ep)
542*4882a593Smuzhiyun 		return -EINVAL;
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg);
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	of_node_put(ep);
547*4882a593Smuzhiyun 	return ret;
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun 
ov5647_probe(struct i2c_client * client)550*4882a593Smuzhiyun static int ov5647_probe(struct i2c_client *client)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	struct device *dev = &client->dev;
553*4882a593Smuzhiyun 	struct ov5647 *sensor;
554*4882a593Smuzhiyun 	int ret;
555*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
556*4882a593Smuzhiyun 	struct device_node *np = client->dev.of_node;
557*4882a593Smuzhiyun 	u32 xclk_freq;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
560*4882a593Smuzhiyun 	if (!sensor)
561*4882a593Smuzhiyun 		return -ENOMEM;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	if (IS_ENABLED(CONFIG_OF) && np) {
564*4882a593Smuzhiyun 		ret = ov5647_parse_dt(np);
565*4882a593Smuzhiyun 		if (ret) {
566*4882a593Smuzhiyun 			dev_err(dev, "DT parsing error: %d\n", ret);
567*4882a593Smuzhiyun 			return ret;
568*4882a593Smuzhiyun 		}
569*4882a593Smuzhiyun 	}
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	/* get system clock (xclk) */
572*4882a593Smuzhiyun 	sensor->xclk = devm_clk_get(dev, NULL);
573*4882a593Smuzhiyun 	if (IS_ERR(sensor->xclk)) {
574*4882a593Smuzhiyun 		dev_err(dev, "could not get xclk");
575*4882a593Smuzhiyun 		return PTR_ERR(sensor->xclk);
576*4882a593Smuzhiyun 	}
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	xclk_freq = clk_get_rate(sensor->xclk);
579*4882a593Smuzhiyun 	if (xclk_freq != 25000000) {
580*4882a593Smuzhiyun 		dev_err(dev, "Unsupported clock frequency: %u\n", xclk_freq);
581*4882a593Smuzhiyun 		return -EINVAL;
582*4882a593Smuzhiyun 	}
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	mutex_init(&sensor->lock);
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	sd = &sensor->sd;
587*4882a593Smuzhiyun 	v4l2_i2c_subdev_init(sd, client, &ov5647_subdev_ops);
588*4882a593Smuzhiyun 	sensor->sd.internal_ops = &ov5647_subdev_internal_ops;
589*4882a593Smuzhiyun 	sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
592*4882a593Smuzhiyun 	sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
593*4882a593Smuzhiyun 	ret = media_entity_pads_init(&sd->entity, 1, &sensor->pad);
594*4882a593Smuzhiyun 	if (ret < 0)
595*4882a593Smuzhiyun 		goto mutex_remove;
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun 	ret = ov5647_detect(sd);
598*4882a593Smuzhiyun 	if (ret < 0)
599*4882a593Smuzhiyun 		goto error;
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	ret = v4l2_async_register_subdev(sd);
602*4882a593Smuzhiyun 	if (ret < 0)
603*4882a593Smuzhiyun 		goto error;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	dev_dbg(dev, "OmniVision OV5647 camera driver probed\n");
606*4882a593Smuzhiyun 	return 0;
607*4882a593Smuzhiyun error:
608*4882a593Smuzhiyun 	media_entity_cleanup(&sd->entity);
609*4882a593Smuzhiyun mutex_remove:
610*4882a593Smuzhiyun 	mutex_destroy(&sensor->lock);
611*4882a593Smuzhiyun 	return ret;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun 
ov5647_remove(struct i2c_client * client)614*4882a593Smuzhiyun static int ov5647_remove(struct i2c_client *client)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
617*4882a593Smuzhiyun 	struct ov5647 *ov5647 = to_state(sd);
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	v4l2_async_unregister_subdev(&ov5647->sd);
620*4882a593Smuzhiyun 	media_entity_cleanup(&ov5647->sd.entity);
621*4882a593Smuzhiyun 	v4l2_device_unregister_subdev(sd);
622*4882a593Smuzhiyun 	mutex_destroy(&ov5647->lock);
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	return 0;
625*4882a593Smuzhiyun }
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun static const struct i2c_device_id ov5647_id[] = {
628*4882a593Smuzhiyun 	{ "ov5647", 0 },
629*4882a593Smuzhiyun 	{ }
630*4882a593Smuzhiyun };
631*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, ov5647_id);
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
634*4882a593Smuzhiyun static const struct of_device_id ov5647_of_match[] = {
635*4882a593Smuzhiyun 	{ .compatible = "ovti,ov5647" },
636*4882a593Smuzhiyun 	{ /* sentinel */ },
637*4882a593Smuzhiyun };
638*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ov5647_of_match);
639*4882a593Smuzhiyun #endif
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun static struct i2c_driver ov5647_driver = {
642*4882a593Smuzhiyun 	.driver = {
643*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(ov5647_of_match),
644*4882a593Smuzhiyun 		.name	= SENSOR_NAME,
645*4882a593Smuzhiyun 	},
646*4882a593Smuzhiyun 	.probe_new	= ov5647_probe,
647*4882a593Smuzhiyun 	.remove		= ov5647_remove,
648*4882a593Smuzhiyun 	.id_table	= ov5647_id,
649*4882a593Smuzhiyun };
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun module_i2c_driver(ov5647_driver);
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun MODULE_AUTHOR("Ramiro Oliveira <roliveir@synopsys.com>");
654*4882a593Smuzhiyun MODULE_DESCRIPTION("A low-level driver for OmniVision ov5647 sensors");
655*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
656