xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/ov2680.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Omnivision OV2680 CMOS Image Sensor driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2018 Linaro Ltd
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on OV5640 Sensor Driver
8*4882a593Smuzhiyun  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
9*4882a593Smuzhiyun  * Copyright (C) 2014-2017 Mentor Graphics Inc.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <asm/unaligned.h>
14*4882a593Smuzhiyun #include <linux/clk.h>
15*4882a593Smuzhiyun #include <linux/delay.h>
16*4882a593Smuzhiyun #include <linux/err.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun #include <linux/init.h>
19*4882a593Smuzhiyun #include <linux/module.h>
20*4882a593Smuzhiyun #include <linux/of_device.h>
21*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
22*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include <media/v4l2-common.h>
25*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
26*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define OV2680_XVCLK_VALUE	24000000
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define OV2680_CHIP_ID		0x2680
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define OV2680_REG_STREAM_CTRL		0x0100
33*4882a593Smuzhiyun #define OV2680_REG_SOFT_RESET		0x0103
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define OV2680_REG_CHIP_ID_HIGH		0x300a
36*4882a593Smuzhiyun #define OV2680_REG_CHIP_ID_LOW		0x300b
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define OV2680_REG_R_MANUAL		0x3503
39*4882a593Smuzhiyun #define OV2680_REG_GAIN_PK		0x350a
40*4882a593Smuzhiyun #define OV2680_REG_EXPOSURE_PK_HIGH	0x3500
41*4882a593Smuzhiyun #define OV2680_REG_TIMING_HTS		0x380c
42*4882a593Smuzhiyun #define OV2680_REG_TIMING_VTS		0x380e
43*4882a593Smuzhiyun #define OV2680_REG_FORMAT1		0x3820
44*4882a593Smuzhiyun #define OV2680_REG_FORMAT2		0x3821
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun #define OV2680_REG_ISP_CTRL00		0x5080
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define OV2680_FRAME_RATE		30
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun #define OV2680_REG_VALUE_8BIT		1
51*4882a593Smuzhiyun #define OV2680_REG_VALUE_16BIT		2
52*4882a593Smuzhiyun #define OV2680_REG_VALUE_24BIT		3
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define OV2680_WIDTH_MAX		1600
55*4882a593Smuzhiyun #define OV2680_HEIGHT_MAX		1200
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun enum ov2680_mode_id {
58*4882a593Smuzhiyun 	OV2680_MODE_QUXGA_800_600,
59*4882a593Smuzhiyun 	OV2680_MODE_720P_1280_720,
60*4882a593Smuzhiyun 	OV2680_MODE_UXGA_1600_1200,
61*4882a593Smuzhiyun 	OV2680_MODE_MAX,
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun struct reg_value {
65*4882a593Smuzhiyun 	u16 reg_addr;
66*4882a593Smuzhiyun 	u8 val;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun static const char * const ov2680_supply_name[] = {
70*4882a593Smuzhiyun 	"DOVDD",
71*4882a593Smuzhiyun 	"DVDD",
72*4882a593Smuzhiyun 	"AVDD",
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun #define OV2680_NUM_SUPPLIES ARRAY_SIZE(ov2680_supply_name)
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun struct ov2680_mode_info {
78*4882a593Smuzhiyun 	const char *name;
79*4882a593Smuzhiyun 	enum ov2680_mode_id id;
80*4882a593Smuzhiyun 	u32 width;
81*4882a593Smuzhiyun 	u32 height;
82*4882a593Smuzhiyun 	const struct reg_value *reg_data;
83*4882a593Smuzhiyun 	u32 reg_data_size;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun struct ov2680_ctrls {
87*4882a593Smuzhiyun 	struct v4l2_ctrl_handler handler;
88*4882a593Smuzhiyun 	struct {
89*4882a593Smuzhiyun 		struct v4l2_ctrl *auto_exp;
90*4882a593Smuzhiyun 		struct v4l2_ctrl *exposure;
91*4882a593Smuzhiyun 	};
92*4882a593Smuzhiyun 	struct {
93*4882a593Smuzhiyun 		struct v4l2_ctrl *auto_gain;
94*4882a593Smuzhiyun 		struct v4l2_ctrl *gain;
95*4882a593Smuzhiyun 	};
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	struct v4l2_ctrl *hflip;
98*4882a593Smuzhiyun 	struct v4l2_ctrl *vflip;
99*4882a593Smuzhiyun 	struct v4l2_ctrl *test_pattern;
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun struct ov2680_dev {
103*4882a593Smuzhiyun 	struct i2c_client		*i2c_client;
104*4882a593Smuzhiyun 	struct v4l2_subdev		sd;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	struct media_pad		pad;
107*4882a593Smuzhiyun 	struct clk			*xvclk;
108*4882a593Smuzhiyun 	u32				xvclk_freq;
109*4882a593Smuzhiyun 	struct regulator_bulk_data	supplies[OV2680_NUM_SUPPLIES];
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	struct gpio_desc		*reset_gpio;
112*4882a593Smuzhiyun 	struct mutex			lock; /* protect members */
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	bool				mode_pending_changes;
115*4882a593Smuzhiyun 	bool				is_enabled;
116*4882a593Smuzhiyun 	bool				is_streaming;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	struct ov2680_ctrls		ctrls;
119*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt	fmt;
120*4882a593Smuzhiyun 	struct v4l2_fract		frame_interval;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	const struct ov2680_mode_info	*current_mode;
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun static const char * const test_pattern_menu[] = {
126*4882a593Smuzhiyun 	"Disabled",
127*4882a593Smuzhiyun 	"Color Bars",
128*4882a593Smuzhiyun 	"Random Data",
129*4882a593Smuzhiyun 	"Square",
130*4882a593Smuzhiyun 	"Black Image",
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun static const int ov2680_hv_flip_bayer_order[] = {
134*4882a593Smuzhiyun 	MEDIA_BUS_FMT_SBGGR10_1X10,
135*4882a593Smuzhiyun 	MEDIA_BUS_FMT_SGRBG10_1X10,
136*4882a593Smuzhiyun 	MEDIA_BUS_FMT_SGBRG10_1X10,
137*4882a593Smuzhiyun 	MEDIA_BUS_FMT_SRGGB10_1X10,
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun static const struct reg_value ov2680_setting_30fps_QUXGA_800_600[] = {
141*4882a593Smuzhiyun 	{0x3086, 0x01}, {0x370a, 0x23}, {0x3808, 0x03}, {0x3809, 0x20},
142*4882a593Smuzhiyun 	{0x380a, 0x02}, {0x380b, 0x58}, {0x380c, 0x06}, {0x380d, 0xac},
143*4882a593Smuzhiyun 	{0x380e, 0x02}, {0x380f, 0x84}, {0x3811, 0x04}, {0x3813, 0x04},
144*4882a593Smuzhiyun 	{0x3814, 0x31}, {0x3815, 0x31}, {0x3820, 0xc0}, {0x4008, 0x00},
145*4882a593Smuzhiyun 	{0x4009, 0x03}, {0x4837, 0x1e}, {0x3501, 0x4e}, {0x3502, 0xe0},
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static const struct reg_value ov2680_setting_30fps_720P_1280_720[] = {
149*4882a593Smuzhiyun 	{0x3086, 0x00}, {0x3808, 0x05}, {0x3809, 0x00}, {0x380a, 0x02},
150*4882a593Smuzhiyun 	{0x380b, 0xd0}, {0x380c, 0x06}, {0x380d, 0xa8}, {0x380e, 0x05},
151*4882a593Smuzhiyun 	{0x380f, 0x0e}, {0x3811, 0x08}, {0x3813, 0x06}, {0x3814, 0x11},
152*4882a593Smuzhiyun 	{0x3815, 0x11}, {0x3820, 0xc0}, {0x4008, 0x00},
153*4882a593Smuzhiyun };
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun static const struct reg_value ov2680_setting_30fps_UXGA_1600_1200[] = {
156*4882a593Smuzhiyun 	{0x3086, 0x00}, {0x3501, 0x4e}, {0x3502, 0xe0}, {0x3808, 0x06},
157*4882a593Smuzhiyun 	{0x3809, 0x40}, {0x380a, 0x04}, {0x380b, 0xb0}, {0x380c, 0x06},
158*4882a593Smuzhiyun 	{0x380d, 0xa8}, {0x380e, 0x05}, {0x380f, 0x0e}, {0x3811, 0x00},
159*4882a593Smuzhiyun 	{0x3813, 0x00}, {0x3814, 0x11}, {0x3815, 0x11}, {0x3820, 0xc0},
160*4882a593Smuzhiyun 	{0x4008, 0x00}, {0x4837, 0x18}
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun static const struct ov2680_mode_info ov2680_mode_init_data = {
164*4882a593Smuzhiyun 	"mode_quxga_800_600", OV2680_MODE_QUXGA_800_600, 800, 600,
165*4882a593Smuzhiyun 	ov2680_setting_30fps_QUXGA_800_600,
166*4882a593Smuzhiyun 	ARRAY_SIZE(ov2680_setting_30fps_QUXGA_800_600),
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun static const struct ov2680_mode_info ov2680_mode_data[OV2680_MODE_MAX] = {
170*4882a593Smuzhiyun 	{"mode_quxga_800_600", OV2680_MODE_QUXGA_800_600,
171*4882a593Smuzhiyun 	 800, 600, ov2680_setting_30fps_QUXGA_800_600,
172*4882a593Smuzhiyun 	 ARRAY_SIZE(ov2680_setting_30fps_QUXGA_800_600)},
173*4882a593Smuzhiyun 	{"mode_720p_1280_720", OV2680_MODE_720P_1280_720,
174*4882a593Smuzhiyun 	 1280, 720, ov2680_setting_30fps_720P_1280_720,
175*4882a593Smuzhiyun 	 ARRAY_SIZE(ov2680_setting_30fps_720P_1280_720)},
176*4882a593Smuzhiyun 	{"mode_uxga_1600_1200", OV2680_MODE_UXGA_1600_1200,
177*4882a593Smuzhiyun 	 1600, 1200, ov2680_setting_30fps_UXGA_1600_1200,
178*4882a593Smuzhiyun 	 ARRAY_SIZE(ov2680_setting_30fps_UXGA_1600_1200)},
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun 
to_ov2680_dev(struct v4l2_subdev * sd)181*4882a593Smuzhiyun static struct ov2680_dev *to_ov2680_dev(struct v4l2_subdev *sd)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	return container_of(sd, struct ov2680_dev, sd);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
ov2680_to_dev(struct ov2680_dev * sensor)186*4882a593Smuzhiyun static struct device *ov2680_to_dev(struct ov2680_dev *sensor)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	return &sensor->i2c_client->dev;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun 
ctrl_to_sd(struct v4l2_ctrl * ctrl)191*4882a593Smuzhiyun static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	return &container_of(ctrl->handler, struct ov2680_dev,
194*4882a593Smuzhiyun 			     ctrls.handler)->sd;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun 
__ov2680_write_reg(struct ov2680_dev * sensor,u16 reg,unsigned int len,u32 val)197*4882a593Smuzhiyun static int __ov2680_write_reg(struct ov2680_dev *sensor, u16 reg,
198*4882a593Smuzhiyun 			      unsigned int len, u32 val)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun 	struct i2c_client *client = sensor->i2c_client;
201*4882a593Smuzhiyun 	u8 buf[6];
202*4882a593Smuzhiyun 	int ret;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (len > 4)
205*4882a593Smuzhiyun 		return -EINVAL;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	put_unaligned_be16(reg, buf);
208*4882a593Smuzhiyun 	put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
209*4882a593Smuzhiyun 	ret = i2c_master_send(client, buf, len + 2);
210*4882a593Smuzhiyun 	if (ret != len + 2) {
211*4882a593Smuzhiyun 		dev_err(&client->dev, "write error: reg=0x%4x: %d\n", reg, ret);
212*4882a593Smuzhiyun 		return -EIO;
213*4882a593Smuzhiyun 	}
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	return 0;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun #define ov2680_write_reg(s, r, v) \
219*4882a593Smuzhiyun 	__ov2680_write_reg(s, r, OV2680_REG_VALUE_8BIT, v)
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun #define ov2680_write_reg16(s, r, v) \
222*4882a593Smuzhiyun 	__ov2680_write_reg(s, r, OV2680_REG_VALUE_16BIT, v)
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun #define ov2680_write_reg24(s, r, v) \
225*4882a593Smuzhiyun 	__ov2680_write_reg(s, r, OV2680_REG_VALUE_24BIT, v)
226*4882a593Smuzhiyun 
__ov2680_read_reg(struct ov2680_dev * sensor,u16 reg,unsigned int len,u32 * val)227*4882a593Smuzhiyun static int __ov2680_read_reg(struct ov2680_dev *sensor, u16 reg,
228*4882a593Smuzhiyun 			     unsigned int len, u32 *val)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	struct i2c_client *client = sensor->i2c_client;
231*4882a593Smuzhiyun 	struct i2c_msg msgs[2];
232*4882a593Smuzhiyun 	u8 addr_buf[2] = { reg >> 8, reg & 0xff };
233*4882a593Smuzhiyun 	u8 data_buf[4] = { 0, };
234*4882a593Smuzhiyun 	int ret;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	if (len > 4)
237*4882a593Smuzhiyun 		return -EINVAL;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	msgs[0].addr = client->addr;
240*4882a593Smuzhiyun 	msgs[0].flags = 0;
241*4882a593Smuzhiyun 	msgs[0].len = ARRAY_SIZE(addr_buf);
242*4882a593Smuzhiyun 	msgs[0].buf = addr_buf;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	msgs[1].addr = client->addr;
245*4882a593Smuzhiyun 	msgs[1].flags = I2C_M_RD;
246*4882a593Smuzhiyun 	msgs[1].len = len;
247*4882a593Smuzhiyun 	msgs[1].buf = &data_buf[4 - len];
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
250*4882a593Smuzhiyun 	if (ret != ARRAY_SIZE(msgs)) {
251*4882a593Smuzhiyun 		dev_err(&client->dev, "read error: reg=0x%4x: %d\n", reg, ret);
252*4882a593Smuzhiyun 		return -EIO;
253*4882a593Smuzhiyun 	}
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	*val = get_unaligned_be32(data_buf);
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	return 0;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun #define ov2680_read_reg(s, r, v) \
261*4882a593Smuzhiyun 	__ov2680_read_reg(s, r, OV2680_REG_VALUE_8BIT, v)
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun #define ov2680_read_reg16(s, r, v) \
264*4882a593Smuzhiyun 	__ov2680_read_reg(s, r, OV2680_REG_VALUE_16BIT, v)
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun #define ov2680_read_reg24(s, r, v) \
267*4882a593Smuzhiyun 	__ov2680_read_reg(s, r, OV2680_REG_VALUE_24BIT, v)
268*4882a593Smuzhiyun 
ov2680_mod_reg(struct ov2680_dev * sensor,u16 reg,u8 mask,u8 val)269*4882a593Smuzhiyun static int ov2680_mod_reg(struct ov2680_dev *sensor, u16 reg, u8 mask, u8 val)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	u32 readval;
272*4882a593Smuzhiyun 	int ret;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	ret = ov2680_read_reg(sensor, reg, &readval);
275*4882a593Smuzhiyun 	if (ret < 0)
276*4882a593Smuzhiyun 		return ret;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	readval &= ~mask;
279*4882a593Smuzhiyun 	val &= mask;
280*4882a593Smuzhiyun 	val |= readval;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	return ov2680_write_reg(sensor, reg, val);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun 
ov2680_load_regs(struct ov2680_dev * sensor,const struct ov2680_mode_info * mode)285*4882a593Smuzhiyun static int ov2680_load_regs(struct ov2680_dev *sensor,
286*4882a593Smuzhiyun 			    const struct ov2680_mode_info *mode)
287*4882a593Smuzhiyun {
288*4882a593Smuzhiyun 	const struct reg_value *regs = mode->reg_data;
289*4882a593Smuzhiyun 	unsigned int i;
290*4882a593Smuzhiyun 	int ret = 0;
291*4882a593Smuzhiyun 	u16 reg_addr;
292*4882a593Smuzhiyun 	u8 val;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
295*4882a593Smuzhiyun 		reg_addr = regs->reg_addr;
296*4882a593Smuzhiyun 		val = regs->val;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 		ret = ov2680_write_reg(sensor, reg_addr, val);
299*4882a593Smuzhiyun 		if (ret)
300*4882a593Smuzhiyun 			break;
301*4882a593Smuzhiyun 	}
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun 	return ret;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
ov2680_power_up(struct ov2680_dev * sensor)306*4882a593Smuzhiyun static void ov2680_power_up(struct ov2680_dev *sensor)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	if (!sensor->reset_gpio)
309*4882a593Smuzhiyun 		return;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	gpiod_set_value(sensor->reset_gpio, 0);
312*4882a593Smuzhiyun 	usleep_range(5000, 10000);
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun 
ov2680_power_down(struct ov2680_dev * sensor)315*4882a593Smuzhiyun static void ov2680_power_down(struct ov2680_dev *sensor)
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun 	if (!sensor->reset_gpio)
318*4882a593Smuzhiyun 		return;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	gpiod_set_value(sensor->reset_gpio, 1);
321*4882a593Smuzhiyun 	usleep_range(5000, 10000);
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun 
ov2680_bayer_order(struct ov2680_dev * sensor)324*4882a593Smuzhiyun static int ov2680_bayer_order(struct ov2680_dev *sensor)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun 	u32 format1;
327*4882a593Smuzhiyun 	u32 format2;
328*4882a593Smuzhiyun 	u32 hv_flip;
329*4882a593Smuzhiyun 	int ret;
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	ret = ov2680_read_reg(sensor, OV2680_REG_FORMAT1, &format1);
332*4882a593Smuzhiyun 	if (ret < 0)
333*4882a593Smuzhiyun 		return ret;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	ret = ov2680_read_reg(sensor, OV2680_REG_FORMAT2, &format2);
336*4882a593Smuzhiyun 	if (ret < 0)
337*4882a593Smuzhiyun 		return ret;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun 	hv_flip = (format2 & BIT(2)  << 1) | (format1 & BIT(2));
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	sensor->fmt.code = ov2680_hv_flip_bayer_order[hv_flip];
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
ov2680_vflip_enable(struct ov2680_dev * sensor)346*4882a593Smuzhiyun static int ov2680_vflip_enable(struct ov2680_dev *sensor)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	int ret;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT1, BIT(2), BIT(2));
351*4882a593Smuzhiyun 	if (ret < 0)
352*4882a593Smuzhiyun 		return ret;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	return ov2680_bayer_order(sensor);
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun 
ov2680_vflip_disable(struct ov2680_dev * sensor)357*4882a593Smuzhiyun static int ov2680_vflip_disable(struct ov2680_dev *sensor)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun 	int ret;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT1, BIT(2), BIT(0));
362*4882a593Smuzhiyun 	if (ret < 0)
363*4882a593Smuzhiyun 		return ret;
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	return ov2680_bayer_order(sensor);
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun 
ov2680_hflip_enable(struct ov2680_dev * sensor)368*4882a593Smuzhiyun static int ov2680_hflip_enable(struct ov2680_dev *sensor)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun 	int ret;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT2, BIT(2), BIT(2));
373*4882a593Smuzhiyun 	if (ret < 0)
374*4882a593Smuzhiyun 		return ret;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	return ov2680_bayer_order(sensor);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
ov2680_hflip_disable(struct ov2680_dev * sensor)379*4882a593Smuzhiyun static int ov2680_hflip_disable(struct ov2680_dev *sensor)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun 	int ret;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_FORMAT2, BIT(2), BIT(0));
384*4882a593Smuzhiyun 	if (ret < 0)
385*4882a593Smuzhiyun 		return ret;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun 	return ov2680_bayer_order(sensor);
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun 
ov2680_test_pattern_set(struct ov2680_dev * sensor,int value)390*4882a593Smuzhiyun static int ov2680_test_pattern_set(struct ov2680_dev *sensor, int value)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun 	int ret;
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	if (!value)
395*4882a593Smuzhiyun 		return ov2680_mod_reg(sensor, OV2680_REG_ISP_CTRL00, BIT(7), 0);
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_ISP_CTRL00, 0x03, value - 1);
398*4882a593Smuzhiyun 	if (ret < 0)
399*4882a593Smuzhiyun 		return ret;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_ISP_CTRL00, BIT(7), BIT(7));
402*4882a593Smuzhiyun 	if (ret < 0)
403*4882a593Smuzhiyun 		return ret;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	return 0;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun 
ov2680_gain_set(struct ov2680_dev * sensor,bool auto_gain)408*4882a593Smuzhiyun static int ov2680_gain_set(struct ov2680_dev *sensor, bool auto_gain)
409*4882a593Smuzhiyun {
410*4882a593Smuzhiyun 	struct ov2680_ctrls *ctrls = &sensor->ctrls;
411*4882a593Smuzhiyun 	u32 gain;
412*4882a593Smuzhiyun 	int ret;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_R_MANUAL, BIT(1),
415*4882a593Smuzhiyun 			     auto_gain ? 0 : BIT(1));
416*4882a593Smuzhiyun 	if (ret < 0)
417*4882a593Smuzhiyun 		return ret;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	if (auto_gain || !ctrls->gain->is_new)
420*4882a593Smuzhiyun 		return 0;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	gain = ctrls->gain->val;
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	ret = ov2680_write_reg16(sensor, OV2680_REG_GAIN_PK, gain);
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 	return 0;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun 
ov2680_gain_get(struct ov2680_dev * sensor)429*4882a593Smuzhiyun static int ov2680_gain_get(struct ov2680_dev *sensor)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun 	u32 gain;
432*4882a593Smuzhiyun 	int ret;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	ret = ov2680_read_reg16(sensor, OV2680_REG_GAIN_PK, &gain);
435*4882a593Smuzhiyun 	if (ret)
436*4882a593Smuzhiyun 		return ret;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	return gain;
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun 
ov2680_exposure_set(struct ov2680_dev * sensor,bool auto_exp)441*4882a593Smuzhiyun static int ov2680_exposure_set(struct ov2680_dev *sensor, bool auto_exp)
442*4882a593Smuzhiyun {
443*4882a593Smuzhiyun 	struct ov2680_ctrls *ctrls = &sensor->ctrls;
444*4882a593Smuzhiyun 	u32 exp;
445*4882a593Smuzhiyun 	int ret;
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun 	ret = ov2680_mod_reg(sensor, OV2680_REG_R_MANUAL, BIT(0),
448*4882a593Smuzhiyun 			     auto_exp ? 0 : BIT(0));
449*4882a593Smuzhiyun 	if (ret < 0)
450*4882a593Smuzhiyun 		return ret;
451*4882a593Smuzhiyun 
452*4882a593Smuzhiyun 	if (auto_exp || !ctrls->exposure->is_new)
453*4882a593Smuzhiyun 		return 0;
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 	exp = (u32)ctrls->exposure->val;
456*4882a593Smuzhiyun 	exp <<= 4;
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	return ov2680_write_reg24(sensor, OV2680_REG_EXPOSURE_PK_HIGH, exp);
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun 
ov2680_exposure_get(struct ov2680_dev * sensor)461*4882a593Smuzhiyun static int ov2680_exposure_get(struct ov2680_dev *sensor)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun 	int ret;
464*4882a593Smuzhiyun 	u32 exp;
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	ret = ov2680_read_reg24(sensor, OV2680_REG_EXPOSURE_PK_HIGH, &exp);
467*4882a593Smuzhiyun 	if (ret)
468*4882a593Smuzhiyun 		return ret;
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	return exp >> 4;
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun 
ov2680_stream_enable(struct ov2680_dev * sensor)473*4882a593Smuzhiyun static int ov2680_stream_enable(struct ov2680_dev *sensor)
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun 	return ov2680_write_reg(sensor, OV2680_REG_STREAM_CTRL, 1);
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun 
ov2680_stream_disable(struct ov2680_dev * sensor)478*4882a593Smuzhiyun static int ov2680_stream_disable(struct ov2680_dev *sensor)
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun 	return ov2680_write_reg(sensor, OV2680_REG_STREAM_CTRL, 0);
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun 
ov2680_mode_set(struct ov2680_dev * sensor)483*4882a593Smuzhiyun static int ov2680_mode_set(struct ov2680_dev *sensor)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun 	struct ov2680_ctrls *ctrls = &sensor->ctrls;
486*4882a593Smuzhiyun 	int ret;
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	ret = ov2680_gain_set(sensor, false);
489*4882a593Smuzhiyun 	if (ret < 0)
490*4882a593Smuzhiyun 		return ret;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	ret = ov2680_exposure_set(sensor, false);
493*4882a593Smuzhiyun 	if (ret < 0)
494*4882a593Smuzhiyun 		return ret;
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	ret = ov2680_load_regs(sensor, sensor->current_mode);
497*4882a593Smuzhiyun 	if (ret < 0)
498*4882a593Smuzhiyun 		return ret;
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun 	if (ctrls->auto_gain->val) {
501*4882a593Smuzhiyun 		ret = ov2680_gain_set(sensor, true);
502*4882a593Smuzhiyun 		if (ret < 0)
503*4882a593Smuzhiyun 			return ret;
504*4882a593Smuzhiyun 	}
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	if (ctrls->auto_exp->val == V4L2_EXPOSURE_AUTO) {
507*4882a593Smuzhiyun 		ret = ov2680_exposure_set(sensor, true);
508*4882a593Smuzhiyun 		if (ret < 0)
509*4882a593Smuzhiyun 			return ret;
510*4882a593Smuzhiyun 	}
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	sensor->mode_pending_changes = false;
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	return 0;
515*4882a593Smuzhiyun }
516*4882a593Smuzhiyun 
ov2680_mode_restore(struct ov2680_dev * sensor)517*4882a593Smuzhiyun static int ov2680_mode_restore(struct ov2680_dev *sensor)
518*4882a593Smuzhiyun {
519*4882a593Smuzhiyun 	int ret;
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	ret = ov2680_load_regs(sensor, &ov2680_mode_init_data);
522*4882a593Smuzhiyun 	if (ret < 0)
523*4882a593Smuzhiyun 		return ret;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	return ov2680_mode_set(sensor);
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun 
ov2680_power_off(struct ov2680_dev * sensor)528*4882a593Smuzhiyun static int ov2680_power_off(struct ov2680_dev *sensor)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun 	if (!sensor->is_enabled)
531*4882a593Smuzhiyun 		return 0;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	clk_disable_unprepare(sensor->xvclk);
534*4882a593Smuzhiyun 	ov2680_power_down(sensor);
535*4882a593Smuzhiyun 	regulator_bulk_disable(OV2680_NUM_SUPPLIES, sensor->supplies);
536*4882a593Smuzhiyun 	sensor->is_enabled = false;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	return 0;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun 
ov2680_power_on(struct ov2680_dev * sensor)541*4882a593Smuzhiyun static int ov2680_power_on(struct ov2680_dev *sensor)
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun 	struct device *dev = ov2680_to_dev(sensor);
544*4882a593Smuzhiyun 	int ret;
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	if (sensor->is_enabled)
547*4882a593Smuzhiyun 		return 0;
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	ret = regulator_bulk_enable(OV2680_NUM_SUPPLIES, sensor->supplies);
550*4882a593Smuzhiyun 	if (ret < 0) {
551*4882a593Smuzhiyun 		dev_err(dev, "failed to enable regulators: %d\n", ret);
552*4882a593Smuzhiyun 		return ret;
553*4882a593Smuzhiyun 	}
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	if (!sensor->reset_gpio) {
556*4882a593Smuzhiyun 		ret = ov2680_write_reg(sensor, OV2680_REG_SOFT_RESET, 0x01);
557*4882a593Smuzhiyun 		if (ret != 0) {
558*4882a593Smuzhiyun 			dev_err(dev, "sensor soft reset failed\n");
559*4882a593Smuzhiyun 			return ret;
560*4882a593Smuzhiyun 		}
561*4882a593Smuzhiyun 		usleep_range(1000, 2000);
562*4882a593Smuzhiyun 	} else {
563*4882a593Smuzhiyun 		ov2680_power_down(sensor);
564*4882a593Smuzhiyun 		ov2680_power_up(sensor);
565*4882a593Smuzhiyun 	}
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 	ret = clk_prepare_enable(sensor->xvclk);
568*4882a593Smuzhiyun 	if (ret < 0)
569*4882a593Smuzhiyun 		return ret;
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	sensor->is_enabled = true;
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	/* Set clock lane into LP-11 state */
574*4882a593Smuzhiyun 	ov2680_stream_enable(sensor);
575*4882a593Smuzhiyun 	usleep_range(1000, 2000);
576*4882a593Smuzhiyun 	ov2680_stream_disable(sensor);
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	return 0;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun 
ov2680_s_power(struct v4l2_subdev * sd,int on)581*4882a593Smuzhiyun static int ov2680_s_power(struct v4l2_subdev *sd, int on)
582*4882a593Smuzhiyun {
583*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
584*4882a593Smuzhiyun 	int ret = 0;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	mutex_lock(&sensor->lock);
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	if (on)
589*4882a593Smuzhiyun 		ret = ov2680_power_on(sensor);
590*4882a593Smuzhiyun 	else
591*4882a593Smuzhiyun 		ret = ov2680_power_off(sensor);
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	mutex_unlock(&sensor->lock);
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	if (on && ret == 0) {
596*4882a593Smuzhiyun 		ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
597*4882a593Smuzhiyun 		if (ret < 0)
598*4882a593Smuzhiyun 			return ret;
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 		ret = ov2680_mode_restore(sensor);
601*4882a593Smuzhiyun 	}
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	return ret;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun 
ov2680_s_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)606*4882a593Smuzhiyun static int ov2680_s_g_frame_interval(struct v4l2_subdev *sd,
607*4882a593Smuzhiyun 				     struct v4l2_subdev_frame_interval *fi)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	mutex_lock(&sensor->lock);
612*4882a593Smuzhiyun 	fi->interval = sensor->frame_interval;
613*4882a593Smuzhiyun 	mutex_unlock(&sensor->lock);
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	return 0;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun 
ov2680_s_stream(struct v4l2_subdev * sd,int enable)618*4882a593Smuzhiyun static int ov2680_s_stream(struct v4l2_subdev *sd, int enable)
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
621*4882a593Smuzhiyun 	int ret = 0;
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	mutex_lock(&sensor->lock);
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 	if (sensor->is_streaming == !!enable)
626*4882a593Smuzhiyun 		goto unlock;
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	if (enable && sensor->mode_pending_changes) {
629*4882a593Smuzhiyun 		ret = ov2680_mode_set(sensor);
630*4882a593Smuzhiyun 		if (ret < 0)
631*4882a593Smuzhiyun 			goto unlock;
632*4882a593Smuzhiyun 	}
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	if (enable)
635*4882a593Smuzhiyun 		ret = ov2680_stream_enable(sensor);
636*4882a593Smuzhiyun 	else
637*4882a593Smuzhiyun 		ret = ov2680_stream_disable(sensor);
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	sensor->is_streaming = !!enable;
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun unlock:
642*4882a593Smuzhiyun 	mutex_unlock(&sensor->lock);
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	return ret;
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun 
ov2680_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)647*4882a593Smuzhiyun static int ov2680_enum_mbus_code(struct v4l2_subdev *sd,
648*4882a593Smuzhiyun 				 struct v4l2_subdev_pad_config *cfg,
649*4882a593Smuzhiyun 				 struct v4l2_subdev_mbus_code_enum *code)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 	if (code->pad != 0 || code->index != 0)
654*4882a593Smuzhiyun 		return -EINVAL;
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	code->code = sensor->fmt.code;
657*4882a593Smuzhiyun 
658*4882a593Smuzhiyun 	return 0;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun 
ov2680_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)661*4882a593Smuzhiyun static int ov2680_get_fmt(struct v4l2_subdev *sd,
662*4882a593Smuzhiyun 			  struct v4l2_subdev_pad_config *cfg,
663*4882a593Smuzhiyun 			  struct v4l2_subdev_format *format)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
666*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *fmt = NULL;
667*4882a593Smuzhiyun 	int ret = 0;
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 	if (format->pad != 0)
670*4882a593Smuzhiyun 		return -EINVAL;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	mutex_lock(&sensor->lock);
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun 	if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
675*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
676*4882a593Smuzhiyun 		fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg, format->pad);
677*4882a593Smuzhiyun #else
678*4882a593Smuzhiyun 		ret = -EINVAL;
679*4882a593Smuzhiyun #endif
680*4882a593Smuzhiyun 	} else {
681*4882a593Smuzhiyun 		fmt = &sensor->fmt;
682*4882a593Smuzhiyun 	}
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 	if (fmt)
685*4882a593Smuzhiyun 		format->format = *fmt;
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 	mutex_unlock(&sensor->lock);
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	return ret;
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun 
ov2680_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * format)692*4882a593Smuzhiyun static int ov2680_set_fmt(struct v4l2_subdev *sd,
693*4882a593Smuzhiyun 			  struct v4l2_subdev_pad_config *cfg,
694*4882a593Smuzhiyun 			  struct v4l2_subdev_format *format)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
697*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *fmt = &format->format;
698*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
699*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *try_fmt;
700*4882a593Smuzhiyun #endif
701*4882a593Smuzhiyun 	const struct ov2680_mode_info *mode;
702*4882a593Smuzhiyun 	int ret = 0;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	if (format->pad != 0)
705*4882a593Smuzhiyun 		return -EINVAL;
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	mutex_lock(&sensor->lock);
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	if (sensor->is_streaming) {
710*4882a593Smuzhiyun 		ret = -EBUSY;
711*4882a593Smuzhiyun 		goto unlock;
712*4882a593Smuzhiyun 	}
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun 	mode = v4l2_find_nearest_size(ov2680_mode_data,
715*4882a593Smuzhiyun 				      ARRAY_SIZE(ov2680_mode_data), width,
716*4882a593Smuzhiyun 				      height, fmt->width, fmt->height);
717*4882a593Smuzhiyun 	if (!mode) {
718*4882a593Smuzhiyun 		ret = -EINVAL;
719*4882a593Smuzhiyun 		goto unlock;
720*4882a593Smuzhiyun 	}
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 	if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
723*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
724*4882a593Smuzhiyun 		try_fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
725*4882a593Smuzhiyun 		format->format = *try_fmt;
726*4882a593Smuzhiyun #endif
727*4882a593Smuzhiyun 		goto unlock;
728*4882a593Smuzhiyun 	}
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	fmt->width = mode->width;
731*4882a593Smuzhiyun 	fmt->height = mode->height;
732*4882a593Smuzhiyun 	fmt->code = sensor->fmt.code;
733*4882a593Smuzhiyun 	fmt->colorspace = sensor->fmt.colorspace;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 	sensor->current_mode = mode;
736*4882a593Smuzhiyun 	sensor->fmt = format->format;
737*4882a593Smuzhiyun 	sensor->mode_pending_changes = true;
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun unlock:
740*4882a593Smuzhiyun 	mutex_unlock(&sensor->lock);
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 	return ret;
743*4882a593Smuzhiyun }
744*4882a593Smuzhiyun 
ov2680_init_cfg(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg)745*4882a593Smuzhiyun static int ov2680_init_cfg(struct v4l2_subdev *sd,
746*4882a593Smuzhiyun 			   struct v4l2_subdev_pad_config *cfg)
747*4882a593Smuzhiyun {
748*4882a593Smuzhiyun 	struct v4l2_subdev_format fmt = {
749*4882a593Smuzhiyun 		.which = cfg ? V4L2_SUBDEV_FORMAT_TRY
750*4882a593Smuzhiyun 				: V4L2_SUBDEV_FORMAT_ACTIVE,
751*4882a593Smuzhiyun 		.format = {
752*4882a593Smuzhiyun 			.width = 800,
753*4882a593Smuzhiyun 			.height = 600,
754*4882a593Smuzhiyun 		}
755*4882a593Smuzhiyun 	};
756*4882a593Smuzhiyun 
757*4882a593Smuzhiyun 	return ov2680_set_fmt(sd, cfg, &fmt);
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun 
ov2680_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)760*4882a593Smuzhiyun static int ov2680_enum_frame_size(struct v4l2_subdev *sd,
761*4882a593Smuzhiyun 				  struct v4l2_subdev_pad_config *cfg,
762*4882a593Smuzhiyun 				  struct v4l2_subdev_frame_size_enum *fse)
763*4882a593Smuzhiyun {
764*4882a593Smuzhiyun 	int index = fse->index;
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun 	if (index >= OV2680_MODE_MAX || index < 0)
767*4882a593Smuzhiyun 		return -EINVAL;
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	fse->min_width = ov2680_mode_data[index].width;
770*4882a593Smuzhiyun 	fse->min_height = ov2680_mode_data[index].height;
771*4882a593Smuzhiyun 	fse->max_width = ov2680_mode_data[index].width;
772*4882a593Smuzhiyun 	fse->max_height = ov2680_mode_data[index].height;
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 	return 0;
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun 
ov2680_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)777*4882a593Smuzhiyun static int ov2680_enum_frame_interval(struct v4l2_subdev *sd,
778*4882a593Smuzhiyun 			      struct v4l2_subdev_pad_config *cfg,
779*4882a593Smuzhiyun 			      struct v4l2_subdev_frame_interval_enum *fie)
780*4882a593Smuzhiyun {
781*4882a593Smuzhiyun 	struct v4l2_fract tpf;
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	if (fie->index >= OV2680_MODE_MAX || fie->width > OV2680_WIDTH_MAX ||
784*4882a593Smuzhiyun 	    fie->height > OV2680_HEIGHT_MAX ||
785*4882a593Smuzhiyun 	    fie->which > V4L2_SUBDEV_FORMAT_ACTIVE)
786*4882a593Smuzhiyun 		return -EINVAL;
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	tpf.denominator = OV2680_FRAME_RATE;
789*4882a593Smuzhiyun 	tpf.numerator = 1;
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	fie->interval = tpf;
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	return 0;
794*4882a593Smuzhiyun }
795*4882a593Smuzhiyun 
ov2680_g_volatile_ctrl(struct v4l2_ctrl * ctrl)796*4882a593Smuzhiyun static int ov2680_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
797*4882a593Smuzhiyun {
798*4882a593Smuzhiyun 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
799*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
800*4882a593Smuzhiyun 	struct ov2680_ctrls *ctrls = &sensor->ctrls;
801*4882a593Smuzhiyun 	int val;
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	if (!sensor->is_enabled)
804*4882a593Smuzhiyun 		return 0;
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	switch (ctrl->id) {
807*4882a593Smuzhiyun 	case V4L2_CID_GAIN:
808*4882a593Smuzhiyun 		val = ov2680_gain_get(sensor);
809*4882a593Smuzhiyun 		if (val < 0)
810*4882a593Smuzhiyun 			return val;
811*4882a593Smuzhiyun 		ctrls->gain->val = val;
812*4882a593Smuzhiyun 		break;
813*4882a593Smuzhiyun 	case V4L2_CID_EXPOSURE:
814*4882a593Smuzhiyun 		val = ov2680_exposure_get(sensor);
815*4882a593Smuzhiyun 		if (val < 0)
816*4882a593Smuzhiyun 			return val;
817*4882a593Smuzhiyun 		ctrls->exposure->val = val;
818*4882a593Smuzhiyun 		break;
819*4882a593Smuzhiyun 	}
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	return 0;
822*4882a593Smuzhiyun }
823*4882a593Smuzhiyun 
ov2680_s_ctrl(struct v4l2_ctrl * ctrl)824*4882a593Smuzhiyun static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl)
825*4882a593Smuzhiyun {
826*4882a593Smuzhiyun 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
827*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
828*4882a593Smuzhiyun 	struct ov2680_ctrls *ctrls = &sensor->ctrls;
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 	if (!sensor->is_enabled)
831*4882a593Smuzhiyun 		return 0;
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun 	switch (ctrl->id) {
834*4882a593Smuzhiyun 	case V4L2_CID_AUTOGAIN:
835*4882a593Smuzhiyun 		return ov2680_gain_set(sensor, !!ctrl->val);
836*4882a593Smuzhiyun 	case V4L2_CID_GAIN:
837*4882a593Smuzhiyun 		return ov2680_gain_set(sensor, !!ctrls->auto_gain->val);
838*4882a593Smuzhiyun 	case V4L2_CID_EXPOSURE_AUTO:
839*4882a593Smuzhiyun 		return ov2680_exposure_set(sensor, !!ctrl->val);
840*4882a593Smuzhiyun 	case V4L2_CID_EXPOSURE:
841*4882a593Smuzhiyun 		return ov2680_exposure_set(sensor, !!ctrls->auto_exp->val);
842*4882a593Smuzhiyun 	case V4L2_CID_VFLIP:
843*4882a593Smuzhiyun 		if (sensor->is_streaming)
844*4882a593Smuzhiyun 			return -EBUSY;
845*4882a593Smuzhiyun 		if (ctrl->val)
846*4882a593Smuzhiyun 			return ov2680_vflip_enable(sensor);
847*4882a593Smuzhiyun 		else
848*4882a593Smuzhiyun 			return ov2680_vflip_disable(sensor);
849*4882a593Smuzhiyun 	case V4L2_CID_HFLIP:
850*4882a593Smuzhiyun 		if (sensor->is_streaming)
851*4882a593Smuzhiyun 			return -EBUSY;
852*4882a593Smuzhiyun 		if (ctrl->val)
853*4882a593Smuzhiyun 			return ov2680_hflip_enable(sensor);
854*4882a593Smuzhiyun 		else
855*4882a593Smuzhiyun 			return ov2680_hflip_disable(sensor);
856*4882a593Smuzhiyun 	case V4L2_CID_TEST_PATTERN:
857*4882a593Smuzhiyun 		return ov2680_test_pattern_set(sensor, ctrl->val);
858*4882a593Smuzhiyun 	default:
859*4882a593Smuzhiyun 		break;
860*4882a593Smuzhiyun 	}
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun 	return -EINVAL;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun 
865*4882a593Smuzhiyun static const struct v4l2_ctrl_ops ov2680_ctrl_ops = {
866*4882a593Smuzhiyun 	.g_volatile_ctrl = ov2680_g_volatile_ctrl,
867*4882a593Smuzhiyun 	.s_ctrl = ov2680_s_ctrl,
868*4882a593Smuzhiyun };
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops ov2680_core_ops = {
871*4882a593Smuzhiyun 	.s_power = ov2680_s_power,
872*4882a593Smuzhiyun };
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops ov2680_video_ops = {
875*4882a593Smuzhiyun 	.g_frame_interval	= ov2680_s_g_frame_interval,
876*4882a593Smuzhiyun 	.s_frame_interval	= ov2680_s_g_frame_interval,
877*4882a593Smuzhiyun 	.s_stream		= ov2680_s_stream,
878*4882a593Smuzhiyun };
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops ov2680_pad_ops = {
881*4882a593Smuzhiyun 	.init_cfg		= ov2680_init_cfg,
882*4882a593Smuzhiyun 	.enum_mbus_code		= ov2680_enum_mbus_code,
883*4882a593Smuzhiyun 	.get_fmt		= ov2680_get_fmt,
884*4882a593Smuzhiyun 	.set_fmt		= ov2680_set_fmt,
885*4882a593Smuzhiyun 	.enum_frame_size	= ov2680_enum_frame_size,
886*4882a593Smuzhiyun 	.enum_frame_interval	= ov2680_enum_frame_interval,
887*4882a593Smuzhiyun };
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun static const struct v4l2_subdev_ops ov2680_subdev_ops = {
890*4882a593Smuzhiyun 	.core	= &ov2680_core_ops,
891*4882a593Smuzhiyun 	.video	= &ov2680_video_ops,
892*4882a593Smuzhiyun 	.pad	= &ov2680_pad_ops,
893*4882a593Smuzhiyun };
894*4882a593Smuzhiyun 
ov2680_mode_init(struct ov2680_dev * sensor)895*4882a593Smuzhiyun static int ov2680_mode_init(struct ov2680_dev *sensor)
896*4882a593Smuzhiyun {
897*4882a593Smuzhiyun 	const struct ov2680_mode_info *init_mode;
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun 	/* set initial mode */
900*4882a593Smuzhiyun 	sensor->fmt.code = MEDIA_BUS_FMT_SBGGR10_1X10;
901*4882a593Smuzhiyun 	sensor->fmt.width = 800;
902*4882a593Smuzhiyun 	sensor->fmt.height = 600;
903*4882a593Smuzhiyun 	sensor->fmt.field = V4L2_FIELD_NONE;
904*4882a593Smuzhiyun 	sensor->fmt.colorspace = V4L2_COLORSPACE_SRGB;
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun 	sensor->frame_interval.denominator = OV2680_FRAME_RATE;
907*4882a593Smuzhiyun 	sensor->frame_interval.numerator = 1;
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun 	init_mode = &ov2680_mode_init_data;
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun 	sensor->current_mode = init_mode;
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 	sensor->mode_pending_changes = true;
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 	return 0;
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun 
ov2680_v4l2_register(struct ov2680_dev * sensor)918*4882a593Smuzhiyun static int ov2680_v4l2_register(struct ov2680_dev *sensor)
919*4882a593Smuzhiyun {
920*4882a593Smuzhiyun 	const struct v4l2_ctrl_ops *ops = &ov2680_ctrl_ops;
921*4882a593Smuzhiyun 	struct ov2680_ctrls *ctrls = &sensor->ctrls;
922*4882a593Smuzhiyun 	struct v4l2_ctrl_handler *hdl = &ctrls->handler;
923*4882a593Smuzhiyun 	int ret = 0;
924*4882a593Smuzhiyun 
925*4882a593Smuzhiyun 	v4l2_i2c_subdev_init(&sensor->sd, sensor->i2c_client,
926*4882a593Smuzhiyun 			     &ov2680_subdev_ops);
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
929*4882a593Smuzhiyun 	sensor->sd.flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
930*4882a593Smuzhiyun #endif
931*4882a593Smuzhiyun 	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
932*4882a593Smuzhiyun 	sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun 	ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
935*4882a593Smuzhiyun 	if (ret < 0)
936*4882a593Smuzhiyun 		return ret;
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	v4l2_ctrl_handler_init(hdl, 7);
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	hdl->lock = &sensor->lock;
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun 	ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 0, 1, 1, 0);
943*4882a593Smuzhiyun 	ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 0, 1, 1, 0);
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	ctrls->test_pattern = v4l2_ctrl_new_std_menu_items(hdl,
946*4882a593Smuzhiyun 					&ov2680_ctrl_ops, V4L2_CID_TEST_PATTERN,
947*4882a593Smuzhiyun 					ARRAY_SIZE(test_pattern_menu) - 1,
948*4882a593Smuzhiyun 					0, 0, test_pattern_menu);
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
951*4882a593Smuzhiyun 						 V4L2_CID_EXPOSURE_AUTO,
952*4882a593Smuzhiyun 						 V4L2_EXPOSURE_MANUAL, 0,
953*4882a593Smuzhiyun 						 V4L2_EXPOSURE_AUTO);
954*4882a593Smuzhiyun 
955*4882a593Smuzhiyun 	ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
956*4882a593Smuzhiyun 					    0, 32767, 1, 0);
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun 	ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
959*4882a593Smuzhiyun 					     0, 1, 1, 1);
960*4882a593Smuzhiyun 	ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN, 0, 2047, 1, 0);
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun 	if (hdl->error) {
963*4882a593Smuzhiyun 		ret = hdl->error;
964*4882a593Smuzhiyun 		goto cleanup_entity;
965*4882a593Smuzhiyun 	}
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
968*4882a593Smuzhiyun 	ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
969*4882a593Smuzhiyun 
970*4882a593Smuzhiyun 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
971*4882a593Smuzhiyun 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 	sensor->sd.ctrl_handler = hdl;
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 	ret = v4l2_async_register_subdev(&sensor->sd);
976*4882a593Smuzhiyun 	if (ret < 0)
977*4882a593Smuzhiyun 		goto cleanup_entity;
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun 	return 0;
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun cleanup_entity:
982*4882a593Smuzhiyun 	media_entity_cleanup(&sensor->sd.entity);
983*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(hdl);
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	return ret;
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun 
ov2680_get_regulators(struct ov2680_dev * sensor)988*4882a593Smuzhiyun static int ov2680_get_regulators(struct ov2680_dev *sensor)
989*4882a593Smuzhiyun {
990*4882a593Smuzhiyun 	int i;
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	for (i = 0; i < OV2680_NUM_SUPPLIES; i++)
993*4882a593Smuzhiyun 		sensor->supplies[i].supply = ov2680_supply_name[i];
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	return devm_regulator_bulk_get(&sensor->i2c_client->dev,
996*4882a593Smuzhiyun 				       OV2680_NUM_SUPPLIES,
997*4882a593Smuzhiyun 				       sensor->supplies);
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun 
ov2680_check_id(struct ov2680_dev * sensor)1000*4882a593Smuzhiyun static int ov2680_check_id(struct ov2680_dev *sensor)
1001*4882a593Smuzhiyun {
1002*4882a593Smuzhiyun 	struct device *dev = ov2680_to_dev(sensor);
1003*4882a593Smuzhiyun 	u32 chip_id;
1004*4882a593Smuzhiyun 	int ret;
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	ov2680_power_on(sensor);
1007*4882a593Smuzhiyun 
1008*4882a593Smuzhiyun 	ret = ov2680_read_reg16(sensor, OV2680_REG_CHIP_ID_HIGH, &chip_id);
1009*4882a593Smuzhiyun 	if (ret < 0) {
1010*4882a593Smuzhiyun 		dev_err(dev, "failed to read chip id high\n");
1011*4882a593Smuzhiyun 		return -ENODEV;
1012*4882a593Smuzhiyun 	}
1013*4882a593Smuzhiyun 
1014*4882a593Smuzhiyun 	if (chip_id != OV2680_CHIP_ID) {
1015*4882a593Smuzhiyun 		dev_err(dev, "chip id: 0x%04x does not match expected 0x%04x\n",
1016*4882a593Smuzhiyun 			chip_id, OV2680_CHIP_ID);
1017*4882a593Smuzhiyun 		return -ENODEV;
1018*4882a593Smuzhiyun 	}
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 	return 0;
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun 
ov2680_parse_dt(struct ov2680_dev * sensor)1023*4882a593Smuzhiyun static int ov2680_parse_dt(struct ov2680_dev *sensor)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun 	struct device *dev = ov2680_to_dev(sensor);
1026*4882a593Smuzhiyun 	int ret;
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun 	sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1029*4882a593Smuzhiyun 						     GPIOD_OUT_HIGH);
1030*4882a593Smuzhiyun 	ret = PTR_ERR_OR_ZERO(sensor->reset_gpio);
1031*4882a593Smuzhiyun 	if (ret < 0) {
1032*4882a593Smuzhiyun 		dev_dbg(dev, "error while getting reset gpio: %d\n", ret);
1033*4882a593Smuzhiyun 		return ret;
1034*4882a593Smuzhiyun 	}
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun 	sensor->xvclk = devm_clk_get(dev, "xvclk");
1037*4882a593Smuzhiyun 	if (IS_ERR(sensor->xvclk)) {
1038*4882a593Smuzhiyun 		dev_err(dev, "xvclk clock missing or invalid\n");
1039*4882a593Smuzhiyun 		return PTR_ERR(sensor->xvclk);
1040*4882a593Smuzhiyun 	}
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun 	sensor->xvclk_freq = clk_get_rate(sensor->xvclk);
1043*4882a593Smuzhiyun 	if (sensor->xvclk_freq != OV2680_XVCLK_VALUE) {
1044*4882a593Smuzhiyun 		dev_err(dev, "wrong xvclk frequency %d HZ, expected: %d Hz\n",
1045*4882a593Smuzhiyun 			sensor->xvclk_freq, OV2680_XVCLK_VALUE);
1046*4882a593Smuzhiyun 		return -EINVAL;
1047*4882a593Smuzhiyun 	}
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun 	return 0;
1050*4882a593Smuzhiyun }
1051*4882a593Smuzhiyun 
ov2680_probe(struct i2c_client * client)1052*4882a593Smuzhiyun static int ov2680_probe(struct i2c_client *client)
1053*4882a593Smuzhiyun {
1054*4882a593Smuzhiyun 	struct device *dev = &client->dev;
1055*4882a593Smuzhiyun 	struct ov2680_dev *sensor;
1056*4882a593Smuzhiyun 	int ret;
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun 	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
1059*4882a593Smuzhiyun 	if (!sensor)
1060*4882a593Smuzhiyun 		return -ENOMEM;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	sensor->i2c_client = client;
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	ret = ov2680_parse_dt(sensor);
1065*4882a593Smuzhiyun 	if (ret < 0)
1066*4882a593Smuzhiyun 		return -EINVAL;
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun 	ret = ov2680_mode_init(sensor);
1069*4882a593Smuzhiyun 	if (ret < 0)
1070*4882a593Smuzhiyun 		return ret;
1071*4882a593Smuzhiyun 
1072*4882a593Smuzhiyun 	ret = ov2680_get_regulators(sensor);
1073*4882a593Smuzhiyun 	if (ret < 0) {
1074*4882a593Smuzhiyun 		dev_err(dev, "failed to get regulators\n");
1075*4882a593Smuzhiyun 		return ret;
1076*4882a593Smuzhiyun 	}
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	mutex_init(&sensor->lock);
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 	ret = ov2680_check_id(sensor);
1081*4882a593Smuzhiyun 	if (ret < 0)
1082*4882a593Smuzhiyun 		goto lock_destroy;
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	ret = ov2680_v4l2_register(sensor);
1085*4882a593Smuzhiyun 	if (ret < 0)
1086*4882a593Smuzhiyun 		goto lock_destroy;
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun 	dev_info(dev, "ov2680 init correctly\n");
1089*4882a593Smuzhiyun 
1090*4882a593Smuzhiyun 	return 0;
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun lock_destroy:
1093*4882a593Smuzhiyun 	dev_err(dev, "ov2680 init fail: %d\n", ret);
1094*4882a593Smuzhiyun 	mutex_destroy(&sensor->lock);
1095*4882a593Smuzhiyun 
1096*4882a593Smuzhiyun 	return ret;
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun 
ov2680_remove(struct i2c_client * client)1099*4882a593Smuzhiyun static int ov2680_remove(struct i2c_client *client)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1102*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
1103*4882a593Smuzhiyun 
1104*4882a593Smuzhiyun 	v4l2_async_unregister_subdev(&sensor->sd);
1105*4882a593Smuzhiyun 	mutex_destroy(&sensor->lock);
1106*4882a593Smuzhiyun 	media_entity_cleanup(&sensor->sd.entity);
1107*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	return 0;
1110*4882a593Smuzhiyun }
1111*4882a593Smuzhiyun 
ov2680_suspend(struct device * dev)1112*4882a593Smuzhiyun static int __maybe_unused ov2680_suspend(struct device *dev)
1113*4882a593Smuzhiyun {
1114*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1115*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1116*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	if (sensor->is_streaming)
1119*4882a593Smuzhiyun 		ov2680_stream_disable(sensor);
1120*4882a593Smuzhiyun 
1121*4882a593Smuzhiyun 	return 0;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun 
ov2680_resume(struct device * dev)1124*4882a593Smuzhiyun static int __maybe_unused ov2680_resume(struct device *dev)
1125*4882a593Smuzhiyun {
1126*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1127*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1128*4882a593Smuzhiyun 	struct ov2680_dev *sensor = to_ov2680_dev(sd);
1129*4882a593Smuzhiyun 	int ret;
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	if (sensor->is_streaming) {
1132*4882a593Smuzhiyun 		ret = ov2680_stream_enable(sensor);
1133*4882a593Smuzhiyun 		if (ret < 0)
1134*4882a593Smuzhiyun 			goto stream_disable;
1135*4882a593Smuzhiyun 	}
1136*4882a593Smuzhiyun 
1137*4882a593Smuzhiyun 	return 0;
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun stream_disable:
1140*4882a593Smuzhiyun 	ov2680_stream_disable(sensor);
1141*4882a593Smuzhiyun 	sensor->is_streaming = false;
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun 	return ret;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun 
1146*4882a593Smuzhiyun static const struct dev_pm_ops ov2680_pm_ops = {
1147*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(ov2680_suspend, ov2680_resume)
1148*4882a593Smuzhiyun };
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun static const struct of_device_id ov2680_dt_ids[] = {
1151*4882a593Smuzhiyun 	{ .compatible = "ovti,ov2680" },
1152*4882a593Smuzhiyun 	{ /* sentinel */ },
1153*4882a593Smuzhiyun };
1154*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ov2680_dt_ids);
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun static struct i2c_driver ov2680_i2c_driver = {
1157*4882a593Smuzhiyun 	.driver = {
1158*4882a593Smuzhiyun 		.name  = "ov2680",
1159*4882a593Smuzhiyun 		.pm = &ov2680_pm_ops,
1160*4882a593Smuzhiyun 		.of_match_table	= of_match_ptr(ov2680_dt_ids),
1161*4882a593Smuzhiyun 	},
1162*4882a593Smuzhiyun 	.probe_new	= ov2680_probe,
1163*4882a593Smuzhiyun 	.remove		= ov2680_remove,
1164*4882a593Smuzhiyun };
1165*4882a593Smuzhiyun module_i2c_driver(ov2680_i2c_driver);
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun MODULE_AUTHOR("Rui Miguel Silva <rui.silva@linaro.org>");
1168*4882a593Smuzhiyun MODULE_DESCRIPTION("OV2680 CMOS Image Sensor driver");
1169*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1170