1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for MT9M032 CMOS Image Sensor from Micron
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2010-2011 Lund Engineering
6*4882a593Smuzhiyun * Contact: Gil Lund <gwlund@lundeng.com>
7*4882a593Smuzhiyun * Author: Martin Hostettler <martin@neutronstar.dyndns.org>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/delay.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/math64.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/mutex.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <linux/v4l2-mediabus.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <media/media-entity.h>
21*4882a593Smuzhiyun #include <media/i2c/mt9m032.h>
22*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
23*4882a593Smuzhiyun #include <media/v4l2-device.h>
24*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include "aptina-pll.h"
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * width and height include active boundary and black parts
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun * column 0- 15 active boundary
32*4882a593Smuzhiyun * column 16-1455 image
33*4882a593Smuzhiyun * column 1456-1471 active boundary
34*4882a593Smuzhiyun * column 1472-1599 black
35*4882a593Smuzhiyun *
36*4882a593Smuzhiyun * row 0- 51 black
37*4882a593Smuzhiyun * row 53- 59 active boundary
38*4882a593Smuzhiyun * row 60-1139 image
39*4882a593Smuzhiyun * row 1140-1147 active boundary
40*4882a593Smuzhiyun * row 1148-1151 black
41*4882a593Smuzhiyun */
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun #define MT9M032_PIXEL_ARRAY_WIDTH 1600
44*4882a593Smuzhiyun #define MT9M032_PIXEL_ARRAY_HEIGHT 1152
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define MT9M032_CHIP_VERSION 0x00
47*4882a593Smuzhiyun #define MT9M032_CHIP_VERSION_VALUE 0x1402
48*4882a593Smuzhiyun #define MT9M032_ROW_START 0x01
49*4882a593Smuzhiyun #define MT9M032_ROW_START_MIN 0
50*4882a593Smuzhiyun #define MT9M032_ROW_START_MAX 1152
51*4882a593Smuzhiyun #define MT9M032_ROW_START_DEF 60
52*4882a593Smuzhiyun #define MT9M032_COLUMN_START 0x02
53*4882a593Smuzhiyun #define MT9M032_COLUMN_START_MIN 0
54*4882a593Smuzhiyun #define MT9M032_COLUMN_START_MAX 1600
55*4882a593Smuzhiyun #define MT9M032_COLUMN_START_DEF 16
56*4882a593Smuzhiyun #define MT9M032_ROW_SIZE 0x03
57*4882a593Smuzhiyun #define MT9M032_ROW_SIZE_MIN 32
58*4882a593Smuzhiyun #define MT9M032_ROW_SIZE_MAX 1152
59*4882a593Smuzhiyun #define MT9M032_ROW_SIZE_DEF 1080
60*4882a593Smuzhiyun #define MT9M032_COLUMN_SIZE 0x04
61*4882a593Smuzhiyun #define MT9M032_COLUMN_SIZE_MIN 32
62*4882a593Smuzhiyun #define MT9M032_COLUMN_SIZE_MAX 1600
63*4882a593Smuzhiyun #define MT9M032_COLUMN_SIZE_DEF 1440
64*4882a593Smuzhiyun #define MT9M032_HBLANK 0x05
65*4882a593Smuzhiyun #define MT9M032_VBLANK 0x06
66*4882a593Smuzhiyun #define MT9M032_VBLANK_MAX 0x7ff
67*4882a593Smuzhiyun #define MT9M032_SHUTTER_WIDTH_HIGH 0x08
68*4882a593Smuzhiyun #define MT9M032_SHUTTER_WIDTH_LOW 0x09
69*4882a593Smuzhiyun #define MT9M032_SHUTTER_WIDTH_MIN 1
70*4882a593Smuzhiyun #define MT9M032_SHUTTER_WIDTH_MAX 1048575
71*4882a593Smuzhiyun #define MT9M032_SHUTTER_WIDTH_DEF 1943
72*4882a593Smuzhiyun #define MT9M032_PIX_CLK_CTRL 0x0a
73*4882a593Smuzhiyun #define MT9M032_PIX_CLK_CTRL_INV_PIXCLK 0x8000
74*4882a593Smuzhiyun #define MT9M032_RESTART 0x0b
75*4882a593Smuzhiyun #define MT9M032_RESET 0x0d
76*4882a593Smuzhiyun #define MT9M032_PLL_CONFIG1 0x11
77*4882a593Smuzhiyun #define MT9M032_PLL_CONFIG1_PREDIV_MASK 0x3f
78*4882a593Smuzhiyun #define MT9M032_PLL_CONFIG1_MUL_SHIFT 8
79*4882a593Smuzhiyun #define MT9M032_READ_MODE1 0x1e
80*4882a593Smuzhiyun #define MT9M032_READ_MODE1_OUTPUT_BAD_FRAMES (1 << 13)
81*4882a593Smuzhiyun #define MT9M032_READ_MODE1_MAINTAIN_FRAME_RATE (1 << 12)
82*4882a593Smuzhiyun #define MT9M032_READ_MODE1_XOR_LINE_VALID (1 << 11)
83*4882a593Smuzhiyun #define MT9M032_READ_MODE1_CONT_LINE_VALID (1 << 10)
84*4882a593Smuzhiyun #define MT9M032_READ_MODE1_INVERT_TRIGGER (1 << 9)
85*4882a593Smuzhiyun #define MT9M032_READ_MODE1_SNAPSHOT (1 << 8)
86*4882a593Smuzhiyun #define MT9M032_READ_MODE1_GLOBAL_RESET (1 << 7)
87*4882a593Smuzhiyun #define MT9M032_READ_MODE1_BULB_EXPOSURE (1 << 6)
88*4882a593Smuzhiyun #define MT9M032_READ_MODE1_INVERT_STROBE (1 << 5)
89*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_ENABLE (1 << 4)
90*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_START_TRIG1 (0 << 2)
91*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_START_EXP (1 << 2)
92*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_START_SHUTTER (2 << 2)
93*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_START_TRIG2 (3 << 2)
94*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_END_TRIG1 (0 << 0)
95*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_END_EXP (1 << 0)
96*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_END_SHUTTER (2 << 0)
97*4882a593Smuzhiyun #define MT9M032_READ_MODE1_STROBE_END_TRIG2 (3 << 0)
98*4882a593Smuzhiyun #define MT9M032_READ_MODE2 0x20
99*4882a593Smuzhiyun #define MT9M032_READ_MODE2_VFLIP_SHIFT 15
100*4882a593Smuzhiyun #define MT9M032_READ_MODE2_HFLIP_SHIFT 14
101*4882a593Smuzhiyun #define MT9M032_READ_MODE2_ROW_BLC 0x40
102*4882a593Smuzhiyun #define MT9M032_GAIN_GREEN1 0x2b
103*4882a593Smuzhiyun #define MT9M032_GAIN_BLUE 0x2c
104*4882a593Smuzhiyun #define MT9M032_GAIN_RED 0x2d
105*4882a593Smuzhiyun #define MT9M032_GAIN_GREEN2 0x2e
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* write only */
108*4882a593Smuzhiyun #define MT9M032_GAIN_ALL 0x35
109*4882a593Smuzhiyun #define MT9M032_GAIN_DIGITAL_MASK 0x7f
110*4882a593Smuzhiyun #define MT9M032_GAIN_DIGITAL_SHIFT 8
111*4882a593Smuzhiyun #define MT9M032_GAIN_AMUL_SHIFT 6
112*4882a593Smuzhiyun #define MT9M032_GAIN_ANALOG_MASK 0x3f
113*4882a593Smuzhiyun #define MT9M032_FORMATTER1 0x9e
114*4882a593Smuzhiyun #define MT9M032_FORMATTER1_PLL_P1_6 (1 << 8)
115*4882a593Smuzhiyun #define MT9M032_FORMATTER1_PARALLEL (1 << 12)
116*4882a593Smuzhiyun #define MT9M032_FORMATTER2 0x9f
117*4882a593Smuzhiyun #define MT9M032_FORMATTER2_DOUT_EN 0x1000
118*4882a593Smuzhiyun #define MT9M032_FORMATTER2_PIXCLK_EN 0x2000
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /*
121*4882a593Smuzhiyun * The available MT9M032 datasheet is missing documentation for register 0x10
122*4882a593Smuzhiyun * MT9P031 seems to be close enough, so use constants from that datasheet for
123*4882a593Smuzhiyun * now.
124*4882a593Smuzhiyun * But keep the name MT9P031 to remind us, that this isn't really confirmed
125*4882a593Smuzhiyun * for this sensor.
126*4882a593Smuzhiyun */
127*4882a593Smuzhiyun #define MT9P031_PLL_CONTROL 0x10
128*4882a593Smuzhiyun #define MT9P031_PLL_CONTROL_PWROFF 0x0050
129*4882a593Smuzhiyun #define MT9P031_PLL_CONTROL_PWRON 0x0051
130*4882a593Smuzhiyun #define MT9P031_PLL_CONTROL_USEPLL 0x0052
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun struct mt9m032 {
133*4882a593Smuzhiyun struct v4l2_subdev subdev;
134*4882a593Smuzhiyun struct media_pad pad;
135*4882a593Smuzhiyun struct mt9m032_platform_data *pdata;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun unsigned int pix_clock;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrls;
140*4882a593Smuzhiyun struct {
141*4882a593Smuzhiyun struct v4l2_ctrl *hflip;
142*4882a593Smuzhiyun struct v4l2_ctrl *vflip;
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun struct mutex lock; /* Protects streaming, format, interval and crop */
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun bool streaming;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
150*4882a593Smuzhiyun struct v4l2_rect crop;
151*4882a593Smuzhiyun struct v4l2_fract frame_interval;
152*4882a593Smuzhiyun };
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun #define to_mt9m032(sd) container_of(sd, struct mt9m032, subdev)
155*4882a593Smuzhiyun #define to_dev(sensor) \
156*4882a593Smuzhiyun (&((struct i2c_client *)v4l2_get_subdevdata(&(sensor)->subdev))->dev)
157*4882a593Smuzhiyun
mt9m032_read(struct i2c_client * client,u8 reg)158*4882a593Smuzhiyun static int mt9m032_read(struct i2c_client *client, u8 reg)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun return i2c_smbus_read_word_swapped(client, reg);
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
mt9m032_write(struct i2c_client * client,u8 reg,const u16 data)163*4882a593Smuzhiyun static int mt9m032_write(struct i2c_client *client, u8 reg, const u16 data)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun return i2c_smbus_write_word_swapped(client, reg, data);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
mt9m032_row_time(struct mt9m032 * sensor,unsigned int width)168*4882a593Smuzhiyun static u32 mt9m032_row_time(struct mt9m032 *sensor, unsigned int width)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun unsigned int effective_width;
171*4882a593Smuzhiyun u32 ns;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun effective_width = width + 716; /* empirical value */
174*4882a593Smuzhiyun ns = div_u64(1000000000ULL * effective_width, sensor->pix_clock);
175*4882a593Smuzhiyun dev_dbg(to_dev(sensor), "MT9M032 line time: %u ns\n", ns);
176*4882a593Smuzhiyun return ns;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
mt9m032_update_timing(struct mt9m032 * sensor,struct v4l2_fract * interval)179*4882a593Smuzhiyun static int mt9m032_update_timing(struct mt9m032 *sensor,
180*4882a593Smuzhiyun struct v4l2_fract *interval)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
183*4882a593Smuzhiyun struct v4l2_rect *crop = &sensor->crop;
184*4882a593Smuzhiyun unsigned int min_vblank;
185*4882a593Smuzhiyun unsigned int vblank;
186*4882a593Smuzhiyun u32 row_time;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun if (!interval)
189*4882a593Smuzhiyun interval = &sensor->frame_interval;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun row_time = mt9m032_row_time(sensor, crop->width);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun vblank = div_u64(1000000000ULL * interval->numerator,
194*4882a593Smuzhiyun (u64)row_time * interval->denominator)
195*4882a593Smuzhiyun - crop->height;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun if (vblank > MT9M032_VBLANK_MAX) {
198*4882a593Smuzhiyun /* hardware limits to 11 bit values */
199*4882a593Smuzhiyun interval->denominator = 1000;
200*4882a593Smuzhiyun interval->numerator =
201*4882a593Smuzhiyun div_u64((crop->height + MT9M032_VBLANK_MAX) *
202*4882a593Smuzhiyun (u64)row_time * interval->denominator,
203*4882a593Smuzhiyun 1000000000ULL);
204*4882a593Smuzhiyun vblank = div_u64(1000000000ULL * interval->numerator,
205*4882a593Smuzhiyun (u64)row_time * interval->denominator)
206*4882a593Smuzhiyun - crop->height;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun /* enforce minimal 1.6ms blanking time. */
209*4882a593Smuzhiyun min_vblank = 1600000 / row_time;
210*4882a593Smuzhiyun vblank = clamp_t(unsigned int, vblank, min_vblank, MT9M032_VBLANK_MAX);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun return mt9m032_write(client, MT9M032_VBLANK, vblank);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
mt9m032_update_geom_timing(struct mt9m032 * sensor)215*4882a593Smuzhiyun static int mt9m032_update_geom_timing(struct mt9m032 *sensor)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
218*4882a593Smuzhiyun int ret;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_COLUMN_SIZE,
221*4882a593Smuzhiyun sensor->crop.width - 1);
222*4882a593Smuzhiyun if (!ret)
223*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_ROW_SIZE,
224*4882a593Smuzhiyun sensor->crop.height - 1);
225*4882a593Smuzhiyun if (!ret)
226*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_COLUMN_START,
227*4882a593Smuzhiyun sensor->crop.left);
228*4882a593Smuzhiyun if (!ret)
229*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_ROW_START,
230*4882a593Smuzhiyun sensor->crop.top);
231*4882a593Smuzhiyun if (!ret)
232*4882a593Smuzhiyun ret = mt9m032_update_timing(sensor, NULL);
233*4882a593Smuzhiyun return ret;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun
update_formatter2(struct mt9m032 * sensor,bool streaming)236*4882a593Smuzhiyun static int update_formatter2(struct mt9m032 *sensor, bool streaming)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
239*4882a593Smuzhiyun u16 reg_val = MT9M032_FORMATTER2_DOUT_EN
240*4882a593Smuzhiyun | 0x0070; /* parts reserved! */
241*4882a593Smuzhiyun /* possibly for changing to 14-bit mode */
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun if (streaming)
244*4882a593Smuzhiyun reg_val |= MT9M032_FORMATTER2_PIXCLK_EN; /* pixclock enable */
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun return mt9m032_write(client, MT9M032_FORMATTER2, reg_val);
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
mt9m032_setup_pll(struct mt9m032 * sensor)249*4882a593Smuzhiyun static int mt9m032_setup_pll(struct mt9m032 *sensor)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun static const struct aptina_pll_limits limits = {
252*4882a593Smuzhiyun .ext_clock_min = 8000000,
253*4882a593Smuzhiyun .ext_clock_max = 16500000,
254*4882a593Smuzhiyun .int_clock_min = 2000000,
255*4882a593Smuzhiyun .int_clock_max = 24000000,
256*4882a593Smuzhiyun .out_clock_min = 322000000,
257*4882a593Smuzhiyun .out_clock_max = 693000000,
258*4882a593Smuzhiyun .pix_clock_max = 99000000,
259*4882a593Smuzhiyun .n_min = 1,
260*4882a593Smuzhiyun .n_max = 64,
261*4882a593Smuzhiyun .m_min = 16,
262*4882a593Smuzhiyun .m_max = 255,
263*4882a593Smuzhiyun .p1_min = 6,
264*4882a593Smuzhiyun .p1_max = 7,
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
268*4882a593Smuzhiyun struct mt9m032_platform_data *pdata = sensor->pdata;
269*4882a593Smuzhiyun struct aptina_pll pll;
270*4882a593Smuzhiyun u16 reg_val;
271*4882a593Smuzhiyun int ret;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun pll.ext_clock = pdata->ext_clock;
274*4882a593Smuzhiyun pll.pix_clock = pdata->pix_clock;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun ret = aptina_pll_calculate(&client->dev, &limits, &pll);
277*4882a593Smuzhiyun if (ret < 0)
278*4882a593Smuzhiyun return ret;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun sensor->pix_clock = pdata->pix_clock;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_PLL_CONFIG1,
283*4882a593Smuzhiyun (pll.m << MT9M032_PLL_CONFIG1_MUL_SHIFT) |
284*4882a593Smuzhiyun ((pll.n - 1) & MT9M032_PLL_CONFIG1_PREDIV_MASK));
285*4882a593Smuzhiyun if (!ret)
286*4882a593Smuzhiyun ret = mt9m032_write(client, MT9P031_PLL_CONTROL,
287*4882a593Smuzhiyun MT9P031_PLL_CONTROL_PWRON |
288*4882a593Smuzhiyun MT9P031_PLL_CONTROL_USEPLL);
289*4882a593Smuzhiyun if (!ret) /* more reserved, Continuous, Master Mode */
290*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_READ_MODE1, 0x8000 |
291*4882a593Smuzhiyun MT9M032_READ_MODE1_STROBE_START_EXP |
292*4882a593Smuzhiyun MT9M032_READ_MODE1_STROBE_END_SHUTTER);
293*4882a593Smuzhiyun if (!ret) {
294*4882a593Smuzhiyun reg_val = (pll.p1 == 6 ? MT9M032_FORMATTER1_PLL_P1_6 : 0)
295*4882a593Smuzhiyun | MT9M032_FORMATTER1_PARALLEL | 0x001e; /* 14-bit */
296*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_FORMATTER1, reg_val);
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun return ret;
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
303*4882a593Smuzhiyun * Subdev pad operations
304*4882a593Smuzhiyun */
305*4882a593Smuzhiyun
mt9m032_enum_mbus_code(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)306*4882a593Smuzhiyun static int mt9m032_enum_mbus_code(struct v4l2_subdev *subdev,
307*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
308*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun if (code->index != 0)
311*4882a593Smuzhiyun return -EINVAL;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun code->code = MEDIA_BUS_FMT_Y8_1X8;
314*4882a593Smuzhiyun return 0;
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
mt9m032_enum_frame_size(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)317*4882a593Smuzhiyun static int mt9m032_enum_frame_size(struct v4l2_subdev *subdev,
318*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
319*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun if (fse->index != 0 || fse->code != MEDIA_BUS_FMT_Y8_1X8)
322*4882a593Smuzhiyun return -EINVAL;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun fse->min_width = MT9M032_COLUMN_SIZE_DEF;
325*4882a593Smuzhiyun fse->max_width = MT9M032_COLUMN_SIZE_DEF;
326*4882a593Smuzhiyun fse->min_height = MT9M032_ROW_SIZE_DEF;
327*4882a593Smuzhiyun fse->max_height = MT9M032_ROW_SIZE_DEF;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun return 0;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun /**
333*4882a593Smuzhiyun * __mt9m032_get_pad_crop() - get crop rect
334*4882a593Smuzhiyun * @sensor: pointer to the sensor struct
335*4882a593Smuzhiyun * @cfg: v4l2_subdev_pad_config for getting the try crop rect from
336*4882a593Smuzhiyun * @which: select try or active crop rect
337*4882a593Smuzhiyun *
338*4882a593Smuzhiyun * Returns a pointer the current active or fh relative try crop rect
339*4882a593Smuzhiyun */
340*4882a593Smuzhiyun static struct v4l2_rect *
__mt9m032_get_pad_crop(struct mt9m032 * sensor,struct v4l2_subdev_pad_config * cfg,enum v4l2_subdev_format_whence which)341*4882a593Smuzhiyun __mt9m032_get_pad_crop(struct mt9m032 *sensor, struct v4l2_subdev_pad_config *cfg,
342*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun switch (which) {
345*4882a593Smuzhiyun case V4L2_SUBDEV_FORMAT_TRY:
346*4882a593Smuzhiyun return v4l2_subdev_get_try_crop(&sensor->subdev, cfg, 0);
347*4882a593Smuzhiyun case V4L2_SUBDEV_FORMAT_ACTIVE:
348*4882a593Smuzhiyun return &sensor->crop;
349*4882a593Smuzhiyun default:
350*4882a593Smuzhiyun return NULL;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /**
355*4882a593Smuzhiyun * __mt9m032_get_pad_format() - get format
356*4882a593Smuzhiyun * @sensor: pointer to the sensor struct
357*4882a593Smuzhiyun * @cfg: v4l2_subdev_pad_config for getting the try format from
358*4882a593Smuzhiyun * @which: select try or active format
359*4882a593Smuzhiyun *
360*4882a593Smuzhiyun * Returns a pointer the current active or fh relative try format
361*4882a593Smuzhiyun */
362*4882a593Smuzhiyun static struct v4l2_mbus_framefmt *
__mt9m032_get_pad_format(struct mt9m032 * sensor,struct v4l2_subdev_pad_config * cfg,enum v4l2_subdev_format_whence which)363*4882a593Smuzhiyun __mt9m032_get_pad_format(struct mt9m032 *sensor, struct v4l2_subdev_pad_config *cfg,
364*4882a593Smuzhiyun enum v4l2_subdev_format_whence which)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun switch (which) {
367*4882a593Smuzhiyun case V4L2_SUBDEV_FORMAT_TRY:
368*4882a593Smuzhiyun return v4l2_subdev_get_try_format(&sensor->subdev, cfg, 0);
369*4882a593Smuzhiyun case V4L2_SUBDEV_FORMAT_ACTIVE:
370*4882a593Smuzhiyun return &sensor->format;
371*4882a593Smuzhiyun default:
372*4882a593Smuzhiyun return NULL;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun
mt9m032_get_pad_format(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)376*4882a593Smuzhiyun static int mt9m032_get_pad_format(struct v4l2_subdev *subdev,
377*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
378*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun mutex_lock(&sensor->lock);
383*4882a593Smuzhiyun fmt->format = *__mt9m032_get_pad_format(sensor, cfg, fmt->which);
384*4882a593Smuzhiyun mutex_unlock(&sensor->lock);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun return 0;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
mt9m032_set_pad_format(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)389*4882a593Smuzhiyun static int mt9m032_set_pad_format(struct v4l2_subdev *subdev,
390*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
391*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
394*4882a593Smuzhiyun int ret;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun mutex_lock(&sensor->lock);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun if (sensor->streaming && fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
399*4882a593Smuzhiyun ret = -EBUSY;
400*4882a593Smuzhiyun goto done;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun /* Scaling is not supported, the format is thus fixed. */
404*4882a593Smuzhiyun fmt->format = *__mt9m032_get_pad_format(sensor, cfg, fmt->which);
405*4882a593Smuzhiyun ret = 0;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun done:
408*4882a593Smuzhiyun mutex_unlock(&sensor->lock);
409*4882a593Smuzhiyun return ret;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
mt9m032_get_pad_selection(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)412*4882a593Smuzhiyun static int mt9m032_get_pad_selection(struct v4l2_subdev *subdev,
413*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
414*4882a593Smuzhiyun struct v4l2_subdev_selection *sel)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun if (sel->target != V4L2_SEL_TGT_CROP)
419*4882a593Smuzhiyun return -EINVAL;
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun mutex_lock(&sensor->lock);
422*4882a593Smuzhiyun sel->r = *__mt9m032_get_pad_crop(sensor, cfg, sel->which);
423*4882a593Smuzhiyun mutex_unlock(&sensor->lock);
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun return 0;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
mt9m032_set_pad_selection(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)428*4882a593Smuzhiyun static int mt9m032_set_pad_selection(struct v4l2_subdev *subdev,
429*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
430*4882a593Smuzhiyun struct v4l2_subdev_selection *sel)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
433*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
434*4882a593Smuzhiyun struct v4l2_rect *__crop;
435*4882a593Smuzhiyun struct v4l2_rect rect;
436*4882a593Smuzhiyun int ret = 0;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun if (sel->target != V4L2_SEL_TGT_CROP)
439*4882a593Smuzhiyun return -EINVAL;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun mutex_lock(&sensor->lock);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun if (sensor->streaming && sel->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
444*4882a593Smuzhiyun ret = -EBUSY;
445*4882a593Smuzhiyun goto done;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun /* Clamp the crop rectangle boundaries and align them to a multiple of 2
449*4882a593Smuzhiyun * pixels to ensure a GRBG Bayer pattern.
450*4882a593Smuzhiyun */
451*4882a593Smuzhiyun rect.left = clamp(ALIGN(sel->r.left, 2), MT9M032_COLUMN_START_MIN,
452*4882a593Smuzhiyun MT9M032_COLUMN_START_MAX);
453*4882a593Smuzhiyun rect.top = clamp(ALIGN(sel->r.top, 2), MT9M032_ROW_START_MIN,
454*4882a593Smuzhiyun MT9M032_ROW_START_MAX);
455*4882a593Smuzhiyun rect.width = clamp_t(unsigned int, ALIGN(sel->r.width, 2),
456*4882a593Smuzhiyun MT9M032_COLUMN_SIZE_MIN, MT9M032_COLUMN_SIZE_MAX);
457*4882a593Smuzhiyun rect.height = clamp_t(unsigned int, ALIGN(sel->r.height, 2),
458*4882a593Smuzhiyun MT9M032_ROW_SIZE_MIN, MT9M032_ROW_SIZE_MAX);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun rect.width = min_t(unsigned int, rect.width,
461*4882a593Smuzhiyun MT9M032_PIXEL_ARRAY_WIDTH - rect.left);
462*4882a593Smuzhiyun rect.height = min_t(unsigned int, rect.height,
463*4882a593Smuzhiyun MT9M032_PIXEL_ARRAY_HEIGHT - rect.top);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun __crop = __mt9m032_get_pad_crop(sensor, cfg, sel->which);
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun if (rect.width != __crop->width || rect.height != __crop->height) {
468*4882a593Smuzhiyun /* Reset the output image size if the crop rectangle size has
469*4882a593Smuzhiyun * been modified.
470*4882a593Smuzhiyun */
471*4882a593Smuzhiyun format = __mt9m032_get_pad_format(sensor, cfg, sel->which);
472*4882a593Smuzhiyun format->width = rect.width;
473*4882a593Smuzhiyun format->height = rect.height;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun *__crop = rect;
477*4882a593Smuzhiyun sel->r = rect;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE)
480*4882a593Smuzhiyun ret = mt9m032_update_geom_timing(sensor);
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun done:
483*4882a593Smuzhiyun mutex_unlock(&sensor->lock);
484*4882a593Smuzhiyun return ret;
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun
mt9m032_get_frame_interval(struct v4l2_subdev * subdev,struct v4l2_subdev_frame_interval * fi)487*4882a593Smuzhiyun static int mt9m032_get_frame_interval(struct v4l2_subdev *subdev,
488*4882a593Smuzhiyun struct v4l2_subdev_frame_interval *fi)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun mutex_lock(&sensor->lock);
493*4882a593Smuzhiyun memset(fi, 0, sizeof(*fi));
494*4882a593Smuzhiyun fi->interval = sensor->frame_interval;
495*4882a593Smuzhiyun mutex_unlock(&sensor->lock);
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun return 0;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
mt9m032_set_frame_interval(struct v4l2_subdev * subdev,struct v4l2_subdev_frame_interval * fi)500*4882a593Smuzhiyun static int mt9m032_set_frame_interval(struct v4l2_subdev *subdev,
501*4882a593Smuzhiyun struct v4l2_subdev_frame_interval *fi)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
504*4882a593Smuzhiyun int ret;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun mutex_lock(&sensor->lock);
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun if (sensor->streaming) {
509*4882a593Smuzhiyun ret = -EBUSY;
510*4882a593Smuzhiyun goto done;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun /* Avoid divisions by 0. */
514*4882a593Smuzhiyun if (fi->interval.denominator == 0)
515*4882a593Smuzhiyun fi->interval.denominator = 1;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun ret = mt9m032_update_timing(sensor, &fi->interval);
518*4882a593Smuzhiyun if (!ret)
519*4882a593Smuzhiyun sensor->frame_interval = fi->interval;
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun done:
522*4882a593Smuzhiyun mutex_unlock(&sensor->lock);
523*4882a593Smuzhiyun return ret;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
mt9m032_s_stream(struct v4l2_subdev * subdev,int streaming)526*4882a593Smuzhiyun static int mt9m032_s_stream(struct v4l2_subdev *subdev, int streaming)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
529*4882a593Smuzhiyun int ret;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun mutex_lock(&sensor->lock);
532*4882a593Smuzhiyun ret = update_formatter2(sensor, streaming);
533*4882a593Smuzhiyun if (!ret)
534*4882a593Smuzhiyun sensor->streaming = streaming;
535*4882a593Smuzhiyun mutex_unlock(&sensor->lock);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun return ret;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
541*4882a593Smuzhiyun * V4L2 subdev core operations
542*4882a593Smuzhiyun */
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_ADV_DEBUG
mt9m032_g_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)545*4882a593Smuzhiyun static int mt9m032_g_register(struct v4l2_subdev *sd,
546*4882a593Smuzhiyun struct v4l2_dbg_register *reg)
547*4882a593Smuzhiyun {
548*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(sd);
549*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
550*4882a593Smuzhiyun int val;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun if (reg->reg > 0xff)
553*4882a593Smuzhiyun return -EINVAL;
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun val = mt9m032_read(client, reg->reg);
556*4882a593Smuzhiyun if (val < 0)
557*4882a593Smuzhiyun return -EIO;
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun reg->size = 2;
560*4882a593Smuzhiyun reg->val = val;
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun return 0;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
mt9m032_s_register(struct v4l2_subdev * sd,const struct v4l2_dbg_register * reg)565*4882a593Smuzhiyun static int mt9m032_s_register(struct v4l2_subdev *sd,
566*4882a593Smuzhiyun const struct v4l2_dbg_register *reg)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(sd);
569*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun if (reg->reg > 0xff)
572*4882a593Smuzhiyun return -EINVAL;
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun return mt9m032_write(client, reg->reg, reg->val);
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun #endif
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
579*4882a593Smuzhiyun * V4L2 subdev control operations
580*4882a593Smuzhiyun */
581*4882a593Smuzhiyun
update_read_mode2(struct mt9m032 * sensor,bool vflip,bool hflip)582*4882a593Smuzhiyun static int update_read_mode2(struct mt9m032 *sensor, bool vflip, bool hflip)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
585*4882a593Smuzhiyun int reg_val = (vflip << MT9M032_READ_MODE2_VFLIP_SHIFT)
586*4882a593Smuzhiyun | (hflip << MT9M032_READ_MODE2_HFLIP_SHIFT)
587*4882a593Smuzhiyun | MT9M032_READ_MODE2_ROW_BLC
588*4882a593Smuzhiyun | 0x0007;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun return mt9m032_write(client, MT9M032_READ_MODE2, reg_val);
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
mt9m032_set_gain(struct mt9m032 * sensor,s32 val)593*4882a593Smuzhiyun static int mt9m032_set_gain(struct mt9m032 *sensor, s32 val)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
596*4882a593Smuzhiyun int digital_gain_val; /* in 1/8th (0..127) */
597*4882a593Smuzhiyun int analog_mul; /* 0 or 1 */
598*4882a593Smuzhiyun int analog_gain_val; /* in 1/16th. (0..63) */
599*4882a593Smuzhiyun u16 reg_val;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun digital_gain_val = 51; /* from setup example */
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun if (val < 63) {
604*4882a593Smuzhiyun analog_mul = 0;
605*4882a593Smuzhiyun analog_gain_val = val;
606*4882a593Smuzhiyun } else {
607*4882a593Smuzhiyun analog_mul = 1;
608*4882a593Smuzhiyun analog_gain_val = val / 2;
609*4882a593Smuzhiyun }
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun /* a_gain = (1 + analog_mul) + (analog_gain_val + 1) / 16 */
612*4882a593Smuzhiyun /* overall_gain = a_gain * (1 + digital_gain_val / 8) */
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun reg_val = ((digital_gain_val & MT9M032_GAIN_DIGITAL_MASK)
615*4882a593Smuzhiyun << MT9M032_GAIN_DIGITAL_SHIFT)
616*4882a593Smuzhiyun | ((analog_mul & 1) << MT9M032_GAIN_AMUL_SHIFT)
617*4882a593Smuzhiyun | (analog_gain_val & MT9M032_GAIN_ANALOG_MASK);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun return mt9m032_write(client, MT9M032_GAIN_ALL, reg_val);
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
mt9m032_try_ctrl(struct v4l2_ctrl * ctrl)622*4882a593Smuzhiyun static int mt9m032_try_ctrl(struct v4l2_ctrl *ctrl)
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun if (ctrl->id == V4L2_CID_GAIN && ctrl->val >= 63) {
625*4882a593Smuzhiyun /* round because of multiplier used for values >= 63 */
626*4882a593Smuzhiyun ctrl->val &= ~1;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun return 0;
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
mt9m032_set_ctrl(struct v4l2_ctrl * ctrl)632*4882a593Smuzhiyun static int mt9m032_set_ctrl(struct v4l2_ctrl *ctrl)
633*4882a593Smuzhiyun {
634*4882a593Smuzhiyun struct mt9m032 *sensor =
635*4882a593Smuzhiyun container_of(ctrl->handler, struct mt9m032, ctrls);
636*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
637*4882a593Smuzhiyun int ret;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun switch (ctrl->id) {
640*4882a593Smuzhiyun case V4L2_CID_GAIN:
641*4882a593Smuzhiyun return mt9m032_set_gain(sensor, ctrl->val);
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun case V4L2_CID_HFLIP:
644*4882a593Smuzhiyun /* case V4L2_CID_VFLIP: -- In the same cluster */
645*4882a593Smuzhiyun return update_read_mode2(sensor, sensor->vflip->val,
646*4882a593Smuzhiyun sensor->hflip->val);
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun case V4L2_CID_EXPOSURE:
649*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_SHUTTER_WIDTH_HIGH,
650*4882a593Smuzhiyun (ctrl->val >> 16) & 0xffff);
651*4882a593Smuzhiyun if (ret < 0)
652*4882a593Smuzhiyun return ret;
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun return mt9m032_write(client, MT9M032_SHUTTER_WIDTH_LOW,
655*4882a593Smuzhiyun ctrl->val & 0xffff);
656*4882a593Smuzhiyun }
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun return 0;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun static const struct v4l2_ctrl_ops mt9m032_ctrl_ops = {
662*4882a593Smuzhiyun .s_ctrl = mt9m032_set_ctrl,
663*4882a593Smuzhiyun .try_ctrl = mt9m032_try_ctrl,
664*4882a593Smuzhiyun };
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun /* -------------------------------------------------------------------------- */
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops mt9m032_core_ops = {
669*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_ADV_DEBUG
670*4882a593Smuzhiyun .g_register = mt9m032_g_register,
671*4882a593Smuzhiyun .s_register = mt9m032_s_register,
672*4882a593Smuzhiyun #endif
673*4882a593Smuzhiyun };
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops mt9m032_video_ops = {
676*4882a593Smuzhiyun .s_stream = mt9m032_s_stream,
677*4882a593Smuzhiyun .g_frame_interval = mt9m032_get_frame_interval,
678*4882a593Smuzhiyun .s_frame_interval = mt9m032_set_frame_interval,
679*4882a593Smuzhiyun };
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops mt9m032_pad_ops = {
682*4882a593Smuzhiyun .enum_mbus_code = mt9m032_enum_mbus_code,
683*4882a593Smuzhiyun .enum_frame_size = mt9m032_enum_frame_size,
684*4882a593Smuzhiyun .get_fmt = mt9m032_get_pad_format,
685*4882a593Smuzhiyun .set_fmt = mt9m032_set_pad_format,
686*4882a593Smuzhiyun .set_selection = mt9m032_set_pad_selection,
687*4882a593Smuzhiyun .get_selection = mt9m032_get_pad_selection,
688*4882a593Smuzhiyun };
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun static const struct v4l2_subdev_ops mt9m032_ops = {
691*4882a593Smuzhiyun .core = &mt9m032_core_ops,
692*4882a593Smuzhiyun .video = &mt9m032_video_ops,
693*4882a593Smuzhiyun .pad = &mt9m032_pad_ops,
694*4882a593Smuzhiyun };
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
697*4882a593Smuzhiyun * Driver initialization and probing
698*4882a593Smuzhiyun */
699*4882a593Smuzhiyun
mt9m032_probe(struct i2c_client * client,const struct i2c_device_id * devid)700*4882a593Smuzhiyun static int mt9m032_probe(struct i2c_client *client,
701*4882a593Smuzhiyun const struct i2c_device_id *devid)
702*4882a593Smuzhiyun {
703*4882a593Smuzhiyun struct mt9m032_platform_data *pdata = client->dev.platform_data;
704*4882a593Smuzhiyun struct i2c_adapter *adapter = client->adapter;
705*4882a593Smuzhiyun struct mt9m032 *sensor;
706*4882a593Smuzhiyun int chip_version;
707*4882a593Smuzhiyun int ret;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun if (pdata == NULL) {
710*4882a593Smuzhiyun dev_err(&client->dev, "No platform data\n");
711*4882a593Smuzhiyun return -EINVAL;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
715*4882a593Smuzhiyun dev_warn(&client->dev,
716*4882a593Smuzhiyun "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
717*4882a593Smuzhiyun return -EIO;
718*4882a593Smuzhiyun }
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun if (!client->dev.platform_data)
721*4882a593Smuzhiyun return -ENODEV;
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL);
724*4882a593Smuzhiyun if (sensor == NULL)
725*4882a593Smuzhiyun return -ENOMEM;
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun mutex_init(&sensor->lock);
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun sensor->pdata = pdata;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun v4l2_i2c_subdev_init(&sensor->subdev, client, &mt9m032_ops);
732*4882a593Smuzhiyun sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun chip_version = mt9m032_read(client, MT9M032_CHIP_VERSION);
735*4882a593Smuzhiyun if (chip_version != MT9M032_CHIP_VERSION_VALUE) {
736*4882a593Smuzhiyun dev_err(&client->dev, "MT9M032 not detected, wrong version "
737*4882a593Smuzhiyun "0x%04x\n", chip_version);
738*4882a593Smuzhiyun ret = -ENODEV;
739*4882a593Smuzhiyun goto error_sensor;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun dev_info(&client->dev, "MT9M032 detected at address 0x%02x\n",
743*4882a593Smuzhiyun client->addr);
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun sensor->frame_interval.numerator = 1;
746*4882a593Smuzhiyun sensor->frame_interval.denominator = 30;
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun sensor->crop.left = MT9M032_COLUMN_START_DEF;
749*4882a593Smuzhiyun sensor->crop.top = MT9M032_ROW_START_DEF;
750*4882a593Smuzhiyun sensor->crop.width = MT9M032_COLUMN_SIZE_DEF;
751*4882a593Smuzhiyun sensor->crop.height = MT9M032_ROW_SIZE_DEF;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun sensor->format.width = sensor->crop.width;
754*4882a593Smuzhiyun sensor->format.height = sensor->crop.height;
755*4882a593Smuzhiyun sensor->format.code = MEDIA_BUS_FMT_Y8_1X8;
756*4882a593Smuzhiyun sensor->format.field = V4L2_FIELD_NONE;
757*4882a593Smuzhiyun sensor->format.colorspace = V4L2_COLORSPACE_SRGB;
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun v4l2_ctrl_handler_init(&sensor->ctrls, 5);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun v4l2_ctrl_new_std(&sensor->ctrls, &mt9m032_ctrl_ops,
762*4882a593Smuzhiyun V4L2_CID_GAIN, 0, 127, 1, 64);
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun sensor->hflip = v4l2_ctrl_new_std(&sensor->ctrls,
765*4882a593Smuzhiyun &mt9m032_ctrl_ops,
766*4882a593Smuzhiyun V4L2_CID_HFLIP, 0, 1, 1, 0);
767*4882a593Smuzhiyun sensor->vflip = v4l2_ctrl_new_std(&sensor->ctrls,
768*4882a593Smuzhiyun &mt9m032_ctrl_ops,
769*4882a593Smuzhiyun V4L2_CID_VFLIP, 0, 1, 1, 0);
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun v4l2_ctrl_new_std(&sensor->ctrls, &mt9m032_ctrl_ops,
772*4882a593Smuzhiyun V4L2_CID_EXPOSURE, MT9M032_SHUTTER_WIDTH_MIN,
773*4882a593Smuzhiyun MT9M032_SHUTTER_WIDTH_MAX, 1,
774*4882a593Smuzhiyun MT9M032_SHUTTER_WIDTH_DEF);
775*4882a593Smuzhiyun v4l2_ctrl_new_std(&sensor->ctrls, &mt9m032_ctrl_ops,
776*4882a593Smuzhiyun V4L2_CID_PIXEL_RATE, pdata->pix_clock,
777*4882a593Smuzhiyun pdata->pix_clock, 1, pdata->pix_clock);
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun if (sensor->ctrls.error) {
780*4882a593Smuzhiyun ret = sensor->ctrls.error;
781*4882a593Smuzhiyun dev_err(&client->dev, "control initialization error %d\n", ret);
782*4882a593Smuzhiyun goto error_ctrl;
783*4882a593Smuzhiyun }
784*4882a593Smuzhiyun
785*4882a593Smuzhiyun v4l2_ctrl_cluster(2, &sensor->hflip);
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun sensor->subdev.ctrl_handler = &sensor->ctrls;
788*4882a593Smuzhiyun sensor->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
789*4882a593Smuzhiyun sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
790*4882a593Smuzhiyun ret = media_entity_pads_init(&sensor->subdev.entity, 1, &sensor->pad);
791*4882a593Smuzhiyun if (ret < 0)
792*4882a593Smuzhiyun goto error_ctrl;
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_RESET, 1); /* reset on */
795*4882a593Smuzhiyun if (ret < 0)
796*4882a593Smuzhiyun goto error_entity;
797*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_RESET, 0); /* reset off */
798*4882a593Smuzhiyun if (ret < 0)
799*4882a593Smuzhiyun goto error_entity;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun ret = mt9m032_setup_pll(sensor);
802*4882a593Smuzhiyun if (ret < 0)
803*4882a593Smuzhiyun goto error_entity;
804*4882a593Smuzhiyun usleep_range(10000, 11000);
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun ret = v4l2_ctrl_handler_setup(&sensor->ctrls);
807*4882a593Smuzhiyun if (ret < 0)
808*4882a593Smuzhiyun goto error_entity;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun /* SIZE */
811*4882a593Smuzhiyun ret = mt9m032_update_geom_timing(sensor);
812*4882a593Smuzhiyun if (ret < 0)
813*4882a593Smuzhiyun goto error_entity;
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun ret = mt9m032_write(client, 0x41, 0x0000); /* reserved !!! */
816*4882a593Smuzhiyun if (ret < 0)
817*4882a593Smuzhiyun goto error_entity;
818*4882a593Smuzhiyun ret = mt9m032_write(client, 0x42, 0x0003); /* reserved !!! */
819*4882a593Smuzhiyun if (ret < 0)
820*4882a593Smuzhiyun goto error_entity;
821*4882a593Smuzhiyun ret = mt9m032_write(client, 0x43, 0x0003); /* reserved !!! */
822*4882a593Smuzhiyun if (ret < 0)
823*4882a593Smuzhiyun goto error_entity;
824*4882a593Smuzhiyun ret = mt9m032_write(client, 0x7f, 0x0000); /* reserved !!! */
825*4882a593Smuzhiyun if (ret < 0)
826*4882a593Smuzhiyun goto error_entity;
827*4882a593Smuzhiyun if (sensor->pdata->invert_pixclock) {
828*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_PIX_CLK_CTRL,
829*4882a593Smuzhiyun MT9M032_PIX_CLK_CTRL_INV_PIXCLK);
830*4882a593Smuzhiyun if (ret < 0)
831*4882a593Smuzhiyun goto error_entity;
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_RESTART, 1); /* Restart on */
835*4882a593Smuzhiyun if (ret < 0)
836*4882a593Smuzhiyun goto error_entity;
837*4882a593Smuzhiyun msleep(100);
838*4882a593Smuzhiyun ret = mt9m032_write(client, MT9M032_RESTART, 0); /* Restart off */
839*4882a593Smuzhiyun if (ret < 0)
840*4882a593Smuzhiyun goto error_entity;
841*4882a593Smuzhiyun msleep(100);
842*4882a593Smuzhiyun ret = update_formatter2(sensor, false);
843*4882a593Smuzhiyun if (ret < 0)
844*4882a593Smuzhiyun goto error_entity;
845*4882a593Smuzhiyun
846*4882a593Smuzhiyun return ret;
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun error_entity:
849*4882a593Smuzhiyun media_entity_cleanup(&sensor->subdev.entity);
850*4882a593Smuzhiyun error_ctrl:
851*4882a593Smuzhiyun v4l2_ctrl_handler_free(&sensor->ctrls);
852*4882a593Smuzhiyun error_sensor:
853*4882a593Smuzhiyun mutex_destroy(&sensor->lock);
854*4882a593Smuzhiyun return ret;
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun
mt9m032_remove(struct i2c_client * client)857*4882a593Smuzhiyun static int mt9m032_remove(struct i2c_client *client)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun struct v4l2_subdev *subdev = i2c_get_clientdata(client);
860*4882a593Smuzhiyun struct mt9m032 *sensor = to_mt9m032(subdev);
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun v4l2_device_unregister_subdev(subdev);
863*4882a593Smuzhiyun v4l2_ctrl_handler_free(&sensor->ctrls);
864*4882a593Smuzhiyun media_entity_cleanup(&subdev->entity);
865*4882a593Smuzhiyun mutex_destroy(&sensor->lock);
866*4882a593Smuzhiyun return 0;
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun static const struct i2c_device_id mt9m032_id_table[] = {
870*4882a593Smuzhiyun { MT9M032_NAME, 0 },
871*4882a593Smuzhiyun { }
872*4882a593Smuzhiyun };
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, mt9m032_id_table);
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun static struct i2c_driver mt9m032_i2c_driver = {
877*4882a593Smuzhiyun .driver = {
878*4882a593Smuzhiyun .name = MT9M032_NAME,
879*4882a593Smuzhiyun },
880*4882a593Smuzhiyun .probe = mt9m032_probe,
881*4882a593Smuzhiyun .remove = mt9m032_remove,
882*4882a593Smuzhiyun .id_table = mt9m032_id_table,
883*4882a593Smuzhiyun };
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun module_i2c_driver(mt9m032_i2c_driver);
886*4882a593Smuzhiyun
887*4882a593Smuzhiyun MODULE_AUTHOR("Martin Hostettler <martin@neutronstar.dyndns.org>");
888*4882a593Smuzhiyun MODULE_DESCRIPTION("MT9M032 camera sensor driver");
889*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
890