xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/max9271.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2017-2020 Jacopo Mondi
4*4882a593Smuzhiyun  * Copyright (C) 2017-2020 Kieran Bingham
5*4882a593Smuzhiyun  * Copyright (C) 2017-2020 Laurent Pinchart
6*4882a593Smuzhiyun  * Copyright (C) 2017-2020 Niklas Söderlund
7*4882a593Smuzhiyun  * Copyright (C) 2016 Renesas Electronics Corporation
8*4882a593Smuzhiyun  * Copyright (C) 2015 Cogent Embedded, Inc.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define MAX9271_DEFAULT_ADDR	0x40
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /* Register 0x02 */
16*4882a593Smuzhiyun #define MAX9271_SPREAD_SPECT_0		(0 << 5)
17*4882a593Smuzhiyun #define MAX9271_SPREAD_SPECT_05		(1 << 5)
18*4882a593Smuzhiyun #define MAX9271_SPREAD_SPECT_15		(2 << 5)
19*4882a593Smuzhiyun #define MAX9271_SPREAD_SPECT_1		(5 << 5)
20*4882a593Smuzhiyun #define MAX9271_SPREAD_SPECT_2		(3 << 5)
21*4882a593Smuzhiyun #define MAX9271_SPREAD_SPECT_3		(6 << 5)
22*4882a593Smuzhiyun #define MAX9271_SPREAD_SPECT_4		(7 << 5)
23*4882a593Smuzhiyun #define MAX9271_R02_RES			BIT(4)
24*4882a593Smuzhiyun #define MAX9271_PCLK_AUTODETECT		(3 << 2)
25*4882a593Smuzhiyun #define MAX9271_SERIAL_AUTODETECT	(0x03)
26*4882a593Smuzhiyun /* Register 0x04 */
27*4882a593Smuzhiyun #define MAX9271_SEREN			BIT(7)
28*4882a593Smuzhiyun #define MAX9271_CLINKEN			BIT(6)
29*4882a593Smuzhiyun #define MAX9271_PRBSEN			BIT(5)
30*4882a593Smuzhiyun #define MAX9271_SLEEP			BIT(4)
31*4882a593Smuzhiyun #define MAX9271_INTTYPE_I2C		(0 << 2)
32*4882a593Smuzhiyun #define MAX9271_INTTYPE_UART		(1 << 2)
33*4882a593Smuzhiyun #define MAX9271_INTTYPE_NONE		(2 << 2)
34*4882a593Smuzhiyun #define MAX9271_REVCCEN			BIT(1)
35*4882a593Smuzhiyun #define MAX9271_FWDCCEN			BIT(0)
36*4882a593Smuzhiyun /* Register 0x07 */
37*4882a593Smuzhiyun #define MAX9271_DBL			BIT(7)
38*4882a593Smuzhiyun #define MAX9271_DRS			BIT(6)
39*4882a593Smuzhiyun #define MAX9271_BWS			BIT(5)
40*4882a593Smuzhiyun #define MAX9271_ES			BIT(4)
41*4882a593Smuzhiyun #define MAX9271_HVEN			BIT(2)
42*4882a593Smuzhiyun #define MAX9271_EDC_1BIT_PARITY		(0 << 0)
43*4882a593Smuzhiyun #define MAX9271_EDC_6BIT_CRC		(1 << 0)
44*4882a593Smuzhiyun #define MAX9271_EDC_6BIT_HAMMING	(2 << 0)
45*4882a593Smuzhiyun /* Register 0x08 */
46*4882a593Smuzhiyun #define MAX9271_INVVS			BIT(7)
47*4882a593Smuzhiyun #define MAX9271_INVHS			BIT(6)
48*4882a593Smuzhiyun #define MAX9271_REV_LOGAIN		BIT(3)
49*4882a593Smuzhiyun #define MAX9271_REV_HIVTH		BIT(0)
50*4882a593Smuzhiyun /* Register 0x09 */
51*4882a593Smuzhiyun #define MAX9271_ID			0x09
52*4882a593Smuzhiyun /* Register 0x0d */
53*4882a593Smuzhiyun #define MAX9271_I2CLOCACK		BIT(7)
54*4882a593Smuzhiyun #define MAX9271_I2CSLVSH_1046NS_469NS	(3 << 5)
55*4882a593Smuzhiyun #define MAX9271_I2CSLVSH_938NS_352NS	(2 << 5)
56*4882a593Smuzhiyun #define MAX9271_I2CSLVSH_469NS_234NS	(1 << 5)
57*4882a593Smuzhiyun #define MAX9271_I2CSLVSH_352NS_117NS	(0 << 5)
58*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_837KBPS	(7 << 2)
59*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_533KBPS	(6 << 2)
60*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_339KBPS	(5 << 2)
61*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_173KBPS	(4 << 2)
62*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_105KBPS	(3 << 2)
63*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_84KBPS		(2 << 2)
64*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_28KBPS		(1 << 2)
65*4882a593Smuzhiyun #define MAX9271_I2CMSTBT_8KBPS		(0 << 2)
66*4882a593Smuzhiyun #define MAX9271_I2CSLVTO_NONE		(3 << 0)
67*4882a593Smuzhiyun #define MAX9271_I2CSLVTO_1024US		(2 << 0)
68*4882a593Smuzhiyun #define MAX9271_I2CSLVTO_256US		(1 << 0)
69*4882a593Smuzhiyun #define MAX9271_I2CSLVTO_64US		(0 << 0)
70*4882a593Smuzhiyun /* Register 0x0f */
71*4882a593Smuzhiyun #define MAX9271_GPIO5OUT		BIT(5)
72*4882a593Smuzhiyun #define MAX9271_GPIO4OUT		BIT(4)
73*4882a593Smuzhiyun #define MAX9271_GPIO3OUT		BIT(3)
74*4882a593Smuzhiyun #define MAX9271_GPIO2OUT		BIT(2)
75*4882a593Smuzhiyun #define MAX9271_GPIO1OUT		BIT(1)
76*4882a593Smuzhiyun #define MAX9271_GPO			BIT(0)
77*4882a593Smuzhiyun /* Register 0x15 */
78*4882a593Smuzhiyun #define MAX9271_PCLKDET			BIT(0)
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /**
81*4882a593Smuzhiyun  * struct max9271_device - max9271 device
82*4882a593Smuzhiyun  * @client: The i2c client for the max9271 instance
83*4882a593Smuzhiyun  */
84*4882a593Smuzhiyun struct max9271_device {
85*4882a593Smuzhiyun 	struct i2c_client *client;
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /**
89*4882a593Smuzhiyun  * max9271_set_serial_link() - Enable/disable serial link
90*4882a593Smuzhiyun  * @dev: The max9271 device
91*4882a593Smuzhiyun  * @enable: Serial link enable/disable flag
92*4882a593Smuzhiyun  *
93*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
94*4882a593Smuzhiyun  */
95*4882a593Smuzhiyun int max9271_set_serial_link(struct max9271_device *dev, bool enable);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /**
98*4882a593Smuzhiyun  * max9271_configure_i2c() - Configure I2C bus parameters
99*4882a593Smuzhiyun  * @dev: The max9271 device
100*4882a593Smuzhiyun  * @i2c_config: The I2C bus configuration bit mask
101*4882a593Smuzhiyun  *
102*4882a593Smuzhiyun  * Configure MAX9271 I2C interface. The bus configuration provided in the
103*4882a593Smuzhiyun  * @i2c_config parameter shall be assembled using bit values defined by the
104*4882a593Smuzhiyun  * MAX9271_I2C* macros.
105*4882a593Smuzhiyun  *
106*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
107*4882a593Smuzhiyun  */
108*4882a593Smuzhiyun int max9271_configure_i2c(struct max9271_device *dev, u8 i2c_config);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /**
111*4882a593Smuzhiyun  * max9271_set_high_threshold() - Enable or disable reverse channel high
112*4882a593Smuzhiyun  *				  threshold
113*4882a593Smuzhiyun  * @dev: The max9271 device
114*4882a593Smuzhiyun  * @enable: High threshold enable/disable flag
115*4882a593Smuzhiyun  *
116*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
117*4882a593Smuzhiyun  */
118*4882a593Smuzhiyun int max9271_set_high_threshold(struct max9271_device *dev, bool enable);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun /**
121*4882a593Smuzhiyun  * max9271_configure_gmsl_link() - Configure the GMSL link
122*4882a593Smuzhiyun  * @dev: The max9271 device
123*4882a593Smuzhiyun  *
124*4882a593Smuzhiyun  * FIXME: the GMSL link configuration is currently hardcoded and performed
125*4882a593Smuzhiyun  * by programming registers 0x04, 0x07 and 0x02.
126*4882a593Smuzhiyun  *
127*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
128*4882a593Smuzhiyun  */
129*4882a593Smuzhiyun int max9271_configure_gmsl_link(struct max9271_device *dev);
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /**
132*4882a593Smuzhiyun  * max9271_set_gpios() - Set gpio lines to physical high value
133*4882a593Smuzhiyun  * @dev: The max9271 device
134*4882a593Smuzhiyun  * @gpio_mask: The mask of gpio lines to set to high value
135*4882a593Smuzhiyun  *
136*4882a593Smuzhiyun  * The @gpio_mask parameter shall be assembled using the MAX9271_GP[IO|O]*
137*4882a593Smuzhiyun  * bit values.
138*4882a593Smuzhiyun  *
139*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
140*4882a593Smuzhiyun  */
141*4882a593Smuzhiyun int max9271_set_gpios(struct max9271_device *dev, u8 gpio_mask);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun /**
144*4882a593Smuzhiyun  * max9271_clear_gpios() - Set gpio lines to physical low value
145*4882a593Smuzhiyun  * @dev: The max9271 device
146*4882a593Smuzhiyun  * @gpio_mask: The mask of gpio lines to set to low value
147*4882a593Smuzhiyun  *
148*4882a593Smuzhiyun  * The @gpio_mask parameter shall be assembled using the MAX9271_GP[IO|O]*
149*4882a593Smuzhiyun  * bit values.
150*4882a593Smuzhiyun  *
151*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
152*4882a593Smuzhiyun  */
153*4882a593Smuzhiyun int max9271_clear_gpios(struct max9271_device *dev, u8 gpio_mask);
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun /**
156*4882a593Smuzhiyun  * max9271_enable_gpios() - Enable gpio lines
157*4882a593Smuzhiyun  * @dev: The max9271 device
158*4882a593Smuzhiyun  * @gpio_mask: The mask of gpio lines to enable
159*4882a593Smuzhiyun  *
160*4882a593Smuzhiyun  * The @gpio_mask parameter shall be assembled using the MAX9271_GPIO*
161*4882a593Smuzhiyun  * bit values. GPO line is always enabled by default.
162*4882a593Smuzhiyun  *
163*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
164*4882a593Smuzhiyun  */
165*4882a593Smuzhiyun int max9271_enable_gpios(struct max9271_device *dev, u8 gpio_mask);
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun /**
168*4882a593Smuzhiyun  * max9271_disable_gpios() - Disable gpio lines
169*4882a593Smuzhiyun  * @dev: The max9271 device
170*4882a593Smuzhiyun  * @gpio_mask: The mask of gpio lines to disable
171*4882a593Smuzhiyun  *
172*4882a593Smuzhiyun  * The @gpio_mask parameter shall be assembled using the MAX9271_GPIO*
173*4882a593Smuzhiyun  * bit values. GPO line is always enabled by default and cannot be disabled.
174*4882a593Smuzhiyun  *
175*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
176*4882a593Smuzhiyun  */
177*4882a593Smuzhiyun int max9271_disable_gpios(struct max9271_device *dev, u8 gpio_mask);
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun /**
180*4882a593Smuzhiyun  * max9271_verify_id() - Read and verify MAX9271 id
181*4882a593Smuzhiyun  * @dev: The max9271 device
182*4882a593Smuzhiyun  *
183*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
184*4882a593Smuzhiyun  */
185*4882a593Smuzhiyun int max9271_verify_id(struct max9271_device *dev);
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun /**
188*4882a593Smuzhiyun  * max9271_set_address() - Program a new I2C address
189*4882a593Smuzhiyun  * @dev: The max9271 device
190*4882a593Smuzhiyun  * @addr: The new I2C address in 7-bit format
191*4882a593Smuzhiyun  *
192*4882a593Smuzhiyun  * This function only takes care of programming the new I2C address @addr to
193*4882a593Smuzhiyun  * in the MAX9271 chip registers, it is responsiblity of the caller to set
194*4882a593Smuzhiyun  * the i2c address client to the @addr value to be able to communicate with
195*4882a593Smuzhiyun  * the MAX9271 chip using the I2C framework APIs after this function returns.
196*4882a593Smuzhiyun  *
197*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
198*4882a593Smuzhiyun  */
199*4882a593Smuzhiyun int max9271_set_address(struct max9271_device *dev, u8 addr);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun /**
202*4882a593Smuzhiyun  * max9271_set_deserializer_address() - Program the remote deserializer address
203*4882a593Smuzhiyun  * @dev: The max9271 device
204*4882a593Smuzhiyun  * @addr: The deserializer I2C address in 7-bit format
205*4882a593Smuzhiyun  *
206*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
207*4882a593Smuzhiyun  */
208*4882a593Smuzhiyun int max9271_set_deserializer_address(struct max9271_device *dev, u8 addr);
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun /**
211*4882a593Smuzhiyun  * max9271_set_translation() - Program I2C address translation
212*4882a593Smuzhiyun  * @dev: The max9271 device
213*4882a593Smuzhiyun  * @source: The I2C source address
214*4882a593Smuzhiyun  * @dest: The I2C destination address
215*4882a593Smuzhiyun  *
216*4882a593Smuzhiyun  * Program address translation from @source to @dest. This is required to
217*4882a593Smuzhiyun  * communicate with local devices that do not support address reprogramming.
218*4882a593Smuzhiyun  *
219*4882a593Smuzhiyun  * TODO: The device supports translation of two address, this function currently
220*4882a593Smuzhiyun  * supports a single one.
221*4882a593Smuzhiyun  *
222*4882a593Smuzhiyun  * Return 0 on success or a negative error code on failure
223*4882a593Smuzhiyun  */
224*4882a593Smuzhiyun int max9271_set_translation(struct max9271_device *dev, u8 source, u8 dest);
225