1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2022 Rockchip Electronics Co. Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * it66353 HDMI 3 in 1 out driver. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Author: Kenneth.Hung@ite.com.tw 8*4882a593Smuzhiyun * Wangqiang Guo <kay.guo@rock-chips.com> 9*4882a593Smuzhiyun * Version: IT66353_SAMPLE_1.08 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun #ifndef _DEBUG_H_ 13*4882a593Smuzhiyun #define _DEBUG_H_ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include <linux/kernel.h> 16*4882a593Smuzhiyun #include "platform.h" 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define DBG_TXOE_1(x) { } 19*4882a593Smuzhiyun #define DBG_TXOE_0(x) { } 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define DBG_CLKSTABLE_0(x) { } 22*4882a593Smuzhiyun #define DBG_CLKSTABLE_1(x) { } 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define DBG_SYMLOCK_0(x) { } 25*4882a593Smuzhiyun #define DBG_SYMLOCK_1(x) { } 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun enum { 28*4882a593Smuzhiyun RX_SWITCH_PORT, 29*4882a593Smuzhiyun RX_HPD_HIGH, 30*4882a593Smuzhiyun RX_HPD_LOW, 31*4882a593Smuzhiyun CLK_STABLE, 32*4882a593Smuzhiyun CLK_UNSTABLE, 33*4882a593Smuzhiyun AEQ_TOGGLE_HPD, 34*4882a593Smuzhiyun TXOE0, 35*4882a593Smuzhiyun TXOE1, 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define DBG_TM(n) // { __debug_set_io(n); } 39*4882a593Smuzhiyun int set_port(int portnum, int wrmask, int wrdata); 40*4882a593Smuzhiyun void __debug_set_io(u8 n); 41*4882a593Smuzhiyun #endif 42