1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef IMX258_EEPROM_HEAD_H 5*4882a593Smuzhiyun #define IMX258_EEPROM_HEAD_H 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define SLAVE_ADDRESS_GZ 0x50 8*4882a593Smuzhiyun #define GZ_INFO_FLAG_REG 0X0000 9*4882a593Smuzhiyun #define GZ_ID_REG 0X0005 10*4882a593Smuzhiyun #define GZ_LENS_ID_REG 0X0006 11*4882a593Smuzhiyun #define GZ_PRODUCT_YEAR_REG 0X000A 12*4882a593Smuzhiyun #define GZ_PRODUCT_MONTH_REG 0X000B 13*4882a593Smuzhiyun #define GZ_PRODUCT_DAY_REG 0X000C 14*4882a593Smuzhiyun #define GZ_AWB_FLAG_REG 0x001c 15*4882a593Smuzhiyun #define GZ_CUR_R_REG 0x001d 16*4882a593Smuzhiyun #define GZ_CUR_GR_REG 0x001e 17*4882a593Smuzhiyun #define GZ_CUR_GB_REG 0x001f 18*4882a593Smuzhiyun #define GZ_CUR_B_REG 0x0020 19*4882a593Smuzhiyun #define GZ_GOLDEN_R_REG 0x0021 20*4882a593Smuzhiyun #define GZ_GOLDEN_GR_REG 0x0022 21*4882a593Smuzhiyun #define GZ_GOLDEN_GB_REG 0x0023 22*4882a593Smuzhiyun #define GZ_GOLDEN_B_REG 0x0024 23*4882a593Smuzhiyun #define GZ_AWB_CHECKSUM_REG 0x0025 24*4882a593Smuzhiyun #define GZ_LSC_FLAG_REG 0X003A 25*4882a593Smuzhiyun #define GZ_LSC_DATA_START_REG 0x003B 26*4882a593Smuzhiyun #define GZ_LSC_CHECKSUM_REG 0x0233 27*4882a593Smuzhiyun #define GZ_VCM_FLAG_REG 0X0788 28*4882a593Smuzhiyun #define GZ_VCM_DIR_REG 0X0789 29*4882a593Smuzhiyun #define GZ_VCM_START_REG 0X078C 30*4882a593Smuzhiyun #define GZ_VCM_END_REG 0X078A 31*4882a593Smuzhiyun #define GZ_VCM_CHECKSUM_REG 0x0790 32*4882a593Smuzhiyun #define GZ_SPC_FLAG_REG 0X0CE1 33*4882a593Smuzhiyun #define GZ_SPC_DATA_START_REG 0x0CE2 34*4882a593Smuzhiyun #define GZ_SPC_CHECKSUM_REG 0x0d60 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun struct imx258_otp_info { 37*4882a593Smuzhiyun u32 flag; //bit[7]: info bit[6]:wb bit[5]:vcm bit[4]:lenc bit[3]:spc 38*4882a593Smuzhiyun u32 module_id; 39*4882a593Smuzhiyun u32 lens_id; 40*4882a593Smuzhiyun u32 year; 41*4882a593Smuzhiyun u32 month; 42*4882a593Smuzhiyun u32 day; 43*4882a593Smuzhiyun u32 rg_ratio; 44*4882a593Smuzhiyun u32 bg_ratio; 45*4882a593Smuzhiyun u32 rg_golden; 46*4882a593Smuzhiyun u32 bg_golden; 47*4882a593Smuzhiyun int vcm_start; 48*4882a593Smuzhiyun int vcm_end; 49*4882a593Smuzhiyun int vcm_dir; 50*4882a593Smuzhiyun u8 lenc[504]; 51*4882a593Smuzhiyun u8 spc[126]; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun /* imx258_eeprom device structure */ 55*4882a593Smuzhiyun struct imx258_eeprom_device { 56*4882a593Smuzhiyun struct v4l2_subdev sd; 57*4882a593Smuzhiyun struct i2c_client *client; 58*4882a593Smuzhiyun struct imx258_otp_info *otp; 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #endif /* IMX258_EEPROM_HEAD_H */ 62*4882a593Smuzhiyun 63