1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * GC032A CMOS Image Sensor driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2020 Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun * V0.0X01.0X01 init driver.
7*4882a593Smuzhiyun * V0.0X01.0X02 add quick stream on/off
8*4882a593Smuzhiyun * V0.0X01.0X03 set sensor in stream off state by default
9*4882a593Smuzhiyun * to avoid sending abnormal data in the early stage.
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/interrupt.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun #include <linux/i2c.h>
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/media.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun #include <linux/of.h>
24*4882a593Smuzhiyun #include <linux/of_graph.h>
25*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
26*4882a593Smuzhiyun #include <linux/slab.h>
27*4882a593Smuzhiyun #include <linux/uaccess.h>
28*4882a593Smuzhiyun #include <linux/videodev2.h>
29*4882a593Smuzhiyun #include <linux/version.h>
30*4882a593Smuzhiyun #include <linux/rk-camera-module.h>
31*4882a593Smuzhiyun #include <media/media-entity.h>
32*4882a593Smuzhiyun #include <media/v4l2-common.h>
33*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
34*4882a593Smuzhiyun #include <media/v4l2-device.h>
35*4882a593Smuzhiyun #include <media/v4l2-event.h>
36*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
37*4882a593Smuzhiyun #include <media/v4l2-image-sizes.h>
38*4882a593Smuzhiyun #include <media/v4l2-mediabus.h>
39*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x2)
42*4882a593Smuzhiyun #define DRIVER_NAME "gc032a"
43*4882a593Smuzhiyun #define GC032A_PIXEL_RATE (96 * 1000 * 1000)
44*4882a593Smuzhiyun //#define GC032A_AUTO_FPS
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun * GC032A register definitions
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun #define REG_SOFTWARE_STANDBY 0xf3
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define REG_SC_CHIP_ID_H 0xf0
52*4882a593Smuzhiyun #define REG_SC_CHIP_ID_L 0xf1
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #define REG_NULL 0xFFFF /* Array end token */
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define SENSOR_ID(_msb, _lsb) ((_msb) << 8 | (_lsb))
57*4882a593Smuzhiyun #define GC032A_ID 0x232a
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun struct sensor_register {
60*4882a593Smuzhiyun u16 addr;
61*4882a593Smuzhiyun u8 value;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct gc032a_framesize {
65*4882a593Smuzhiyun u16 width;
66*4882a593Smuzhiyun u16 height;
67*4882a593Smuzhiyun u16 max_exp_lines;
68*4882a593Smuzhiyun struct v4l2_fract max_fps;
69*4882a593Smuzhiyun const struct sensor_register *regs;
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun struct gc032a_pll_ctrl {
73*4882a593Smuzhiyun u8 ctrl1;
74*4882a593Smuzhiyun u8 ctrl2;
75*4882a593Smuzhiyun u8 ctrl3;
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun struct gc032a_pixfmt {
79*4882a593Smuzhiyun u32 code;
80*4882a593Smuzhiyun /* Output format Register Value (REG_FORMAT_CTRL00) */
81*4882a593Smuzhiyun struct sensor_register *format_ctrl_regs;
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun struct pll_ctrl_reg {
85*4882a593Smuzhiyun unsigned int div;
86*4882a593Smuzhiyun unsigned char reg;
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun static const char * const gc032a_supply_names[] = {
90*4882a593Smuzhiyun "dovdd", /* Digital I/O power */
91*4882a593Smuzhiyun "avdd", /* Analog power */
92*4882a593Smuzhiyun "dvdd", /* Digital core power */
93*4882a593Smuzhiyun };
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun #define GC032A_NUM_SUPPLIES ARRAY_SIZE(gc032a_supply_names)
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun struct gc032a {
98*4882a593Smuzhiyun struct v4l2_subdev sd;
99*4882a593Smuzhiyun struct media_pad pad;
100*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
101*4882a593Smuzhiyun unsigned int xvclk_frequency;
102*4882a593Smuzhiyun struct clk *xvclk;
103*4882a593Smuzhiyun struct gpio_desc *pwdn_gpio;
104*4882a593Smuzhiyun struct regulator_bulk_data supplies[GC032A_NUM_SUPPLIES];
105*4882a593Smuzhiyun struct mutex lock;
106*4882a593Smuzhiyun struct i2c_client *client;
107*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrls;
108*4882a593Smuzhiyun struct v4l2_ctrl *link_frequency;
109*4882a593Smuzhiyun const struct gc032a_framesize *frame_size;
110*4882a593Smuzhiyun int streaming;
111*4882a593Smuzhiyun bool power_on;
112*4882a593Smuzhiyun u32 module_index;
113*4882a593Smuzhiyun const char *module_facing;
114*4882a593Smuzhiyun const char *module_name;
115*4882a593Smuzhiyun const char *len_name;
116*4882a593Smuzhiyun };
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun static const struct sensor_register gc032a_vga_regs[] = {
119*4882a593Smuzhiyun /*System*/
120*4882a593Smuzhiyun {0xf3, 0x00},
121*4882a593Smuzhiyun {0xf5, 0x06},
122*4882a593Smuzhiyun {0xf7, 0x01},
123*4882a593Smuzhiyun {0xf8, 0x03},
124*4882a593Smuzhiyun {0xf9, 0xce},
125*4882a593Smuzhiyun {0xfa, 0x00},
126*4882a593Smuzhiyun {0xfc, 0x02},
127*4882a593Smuzhiyun {0xfe, 0x02},
128*4882a593Smuzhiyun {0x81, 0x03},
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun {0xfe, 0x00},
131*4882a593Smuzhiyun {0x77, 0x64},
132*4882a593Smuzhiyun {0x78, 0x40},
133*4882a593Smuzhiyun {0x79, 0x60},
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /*ANALOG & CISCTL*/
136*4882a593Smuzhiyun {0xfe, 0x00},
137*4882a593Smuzhiyun {0x03, 0x01},
138*4882a593Smuzhiyun {0x04, 0xce},
139*4882a593Smuzhiyun {0x05, 0x01},
140*4882a593Smuzhiyun {0x06, 0xad},
141*4882a593Smuzhiyun {0x07, 0x00},
142*4882a593Smuzhiyun {0x08, 0x10},
143*4882a593Smuzhiyun {0x0a, 0x00},
144*4882a593Smuzhiyun {0x0c, 0x00},
145*4882a593Smuzhiyun {0x0d, 0x01},
146*4882a593Smuzhiyun {0x0e, 0xe8},
147*4882a593Smuzhiyun {0x0f, 0x02},
148*4882a593Smuzhiyun {0x10, 0x88},
149*4882a593Smuzhiyun {0x17, 0x54},
150*4882a593Smuzhiyun {0x19, 0x08},
151*4882a593Smuzhiyun {0x1a, 0x0a},
152*4882a593Smuzhiyun {0x1f, 0x40},
153*4882a593Smuzhiyun {0x20, 0x30},
154*4882a593Smuzhiyun {0x2e, 0x80},
155*4882a593Smuzhiyun {0x2f, 0x2b},
156*4882a593Smuzhiyun {0x30, 0x1a},
157*4882a593Smuzhiyun {0xfe, 0x02},
158*4882a593Smuzhiyun {0x03, 0x02},
159*4882a593Smuzhiyun {0x05, 0xd7},
160*4882a593Smuzhiyun {0x06, 0x60},
161*4882a593Smuzhiyun {0x08, 0x80},
162*4882a593Smuzhiyun {0x12, 0x89},
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /*blk*/
165*4882a593Smuzhiyun {0xfe, 0x00},
166*4882a593Smuzhiyun {0x18, 0x02},
167*4882a593Smuzhiyun {0xfe, 0x02},
168*4882a593Smuzhiyun {0x40, 0x22},
169*4882a593Smuzhiyun {0x45, 0x00},
170*4882a593Smuzhiyun {0x46, 0x00},
171*4882a593Smuzhiyun {0x49, 0x20},
172*4882a593Smuzhiyun {0x4b, 0x3c},
173*4882a593Smuzhiyun {0x50, 0x20},
174*4882a593Smuzhiyun {0x42, 0x10},
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /*isp*/
177*4882a593Smuzhiyun {0xfe, 0x01},
178*4882a593Smuzhiyun {0x0a, 0xc5},
179*4882a593Smuzhiyun {0x45, 0x00},
180*4882a593Smuzhiyun {0xfe, 0x00},
181*4882a593Smuzhiyun {0x40, 0xff},
182*4882a593Smuzhiyun {0x41, 0x25},
183*4882a593Smuzhiyun {0x42, 0xcf},
184*4882a593Smuzhiyun {0x43, 0x10},
185*4882a593Smuzhiyun {0x44, 0x83},//Output_format //80
186*4882a593Smuzhiyun {0x46, 0x22},//sync
187*4882a593Smuzhiyun {0x49, 0x03},
188*4882a593Smuzhiyun {0xfe, 0x02},
189*4882a593Smuzhiyun {0x22, 0xf6},
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /*Shading*/
192*4882a593Smuzhiyun {0xfe, 0x00},
193*4882a593Smuzhiyun {0xfe, 0x01},
194*4882a593Smuzhiyun {0xc1, 0x38},
195*4882a593Smuzhiyun {0xc2, 0x4c},
196*4882a593Smuzhiyun {0xc3, 0x00},
197*4882a593Smuzhiyun {0xc4, 0x32},
198*4882a593Smuzhiyun {0xc5, 0x24},
199*4882a593Smuzhiyun {0xc6, 0x16},
200*4882a593Smuzhiyun {0xc7, 0x08},
201*4882a593Smuzhiyun {0xc8, 0x08},
202*4882a593Smuzhiyun {0xc9, 0x00},
203*4882a593Smuzhiyun {0xca, 0x20},
204*4882a593Smuzhiyun {0xdc, 0x8a},
205*4882a593Smuzhiyun {0xdd, 0xa0},
206*4882a593Smuzhiyun {0xde, 0xa6},
207*4882a593Smuzhiyun {0xdf, 0x75},
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /*AWB*//*20170110*/
210*4882a593Smuzhiyun {0xfe, 0x01},
211*4882a593Smuzhiyun {0x90, 0x00},
212*4882a593Smuzhiyun {0x91, 0x00},
213*4882a593Smuzhiyun {0x92, 0xe3},
214*4882a593Smuzhiyun {0x93, 0xbe},
215*4882a593Smuzhiyun {0x95, 0x0b},
216*4882a593Smuzhiyun {0x96, 0xe3},
217*4882a593Smuzhiyun {0x97, 0x2e},
218*4882a593Smuzhiyun {0x98, 0x0b},
219*4882a593Smuzhiyun {0x9a, 0x2d},
220*4882a593Smuzhiyun {0x9b, 0x0b},
221*4882a593Smuzhiyun {0x9c, 0x59},
222*4882a593Smuzhiyun {0x9d, 0x2e},
223*4882a593Smuzhiyun {0x9f, 0x67},
224*4882a593Smuzhiyun {0xa0, 0x59},
225*4882a593Smuzhiyun {0xa1, 0x00},
226*4882a593Smuzhiyun {0xa2, 0x00},
227*4882a593Smuzhiyun {0x86, 0x00},
228*4882a593Smuzhiyun {0x87, 0x00},
229*4882a593Smuzhiyun {0x88, 0x00},
230*4882a593Smuzhiyun {0x89, 0x00},
231*4882a593Smuzhiyun {0xa4, 0x00},
232*4882a593Smuzhiyun {0xa5, 0x00},
233*4882a593Smuzhiyun {0xa6, 0xda},
234*4882a593Smuzhiyun {0xa7, 0x97},
235*4882a593Smuzhiyun {0xa9, 0xda},
236*4882a593Smuzhiyun {0xaa, 0x9a},
237*4882a593Smuzhiyun {0xab, 0xac},
238*4882a593Smuzhiyun {0xac, 0x86},
239*4882a593Smuzhiyun {0xae, 0xda},
240*4882a593Smuzhiyun {0xaf, 0xac},
241*4882a593Smuzhiyun {0xb0, 0xda},
242*4882a593Smuzhiyun {0xb1, 0xac},
243*4882a593Smuzhiyun {0xb3, 0xda},
244*4882a593Smuzhiyun {0xb4, 0xac},
245*4882a593Smuzhiyun {0xb5, 0x00},
246*4882a593Smuzhiyun {0xb6, 0x00},
247*4882a593Smuzhiyun {0x8b, 0x00},
248*4882a593Smuzhiyun {0x8c, 0x00},
249*4882a593Smuzhiyun {0x8d, 0x00},
250*4882a593Smuzhiyun {0x8e, 0x00},
251*4882a593Smuzhiyun {0x94, 0x50},
252*4882a593Smuzhiyun {0x99, 0xa6},
253*4882a593Smuzhiyun {0x9e, 0xaa},
254*4882a593Smuzhiyun {0xa3, 0x0a},
255*4882a593Smuzhiyun {0x8a, 0x00},
256*4882a593Smuzhiyun {0xa8, 0x50},
257*4882a593Smuzhiyun {0xad, 0x55},
258*4882a593Smuzhiyun {0xb2, 0x55},
259*4882a593Smuzhiyun {0xb7, 0x05},
260*4882a593Smuzhiyun {0x8f, 0x00},
261*4882a593Smuzhiyun {0xb8, 0xae},
262*4882a593Smuzhiyun {0xb9, 0xbb},
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /*CC*/
265*4882a593Smuzhiyun {0xfe, 0x01},
266*4882a593Smuzhiyun {0xd0, 0x40},
267*4882a593Smuzhiyun {0xd1, 0xf8},
268*4882a593Smuzhiyun {0xd2, 0x00},
269*4882a593Smuzhiyun {0xd3, 0xfa},
270*4882a593Smuzhiyun {0xd4, 0x45},
271*4882a593Smuzhiyun {0xd5, 0x02},
272*4882a593Smuzhiyun {0xd6, 0x30},
273*4882a593Smuzhiyun {0xd7, 0xfa},
274*4882a593Smuzhiyun {0xd8, 0x08},
275*4882a593Smuzhiyun {0xd9, 0x08},
276*4882a593Smuzhiyun {0xda, 0x58},
277*4882a593Smuzhiyun {0xdb, 0x02},
278*4882a593Smuzhiyun {0xfe, 0x00},
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun /*Gamma*/
281*4882a593Smuzhiyun {0xfe, 0x00},
282*4882a593Smuzhiyun {0xba, 0x00},
283*4882a593Smuzhiyun {0xbb, 0x04},
284*4882a593Smuzhiyun {0xbc, 0x0a},
285*4882a593Smuzhiyun {0xbd, 0x0e},
286*4882a593Smuzhiyun {0xbe, 0x22},
287*4882a593Smuzhiyun {0xbf, 0x30},
288*4882a593Smuzhiyun {0xc0, 0x3d},
289*4882a593Smuzhiyun {0xc1, 0x4a},
290*4882a593Smuzhiyun {0xc2, 0x5d},
291*4882a593Smuzhiyun {0xc3, 0x6b},
292*4882a593Smuzhiyun {0xc4, 0x7a},
293*4882a593Smuzhiyun {0xc5, 0x85},
294*4882a593Smuzhiyun {0xc6, 0x90},
295*4882a593Smuzhiyun {0xc7, 0xa5},
296*4882a593Smuzhiyun {0xc8, 0xb5},
297*4882a593Smuzhiyun {0xc9, 0xc2},
298*4882a593Smuzhiyun {0xca, 0xcc},
299*4882a593Smuzhiyun {0xcb, 0xd5},
300*4882a593Smuzhiyun {0xcc, 0xde},
301*4882a593Smuzhiyun {0xcd, 0xea},
302*4882a593Smuzhiyun {0xce, 0xf5},
303*4882a593Smuzhiyun {0xcf, 0xff},
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun /*Auto Gamma*/
306*4882a593Smuzhiyun {0xfe, 0x00},
307*4882a593Smuzhiyun {0x5a, 0x08},
308*4882a593Smuzhiyun {0x5b, 0x0f},
309*4882a593Smuzhiyun {0x5c, 0x15},
310*4882a593Smuzhiyun {0x5d, 0x1c},
311*4882a593Smuzhiyun {0x5e, 0x28},
312*4882a593Smuzhiyun {0x5f, 0x36},
313*4882a593Smuzhiyun {0x60, 0x45},
314*4882a593Smuzhiyun {0x61, 0x51},
315*4882a593Smuzhiyun {0x62, 0x6a},
316*4882a593Smuzhiyun {0x63, 0x7d},
317*4882a593Smuzhiyun {0x64, 0x8d},
318*4882a593Smuzhiyun {0x65, 0x98},
319*4882a593Smuzhiyun {0x66, 0xa2},
320*4882a593Smuzhiyun {0x67, 0xb5},
321*4882a593Smuzhiyun {0x68, 0xc3},
322*4882a593Smuzhiyun {0x69, 0xcd},
323*4882a593Smuzhiyun {0x6a, 0xd4},
324*4882a593Smuzhiyun {0x6b, 0xdc},
325*4882a593Smuzhiyun {0x6c, 0xe3},
326*4882a593Smuzhiyun {0x6d, 0xf0},
327*4882a593Smuzhiyun {0x6e, 0xf9},
328*4882a593Smuzhiyun {0x6f, 0xff},
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /*Gain*/
331*4882a593Smuzhiyun {0xfe, 0x00},
332*4882a593Smuzhiyun {0x70, 0x50},
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun /*AEC*/
335*4882a593Smuzhiyun {0xfe, 0x00},
336*4882a593Smuzhiyun {0x4f, 0x01},
337*4882a593Smuzhiyun {0xfe, 0x01},
338*4882a593Smuzhiyun {0x0d, 0x00},//08 add 20170110
339*4882a593Smuzhiyun {0x12, 0xa0},
340*4882a593Smuzhiyun {0x13, 0x3a},
341*4882a593Smuzhiyun {0x44, 0x04},
342*4882a593Smuzhiyun {0x1f, 0x30},
343*4882a593Smuzhiyun {0x20, 0x40},
344*4882a593Smuzhiyun {0x26, 0x9a},
345*4882a593Smuzhiyun {0x3e, 0x20},
346*4882a593Smuzhiyun {0x3f, 0x2d},
347*4882a593Smuzhiyun {0x40, 0x40},
348*4882a593Smuzhiyun {0x41, 0x5b},
349*4882a593Smuzhiyun {0x42, 0x82},
350*4882a593Smuzhiyun {0x43, 0xb7},
351*4882a593Smuzhiyun {0x04, 0x0a},
352*4882a593Smuzhiyun {0x02, 0x79},
353*4882a593Smuzhiyun {0x03, 0xc0},
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /*measure window*/
356*4882a593Smuzhiyun {0xfe, 0x01},
357*4882a593Smuzhiyun {0xcc, 0x08},
358*4882a593Smuzhiyun {0xcd, 0x08},
359*4882a593Smuzhiyun {0xce, 0xa4},
360*4882a593Smuzhiyun {0xcf, 0xec},
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun /*DNDD*/
363*4882a593Smuzhiyun {0xfe, 0x00},
364*4882a593Smuzhiyun {0x81, 0xb8},
365*4882a593Smuzhiyun {0x82, 0x15},//de_noise
366*4882a593Smuzhiyun {0x83, 0x1a},//de_noise dark
367*4882a593Smuzhiyun {0x84, 0x01},
368*4882a593Smuzhiyun {0x86, 0x50},
369*4882a593Smuzhiyun {0x87, 0x18},
370*4882a593Smuzhiyun {0x88, 0x10},
371*4882a593Smuzhiyun {0x89, 0x70},
372*4882a593Smuzhiyun {0x8a, 0x20},
373*4882a593Smuzhiyun {0x8b, 0x10},
374*4882a593Smuzhiyun {0x8c, 0x08},
375*4882a593Smuzhiyun {0x8d, 0x0a},
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /*Intpee*/
378*4882a593Smuzhiyun {0xfe, 0x00},
379*4882a593Smuzhiyun {0x8f, 0xaa},
380*4882a593Smuzhiyun {0x90, 0x9c},
381*4882a593Smuzhiyun {0x91, 0x52},
382*4882a593Smuzhiyun {0x92, 0x03},
383*4882a593Smuzhiyun {0x93, 0x03},
384*4882a593Smuzhiyun {0x94, 0x08},
385*4882a593Smuzhiyun {0x95, 0x65},//sharpness
386*4882a593Smuzhiyun {0x97, 0x00},
387*4882a593Smuzhiyun {0x98, 0x00},
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /*ASDE*/
390*4882a593Smuzhiyun {0xfe, 0x00},
391*4882a593Smuzhiyun {0xa1, 0x30},
392*4882a593Smuzhiyun {0xa2, 0x41},
393*4882a593Smuzhiyun {0xa4, 0x30},
394*4882a593Smuzhiyun {0xa5, 0x20},
395*4882a593Smuzhiyun {0xaa, 0x30},
396*4882a593Smuzhiyun {0xac, 0x32},
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun /*YCP*/
399*4882a593Smuzhiyun {0xfe, 0x00},
400*4882a593Smuzhiyun {0xd1, 0x37},//3a
401*4882a593Smuzhiyun {0xd2, 0x37},//3a
402*4882a593Smuzhiyun {0xd3, 0x40},//38
403*4882a593Smuzhiyun {0xd6, 0xf4},
404*4882a593Smuzhiyun {0xd7, 0x1d},
405*4882a593Smuzhiyun {0xdd, 0x73},
406*4882a593Smuzhiyun {0xde, 0x84},
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun #ifdef GC032A_AUTO_FPS
409*4882a593Smuzhiyun /*Banding*/
410*4882a593Smuzhiyun /* 7fps */
411*4882a593Smuzhiyun {0xfe, 0x00},
412*4882a593Smuzhiyun {0x05, 0x01},
413*4882a593Smuzhiyun {0x06, 0xad},
414*4882a593Smuzhiyun {0x07, 0x00},
415*4882a593Smuzhiyun {0x08, 0x10},
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun {0xfe, 0x01},
418*4882a593Smuzhiyun {0x25, 0x00},
419*4882a593Smuzhiyun {0x26, 0x9a},
420*4882a593Smuzhiyun {0x27, 0x01},
421*4882a593Smuzhiyun {0x28, 0xce},
422*4882a593Smuzhiyun {0x29, 0x03},
423*4882a593Smuzhiyun {0x2a, 0x02},
424*4882a593Smuzhiyun {0x2b, 0x04},
425*4882a593Smuzhiyun {0x2c, 0x36},
426*4882a593Smuzhiyun {0x2d, 0x07},
427*4882a593Smuzhiyun {0x2e, 0xd2},
428*4882a593Smuzhiyun {0x2f, 0x0b},
429*4882a593Smuzhiyun {0x30, 0x6e},
430*4882a593Smuzhiyun {0x31, 0x0e},
431*4882a593Smuzhiyun {0x32, 0x70},
432*4882a593Smuzhiyun {0x33, 0x12},
433*4882a593Smuzhiyun {0x34, 0x0c},
434*4882a593Smuzhiyun {0x3c, 0x20},
435*4882a593Smuzhiyun #else
436*4882a593Smuzhiyun /*Banding*/
437*4882a593Smuzhiyun /* 30 fps */
438*4882a593Smuzhiyun {0xfe, 0x00},
439*4882a593Smuzhiyun {0x05, 0x01},
440*4882a593Smuzhiyun {0x06, 0xad},
441*4882a593Smuzhiyun {0x07, 0x00},
442*4882a593Smuzhiyun {0x08, 0x10},
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun {0xfe, 0x01},
445*4882a593Smuzhiyun {0x25, 0x00},
446*4882a593Smuzhiyun {0x26, 0x9a},
447*4882a593Smuzhiyun {0x27, 0x01},
448*4882a593Smuzhiyun {0x28, 0xce},
449*4882a593Smuzhiyun {0x29, 0x01},
450*4882a593Smuzhiyun {0x2a, 0xce},
451*4882a593Smuzhiyun {0x2b, 0x01},
452*4882a593Smuzhiyun {0x2c, 0xce},
453*4882a593Smuzhiyun {0x2d, 0x01},
454*4882a593Smuzhiyun {0x2e, 0xce},
455*4882a593Smuzhiyun {0x2f, 0x01},
456*4882a593Smuzhiyun {0x30, 0xce},
457*4882a593Smuzhiyun {0x31, 0x01},
458*4882a593Smuzhiyun {0x32, 0xce},
459*4882a593Smuzhiyun {0x33, 0x01},
460*4882a593Smuzhiyun {0x34, 0xce},
461*4882a593Smuzhiyun {0x3c, 0x00},
462*4882a593Smuzhiyun #endif
463*4882a593Smuzhiyun {0xfe, 0x00},
464*4882a593Smuzhiyun {REG_NULL, 0x00},
465*4882a593Smuzhiyun };
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun static const struct gc032a_framesize gc032a_framesizes[] = {
468*4882a593Smuzhiyun { /* VGA */
469*4882a593Smuzhiyun .width = 640,
470*4882a593Smuzhiyun .height = 480,
471*4882a593Smuzhiyun .max_fps = {
472*4882a593Smuzhiyun .numerator = 10000,
473*4882a593Smuzhiyun .denominator = 300000,
474*4882a593Smuzhiyun },
475*4882a593Smuzhiyun .regs = gc032a_vga_regs,
476*4882a593Smuzhiyun .max_exp_lines = 488,
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun };
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun static const struct gc032a_pixfmt gc032a_formats[] = {
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_YUYV8_2X8,
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun };
485*4882a593Smuzhiyun
to_gc032a(struct v4l2_subdev * sd)486*4882a593Smuzhiyun static inline struct gc032a *to_gc032a(struct v4l2_subdev *sd)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun return container_of(sd, struct gc032a, sd);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun /* sensor register write */
gc032a_write(struct i2c_client * client,u8 reg,u8 val)492*4882a593Smuzhiyun static int gc032a_write(struct i2c_client *client, u8 reg, u8 val)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun struct i2c_msg msg;
495*4882a593Smuzhiyun u8 buf[2];
496*4882a593Smuzhiyun int ret;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun buf[0] = reg & 0xFF;
499*4882a593Smuzhiyun buf[1] = val;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun msg.addr = client->addr;
502*4882a593Smuzhiyun msg.flags = client->flags;
503*4882a593Smuzhiyun msg.buf = buf;
504*4882a593Smuzhiyun msg.len = sizeof(buf);
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun ret = i2c_transfer(client->adapter, &msg, 1);
507*4882a593Smuzhiyun if (ret >= 0)
508*4882a593Smuzhiyun return 0;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun dev_err(&client->dev,
511*4882a593Smuzhiyun "gc032a write reg(0x%x val:0x%x) failed !\n", reg, val);
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun return ret;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun /* sensor register read */
gc032a_read(struct i2c_client * client,u8 reg,u8 * val)517*4882a593Smuzhiyun static int gc032a_read(struct i2c_client *client, u8 reg, u8 *val)
518*4882a593Smuzhiyun {
519*4882a593Smuzhiyun struct i2c_msg msg[2];
520*4882a593Smuzhiyun u8 buf[1];
521*4882a593Smuzhiyun int ret;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun buf[0] = reg & 0xFF;
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun msg[0].addr = client->addr;
526*4882a593Smuzhiyun msg[0].flags = client->flags;
527*4882a593Smuzhiyun msg[0].buf = buf;
528*4882a593Smuzhiyun msg[0].len = sizeof(buf);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun msg[1].addr = client->addr;
531*4882a593Smuzhiyun msg[1].flags = client->flags | I2C_M_RD;
532*4882a593Smuzhiyun msg[1].buf = buf;
533*4882a593Smuzhiyun msg[1].len = 1;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun ret = i2c_transfer(client->adapter, msg, 2);
536*4882a593Smuzhiyun if (ret >= 0) {
537*4882a593Smuzhiyun *val = buf[0];
538*4882a593Smuzhiyun return 0;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun dev_err(&client->dev,
542*4882a593Smuzhiyun "gc032a read reg:0x%x failed !\n", reg);
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun return ret;
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
gc032a_write_array(struct i2c_client * client,const struct sensor_register * regs)547*4882a593Smuzhiyun static int gc032a_write_array(struct i2c_client *client,
548*4882a593Smuzhiyun const struct sensor_register *regs)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun int i, ret = 0;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun i = 0;
553*4882a593Smuzhiyun while (regs[i].addr != REG_NULL) {
554*4882a593Smuzhiyun ret = gc032a_write(client, regs[i].addr, regs[i].value);
555*4882a593Smuzhiyun if (ret) {
556*4882a593Smuzhiyun dev_err(&client->dev, "%s failed !\n", __func__);
557*4882a593Smuzhiyun break;
558*4882a593Smuzhiyun }
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun i++;
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun return ret;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun
gc032a_get_default_format(struct v4l2_mbus_framefmt * format)566*4882a593Smuzhiyun static void gc032a_get_default_format(struct v4l2_mbus_framefmt *format)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun format->width = gc032a_framesizes[0].width;
569*4882a593Smuzhiyun format->height = gc032a_framesizes[0].height;
570*4882a593Smuzhiyun format->colorspace = V4L2_COLORSPACE_SRGB;
571*4882a593Smuzhiyun format->code = gc032a_formats[0].code;
572*4882a593Smuzhiyun format->field = V4L2_FIELD_NONE;
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun
gc032a_set_streaming(struct gc032a * gc032a,int on)575*4882a593Smuzhiyun static void gc032a_set_streaming(struct gc032a *gc032a, int on)
576*4882a593Smuzhiyun {
577*4882a593Smuzhiyun struct i2c_client *client = gc032a->client;
578*4882a593Smuzhiyun int ret;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun ret = gc032a_write(client, REG_SOFTWARE_STANDBY, on);
583*4882a593Smuzhiyun if (ret)
584*4882a593Smuzhiyun dev_err(&client->dev, "gc032a soft standby failed\n");
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun /*
588*4882a593Smuzhiyun * V4L2 subdev video and pad level operations
589*4882a593Smuzhiyun */
590*4882a593Smuzhiyun
gc032a_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)591*4882a593Smuzhiyun static int gc032a_enum_mbus_code(struct v4l2_subdev *sd,
592*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
593*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun if (code->index >= ARRAY_SIZE(gc032a_formats))
600*4882a593Smuzhiyun return -EINVAL;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun code->code = gc032a_formats[code->index].code;
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun return 0;
605*4882a593Smuzhiyun }
606*4882a593Smuzhiyun
gc032a_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)607*4882a593Smuzhiyun static int gc032a_enum_frame_sizes(struct v4l2_subdev *sd,
608*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
609*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse)
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
612*4882a593Smuzhiyun int i = ARRAY_SIZE(gc032a_formats);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun if (fse->index >= ARRAY_SIZE(gc032a_framesizes))
617*4882a593Smuzhiyun return -EINVAL;
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun while (--i)
620*4882a593Smuzhiyun if (fse->code == gc032a_formats[i].code)
621*4882a593Smuzhiyun break;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun fse->code = gc032a_formats[i].code;
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun fse->min_width = gc032a_framesizes[fse->index].width;
626*4882a593Smuzhiyun fse->max_width = fse->min_width;
627*4882a593Smuzhiyun fse->max_height = gc032a_framesizes[fse->index].height;
628*4882a593Smuzhiyun fse->min_height = fse->max_height;
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun return 0;
631*4882a593Smuzhiyun }
632*4882a593Smuzhiyun
gc032a_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)633*4882a593Smuzhiyun static int gc032a_get_fmt(struct v4l2_subdev *sd,
634*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
635*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
636*4882a593Smuzhiyun {
637*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
638*4882a593Smuzhiyun struct gc032a *gc032a = to_gc032a(sd);
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun dev_dbg(&client->dev, "%s enter\n", __func__);
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
643*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
644*4882a593Smuzhiyun struct v4l2_mbus_framefmt *mf;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun mf = v4l2_subdev_get_try_format(sd, cfg, 0);
647*4882a593Smuzhiyun mutex_lock(&gc032a->lock);
648*4882a593Smuzhiyun fmt->format = *mf;
649*4882a593Smuzhiyun mutex_unlock(&gc032a->lock);
650*4882a593Smuzhiyun return 0;
651*4882a593Smuzhiyun #else
652*4882a593Smuzhiyun return -ENOTTY;
653*4882a593Smuzhiyun #endif
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun mutex_lock(&gc032a->lock);
657*4882a593Smuzhiyun fmt->format = gc032a->format;
658*4882a593Smuzhiyun mutex_unlock(&gc032a->lock);
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun dev_dbg(&client->dev, "%s: %x %dx%d\n", __func__,
661*4882a593Smuzhiyun gc032a->format.code, gc032a->format.width,
662*4882a593Smuzhiyun gc032a->format.height);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun return 0;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
__gc032a_try_frame_size(struct v4l2_mbus_framefmt * mf,const struct gc032a_framesize ** size)667*4882a593Smuzhiyun static void __gc032a_try_frame_size(struct v4l2_mbus_framefmt *mf,
668*4882a593Smuzhiyun const struct gc032a_framesize **size)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun const struct gc032a_framesize *fsize = &gc032a_framesizes[0];
671*4882a593Smuzhiyun const struct gc032a_framesize *match = NULL;
672*4882a593Smuzhiyun int i = ARRAY_SIZE(gc032a_framesizes);
673*4882a593Smuzhiyun unsigned int min_err = UINT_MAX;
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun while (i--) {
676*4882a593Smuzhiyun unsigned int err = abs(fsize->width - mf->width)
677*4882a593Smuzhiyun + abs(fsize->height - mf->height);
678*4882a593Smuzhiyun if (err < min_err && fsize->regs[0].addr) {
679*4882a593Smuzhiyun min_err = err;
680*4882a593Smuzhiyun match = fsize;
681*4882a593Smuzhiyun }
682*4882a593Smuzhiyun fsize++;
683*4882a593Smuzhiyun }
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun if (!match)
686*4882a593Smuzhiyun match = &gc032a_framesizes[0];
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun mf->width = match->width;
689*4882a593Smuzhiyun mf->height = match->height;
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun if (size)
692*4882a593Smuzhiyun *size = match;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun
gc032a_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)695*4882a593Smuzhiyun static int gc032a_set_fmt(struct v4l2_subdev *sd,
696*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
697*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
698*4882a593Smuzhiyun {
699*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
700*4882a593Smuzhiyun int index = ARRAY_SIZE(gc032a_formats);
701*4882a593Smuzhiyun struct v4l2_mbus_framefmt *mf = &fmt->format;
702*4882a593Smuzhiyun const struct gc032a_framesize *size = NULL;
703*4882a593Smuzhiyun struct gc032a *gc032a = to_gc032a(sd);
704*4882a593Smuzhiyun int ret = 0;
705*4882a593Smuzhiyun
706*4882a593Smuzhiyun dev_dbg(&client->dev, "%s enter\n", __func__);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun __gc032a_try_frame_size(mf, &size);
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun while (--index >= 0)
711*4882a593Smuzhiyun if (gc032a_formats[index].code == mf->code)
712*4882a593Smuzhiyun break;
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun if (index < 0)
715*4882a593Smuzhiyun return -EINVAL;
716*4882a593Smuzhiyun
717*4882a593Smuzhiyun mf->colorspace = V4L2_COLORSPACE_SRGB;
718*4882a593Smuzhiyun mf->code = gc032a_formats[index].code;
719*4882a593Smuzhiyun mf->field = V4L2_FIELD_NONE;
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun mutex_lock(&gc032a->lock);
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
724*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
725*4882a593Smuzhiyun mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
726*4882a593Smuzhiyun *mf = fmt->format;
727*4882a593Smuzhiyun #else
728*4882a593Smuzhiyun return -ENOTTY;
729*4882a593Smuzhiyun #endif
730*4882a593Smuzhiyun } else {
731*4882a593Smuzhiyun if (gc032a->streaming) {
732*4882a593Smuzhiyun mutex_unlock(&gc032a->lock);
733*4882a593Smuzhiyun return -EBUSY;
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun gc032a->frame_size = size;
737*4882a593Smuzhiyun gc032a->format = fmt->format;
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun mutex_unlock(&gc032a->lock);
741*4882a593Smuzhiyun return ret;
742*4882a593Smuzhiyun }
743*4882a593Smuzhiyun
gc032a_get_module_inf(struct gc032a * gc032a,struct rkmodule_inf * inf)744*4882a593Smuzhiyun static void gc032a_get_module_inf(struct gc032a *gc032a,
745*4882a593Smuzhiyun struct rkmodule_inf *inf)
746*4882a593Smuzhiyun {
747*4882a593Smuzhiyun memset(inf, 0, sizeof(*inf));
748*4882a593Smuzhiyun strlcpy(inf->base.sensor, DRIVER_NAME, sizeof(inf->base.sensor));
749*4882a593Smuzhiyun strlcpy(inf->base.module, gc032a->module_name,
750*4882a593Smuzhiyun sizeof(inf->base.module));
751*4882a593Smuzhiyun strlcpy(inf->base.lens, gc032a->len_name, sizeof(inf->base.lens));
752*4882a593Smuzhiyun }
753*4882a593Smuzhiyun
gc032a_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)754*4882a593Smuzhiyun static long gc032a_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
755*4882a593Smuzhiyun {
756*4882a593Smuzhiyun struct gc032a *gc032a = to_gc032a(sd);
757*4882a593Smuzhiyun long ret = 0;
758*4882a593Smuzhiyun u32 stream = 0;
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun switch (cmd) {
761*4882a593Smuzhiyun case RKMODULE_GET_MODULE_INFO:
762*4882a593Smuzhiyun gc032a_get_module_inf(gc032a, (struct rkmodule_inf *)arg);
763*4882a593Smuzhiyun break;
764*4882a593Smuzhiyun case RKMODULE_SET_QUICK_STREAM:
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun stream = *((u32 *)arg);
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun if (stream)
769*4882a593Smuzhiyun gc032a_set_streaming(gc032a, 0xff);
770*4882a593Smuzhiyun else
771*4882a593Smuzhiyun gc032a_set_streaming(gc032a, 0x00);
772*4882a593Smuzhiyun break;
773*4882a593Smuzhiyun default:
774*4882a593Smuzhiyun ret = -ENOIOCTLCMD;
775*4882a593Smuzhiyun break;
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun return ret;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
gc032a_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)782*4882a593Smuzhiyun static long gc032a_compat_ioctl32(struct v4l2_subdev *sd,
783*4882a593Smuzhiyun unsigned int cmd, unsigned long arg)
784*4882a593Smuzhiyun {
785*4882a593Smuzhiyun void __user *up = compat_ptr(arg);
786*4882a593Smuzhiyun struct rkmodule_inf *inf;
787*4882a593Smuzhiyun struct rkmodule_awb_cfg *cfg;
788*4882a593Smuzhiyun long ret;
789*4882a593Smuzhiyun u32 stream = 0;
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun switch (cmd) {
792*4882a593Smuzhiyun case RKMODULE_GET_MODULE_INFO:
793*4882a593Smuzhiyun inf = kzalloc(sizeof(*inf), GFP_KERNEL);
794*4882a593Smuzhiyun if (!inf) {
795*4882a593Smuzhiyun ret = -ENOMEM;
796*4882a593Smuzhiyun return ret;
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun ret = gc032a_ioctl(sd, cmd, inf);
800*4882a593Smuzhiyun if (!ret)
801*4882a593Smuzhiyun ret = copy_to_user(up, inf, sizeof(*inf));
802*4882a593Smuzhiyun kfree(inf);
803*4882a593Smuzhiyun break;
804*4882a593Smuzhiyun case RKMODULE_AWB_CFG:
805*4882a593Smuzhiyun cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
806*4882a593Smuzhiyun if (!cfg) {
807*4882a593Smuzhiyun ret = -ENOMEM;
808*4882a593Smuzhiyun return ret;
809*4882a593Smuzhiyun }
810*4882a593Smuzhiyun
811*4882a593Smuzhiyun ret = copy_from_user(cfg, up, sizeof(*cfg));
812*4882a593Smuzhiyun if (!ret)
813*4882a593Smuzhiyun ret = gc032a_ioctl(sd, cmd, cfg);
814*4882a593Smuzhiyun kfree(cfg);
815*4882a593Smuzhiyun break;
816*4882a593Smuzhiyun case RKMODULE_SET_QUICK_STREAM:
817*4882a593Smuzhiyun ret = copy_from_user(&stream, up, sizeof(u32));
818*4882a593Smuzhiyun if (!ret)
819*4882a593Smuzhiyun ret = gc032a_ioctl(sd, cmd, &stream);
820*4882a593Smuzhiyun break;
821*4882a593Smuzhiyun default:
822*4882a593Smuzhiyun ret = -ENOIOCTLCMD;
823*4882a593Smuzhiyun break;
824*4882a593Smuzhiyun }
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun return ret;
827*4882a593Smuzhiyun }
828*4882a593Smuzhiyun #endif
829*4882a593Smuzhiyun
gc032a_s_stream(struct v4l2_subdev * sd,int on)830*4882a593Smuzhiyun static int gc032a_s_stream(struct v4l2_subdev *sd, int on)
831*4882a593Smuzhiyun {
832*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
833*4882a593Smuzhiyun struct gc032a *gc032a = to_gc032a(sd);
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun dev_info(&client->dev, "%s: on: %d\n", __func__, on);
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun mutex_lock(&gc032a->lock);
838*4882a593Smuzhiyun on = !!on;
839*4882a593Smuzhiyun if (gc032a->streaming == on)
840*4882a593Smuzhiyun goto unlock;
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun if (!on) {
843*4882a593Smuzhiyun /* Stop Streaming Sequence */
844*4882a593Smuzhiyun gc032a_set_streaming(gc032a, 0x00);
845*4882a593Smuzhiyun gc032a->streaming = on;
846*4882a593Smuzhiyun goto unlock;
847*4882a593Smuzhiyun }
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun gc032a_set_streaming(gc032a, 0xFF);
850*4882a593Smuzhiyun gc032a->streaming = on;
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun unlock:
853*4882a593Smuzhiyun mutex_unlock(&gc032a->lock);
854*4882a593Smuzhiyun return 0;
855*4882a593Smuzhiyun }
856*4882a593Smuzhiyun
gc032a_set_test_pattern(struct gc032a * gc032a,int value)857*4882a593Smuzhiyun static int gc032a_set_test_pattern(struct gc032a *gc032a, int value)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun return 0;
860*4882a593Smuzhiyun }
861*4882a593Smuzhiyun
gc032a_s_ctrl(struct v4l2_ctrl * ctrl)862*4882a593Smuzhiyun static int gc032a_s_ctrl(struct v4l2_ctrl *ctrl)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun struct gc032a *gc032a =
865*4882a593Smuzhiyun container_of(ctrl->handler, struct gc032a, ctrls);
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun switch (ctrl->id) {
868*4882a593Smuzhiyun case V4L2_CID_TEST_PATTERN:
869*4882a593Smuzhiyun return gc032a_set_test_pattern(gc032a, ctrl->val);
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun return 0;
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun static const struct v4l2_ctrl_ops gc032a_ctrl_ops = {
876*4882a593Smuzhiyun .s_ctrl = gc032a_s_ctrl,
877*4882a593Smuzhiyun };
878*4882a593Smuzhiyun
879*4882a593Smuzhiyun static const char * const gc032a_test_pattern_menu[] = {
880*4882a593Smuzhiyun "Disabled",
881*4882a593Smuzhiyun "Vertical Color Bars",
882*4882a593Smuzhiyun };
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
885*4882a593Smuzhiyun * V4L2 subdev internal operations
886*4882a593Smuzhiyun */
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc032a_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)889*4882a593Smuzhiyun static int gc032a_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
890*4882a593Smuzhiyun {
891*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
892*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format =
893*4882a593Smuzhiyun v4l2_subdev_get_try_format(sd, fh->pad, 0);
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
896*4882a593Smuzhiyun
897*4882a593Smuzhiyun gc032a_get_default_format(format);
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun return 0;
900*4882a593Smuzhiyun }
901*4882a593Smuzhiyun #endif
902*4882a593Smuzhiyun
gc032a_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)903*4882a593Smuzhiyun static int gc032a_g_mbus_config(struct v4l2_subdev *sd,
904*4882a593Smuzhiyun struct v4l2_mbus_config *config)
905*4882a593Smuzhiyun {
906*4882a593Smuzhiyun config->type = V4L2_MBUS_PARALLEL;
907*4882a593Smuzhiyun config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
908*4882a593Smuzhiyun V4L2_MBUS_VSYNC_ACTIVE_LOW |
909*4882a593Smuzhiyun V4L2_MBUS_PCLK_SAMPLE_RISING;
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun return 0;
912*4882a593Smuzhiyun }
913*4882a593Smuzhiyun
gc032a_power(struct v4l2_subdev * sd,int on)914*4882a593Smuzhiyun static int gc032a_power(struct v4l2_subdev *sd, int on)
915*4882a593Smuzhiyun {
916*4882a593Smuzhiyun int ret;
917*4882a593Smuzhiyun struct gc032a *gc032a = to_gc032a(sd);
918*4882a593Smuzhiyun struct i2c_client *client = gc032a->client;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun dev_info(&client->dev, "%s(%d) on(%d)\n", __func__, __LINE__, on);
921*4882a593Smuzhiyun if (on) {
922*4882a593Smuzhiyun if (!IS_ERR(gc032a->pwdn_gpio)) {
923*4882a593Smuzhiyun gpiod_set_value_cansleep(gc032a->pwdn_gpio, 0);
924*4882a593Smuzhiyun usleep_range(2000, 5000);
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun ret = gc032a_write_array(client, gc032a->frame_size->regs);
927*4882a593Smuzhiyun if (ret)
928*4882a593Smuzhiyun dev_err(&client->dev, "init error\n");
929*4882a593Smuzhiyun gc032a->power_on = true;
930*4882a593Smuzhiyun } else {
931*4882a593Smuzhiyun if (!IS_ERR(gc032a->pwdn_gpio)) {
932*4882a593Smuzhiyun gpiod_set_value_cansleep(gc032a->pwdn_gpio, 1);
933*4882a593Smuzhiyun usleep_range(2000, 5000);
934*4882a593Smuzhiyun }
935*4882a593Smuzhiyun gc032a->power_on = false;
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun return 0;
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun
gc032a_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)940*4882a593Smuzhiyun static int gc032a_enum_frame_interval(struct v4l2_subdev *sd,
941*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
942*4882a593Smuzhiyun struct v4l2_subdev_frame_interval_enum *fie)
943*4882a593Smuzhiyun {
944*4882a593Smuzhiyun if (fie->index >= ARRAY_SIZE(gc032a_framesizes))
945*4882a593Smuzhiyun return -EINVAL;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun fie->code = MEDIA_BUS_FMT_YUYV8_2X8;
948*4882a593Smuzhiyun fie->width = gc032a_framesizes[fie->index].width;
949*4882a593Smuzhiyun fie->height = gc032a_framesizes[fie->index].height;
950*4882a593Smuzhiyun fie->interval = gc032a_framesizes[fie->index].max_fps;
951*4882a593Smuzhiyun return 0;
952*4882a593Smuzhiyun }
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops gc032a_subdev_core_ops = {
955*4882a593Smuzhiyun .log_status = v4l2_ctrl_subdev_log_status,
956*4882a593Smuzhiyun .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
957*4882a593Smuzhiyun .unsubscribe_event = v4l2_event_subdev_unsubscribe,
958*4882a593Smuzhiyun .ioctl = gc032a_ioctl,
959*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
960*4882a593Smuzhiyun .compat_ioctl32 = gc032a_compat_ioctl32,
961*4882a593Smuzhiyun #endif
962*4882a593Smuzhiyun .s_power = gc032a_power,
963*4882a593Smuzhiyun };
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops gc032a_subdev_video_ops = {
966*4882a593Smuzhiyun .s_stream = gc032a_s_stream,
967*4882a593Smuzhiyun .g_mbus_config = gc032a_g_mbus_config,
968*4882a593Smuzhiyun };
969*4882a593Smuzhiyun
970*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops gc032a_subdev_pad_ops = {
971*4882a593Smuzhiyun .enum_mbus_code = gc032a_enum_mbus_code,
972*4882a593Smuzhiyun .enum_frame_size = gc032a_enum_frame_sizes,
973*4882a593Smuzhiyun .enum_frame_interval = gc032a_enum_frame_interval,
974*4882a593Smuzhiyun .get_fmt = gc032a_get_fmt,
975*4882a593Smuzhiyun .set_fmt = gc032a_set_fmt,
976*4882a593Smuzhiyun };
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
979*4882a593Smuzhiyun static const struct v4l2_subdev_ops gc032a_subdev_ops = {
980*4882a593Smuzhiyun .core = &gc032a_subdev_core_ops,
981*4882a593Smuzhiyun .video = &gc032a_subdev_video_ops,
982*4882a593Smuzhiyun .pad = &gc032a_subdev_pad_ops,
983*4882a593Smuzhiyun };
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops gc032a_subdev_internal_ops = {
986*4882a593Smuzhiyun .open = gc032a_open,
987*4882a593Smuzhiyun };
988*4882a593Smuzhiyun #endif
989*4882a593Smuzhiyun
gc032a_detect(struct gc032a * gc032a)990*4882a593Smuzhiyun static int gc032a_detect(struct gc032a *gc032a)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun struct i2c_client *client = gc032a->client;
993*4882a593Smuzhiyun u8 pid, ver;
994*4882a593Smuzhiyun int ret;
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun /* Check sensor revision */
999*4882a593Smuzhiyun ret = gc032a_read(client, REG_SC_CHIP_ID_H, &pid);
1000*4882a593Smuzhiyun if (!ret)
1001*4882a593Smuzhiyun ret = gc032a_read(client, REG_SC_CHIP_ID_L, &ver);
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun if (!ret) {
1004*4882a593Smuzhiyun unsigned short id;
1005*4882a593Smuzhiyun
1006*4882a593Smuzhiyun id = SENSOR_ID(pid, ver);
1007*4882a593Smuzhiyun if (id != GC032A_ID) {
1008*4882a593Smuzhiyun ret = -1;
1009*4882a593Smuzhiyun dev_err(&client->dev,
1010*4882a593Smuzhiyun "Sensor detection failed (%04X, %d)\n",
1011*4882a593Smuzhiyun id, ret);
1012*4882a593Smuzhiyun } else {
1013*4882a593Smuzhiyun dev_info(&client->dev, "Found GC%04X sensor\n", id);
1014*4882a593Smuzhiyun if (!IS_ERR(gc032a->pwdn_gpio))
1015*4882a593Smuzhiyun gpiod_set_value_cansleep(gc032a->pwdn_gpio, 1);
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun return ret;
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun
__gc032a_power_on(struct gc032a * gc032a)1022*4882a593Smuzhiyun static int __gc032a_power_on(struct gc032a *gc032a)
1023*4882a593Smuzhiyun {
1024*4882a593Smuzhiyun int ret;
1025*4882a593Smuzhiyun struct device *dev = &gc032a->client->dev;
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun if (!IS_ERR(gc032a->xvclk)) {
1028*4882a593Smuzhiyun ret = clk_set_rate(gc032a->xvclk, 24000000);
1029*4882a593Smuzhiyun if (ret < 0)
1030*4882a593Smuzhiyun dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun if (!IS_ERR(gc032a->pwdn_gpio)) {
1034*4882a593Smuzhiyun gpiod_set_value_cansleep(gc032a->pwdn_gpio, 1);
1035*4882a593Smuzhiyun usleep_range(2000, 5000);
1036*4882a593Smuzhiyun }
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun if (!IS_ERR(gc032a->supplies)) {
1039*4882a593Smuzhiyun ret = regulator_bulk_enable(GC032A_NUM_SUPPLIES,
1040*4882a593Smuzhiyun gc032a->supplies);
1041*4882a593Smuzhiyun if (ret < 0)
1042*4882a593Smuzhiyun dev_info(dev, "Failed to enable regulators\n");
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun usleep_range(2000, 5000);
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun if (!IS_ERR(gc032a->pwdn_gpio)) {
1048*4882a593Smuzhiyun gpiod_set_value_cansleep(gc032a->pwdn_gpio, 0);
1049*4882a593Smuzhiyun usleep_range(2000, 5000);
1050*4882a593Smuzhiyun }
1051*4882a593Smuzhiyun
1052*4882a593Smuzhiyun if (!IS_ERR(gc032a->xvclk)) {
1053*4882a593Smuzhiyun ret = clk_prepare_enable(gc032a->xvclk);
1054*4882a593Smuzhiyun if (ret < 0)
1055*4882a593Smuzhiyun dev_info(dev, "Failed to enable xvclk\n");
1056*4882a593Smuzhiyun }
1057*4882a593Smuzhiyun
1058*4882a593Smuzhiyun usleep_range(7000, 10000);
1059*4882a593Smuzhiyun gc032a->power_on = true;
1060*4882a593Smuzhiyun return 0;
1061*4882a593Smuzhiyun }
1062*4882a593Smuzhiyun
__gc032a_power_off(struct gc032a * gc032a)1063*4882a593Smuzhiyun static void __gc032a_power_off(struct gc032a *gc032a)
1064*4882a593Smuzhiyun {
1065*4882a593Smuzhiyun if (!IS_ERR(gc032a->xvclk))
1066*4882a593Smuzhiyun clk_disable_unprepare(gc032a->xvclk);
1067*4882a593Smuzhiyun if (!IS_ERR(gc032a->supplies))
1068*4882a593Smuzhiyun regulator_bulk_disable(GC032A_NUM_SUPPLIES, gc032a->supplies);
1069*4882a593Smuzhiyun if (!IS_ERR(gc032a->pwdn_gpio))
1070*4882a593Smuzhiyun gpiod_set_value_cansleep(gc032a->pwdn_gpio, 1);
1071*4882a593Smuzhiyun gc032a->power_on = false;
1072*4882a593Smuzhiyun }
1073*4882a593Smuzhiyun
gc032a_configure_regulators(struct gc032a * gc032a)1074*4882a593Smuzhiyun static int gc032a_configure_regulators(struct gc032a *gc032a)
1075*4882a593Smuzhiyun {
1076*4882a593Smuzhiyun unsigned int i;
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun for (i = 0; i < GC032A_NUM_SUPPLIES; i++)
1079*4882a593Smuzhiyun gc032a->supplies[i].supply = gc032a_supply_names[i];
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun return devm_regulator_bulk_get(&gc032a->client->dev,
1082*4882a593Smuzhiyun GC032A_NUM_SUPPLIES,
1083*4882a593Smuzhiyun gc032a->supplies);
1084*4882a593Smuzhiyun }
1085*4882a593Smuzhiyun
gc032a_parse_of(struct gc032a * gc032a)1086*4882a593Smuzhiyun static int gc032a_parse_of(struct gc032a *gc032a)
1087*4882a593Smuzhiyun {
1088*4882a593Smuzhiyun struct device *dev = &gc032a->client->dev;
1089*4882a593Smuzhiyun int ret;
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun gc032a->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1092*4882a593Smuzhiyun if (IS_ERR(gc032a->pwdn_gpio))
1093*4882a593Smuzhiyun dev_info(dev, "Failed to get pwdn-gpios, maybe no used\n");
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun ret = gc032a_configure_regulators(gc032a);
1096*4882a593Smuzhiyun if (ret)
1097*4882a593Smuzhiyun dev_info(dev, "Failed to get power regulators\n");
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun return __gc032a_power_on(gc032a);
1100*4882a593Smuzhiyun }
1101*4882a593Smuzhiyun
gc032a_probe(struct i2c_client * client,const struct i2c_device_id * id)1102*4882a593Smuzhiyun static int gc032a_probe(struct i2c_client *client,
1103*4882a593Smuzhiyun const struct i2c_device_id *id)
1104*4882a593Smuzhiyun {
1105*4882a593Smuzhiyun struct device *dev = &client->dev;
1106*4882a593Smuzhiyun struct device_node *node = dev->of_node;
1107*4882a593Smuzhiyun struct v4l2_subdev *sd;
1108*4882a593Smuzhiyun struct gc032a *gc032a;
1109*4882a593Smuzhiyun char facing[2];
1110*4882a593Smuzhiyun int ret;
1111*4882a593Smuzhiyun
1112*4882a593Smuzhiyun dev_info(dev, "driver version: %02x.%02x.%02x",
1113*4882a593Smuzhiyun DRIVER_VERSION >> 16,
1114*4882a593Smuzhiyun (DRIVER_VERSION & 0xff00) >> 8,
1115*4882a593Smuzhiyun DRIVER_VERSION & 0x00ff);
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun gc032a = devm_kzalloc(&client->dev, sizeof(*gc032a), GFP_KERNEL);
1118*4882a593Smuzhiyun if (!gc032a)
1119*4882a593Smuzhiyun return -ENOMEM;
1120*4882a593Smuzhiyun
1121*4882a593Smuzhiyun ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1122*4882a593Smuzhiyun &gc032a->module_index);
1123*4882a593Smuzhiyun ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1124*4882a593Smuzhiyun &gc032a->module_facing);
1125*4882a593Smuzhiyun ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1126*4882a593Smuzhiyun &gc032a->module_name);
1127*4882a593Smuzhiyun ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1128*4882a593Smuzhiyun &gc032a->len_name);
1129*4882a593Smuzhiyun if (ret) {
1130*4882a593Smuzhiyun dev_err(dev, "could not get module information!\n");
1131*4882a593Smuzhiyun return -EINVAL;
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun gc032a->client = client;
1135*4882a593Smuzhiyun gc032a->xvclk = devm_clk_get(&client->dev, "xvclk");
1136*4882a593Smuzhiyun if (IS_ERR(gc032a->xvclk)) {
1137*4882a593Smuzhiyun dev_err(&client->dev, "Failed to get xvclk\n");
1138*4882a593Smuzhiyun return -EINVAL;
1139*4882a593Smuzhiyun }
1140*4882a593Smuzhiyun
1141*4882a593Smuzhiyun gc032a_parse_of(gc032a);
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun gc032a->xvclk_frequency = clk_get_rate(gc032a->xvclk);
1144*4882a593Smuzhiyun if (gc032a->xvclk_frequency < 6000000 ||
1145*4882a593Smuzhiyun gc032a->xvclk_frequency > 27000000)
1146*4882a593Smuzhiyun return -EINVAL;
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun v4l2_ctrl_handler_init(&gc032a->ctrls, 2);
1149*4882a593Smuzhiyun gc032a->link_frequency =
1150*4882a593Smuzhiyun v4l2_ctrl_new_std(&gc032a->ctrls, &gc032a_ctrl_ops,
1151*4882a593Smuzhiyun V4L2_CID_PIXEL_RATE, 0,
1152*4882a593Smuzhiyun GC032A_PIXEL_RATE, 1,
1153*4882a593Smuzhiyun GC032A_PIXEL_RATE);
1154*4882a593Smuzhiyun
1155*4882a593Smuzhiyun v4l2_ctrl_new_std_menu_items(&gc032a->ctrls, &gc032a_ctrl_ops,
1156*4882a593Smuzhiyun V4L2_CID_TEST_PATTERN,
1157*4882a593Smuzhiyun ARRAY_SIZE(gc032a_test_pattern_menu) - 1,
1158*4882a593Smuzhiyun 0, 0, gc032a_test_pattern_menu);
1159*4882a593Smuzhiyun gc032a->sd.ctrl_handler = &gc032a->ctrls;
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun if (gc032a->ctrls.error) {
1162*4882a593Smuzhiyun dev_err(&client->dev, "%s: control initialization error %d\n",
1163*4882a593Smuzhiyun __func__, gc032a->ctrls.error);
1164*4882a593Smuzhiyun return gc032a->ctrls.error;
1165*4882a593Smuzhiyun }
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun sd = &gc032a->sd;
1168*4882a593Smuzhiyun client->flags |= I2C_CLIENT_SCCB;
1169*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1170*4882a593Smuzhiyun v4l2_i2c_subdev_init(sd, client, &gc032a_subdev_ops);
1171*4882a593Smuzhiyun
1172*4882a593Smuzhiyun sd->internal_ops = &gc032a_subdev_internal_ops;
1173*4882a593Smuzhiyun sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1174*4882a593Smuzhiyun V4L2_SUBDEV_FL_HAS_EVENTS;
1175*4882a593Smuzhiyun #endif
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1178*4882a593Smuzhiyun gc032a->pad.flags = MEDIA_PAD_FL_SOURCE;
1179*4882a593Smuzhiyun sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1180*4882a593Smuzhiyun ret = media_entity_pads_init(&sd->entity, 1, &gc032a->pad);
1181*4882a593Smuzhiyun if (ret < 0) {
1182*4882a593Smuzhiyun v4l2_ctrl_handler_free(&gc032a->ctrls);
1183*4882a593Smuzhiyun return ret;
1184*4882a593Smuzhiyun }
1185*4882a593Smuzhiyun #endif
1186*4882a593Smuzhiyun
1187*4882a593Smuzhiyun mutex_init(&gc032a->lock);
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun gc032a_get_default_format(&gc032a->format);
1190*4882a593Smuzhiyun gc032a->frame_size = &gc032a_framesizes[0];
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun ret = gc032a_detect(gc032a);
1193*4882a593Smuzhiyun if (ret < 0)
1194*4882a593Smuzhiyun goto error;
1195*4882a593Smuzhiyun
1196*4882a593Smuzhiyun memset(facing, 0, sizeof(facing));
1197*4882a593Smuzhiyun if (strcmp(gc032a->module_facing, "back") == 0)
1198*4882a593Smuzhiyun facing[0] = 'b';
1199*4882a593Smuzhiyun else
1200*4882a593Smuzhiyun facing[0] = 'f';
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1203*4882a593Smuzhiyun gc032a->module_index, facing,
1204*4882a593Smuzhiyun DRIVER_NAME, dev_name(sd->dev));
1205*4882a593Smuzhiyun ret = v4l2_async_register_subdev_sensor_common(sd);
1206*4882a593Smuzhiyun if (ret)
1207*4882a593Smuzhiyun goto error;
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
1210*4882a593Smuzhiyun gc032a->power_on = false;
1211*4882a593Smuzhiyun return 0;
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun error:
1214*4882a593Smuzhiyun v4l2_ctrl_handler_free(&gc032a->ctrls);
1215*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1216*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
1217*4882a593Smuzhiyun #endif
1218*4882a593Smuzhiyun mutex_destroy(&gc032a->lock);
1219*4882a593Smuzhiyun __gc032a_power_off(gc032a);
1220*4882a593Smuzhiyun return ret;
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun
gc032a_remove(struct i2c_client * client)1223*4882a593Smuzhiyun static int gc032a_remove(struct i2c_client *client)
1224*4882a593Smuzhiyun {
1225*4882a593Smuzhiyun struct v4l2_subdev *sd = i2c_get_clientdata(client);
1226*4882a593Smuzhiyun struct gc032a *gc032a = to_gc032a(sd);
1227*4882a593Smuzhiyun
1228*4882a593Smuzhiyun v4l2_ctrl_handler_free(&gc032a->ctrls);
1229*4882a593Smuzhiyun v4l2_async_unregister_subdev(sd);
1230*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1231*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
1232*4882a593Smuzhiyun #endif
1233*4882a593Smuzhiyun mutex_destroy(&gc032a->lock);
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun __gc032a_power_off(gc032a);
1236*4882a593Smuzhiyun
1237*4882a593Smuzhiyun return 0;
1238*4882a593Smuzhiyun }
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun static const struct i2c_device_id gc032a_id[] = {
1241*4882a593Smuzhiyun { "gc032a", 0 },
1242*4882a593Smuzhiyun { /* sentinel */ },
1243*4882a593Smuzhiyun };
1244*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, gc032a_id);
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
1247*4882a593Smuzhiyun static const struct of_device_id gc032a_of_match[] = {
1248*4882a593Smuzhiyun { .compatible = "galaxycore,gc032a", },
1249*4882a593Smuzhiyun { /* sentinel */ },
1250*4882a593Smuzhiyun };
1251*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, gc032a_of_match);
1252*4882a593Smuzhiyun #endif
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun static struct i2c_driver gc032a_i2c_driver = {
1255*4882a593Smuzhiyun .driver = {
1256*4882a593Smuzhiyun .name = DRIVER_NAME,
1257*4882a593Smuzhiyun .of_match_table = of_match_ptr(gc032a_of_match),
1258*4882a593Smuzhiyun },
1259*4882a593Smuzhiyun .probe = gc032a_probe,
1260*4882a593Smuzhiyun .remove = gc032a_remove,
1261*4882a593Smuzhiyun .id_table = gc032a_id,
1262*4882a593Smuzhiyun };
1263*4882a593Smuzhiyun
sensor_mod_init(void)1264*4882a593Smuzhiyun static int __init sensor_mod_init(void)
1265*4882a593Smuzhiyun {
1266*4882a593Smuzhiyun return i2c_add_driver(&gc032a_i2c_driver);
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun
sensor_mod_exit(void)1269*4882a593Smuzhiyun static void __exit sensor_mod_exit(void)
1270*4882a593Smuzhiyun {
1271*4882a593Smuzhiyun i2c_del_driver(&gc032a_i2c_driver);
1272*4882a593Smuzhiyun }
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun device_initcall_sync(sensor_mod_init);
1275*4882a593Smuzhiyun module_exit(sensor_mod_exit);
1276*4882a593Smuzhiyun
1277*4882a593Smuzhiyun MODULE_AUTHOR("randy.wang <randy.wang@rock-chips.com>");
1278*4882a593Smuzhiyun MODULE_DESCRIPTION("GC032A CMOS Image Sensor driver");
1279*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1280