xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/gc0329.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * gc0329 sensor driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun  * V0.0X01.0X01 add enum_frame_interval function.
7*4882a593Smuzhiyun  * V0.0X01.0X02 add quick stream on/off
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/media.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/of.h>
22*4882a593Smuzhiyun #include <linux/of_graph.h>
23*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <linux/uaccess.h>
26*4882a593Smuzhiyun #include <linux/videodev2.h>
27*4882a593Smuzhiyun #include <linux/version.h>
28*4882a593Smuzhiyun #include <linux/rk-camera-module.h>
29*4882a593Smuzhiyun #include <media/media-entity.h>
30*4882a593Smuzhiyun #include <media/v4l2-common.h>
31*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
32*4882a593Smuzhiyun #include <media/v4l2-device.h>
33*4882a593Smuzhiyun #include <media/v4l2-event.h>
34*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
35*4882a593Smuzhiyun #include <media/v4l2-image-sizes.h>
36*4882a593Smuzhiyun #include <media/v4l2-mediabus.h>
37*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x2)
40*4882a593Smuzhiyun #define DRIVER_NAME "gc0329"
41*4882a593Smuzhiyun #define GC0329_PIXEL_RATE		(24 * 1000 * 1000)
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun  * GC0329 register definitions
45*4882a593Smuzhiyun  */
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define REG_SC_CHIP_ID			0x00
48*4882a593Smuzhiyun #define GC0329_ID			0xc0
49*4882a593Smuzhiyun #define REG_NULL			0xFFFF	/* Array end token */
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun struct sensor_register {
52*4882a593Smuzhiyun 	u16 addr;
53*4882a593Smuzhiyun 	u8 value;
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun struct gc0329_framesize {
57*4882a593Smuzhiyun 	u16 width;
58*4882a593Smuzhiyun 	u16 height;
59*4882a593Smuzhiyun 	struct v4l2_fract max_fps;
60*4882a593Smuzhiyun 	const struct sensor_register *regs;
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun struct gc0329_pll_ctrl {
64*4882a593Smuzhiyun 	u8 ctrl1;
65*4882a593Smuzhiyun 	u8 ctrl2;
66*4882a593Smuzhiyun 	u8 ctrl3;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun struct gc0329_pixfmt {
70*4882a593Smuzhiyun 	u32 code;
71*4882a593Smuzhiyun 	/* Output format Register Value (REG_FORMAT_CTRL00) */
72*4882a593Smuzhiyun 	struct sensor_register *format_ctrl_regs;
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun struct pll_ctrl_reg {
76*4882a593Smuzhiyun 	unsigned int div;
77*4882a593Smuzhiyun 	unsigned char reg;
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static const char * const gc0329_supply_names[] = {
81*4882a593Smuzhiyun 	"dovdd",	/* Digital I/O power */
82*4882a593Smuzhiyun 	"avdd",		/* Analog power */
83*4882a593Smuzhiyun 	"dvdd",		/* Digital core power */
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #define GC0329_NUM_SUPPLIES ARRAY_SIZE(gc0329_supply_names)
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun struct gc0329 {
89*4882a593Smuzhiyun 	struct v4l2_subdev sd;
90*4882a593Smuzhiyun 	struct media_pad pad;
91*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt format;
92*4882a593Smuzhiyun 	unsigned int fps;
93*4882a593Smuzhiyun 	unsigned int xvclk_frequency;
94*4882a593Smuzhiyun 	struct clk *xvclk;
95*4882a593Smuzhiyun 	struct gpio_desc *pwdn_gpio;
96*4882a593Smuzhiyun 	struct regulator_bulk_data supplies[GC0329_NUM_SUPPLIES];
97*4882a593Smuzhiyun 	struct mutex lock; /* Protects streaming, format, interval */
98*4882a593Smuzhiyun 	struct i2c_client *client;
99*4882a593Smuzhiyun 	struct v4l2_ctrl_handler ctrls;
100*4882a593Smuzhiyun 	struct v4l2_ctrl *link_frequency;
101*4882a593Smuzhiyun 	const struct gc0329_framesize *frame_size;
102*4882a593Smuzhiyun 	int streaming;
103*4882a593Smuzhiyun 	u32 module_index;
104*4882a593Smuzhiyun 	const char *module_facing;
105*4882a593Smuzhiyun 	const char *module_name;
106*4882a593Smuzhiyun 	const char *len_name;
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun static const struct sensor_register gc0329_vga_regs[] = {
110*4882a593Smuzhiyun 	{0xfe, 0x80},
111*4882a593Smuzhiyun 	{0xfc, 0x16},
112*4882a593Smuzhiyun 	{0xfc, 0x16},
113*4882a593Smuzhiyun 	{0xfe, 0x00},
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	{0x73, 0x90},
116*4882a593Smuzhiyun 	{0x74, 0x80},
117*4882a593Smuzhiyun 	{0x75, 0x80},
118*4882a593Smuzhiyun 	{0x76, 0x94},
119*4882a593Smuzhiyun 	/* analog */
120*4882a593Smuzhiyun 	{0xfc, 0x16},
121*4882a593Smuzhiyun 	{0x0a, 0x00},
122*4882a593Smuzhiyun 	{0x0c, 0x00},
123*4882a593Smuzhiyun 	{0x17, 0x14},
124*4882a593Smuzhiyun 	{0x19, 0x05},
125*4882a593Smuzhiyun 	{0x1b, 0x24},
126*4882a593Smuzhiyun 	{0x1c, 0x04},
127*4882a593Smuzhiyun 	{0x1e, 0x00},
128*4882a593Smuzhiyun 	{0x1f, 0xc0},
129*4882a593Smuzhiyun 	{0x20, 0x00},
130*4882a593Smuzhiyun 	{0x21, 0x48},
131*4882a593Smuzhiyun 	{0x23, 0x22},
132*4882a593Smuzhiyun 	{0x24, 0x16},
133*4882a593Smuzhiyun 	/*   blk  */
134*4882a593Smuzhiyun 	{0x26, 0xf7},
135*4882a593Smuzhiyun 	{0x32, 0x04},
136*4882a593Smuzhiyun 	{0x33, 0x20},
137*4882a593Smuzhiyun 	{0x34, 0x20},
138*4882a593Smuzhiyun 	{0x35, 0x20},
139*4882a593Smuzhiyun 	{0x36, 0x20},
140*4882a593Smuzhiyun 	/*   ISP  */
141*4882a593Smuzhiyun 	{0x40, 0xff},
142*4882a593Smuzhiyun 	{0x41, 0x00},
143*4882a593Smuzhiyun 	{0x42, 0xfe},
144*4882a593Smuzhiyun 	{0x46, 0x03},
145*4882a593Smuzhiyun 	{0x4b, 0xcb},
146*4882a593Smuzhiyun 	{0x4d, 0x01},
147*4882a593Smuzhiyun 	{0x4f, 0x01},
148*4882a593Smuzhiyun 	{0x70, 0x48},
149*4882a593Smuzhiyun 	/*  DNDD  */
150*4882a593Smuzhiyun 	{0x80, 0xe7},
151*4882a593Smuzhiyun 	{0x82, 0x55},
152*4882a593Smuzhiyun 	{0x87, 0x4a},
153*4882a593Smuzhiyun 	/*  ASDE  */
154*4882a593Smuzhiyun 	{0xfe, 0x01},
155*4882a593Smuzhiyun 	{0x18, 0x22},
156*4882a593Smuzhiyun 	{0xfe, 0x00},
157*4882a593Smuzhiyun 	{0x9c, 0x0a},
158*4882a593Smuzhiyun 	{0xa4, 0x50},
159*4882a593Smuzhiyun 	{0xa5, 0x21},
160*4882a593Smuzhiyun 	{0xa7, 0x35},
161*4882a593Smuzhiyun 	{0xdd, 0x54},
162*4882a593Smuzhiyun 	{0x95, 0x35},
163*4882a593Smuzhiyun 	/*  gamma */
164*4882a593Smuzhiyun 	{0xfe, 0x00},
165*4882a593Smuzhiyun 	{0xbf, 0x06},
166*4882a593Smuzhiyun 	{0xc0, 0x14},
167*4882a593Smuzhiyun 	{0xc1, 0x27},
168*4882a593Smuzhiyun 	{0xc2, 0x3b},
169*4882a593Smuzhiyun 	{0xc3, 0x4f},
170*4882a593Smuzhiyun 	{0xc4, 0x62},
171*4882a593Smuzhiyun 	{0xc5, 0x72},
172*4882a593Smuzhiyun 	{0xc6, 0x8d},
173*4882a593Smuzhiyun 	{0xc7, 0xa4},
174*4882a593Smuzhiyun 	{0xc8, 0xb8},
175*4882a593Smuzhiyun 	{0xc9, 0xc9},
176*4882a593Smuzhiyun 	{0xca, 0xd6},
177*4882a593Smuzhiyun 	{0xcb, 0xe0},
178*4882a593Smuzhiyun 	{0xcc, 0xe8},
179*4882a593Smuzhiyun 	{0xcd, 0xf4},
180*4882a593Smuzhiyun 	{0xce, 0xfc},
181*4882a593Smuzhiyun 	{0xcf, 0xff},
182*4882a593Smuzhiyun 	/*   CC   */
183*4882a593Smuzhiyun 	{0xfe, 0x00},
184*4882a593Smuzhiyun 	{0xb3, 0x44},
185*4882a593Smuzhiyun 	{0xb4, 0xfd},
186*4882a593Smuzhiyun 	{0xb5, 0x02},
187*4882a593Smuzhiyun 	{0xb6, 0xfa},
188*4882a593Smuzhiyun 	{0xb7, 0x48},
189*4882a593Smuzhiyun 	{0xb8, 0xf0},
190*4882a593Smuzhiyun 	/*  crop  */
191*4882a593Smuzhiyun 	{0x50, 0x01},
192*4882a593Smuzhiyun 	{0x19, 0x05},
193*4882a593Smuzhiyun 	{0x20, 0x01},
194*4882a593Smuzhiyun 	{0x22, 0xba},
195*4882a593Smuzhiyun 	{0x21, 0x48},
196*4882a593Smuzhiyun 	/*   YCP  */
197*4882a593Smuzhiyun 	{0xfe, 0x00},
198*4882a593Smuzhiyun 	{0xd1, 0x34},
199*4882a593Smuzhiyun 	{0xd2, 0x34},
200*4882a593Smuzhiyun 	/*   AEC  */
201*4882a593Smuzhiyun 	{0xfe, 0x01},
202*4882a593Smuzhiyun 	{0x10, 0x40},
203*4882a593Smuzhiyun 	{0x11, 0x21},
204*4882a593Smuzhiyun 	{0x12, 0x07},
205*4882a593Smuzhiyun 	{0x13, 0x50},
206*4882a593Smuzhiyun 	{0x17, 0x88},
207*4882a593Smuzhiyun 	{0x21, 0xb0},
208*4882a593Smuzhiyun 	{0x22, 0x48},
209*4882a593Smuzhiyun 	{0x3c, 0x95},
210*4882a593Smuzhiyun 	{0x3d, 0x50},
211*4882a593Smuzhiyun 	{0x3e, 0x48},
212*4882a593Smuzhiyun 	/*   AWB  */
213*4882a593Smuzhiyun 	{0xfe, 0x01},
214*4882a593Smuzhiyun 	{0x06, 0x08},
215*4882a593Smuzhiyun 	{0x07, 0x06},
216*4882a593Smuzhiyun 	{0x08, 0xa6},
217*4882a593Smuzhiyun 	{0x09, 0xee},
218*4882a593Smuzhiyun 	{0x50, 0xfc},
219*4882a593Smuzhiyun 	{0x51, 0x28},
220*4882a593Smuzhiyun 	{0x52, 0x10},
221*4882a593Smuzhiyun 	{0x53, 0x08},
222*4882a593Smuzhiyun 	{0x54, 0x12},
223*4882a593Smuzhiyun 	{0x55, 0x10},
224*4882a593Smuzhiyun 	{0x56, 0x10},
225*4882a593Smuzhiyun 	{0x58, 0x80},
226*4882a593Smuzhiyun 	{0x59, 0x08},
227*4882a593Smuzhiyun 	{0x5a, 0x02},
228*4882a593Smuzhiyun 	{0x5b, 0x63},
229*4882a593Smuzhiyun 	{0x5c, 0x34},
230*4882a593Smuzhiyun 	{0x5d, 0x73},
231*4882a593Smuzhiyun 	{0x5e, 0x29},
232*4882a593Smuzhiyun 	{0x5f, 0x40},
233*4882a593Smuzhiyun 	{0x60, 0x40},
234*4882a593Smuzhiyun 	{0x61, 0xc8},
235*4882a593Smuzhiyun 	{0x62, 0xa0},
236*4882a593Smuzhiyun 	{0x63, 0x40},
237*4882a593Smuzhiyun 	{0x64, 0x38},
238*4882a593Smuzhiyun 	{0x65, 0x98},
239*4882a593Smuzhiyun 	{0x66, 0xfa},
240*4882a593Smuzhiyun 	{0x67, 0x80},
241*4882a593Smuzhiyun 	{0x68, 0x60},
242*4882a593Smuzhiyun 	{0x69, 0x90},
243*4882a593Smuzhiyun 	{0x6a, 0x40},
244*4882a593Smuzhiyun 	{0x6b, 0x39},
245*4882a593Smuzhiyun 	{0x6c, 0x28},
246*4882a593Smuzhiyun 	{0x6d, 0x28},
247*4882a593Smuzhiyun 	{0x6e, 0x41},
248*4882a593Smuzhiyun 	{0x70, 0x10},
249*4882a593Smuzhiyun 	{0x71, 0x00},
250*4882a593Smuzhiyun 	{0x72, 0x08},
251*4882a593Smuzhiyun 	{0x73, 0x40},
252*4882a593Smuzhiyun 	{0x80, 0x70},
253*4882a593Smuzhiyun 	{0x81, 0x58},
254*4882a593Smuzhiyun 	{0x82, 0x42},
255*4882a593Smuzhiyun 	{0x83, 0x40},
256*4882a593Smuzhiyun 	{0x84, 0x40},
257*4882a593Smuzhiyun 	{0x85, 0x40},
258*4882a593Smuzhiyun 	/* CC-AWB */
259*4882a593Smuzhiyun 	{0xd0, 0x00},
260*4882a593Smuzhiyun 	{0xd2, 0x2c},
261*4882a593Smuzhiyun 	{0xd3, 0x80},
262*4882a593Smuzhiyun 	/*   ABS  */
263*4882a593Smuzhiyun 	{0x9c, 0x02},
264*4882a593Smuzhiyun 	{0x9d, 0x10},
265*4882a593Smuzhiyun 	/*   LSC  */
266*4882a593Smuzhiyun 	{0xfe, 0x01},
267*4882a593Smuzhiyun 	{0xa0, 0x00},
268*4882a593Smuzhiyun 	{0xa1, 0x3c},
269*4882a593Smuzhiyun 	{0xa2, 0x50},
270*4882a593Smuzhiyun 	{0xa3, 0x00},
271*4882a593Smuzhiyun 	{0xa8, 0x0f},
272*4882a593Smuzhiyun 	{0xa9, 0x08},
273*4882a593Smuzhiyun 	{0xaa, 0x00},
274*4882a593Smuzhiyun 	{0xab, 0x04},
275*4882a593Smuzhiyun 	{0xac, 0x00},
276*4882a593Smuzhiyun 	{0xad, 0x07},
277*4882a593Smuzhiyun 	{0xae, 0x0e},
278*4882a593Smuzhiyun 	{0xaf, 0x00},
279*4882a593Smuzhiyun 	{0xb0, 0x00},
280*4882a593Smuzhiyun 	{0xb1, 0x09},
281*4882a593Smuzhiyun 	{0xb2, 0x00},
282*4882a593Smuzhiyun 	{0xb3, 0x00},
283*4882a593Smuzhiyun 	{0xb4, 0x31},
284*4882a593Smuzhiyun 	{0xb5, 0x19},
285*4882a593Smuzhiyun 	{0xb6, 0x24},
286*4882a593Smuzhiyun 	{0xba, 0x3a},
287*4882a593Smuzhiyun 	{0xbb, 0x24},
288*4882a593Smuzhiyun 	{0xbc, 0x2a},
289*4882a593Smuzhiyun 	{0xc0, 0x17},
290*4882a593Smuzhiyun 	{0xc1, 0x13},
291*4882a593Smuzhiyun 	{0xc2, 0x17},
292*4882a593Smuzhiyun 	{0xc6, 0x21},
293*4882a593Smuzhiyun 	{0xc7, 0x1c},
294*4882a593Smuzhiyun 	{0xc8, 0x1c},
295*4882a593Smuzhiyun 	{0xb7, 0x00},
296*4882a593Smuzhiyun 	{0xb8, 0x00},
297*4882a593Smuzhiyun 	{0xb9, 0x00},
298*4882a593Smuzhiyun 	{0xbd, 0x00},
299*4882a593Smuzhiyun 	{0xbe, 0x00},
300*4882a593Smuzhiyun 	{0xbf, 0x00},
301*4882a593Smuzhiyun 	{0xc3, 0x00},
302*4882a593Smuzhiyun 	{0xc4, 0x00},
303*4882a593Smuzhiyun 	{0xc5, 0x00},
304*4882a593Smuzhiyun 	{0xc9, 0x00},
305*4882a593Smuzhiyun 	{0xca, 0x00},
306*4882a593Smuzhiyun 	{0xcb, 0x00},
307*4882a593Smuzhiyun 	{0xa4, 0x00},
308*4882a593Smuzhiyun 	{0xa5, 0x00},
309*4882a593Smuzhiyun 	{0xa6, 0x00},
310*4882a593Smuzhiyun 	{0xa7, 0x00},
311*4882a593Smuzhiyun 	/*  asde  */
312*4882a593Smuzhiyun 	{0xfe, 0x00},
313*4882a593Smuzhiyun 	{0xa0, 0xaf},
314*4882a593Smuzhiyun 	{0xa2, 0xff},
315*4882a593Smuzhiyun 	{0x44, 0xa2},
316*4882a593Smuzhiyun 	{REG_NULL, 0x00},
317*4882a593Smuzhiyun };
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun static const struct sensor_register gc0329_vga_regs_14fps[] = {
320*4882a593Smuzhiyun 	/* flicker 14.2fps */
321*4882a593Smuzhiyun 	{0xfe, 0x00},
322*4882a593Smuzhiyun 	{0x05, 0x02},
323*4882a593Smuzhiyun 	{0x06, 0x2c},
324*4882a593Smuzhiyun 	{0x07, 0x00},
325*4882a593Smuzhiyun 	{0x08, 0xb8},
326*4882a593Smuzhiyun 	{0xfe, 0x01},
327*4882a593Smuzhiyun 	{0x29, 0x00},
328*4882a593Smuzhiyun 	{0x2a, 0x60},
329*4882a593Smuzhiyun 	{0x2b, 0x02},
330*4882a593Smuzhiyun 	{0x2c, 0xa0},
331*4882a593Smuzhiyun 	{0x2d, 0x02},
332*4882a593Smuzhiyun 	{0x2e, 0xa0},
333*4882a593Smuzhiyun 	{0x2f, 0x02},
334*4882a593Smuzhiyun 	{0x30, 0xa0},
335*4882a593Smuzhiyun 	{0x31, 0x02},
336*4882a593Smuzhiyun 	{0x32, 0xa0},
337*4882a593Smuzhiyun 	{0x33, 0x20},
338*4882a593Smuzhiyun 	{REG_NULL, 0x00},
339*4882a593Smuzhiyun };
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun static const struct sensor_register gc0329_vga_regs_30fps[] = {
342*4882a593Smuzhiyun 	/* flicker 30fps */
343*4882a593Smuzhiyun 	{0xfe, 0x00},
344*4882a593Smuzhiyun 	{0x05, 0x00},
345*4882a593Smuzhiyun 	{0x06, 0x56},
346*4882a593Smuzhiyun 	{0x07, 0x00},
347*4882a593Smuzhiyun 	{0x08, 0x10},
348*4882a593Smuzhiyun 	{0xfe, 0x01},
349*4882a593Smuzhiyun 	{0x29, 0x00},
350*4882a593Smuzhiyun 	{0x2a, 0xa0},
351*4882a593Smuzhiyun 	{0x2b, 0x01},
352*4882a593Smuzhiyun 	{0x2c, 0xe0},
353*4882a593Smuzhiyun 	{0x2d, 0x01},
354*4882a593Smuzhiyun 	{0x2e, 0xe0},
355*4882a593Smuzhiyun 	{0x2f, 0x01},
356*4882a593Smuzhiyun 	{0x30, 0xe0},
357*4882a593Smuzhiyun 	{0x31, 0x01},
358*4882a593Smuzhiyun 	{0x32, 0xe0},
359*4882a593Smuzhiyun 	{0x33, 0x20},
360*4882a593Smuzhiyun 	{REG_NULL, 0x00},
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun static const struct gc0329_framesize gc0329_framesizes[] = {
364*4882a593Smuzhiyun 	{
365*4882a593Smuzhiyun 		.width		= 640,
366*4882a593Smuzhiyun 		.height		= 480,
367*4882a593Smuzhiyun 		.max_fps = {
368*4882a593Smuzhiyun 			.numerator = 10000,
369*4882a593Smuzhiyun 			.denominator = 140000,
370*4882a593Smuzhiyun 		},
371*4882a593Smuzhiyun 		.regs		= gc0329_vga_regs_14fps,
372*4882a593Smuzhiyun 	},
373*4882a593Smuzhiyun 	{
374*4882a593Smuzhiyun 		.width		= 640,
375*4882a593Smuzhiyun 		.height		= 480,
376*4882a593Smuzhiyun 		.max_fps = {
377*4882a593Smuzhiyun 			.numerator = 10000,
378*4882a593Smuzhiyun 			.denominator = 300000,
379*4882a593Smuzhiyun 		},
380*4882a593Smuzhiyun 		.regs		= gc0329_vga_regs_30fps,
381*4882a593Smuzhiyun 	}
382*4882a593Smuzhiyun };
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun static const struct gc0329_pixfmt gc0329_formats[] = {
385*4882a593Smuzhiyun 	{
386*4882a593Smuzhiyun 		.code = MEDIA_BUS_FMT_YUYV8_2X8,
387*4882a593Smuzhiyun 	}
388*4882a593Smuzhiyun };
389*4882a593Smuzhiyun 
to_gc0329(struct v4l2_subdev * sd)390*4882a593Smuzhiyun static inline struct gc0329 *to_gc0329(struct v4l2_subdev *sd)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun 	return container_of(sd, struct gc0329, sd);
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun /* sensor register write */
gc0329_write(struct i2c_client * client,u8 reg,u8 val)396*4882a593Smuzhiyun static int gc0329_write(struct i2c_client *client, u8 reg, u8 val)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	struct i2c_msg msg;
399*4882a593Smuzhiyun 	u8 buf[2];
400*4882a593Smuzhiyun 	int ret;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 	buf[0] = reg & 0xFF;
403*4882a593Smuzhiyun 	buf[1] = val;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	msg.addr = client->addr;
406*4882a593Smuzhiyun 	msg.flags = client->flags;
407*4882a593Smuzhiyun 	msg.buf = buf;
408*4882a593Smuzhiyun 	msg.len = sizeof(buf);
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	ret = i2c_transfer(client->adapter, &msg, 1);
411*4882a593Smuzhiyun 	if (ret >= 0)
412*4882a593Smuzhiyun 		return 0;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	dev_err(&client->dev,
415*4882a593Smuzhiyun 		"gc0329 write reg(0x%x val:0x%x) failed !\n", reg, val);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	return ret;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun /* sensor register read */
gc0329_read(struct i2c_client * client,u8 reg,u8 * val)421*4882a593Smuzhiyun static int gc0329_read(struct i2c_client *client, u8 reg, u8 *val)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun 	struct i2c_msg msg[2];
424*4882a593Smuzhiyun 	u8 buf[1];
425*4882a593Smuzhiyun 	int ret;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	buf[0] = reg & 0xFF;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	msg[0].addr = client->addr;
430*4882a593Smuzhiyun 	msg[0].flags = client->flags;
431*4882a593Smuzhiyun 	msg[0].buf = buf;
432*4882a593Smuzhiyun 	msg[0].len = sizeof(buf);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	msg[1].addr = client->addr;
435*4882a593Smuzhiyun 	msg[1].flags = client->flags | I2C_M_RD;
436*4882a593Smuzhiyun 	msg[1].buf = buf;
437*4882a593Smuzhiyun 	msg[1].len = 1;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	ret = i2c_transfer(client->adapter, msg, 2);
440*4882a593Smuzhiyun 	if (ret >= 0) {
441*4882a593Smuzhiyun 		*val = buf[0];
442*4882a593Smuzhiyun 		return 0;
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	dev_err(&client->dev,
446*4882a593Smuzhiyun 		"gc0329 read reg:0x%x failed!\n", reg);
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	return ret;
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun 
gc0329_write_array(struct i2c_client * client,const struct sensor_register * regs)451*4882a593Smuzhiyun static int gc0329_write_array(struct i2c_client *client,
452*4882a593Smuzhiyun 			      const struct sensor_register *regs)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun 	int i, ret = 0;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	i = 0;
457*4882a593Smuzhiyun 	while (regs[i].addr != REG_NULL) {
458*4882a593Smuzhiyun 		ret = gc0329_write(client, regs[i].addr, regs[i].value);
459*4882a593Smuzhiyun 		if (ret) {
460*4882a593Smuzhiyun 			dev_err(&client->dev, "%s failed !\n", __func__);
461*4882a593Smuzhiyun 			break;
462*4882a593Smuzhiyun 		}
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 		i++;
465*4882a593Smuzhiyun 	}
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	return ret;
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
gc0329_get_default_format(struct v4l2_mbus_framefmt * format)470*4882a593Smuzhiyun static void gc0329_get_default_format(struct v4l2_mbus_framefmt *format)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun 	format->width = gc0329_framesizes[0].width;
473*4882a593Smuzhiyun 	format->height = gc0329_framesizes[0].height;
474*4882a593Smuzhiyun 	format->colorspace = V4L2_COLORSPACE_SRGB;
475*4882a593Smuzhiyun 	format->code = gc0329_formats[0].code;
476*4882a593Smuzhiyun 	format->field = V4L2_FIELD_NONE;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun 
gc0329_set_streaming(struct gc0329 * gc0329,int on)479*4882a593Smuzhiyun static void gc0329_set_streaming(struct gc0329 *gc0329, int on)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun 	struct i2c_client *client = gc0329->client;
482*4882a593Smuzhiyun 	int ret;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	ret = gc0329_write(client, 0xfe, 0x00);
487*4882a593Smuzhiyun 	if (!on) {
488*4882a593Smuzhiyun 		ret |= gc0329_write(client, 0xfc, 0x17);
489*4882a593Smuzhiyun 		ret |= gc0329_write(client, 0xf0, 0x00);
490*4882a593Smuzhiyun 		ret |= gc0329_write(client, 0xf1, 0x00);
491*4882a593Smuzhiyun 	} else {
492*4882a593Smuzhiyun 		ret |= gc0329_write(client, 0xfc, 0x16);
493*4882a593Smuzhiyun 		ret |= gc0329_write(client, 0xf0, 0x07);
494*4882a593Smuzhiyun 		ret |= gc0329_write(client, 0xf1, 0x01);
495*4882a593Smuzhiyun 	}
496*4882a593Smuzhiyun 	if (ret)
497*4882a593Smuzhiyun 		dev_err(&client->dev, "gc0329 soft standby failed\n");
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun /*
501*4882a593Smuzhiyun  * V4L2 subdev video and pad level operations
502*4882a593Smuzhiyun  */
503*4882a593Smuzhiyun 
gc0329_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)504*4882a593Smuzhiyun static int gc0329_enum_mbus_code(struct v4l2_subdev *sd,
505*4882a593Smuzhiyun 				 struct v4l2_subdev_pad_config *cfg,
506*4882a593Smuzhiyun 				 struct v4l2_subdev_mbus_code_enum *code)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s:\n", __func__);
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	if (code->index >= ARRAY_SIZE(gc0329_formats))
513*4882a593Smuzhiyun 		return -EINVAL;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	code->code = gc0329_formats[code->index].code;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	return 0;
518*4882a593Smuzhiyun }
519*4882a593Smuzhiyun 
gc0329_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)520*4882a593Smuzhiyun static int gc0329_enum_frame_sizes(struct v4l2_subdev *sd,
521*4882a593Smuzhiyun 				   struct v4l2_subdev_pad_config *cfg,
522*4882a593Smuzhiyun 				   struct v4l2_subdev_frame_size_enum *fse)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
525*4882a593Smuzhiyun 	int i = ARRAY_SIZE(gc0329_formats);
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s:\n", __func__);
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	if (fse->index >= ARRAY_SIZE(gc0329_framesizes))
530*4882a593Smuzhiyun 		return -EINVAL;
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	while (--i)
533*4882a593Smuzhiyun 		if (fse->code == gc0329_formats[i].code)
534*4882a593Smuzhiyun 			break;
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	fse->code = gc0329_formats[i].code;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	fse->min_width  = gc0329_framesizes[fse->index].width;
539*4882a593Smuzhiyun 	fse->max_width  = fse->min_width;
540*4882a593Smuzhiyun 	fse->max_height = gc0329_framesizes[fse->index].height;
541*4882a593Smuzhiyun 	fse->min_height = fse->max_height;
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	return 0;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
gc0329_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)546*4882a593Smuzhiyun static int gc0329_get_fmt(struct v4l2_subdev *sd,
547*4882a593Smuzhiyun 			  struct v4l2_subdev_pad_config *cfg,
548*4882a593Smuzhiyun 			  struct v4l2_subdev_format *fmt)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
551*4882a593Smuzhiyun 	struct gc0329 *gc0329 = to_gc0329(sd);
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s enter\n", __func__);
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
556*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
557*4882a593Smuzhiyun 		struct v4l2_mbus_framefmt *mf;
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 		mf = v4l2_subdev_get_try_format(sd, cfg, 0);
560*4882a593Smuzhiyun 		mutex_lock(&gc0329->lock);
561*4882a593Smuzhiyun 		fmt->format = *mf;
562*4882a593Smuzhiyun 		mutex_unlock(&gc0329->lock);
563*4882a593Smuzhiyun 		return 0;
564*4882a593Smuzhiyun #else
565*4882a593Smuzhiyun 	return -ENOTTY;
566*4882a593Smuzhiyun #endif
567*4882a593Smuzhiyun 	}
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	mutex_lock(&gc0329->lock);
570*4882a593Smuzhiyun 	fmt->format = gc0329->format;
571*4882a593Smuzhiyun 	mutex_unlock(&gc0329->lock);
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s: %x %dx%d\n", __func__,
574*4882a593Smuzhiyun 		gc0329->format.code, gc0329->format.width,
575*4882a593Smuzhiyun 		gc0329->format.height);
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	return 0;
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun 
__gc0329_try_frame_size_fps(struct v4l2_mbus_framefmt * mf,const struct gc0329_framesize ** size,unsigned int fps)580*4882a593Smuzhiyun static void __gc0329_try_frame_size_fps(struct v4l2_mbus_framefmt *mf,
581*4882a593Smuzhiyun 				    const struct gc0329_framesize **size,
582*4882a593Smuzhiyun 				    unsigned int fps)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun 	const struct gc0329_framesize *fsize = &gc0329_framesizes[0];
585*4882a593Smuzhiyun 	const struct gc0329_framesize *match = NULL;
586*4882a593Smuzhiyun 	unsigned int i = ARRAY_SIZE(gc0329_framesizes);
587*4882a593Smuzhiyun 	unsigned int min_err = UINT_MAX;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	while (i--) {
590*4882a593Smuzhiyun 		unsigned int err = abs(fsize->width - mf->width)
591*4882a593Smuzhiyun 				+ abs(fsize->height - mf->height);
592*4882a593Smuzhiyun 		if (err < min_err && fsize->regs[0].addr) {
593*4882a593Smuzhiyun 			min_err = err;
594*4882a593Smuzhiyun 			match = fsize;
595*4882a593Smuzhiyun 		}
596*4882a593Smuzhiyun 		fsize++;
597*4882a593Smuzhiyun 	}
598*4882a593Smuzhiyun 
599*4882a593Smuzhiyun 	if (!match) {
600*4882a593Smuzhiyun 		match = &gc0329_framesizes[0];
601*4882a593Smuzhiyun 	} else {
602*4882a593Smuzhiyun 		fsize = &gc0329_framesizes[0];
603*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(gc0329_framesizes); i++) {
604*4882a593Smuzhiyun 			if (fsize->width == match->width &&
605*4882a593Smuzhiyun 				fsize->height == match->height &&
606*4882a593Smuzhiyun 				fps >= DIV_ROUND_CLOSEST(fsize->max_fps.denominator,
607*4882a593Smuzhiyun 				fsize->max_fps.numerator))
608*4882a593Smuzhiyun 				match = fsize;
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 			fsize++;
611*4882a593Smuzhiyun 		}
612*4882a593Smuzhiyun 	}
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	mf->width  = match->width;
615*4882a593Smuzhiyun 	mf->height = match->height;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	if (size)
618*4882a593Smuzhiyun 		*size = match;
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun 
gc0329_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)621*4882a593Smuzhiyun static int gc0329_set_fmt(struct v4l2_subdev *sd,
622*4882a593Smuzhiyun 			  struct v4l2_subdev_pad_config *cfg,
623*4882a593Smuzhiyun 			  struct v4l2_subdev_format *fmt)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
626*4882a593Smuzhiyun 	int index = ARRAY_SIZE(gc0329_formats);
627*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *mf = &fmt->format;
628*4882a593Smuzhiyun 	const struct gc0329_framesize *size = NULL;
629*4882a593Smuzhiyun 	struct gc0329 *gc0329 = to_gc0329(sd);
630*4882a593Smuzhiyun 	int ret = 0;
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s enter\n", __func__);
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	__gc0329_try_frame_size_fps(mf, &size, gc0329->fps);
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	while (--index >= 0)
637*4882a593Smuzhiyun 		if (gc0329_formats[index].code == mf->code)
638*4882a593Smuzhiyun 			break;
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun 	if (index < 0)
641*4882a593Smuzhiyun 		return -EINVAL;
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	mf->colorspace = V4L2_COLORSPACE_SRGB;
644*4882a593Smuzhiyun 	mf->code = gc0329_formats[index].code;
645*4882a593Smuzhiyun 	mf->field = V4L2_FIELD_NONE;
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	mutex_lock(&gc0329->lock);
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
650*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
651*4882a593Smuzhiyun 		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
652*4882a593Smuzhiyun 		*mf = fmt->format;
653*4882a593Smuzhiyun #else
654*4882a593Smuzhiyun 		return -ENOTTY;
655*4882a593Smuzhiyun #endif
656*4882a593Smuzhiyun 	} else {
657*4882a593Smuzhiyun 		if (gc0329->streaming) {
658*4882a593Smuzhiyun 			mutex_unlock(&gc0329->lock);
659*4882a593Smuzhiyun 			return -EBUSY;
660*4882a593Smuzhiyun 		}
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 		gc0329->frame_size = size;
663*4882a593Smuzhiyun 		gc0329->format = fmt->format;
664*4882a593Smuzhiyun 	}
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	mutex_unlock(&gc0329->lock);
667*4882a593Smuzhiyun 	return ret;
668*4882a593Smuzhiyun }
669*4882a593Smuzhiyun 
gc0329_get_module_inf(struct gc0329 * gc0329,struct rkmodule_inf * inf)670*4882a593Smuzhiyun static void gc0329_get_module_inf(struct gc0329 *gc0329,
671*4882a593Smuzhiyun 				  struct rkmodule_inf *inf)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun 	memset(inf, 0, sizeof(*inf));
674*4882a593Smuzhiyun 	strlcpy(inf->base.sensor, DRIVER_NAME, sizeof(inf->base.sensor));
675*4882a593Smuzhiyun 	strlcpy(inf->base.module, gc0329->module_name,
676*4882a593Smuzhiyun 		sizeof(inf->base.module));
677*4882a593Smuzhiyun 	strlcpy(inf->base.lens, gc0329->len_name, sizeof(inf->base.lens));
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun 
gc0329_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)680*4882a593Smuzhiyun static long gc0329_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun 	struct gc0329 *gc0329 = to_gc0329(sd);
683*4882a593Smuzhiyun 	long ret = 0;
684*4882a593Smuzhiyun 	u32 stream = 0;
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	switch (cmd) {
687*4882a593Smuzhiyun 	case RKMODULE_GET_MODULE_INFO:
688*4882a593Smuzhiyun 		gc0329_get_module_inf(gc0329, (struct rkmodule_inf *)arg);
689*4882a593Smuzhiyun 		break;
690*4882a593Smuzhiyun 	case RKMODULE_SET_QUICK_STREAM:
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 		stream = *((u32 *)arg);
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 		gc0329_set_streaming(gc0329, !!stream);
695*4882a593Smuzhiyun 		break;
696*4882a593Smuzhiyun 	default:
697*4882a593Smuzhiyun 		ret = -ENOIOCTLCMD;
698*4882a593Smuzhiyun 		break;
699*4882a593Smuzhiyun 	}
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	return ret;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
gc0329_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)705*4882a593Smuzhiyun static long gc0329_compat_ioctl32(struct v4l2_subdev *sd,
706*4882a593Smuzhiyun 				  unsigned int cmd, unsigned long arg)
707*4882a593Smuzhiyun {
708*4882a593Smuzhiyun 	void __user *up = compat_ptr(arg);
709*4882a593Smuzhiyun 	struct rkmodule_inf *inf;
710*4882a593Smuzhiyun 	struct rkmodule_awb_cfg *cfg;
711*4882a593Smuzhiyun 	long ret;
712*4882a593Smuzhiyun 	u32 stream = 0;
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun 	switch (cmd) {
715*4882a593Smuzhiyun 	case RKMODULE_GET_MODULE_INFO:
716*4882a593Smuzhiyun 		inf = kzalloc(sizeof(*inf), GFP_KERNEL);
717*4882a593Smuzhiyun 		if (!inf) {
718*4882a593Smuzhiyun 			ret = -ENOMEM;
719*4882a593Smuzhiyun 			return ret;
720*4882a593Smuzhiyun 		}
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 		ret = gc0329_ioctl(sd, cmd, inf);
723*4882a593Smuzhiyun 		if (!ret)
724*4882a593Smuzhiyun 			ret = copy_to_user(up, inf, sizeof(*inf));
725*4882a593Smuzhiyun 		kfree(inf);
726*4882a593Smuzhiyun 		break;
727*4882a593Smuzhiyun 	case RKMODULE_AWB_CFG:
728*4882a593Smuzhiyun 		cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
729*4882a593Smuzhiyun 		if (!cfg) {
730*4882a593Smuzhiyun 			ret = -ENOMEM;
731*4882a593Smuzhiyun 			return ret;
732*4882a593Smuzhiyun 		}
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 		ret = copy_from_user(cfg, up, sizeof(*cfg));
735*4882a593Smuzhiyun 		if (!ret)
736*4882a593Smuzhiyun 			ret = gc0329_ioctl(sd, cmd, cfg);
737*4882a593Smuzhiyun 		kfree(cfg);
738*4882a593Smuzhiyun 		break;
739*4882a593Smuzhiyun 	case RKMODULE_SET_QUICK_STREAM:
740*4882a593Smuzhiyun 		ret = copy_from_user(&stream, up, sizeof(u32));
741*4882a593Smuzhiyun 		if (!ret)
742*4882a593Smuzhiyun 			ret = gc0329_ioctl(sd, cmd, &stream);
743*4882a593Smuzhiyun 		break;
744*4882a593Smuzhiyun 	default:
745*4882a593Smuzhiyun 		ret = -ENOIOCTLCMD;
746*4882a593Smuzhiyun 		break;
747*4882a593Smuzhiyun 	}
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	return ret;
750*4882a593Smuzhiyun }
751*4882a593Smuzhiyun #endif
752*4882a593Smuzhiyun 
gc0329_s_stream(struct v4l2_subdev * sd,int on)753*4882a593Smuzhiyun static int gc0329_s_stream(struct v4l2_subdev *sd, int on)
754*4882a593Smuzhiyun {
755*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
756*4882a593Smuzhiyun 	struct gc0329 *gc0329 = to_gc0329(sd);
757*4882a593Smuzhiyun 	int ret = 0;
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	mutex_lock(&gc0329->lock);
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun 	on = !!on;
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun 	if (gc0329->streaming == on)
766*4882a593Smuzhiyun 		goto unlock;
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	if (!on) {
769*4882a593Smuzhiyun 		/* Stop Streaming Sequence */
770*4882a593Smuzhiyun 		gc0329_set_streaming(gc0329, on);
771*4882a593Smuzhiyun 		gc0329->streaming = on;
772*4882a593Smuzhiyun 		if (!IS_ERR(gc0329->pwdn_gpio)) {
773*4882a593Smuzhiyun 			gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
774*4882a593Smuzhiyun 			usleep_range(2000, 5000);
775*4882a593Smuzhiyun 		}
776*4882a593Smuzhiyun 		goto unlock;
777*4882a593Smuzhiyun 	}
778*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->pwdn_gpio)) {
779*4882a593Smuzhiyun 		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 0);
780*4882a593Smuzhiyun 		usleep_range(2000, 5000);
781*4882a593Smuzhiyun 	}
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	ret = gc0329_write_array(client, gc0329_vga_regs);
784*4882a593Smuzhiyun 	if (ret)
785*4882a593Smuzhiyun 		goto unlock;
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun 	ret = gc0329_write_array(client, gc0329->frame_size->regs);
788*4882a593Smuzhiyun 	if (ret)
789*4882a593Smuzhiyun 		goto unlock;
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	gc0329_set_streaming(gc0329, on);
792*4882a593Smuzhiyun 	gc0329->streaming = on;
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun unlock:
795*4882a593Smuzhiyun 	mutex_unlock(&gc0329->lock);
796*4882a593Smuzhiyun 	return ret;
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun 
gc0329_set_test_pattern(struct gc0329 * gc0329,int value)799*4882a593Smuzhiyun static int gc0329_set_test_pattern(struct gc0329 *gc0329, int value)
800*4882a593Smuzhiyun {
801*4882a593Smuzhiyun 	return 0;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun 
gc0329_s_ctrl(struct v4l2_ctrl * ctrl)804*4882a593Smuzhiyun static int gc0329_s_ctrl(struct v4l2_ctrl *ctrl)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun 	struct gc0329 *gc0329 =
807*4882a593Smuzhiyun 			container_of(ctrl->handler, struct gc0329, ctrls);
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 	switch (ctrl->id) {
810*4882a593Smuzhiyun 	case V4L2_CID_TEST_PATTERN:
811*4882a593Smuzhiyun 		return gc0329_set_test_pattern(gc0329, ctrl->val);
812*4882a593Smuzhiyun 	}
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun 	return 0;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun static const struct v4l2_ctrl_ops gc0329_ctrl_ops = {
818*4882a593Smuzhiyun 	.s_ctrl = gc0329_s_ctrl,
819*4882a593Smuzhiyun };
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun static const char * const gc0329_test_pattern_menu[] = {
822*4882a593Smuzhiyun 	"Disabled",
823*4882a593Smuzhiyun 	"Vertical Color Bars",
824*4882a593Smuzhiyun };
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
827*4882a593Smuzhiyun  * V4L2 subdev internal operations
828*4882a593Smuzhiyun  */
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc0329_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)831*4882a593Smuzhiyun static int gc0329_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
832*4882a593Smuzhiyun {
833*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
834*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt *format =
835*4882a593Smuzhiyun 				v4l2_subdev_get_try_format(sd, fh->pad, 0);
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s:\n", __func__);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 	gc0329_get_default_format(format);
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 	return 0;
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun #endif
844*4882a593Smuzhiyun 
gc0329_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)845*4882a593Smuzhiyun static int gc0329_g_mbus_config(struct v4l2_subdev *sd,
846*4882a593Smuzhiyun 				struct v4l2_mbus_config *config)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun 	config->type = V4L2_MBUS_PARALLEL;
849*4882a593Smuzhiyun 	config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
850*4882a593Smuzhiyun 			V4L2_MBUS_VSYNC_ACTIVE_HIGH |
851*4882a593Smuzhiyun 			V4L2_MBUS_PCLK_SAMPLE_RISING;
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun 	return 0;
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun 
gc0329_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)856*4882a593Smuzhiyun static int gc0329_g_frame_interval(struct v4l2_subdev *sd,
857*4882a593Smuzhiyun 				   struct v4l2_subdev_frame_interval *fi)
858*4882a593Smuzhiyun {
859*4882a593Smuzhiyun 	struct gc0329 *gc0329 = to_gc0329(sd);
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	fi->interval = gc0329->frame_size->max_fps;
862*4882a593Smuzhiyun 
863*4882a593Smuzhiyun 	return 0;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun 
gc0329_s_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)866*4882a593Smuzhiyun static int gc0329_s_frame_interval(struct v4l2_subdev *sd,
867*4882a593Smuzhiyun 				   struct v4l2_subdev_frame_interval *fi)
868*4882a593Smuzhiyun {
869*4882a593Smuzhiyun 	struct i2c_client *client = v4l2_get_subdevdata(sd);
870*4882a593Smuzhiyun 	struct gc0329 *gc0329 = to_gc0329(sd);
871*4882a593Smuzhiyun 	const struct gc0329_framesize *size = NULL;
872*4882a593Smuzhiyun 	struct v4l2_mbus_framefmt mf;
873*4882a593Smuzhiyun 	unsigned int fps;
874*4882a593Smuzhiyun 	int ret = 0;
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun 	dev_dbg(&client->dev, "Setting %d/%d frame interval\n",
877*4882a593Smuzhiyun 		fi->interval.numerator, fi->interval.denominator);
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 	mutex_lock(&gc0329->lock);
880*4882a593Smuzhiyun 	fps = DIV_ROUND_CLOSEST(fi->interval.denominator,
881*4882a593Smuzhiyun 		fi->interval.numerator);
882*4882a593Smuzhiyun 	mf = gc0329->format;
883*4882a593Smuzhiyun 	__gc0329_try_frame_size_fps(&mf, &size, fps);
884*4882a593Smuzhiyun 	if (gc0329->frame_size != size) {
885*4882a593Smuzhiyun 		ret = gc0329_write_array(client, size->regs);
886*4882a593Smuzhiyun 		if (ret)
887*4882a593Smuzhiyun 			goto unlock;
888*4882a593Smuzhiyun 		gc0329->frame_size = size;
889*4882a593Smuzhiyun 		gc0329->fps = fps;
890*4882a593Smuzhiyun 	}
891*4882a593Smuzhiyun unlock:
892*4882a593Smuzhiyun 	mutex_unlock(&gc0329->lock);
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun 	return ret;
895*4882a593Smuzhiyun }
896*4882a593Smuzhiyun 
gc0329_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)897*4882a593Smuzhiyun static int gc0329_enum_frame_interval(struct v4l2_subdev *sd,
898*4882a593Smuzhiyun 				       struct v4l2_subdev_pad_config *cfg,
899*4882a593Smuzhiyun 				       struct v4l2_subdev_frame_interval_enum *fie)
900*4882a593Smuzhiyun {
901*4882a593Smuzhiyun 	if (fie->index >= ARRAY_SIZE(gc0329_framesizes))
902*4882a593Smuzhiyun 		return -EINVAL;
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	fie->code = MEDIA_BUS_FMT_YUYV8_2X8;
905*4882a593Smuzhiyun 	fie->width = gc0329_framesizes[fie->index].width;
906*4882a593Smuzhiyun 	fie->height = gc0329_framesizes[fie->index].height;
907*4882a593Smuzhiyun 	fie->interval = gc0329_framesizes[fie->index].max_fps;
908*4882a593Smuzhiyun 	return 0;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops gc0329_subdev_core_ops = {
912*4882a593Smuzhiyun 	.log_status = v4l2_ctrl_subdev_log_status,
913*4882a593Smuzhiyun 	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
914*4882a593Smuzhiyun 	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
915*4882a593Smuzhiyun 	.ioctl = gc0329_ioctl,
916*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
917*4882a593Smuzhiyun 	.compat_ioctl32 = gc0329_compat_ioctl32,
918*4882a593Smuzhiyun #endif
919*4882a593Smuzhiyun };
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops gc0329_subdev_video_ops = {
922*4882a593Smuzhiyun 	.s_stream = gc0329_s_stream,
923*4882a593Smuzhiyun 	.g_mbus_config = gc0329_g_mbus_config,
924*4882a593Smuzhiyun 	.g_frame_interval = gc0329_g_frame_interval,
925*4882a593Smuzhiyun 	.s_frame_interval = gc0329_s_frame_interval,
926*4882a593Smuzhiyun };
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops gc0329_subdev_pad_ops = {
929*4882a593Smuzhiyun 	.enum_mbus_code = gc0329_enum_mbus_code,
930*4882a593Smuzhiyun 	.enum_frame_size = gc0329_enum_frame_sizes,
931*4882a593Smuzhiyun 	.enum_frame_interval = gc0329_enum_frame_interval,
932*4882a593Smuzhiyun 	.get_fmt = gc0329_get_fmt,
933*4882a593Smuzhiyun 	.set_fmt = gc0329_set_fmt,
934*4882a593Smuzhiyun };
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
937*4882a593Smuzhiyun static const struct v4l2_subdev_ops gc0329_subdev_ops = {
938*4882a593Smuzhiyun 	.core  = &gc0329_subdev_core_ops,
939*4882a593Smuzhiyun 	.video = &gc0329_subdev_video_ops,
940*4882a593Smuzhiyun 	.pad   = &gc0329_subdev_pad_ops,
941*4882a593Smuzhiyun };
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops gc0329_subdev_internal_ops = {
944*4882a593Smuzhiyun 	.open = gc0329_open,
945*4882a593Smuzhiyun };
946*4882a593Smuzhiyun #endif
947*4882a593Smuzhiyun 
gc0329_detect(struct gc0329 * gc0329)948*4882a593Smuzhiyun static int gc0329_detect(struct gc0329 *gc0329)
949*4882a593Smuzhiyun {
950*4882a593Smuzhiyun 	struct i2c_client *client = gc0329->client;
951*4882a593Smuzhiyun 	u8 pid = 0;
952*4882a593Smuzhiyun 	int ret;
953*4882a593Smuzhiyun 
954*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s:\n", __func__);
955*4882a593Smuzhiyun 
956*4882a593Smuzhiyun 	/* Check sensor revision */
957*4882a593Smuzhiyun 	ret = gc0329_write(client, 0xfc, 0x16);
958*4882a593Smuzhiyun 	msleep(20);
959*4882a593Smuzhiyun 	ret |= gc0329_read(client, REG_SC_CHIP_ID, &pid);
960*4882a593Smuzhiyun 	if (!ret) {
961*4882a593Smuzhiyun 		if (pid != GC0329_ID) {
962*4882a593Smuzhiyun 			ret = -1;
963*4882a593Smuzhiyun 			dev_err(&client->dev,
964*4882a593Smuzhiyun 				"Sensor detection failed (%X, %d)\n",
965*4882a593Smuzhiyun 				pid, ret);
966*4882a593Smuzhiyun 		} else {
967*4882a593Smuzhiyun 			dev_info(&client->dev,
968*4882a593Smuzhiyun 				"Found GC0329 id:%X sensor\n", pid);
969*4882a593Smuzhiyun 			if (!IS_ERR(gc0329->pwdn_gpio))
970*4882a593Smuzhiyun 				gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
971*4882a593Smuzhiyun 		}
972*4882a593Smuzhiyun 	}
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun 	return ret;
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun 
__gc0329_power_on(struct gc0329 * gc0329)977*4882a593Smuzhiyun static int __gc0329_power_on(struct gc0329 *gc0329)
978*4882a593Smuzhiyun {
979*4882a593Smuzhiyun 	int ret;
980*4882a593Smuzhiyun 	struct device *dev = &gc0329->client->dev;
981*4882a593Smuzhiyun 
982*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->xvclk)) {
983*4882a593Smuzhiyun 		ret = clk_set_rate(gc0329->xvclk, 24000000);
984*4882a593Smuzhiyun 		if (ret < 0)
985*4882a593Smuzhiyun 			dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
986*4882a593Smuzhiyun 	}
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->pwdn_gpio)) {
989*4882a593Smuzhiyun 		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
990*4882a593Smuzhiyun 		usleep_range(2000, 5000);
991*4882a593Smuzhiyun 	}
992*4882a593Smuzhiyun 
993*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->supplies)) {
994*4882a593Smuzhiyun 		ret = regulator_bulk_enable(GC0329_NUM_SUPPLIES,
995*4882a593Smuzhiyun 			gc0329->supplies);
996*4882a593Smuzhiyun 		if (ret < 0)
997*4882a593Smuzhiyun 			dev_info(dev, "Failed to enable regulators\n");
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 		usleep_range(2000, 5000);
1000*4882a593Smuzhiyun 	}
1001*4882a593Smuzhiyun 
1002*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->pwdn_gpio)) {
1003*4882a593Smuzhiyun 		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 0);
1004*4882a593Smuzhiyun 		usleep_range(2000, 5000);
1005*4882a593Smuzhiyun 	}
1006*4882a593Smuzhiyun 
1007*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->xvclk)) {
1008*4882a593Smuzhiyun 		ret = clk_prepare_enable(gc0329->xvclk);
1009*4882a593Smuzhiyun 		if (ret < 0)
1010*4882a593Smuzhiyun 			dev_info(dev, "Failed to enable xvclk\n");
1011*4882a593Smuzhiyun 	}
1012*4882a593Smuzhiyun 
1013*4882a593Smuzhiyun 	usleep_range(7000, 10000);
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 	return 0;
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun 
__gc0329_power_off(struct gc0329 * gc0329)1018*4882a593Smuzhiyun static void __gc0329_power_off(struct gc0329 *gc0329)
1019*4882a593Smuzhiyun {
1020*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->xvclk))
1021*4882a593Smuzhiyun 		clk_disable_unprepare(gc0329->xvclk);
1022*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->supplies))
1023*4882a593Smuzhiyun 		regulator_bulk_disable(GC0329_NUM_SUPPLIES, gc0329->supplies);
1024*4882a593Smuzhiyun 	if (!IS_ERR(gc0329->pwdn_gpio))
1025*4882a593Smuzhiyun 		gpiod_set_value_cansleep(gc0329->pwdn_gpio, 1);
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun 
gc0329_configure_regulators(struct gc0329 * gc0329)1028*4882a593Smuzhiyun static int gc0329_configure_regulators(struct gc0329 *gc0329)
1029*4882a593Smuzhiyun {
1030*4882a593Smuzhiyun 	unsigned int i;
1031*4882a593Smuzhiyun 
1032*4882a593Smuzhiyun 	for (i = 0; i < GC0329_NUM_SUPPLIES; i++)
1033*4882a593Smuzhiyun 		gc0329->supplies[i].supply = gc0329_supply_names[i];
1034*4882a593Smuzhiyun 
1035*4882a593Smuzhiyun 	return devm_regulator_bulk_get(&gc0329->client->dev,
1036*4882a593Smuzhiyun 				       GC0329_NUM_SUPPLIES,
1037*4882a593Smuzhiyun 				       gc0329->supplies);
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun 
gc0329_parse_of(struct gc0329 * gc0329)1040*4882a593Smuzhiyun static int gc0329_parse_of(struct gc0329 *gc0329)
1041*4882a593Smuzhiyun {
1042*4882a593Smuzhiyun 	struct device *dev = &gc0329->client->dev;
1043*4882a593Smuzhiyun 	int ret;
1044*4882a593Smuzhiyun 
1045*4882a593Smuzhiyun 	gc0329->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1046*4882a593Smuzhiyun 	if (IS_ERR(gc0329->pwdn_gpio))
1047*4882a593Smuzhiyun 		dev_info(dev, "Failed to get pwdn-gpios, maybe no used\n");
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun 	ret = gc0329_configure_regulators(gc0329);
1050*4882a593Smuzhiyun 	if (ret)
1051*4882a593Smuzhiyun 		dev_info(dev, "Failed to get power regulators\n");
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	return __gc0329_power_on(gc0329);
1054*4882a593Smuzhiyun }
1055*4882a593Smuzhiyun 
gc0329_probe(struct i2c_client * client,const struct i2c_device_id * id)1056*4882a593Smuzhiyun static int gc0329_probe(struct i2c_client *client,
1057*4882a593Smuzhiyun 			const struct i2c_device_id *id)
1058*4882a593Smuzhiyun {
1059*4882a593Smuzhiyun 	struct device *dev = &client->dev;
1060*4882a593Smuzhiyun 	struct device_node *node = dev->of_node;
1061*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
1062*4882a593Smuzhiyun 	struct gc0329 *gc0329;
1063*4882a593Smuzhiyun 	char facing[2];
1064*4882a593Smuzhiyun 	int ret;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	dev_info(dev, "driver version: %02x.%02x.%02x",
1067*4882a593Smuzhiyun 		DRIVER_VERSION >> 16,
1068*4882a593Smuzhiyun 		(DRIVER_VERSION & 0xff00) >> 8,
1069*4882a593Smuzhiyun 		DRIVER_VERSION & 0x00ff);
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 	gc0329 = devm_kzalloc(&client->dev, sizeof(*gc0329), GFP_KERNEL);
1072*4882a593Smuzhiyun 	if (!gc0329)
1073*4882a593Smuzhiyun 		return -ENOMEM;
1074*4882a593Smuzhiyun 
1075*4882a593Smuzhiyun 	ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1076*4882a593Smuzhiyun 				   &gc0329->module_index);
1077*4882a593Smuzhiyun 	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1078*4882a593Smuzhiyun 				       &gc0329->module_facing);
1079*4882a593Smuzhiyun 	ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1080*4882a593Smuzhiyun 				       &gc0329->module_name);
1081*4882a593Smuzhiyun 	ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1082*4882a593Smuzhiyun 				       &gc0329->len_name);
1083*4882a593Smuzhiyun 	if (ret) {
1084*4882a593Smuzhiyun 		dev_err(dev, "could not get module information!\n");
1085*4882a593Smuzhiyun 		return -EINVAL;
1086*4882a593Smuzhiyun 	}
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun 	gc0329->client = client;
1089*4882a593Smuzhiyun 	gc0329->xvclk = devm_clk_get(&client->dev, "xvclk");
1090*4882a593Smuzhiyun 	if (IS_ERR(gc0329->xvclk)) {
1091*4882a593Smuzhiyun 		dev_err(&client->dev, "Failed to get xvclk\n");
1092*4882a593Smuzhiyun 		return -EINVAL;
1093*4882a593Smuzhiyun 	}
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun 	gc0329_parse_of(gc0329);
1096*4882a593Smuzhiyun 
1097*4882a593Smuzhiyun 	gc0329->xvclk_frequency = clk_get_rate(gc0329->xvclk);
1098*4882a593Smuzhiyun 	if (gc0329->xvclk_frequency < 6000000 ||
1099*4882a593Smuzhiyun 	    gc0329->xvclk_frequency > 27000000)
1100*4882a593Smuzhiyun 		return -EINVAL;
1101*4882a593Smuzhiyun 
1102*4882a593Smuzhiyun 	v4l2_ctrl_handler_init(&gc0329->ctrls, 2);
1103*4882a593Smuzhiyun 	gc0329->link_frequency =
1104*4882a593Smuzhiyun 			v4l2_ctrl_new_std(&gc0329->ctrls, &gc0329_ctrl_ops,
1105*4882a593Smuzhiyun 					  V4L2_CID_PIXEL_RATE, 0,
1106*4882a593Smuzhiyun 					  GC0329_PIXEL_RATE, 1,
1107*4882a593Smuzhiyun 					  GC0329_PIXEL_RATE);
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	v4l2_ctrl_new_std_menu_items(&gc0329->ctrls, &gc0329_ctrl_ops,
1110*4882a593Smuzhiyun 				     V4L2_CID_TEST_PATTERN,
1111*4882a593Smuzhiyun 				     ARRAY_SIZE(gc0329_test_pattern_menu) - 1,
1112*4882a593Smuzhiyun 				     0, 0, gc0329_test_pattern_menu);
1113*4882a593Smuzhiyun 	gc0329->sd.ctrl_handler = &gc0329->ctrls;
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 	if (gc0329->ctrls.error) {
1116*4882a593Smuzhiyun 		dev_err(&client->dev, "%s: control initialization error %d\n",
1117*4882a593Smuzhiyun 			__func__, gc0329->ctrls.error);
1118*4882a593Smuzhiyun 		return  gc0329->ctrls.error;
1119*4882a593Smuzhiyun 	}
1120*4882a593Smuzhiyun 
1121*4882a593Smuzhiyun 	sd = &gc0329->sd;
1122*4882a593Smuzhiyun 	client->flags |= I2C_CLIENT_SCCB;
1123*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1124*4882a593Smuzhiyun 	v4l2_i2c_subdev_init(sd, client, &gc0329_subdev_ops);
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 	sd->internal_ops = &gc0329_subdev_internal_ops;
1127*4882a593Smuzhiyun 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1128*4882a593Smuzhiyun 		     V4L2_SUBDEV_FL_HAS_EVENTS;
1129*4882a593Smuzhiyun #endif
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1132*4882a593Smuzhiyun 	gc0329->pad.flags = MEDIA_PAD_FL_SOURCE;
1133*4882a593Smuzhiyun 	sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1134*4882a593Smuzhiyun 	ret = media_entity_pads_init(&sd->entity, 1, &gc0329->pad);
1135*4882a593Smuzhiyun 	if (ret < 0) {
1136*4882a593Smuzhiyun 		v4l2_ctrl_handler_free(&gc0329->ctrls);
1137*4882a593Smuzhiyun 		return ret;
1138*4882a593Smuzhiyun 	}
1139*4882a593Smuzhiyun #endif
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 	mutex_init(&gc0329->lock);
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun 	gc0329_get_default_format(&gc0329->format);
1144*4882a593Smuzhiyun 	gc0329->frame_size = &gc0329_framesizes[0];
1145*4882a593Smuzhiyun 	gc0329->format.width = gc0329_framesizes[0].width;
1146*4882a593Smuzhiyun 	gc0329->format.height = gc0329_framesizes[0].height;
1147*4882a593Smuzhiyun 	gc0329->fps = DIV_ROUND_CLOSEST(gc0329_framesizes[0].max_fps.denominator,
1148*4882a593Smuzhiyun 				gc0329_framesizes[0].max_fps.numerator);
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun 	ret = gc0329_detect(gc0329);
1151*4882a593Smuzhiyun 	if (ret < 0)
1152*4882a593Smuzhiyun 		goto error;
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	memset(facing, 0, sizeof(facing));
1155*4882a593Smuzhiyun 	if (strcmp(gc0329->module_facing, "back") == 0)
1156*4882a593Smuzhiyun 		facing[0] = 'b';
1157*4882a593Smuzhiyun 	else
1158*4882a593Smuzhiyun 		facing[0] = 'f';
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 	snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1161*4882a593Smuzhiyun 		 gc0329->module_index, facing,
1162*4882a593Smuzhiyun 		 DRIVER_NAME, dev_name(sd->dev));
1163*4882a593Smuzhiyun 	ret = v4l2_async_register_subdev_sensor_common(sd);
1164*4882a593Smuzhiyun 	if (ret)
1165*4882a593Smuzhiyun 		goto error;
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun 	dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
1168*4882a593Smuzhiyun 
1169*4882a593Smuzhiyun 	return 0;
1170*4882a593Smuzhiyun 
1171*4882a593Smuzhiyun error:
1172*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&gc0329->ctrls);
1173*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1174*4882a593Smuzhiyun 	media_entity_cleanup(&sd->entity);
1175*4882a593Smuzhiyun #endif
1176*4882a593Smuzhiyun 	mutex_destroy(&gc0329->lock);
1177*4882a593Smuzhiyun 	__gc0329_power_off(gc0329);
1178*4882a593Smuzhiyun 	return ret;
1179*4882a593Smuzhiyun }
1180*4882a593Smuzhiyun 
gc0329_remove(struct i2c_client * client)1181*4882a593Smuzhiyun static int gc0329_remove(struct i2c_client *client)
1182*4882a593Smuzhiyun {
1183*4882a593Smuzhiyun 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
1184*4882a593Smuzhiyun 	struct gc0329 *gc0329 = to_gc0329(sd);
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&gc0329->ctrls);
1187*4882a593Smuzhiyun 	v4l2_async_unregister_subdev(sd);
1188*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1189*4882a593Smuzhiyun 	media_entity_cleanup(&sd->entity);
1190*4882a593Smuzhiyun #endif
1191*4882a593Smuzhiyun 	mutex_destroy(&gc0329->lock);
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 	__gc0329_power_off(gc0329);
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 	return 0;
1196*4882a593Smuzhiyun }
1197*4882a593Smuzhiyun 
1198*4882a593Smuzhiyun static const struct i2c_device_id gc0329_id[] = {
1199*4882a593Smuzhiyun 	{ "gc0329", 0 },
1200*4882a593Smuzhiyun 	{ /* sentinel */ },
1201*4882a593Smuzhiyun };
1202*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, gc0329_id);
1203*4882a593Smuzhiyun 
1204*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
1205*4882a593Smuzhiyun static const struct of_device_id gc0329_of_match[] = {
1206*4882a593Smuzhiyun 	{ .compatible = "galaxycore,gc0329", },
1207*4882a593Smuzhiyun 	{ /* sentinel */ },
1208*4882a593Smuzhiyun };
1209*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, gc0329_of_match);
1210*4882a593Smuzhiyun #endif
1211*4882a593Smuzhiyun 
1212*4882a593Smuzhiyun static struct i2c_driver gc0329_i2c_driver = {
1213*4882a593Smuzhiyun 	.driver = {
1214*4882a593Smuzhiyun 		.name	= DRIVER_NAME,
1215*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(gc0329_of_match),
1216*4882a593Smuzhiyun 	},
1217*4882a593Smuzhiyun 	.probe		= gc0329_probe,
1218*4882a593Smuzhiyun 	.remove		= gc0329_remove,
1219*4882a593Smuzhiyun 	.id_table	= gc0329_id,
1220*4882a593Smuzhiyun };
1221*4882a593Smuzhiyun 
sensor_mod_init(void)1222*4882a593Smuzhiyun static int __init sensor_mod_init(void)
1223*4882a593Smuzhiyun {
1224*4882a593Smuzhiyun 	return i2c_add_driver(&gc0329_i2c_driver);
1225*4882a593Smuzhiyun }
1226*4882a593Smuzhiyun 
sensor_mod_exit(void)1227*4882a593Smuzhiyun static void __exit sensor_mod_exit(void)
1228*4882a593Smuzhiyun {
1229*4882a593Smuzhiyun 	i2c_del_driver(&gc0329_i2c_driver);
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun device_initcall_sync(sensor_mod_init);
1233*4882a593Smuzhiyun module_exit(sensor_mod_exit);
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun MODULE_DESCRIPTION("GC0329 CMOS Image Sensor driver");
1236*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1237