1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * GC0312 CMOS Image Sensor driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun * V0.0X01.0X01 add enum_frame_interval function.
7*4882a593Smuzhiyun * V0.0X01.0X02 add quick stream on/off
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/err.h>
13*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/i2c.h>
18*4882a593Smuzhiyun #include <linux/kernel.h>
19*4882a593Smuzhiyun #include <linux/media.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/of.h>
22*4882a593Smuzhiyun #include <linux/of_graph.h>
23*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <linux/uaccess.h>
26*4882a593Smuzhiyun #include <linux/videodev2.h>
27*4882a593Smuzhiyun #include <linux/version.h>
28*4882a593Smuzhiyun #include <linux/rk-camera-module.h>
29*4882a593Smuzhiyun #include <media/media-entity.h>
30*4882a593Smuzhiyun #include <media/v4l2-common.h>
31*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
32*4882a593Smuzhiyun #include <media/v4l2-device.h>
33*4882a593Smuzhiyun #include <media/v4l2-event.h>
34*4882a593Smuzhiyun #include <media/v4l2-fwnode.h>
35*4882a593Smuzhiyun #include <media/v4l2-image-sizes.h>
36*4882a593Smuzhiyun #include <media/v4l2-mediabus.h>
37*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x2)
40*4882a593Smuzhiyun #define DRIVER_NAME "gc0312"
41*4882a593Smuzhiyun #define GC0312_PIXEL_RATE (96 * 1000 * 1000)
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun * GC0312 register definitions
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun #define REG_SOFTWARE_STANDBY 0xf3
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #define REG_SC_CHIP_ID_H 0xf0
49*4882a593Smuzhiyun #define REG_SC_CHIP_ID_L 0xf1
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define REG_NULL 0xFFFF /* Array end token */
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #define SENSOR_ID(_msb, _lsb) ((_msb) << 8 | (_lsb))
54*4882a593Smuzhiyun #define GC0312_ID 0xb310
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun struct sensor_register {
57*4882a593Smuzhiyun u16 addr;
58*4882a593Smuzhiyun u8 value;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun struct gc0312_framesize {
62*4882a593Smuzhiyun u16 width;
63*4882a593Smuzhiyun u16 height;
64*4882a593Smuzhiyun u16 max_exp_lines;
65*4882a593Smuzhiyun struct v4l2_fract max_fps;
66*4882a593Smuzhiyun const struct sensor_register *regs;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun struct gc0312_pll_ctrl {
70*4882a593Smuzhiyun u8 ctrl1;
71*4882a593Smuzhiyun u8 ctrl2;
72*4882a593Smuzhiyun u8 ctrl3;
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun struct gc0312_pixfmt {
76*4882a593Smuzhiyun u32 code;
77*4882a593Smuzhiyun /* Output format Register Value (REG_FORMAT_CTRL00) */
78*4882a593Smuzhiyun struct sensor_register *format_ctrl_regs;
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun struct pll_ctrl_reg {
82*4882a593Smuzhiyun unsigned int div;
83*4882a593Smuzhiyun unsigned char reg;
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static const char * const gc0312_supply_names[] = {
87*4882a593Smuzhiyun "dovdd", /* Digital I/O power */
88*4882a593Smuzhiyun "avdd", /* Analog power */
89*4882a593Smuzhiyun "dvdd", /* Digital core power */
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #define GC0312_NUM_SUPPLIES ARRAY_SIZE(gc0312_supply_names)
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun struct gc0312 {
95*4882a593Smuzhiyun struct v4l2_subdev sd;
96*4882a593Smuzhiyun struct media_pad pad;
97*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
98*4882a593Smuzhiyun unsigned int xvclk_frequency;
99*4882a593Smuzhiyun struct clk *xvclk;
100*4882a593Smuzhiyun struct gpio_desc *pwdn_gpio;
101*4882a593Smuzhiyun struct regulator_bulk_data supplies[GC0312_NUM_SUPPLIES];
102*4882a593Smuzhiyun struct mutex lock;
103*4882a593Smuzhiyun struct i2c_client *client;
104*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrls;
105*4882a593Smuzhiyun struct v4l2_ctrl *link_frequency;
106*4882a593Smuzhiyun const struct gc0312_framesize *frame_size;
107*4882a593Smuzhiyun int streaming;
108*4882a593Smuzhiyun u32 module_index;
109*4882a593Smuzhiyun const char *module_facing;
110*4882a593Smuzhiyun const char *module_name;
111*4882a593Smuzhiyun const char *len_name;
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static const struct sensor_register gc0312_vga_regs[] = {
115*4882a593Smuzhiyun {0xfe, 0xf0},
116*4882a593Smuzhiyun {0xfe, 0xf0},
117*4882a593Smuzhiyun {0xfe, 0x00},
118*4882a593Smuzhiyun {0xfc, 0x0e},
119*4882a593Smuzhiyun {0xfc, 0x0e},
120*4882a593Smuzhiyun {0xf2, 0x07},
121*4882a593Smuzhiyun /*output_disable*/
122*4882a593Smuzhiyun {0xf3, 0x00},
123*4882a593Smuzhiyun {0xf7, 0x1b},
124*4882a593Smuzhiyun {0xf8, 0x04},
125*4882a593Smuzhiyun {0xf9, 0x0e},
126*4882a593Smuzhiyun {0xfa, 0x11},
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /*CISCTL reg*/
129*4882a593Smuzhiyun {0x00, 0x2f},
130*4882a593Smuzhiyun {0x01, 0x0f},
131*4882a593Smuzhiyun {0x02, 0x04},
132*4882a593Smuzhiyun {0x03, 0x03},
133*4882a593Smuzhiyun {0x04, 0x50},
134*4882a593Smuzhiyun {0x09, 0x00},
135*4882a593Smuzhiyun {0x0a, 0x00},
136*4882a593Smuzhiyun {0x0b, 0x00},
137*4882a593Smuzhiyun {0x0c, 0x04},
138*4882a593Smuzhiyun {0x0d, 0x01},
139*4882a593Smuzhiyun {0x0e, 0xe8},
140*4882a593Smuzhiyun {0x0f, 0x02},
141*4882a593Smuzhiyun {0x10, 0x88},
142*4882a593Smuzhiyun {0x16, 0x00},
143*4882a593Smuzhiyun {0x17, 0x17},
144*4882a593Smuzhiyun {0x18, 0x1a},
145*4882a593Smuzhiyun {0x19, 0x14},
146*4882a593Smuzhiyun {0x1b, 0x48},
147*4882a593Smuzhiyun /*1c travis 20140929 update for lag*/
148*4882a593Smuzhiyun {0x1c, 0x1c},
149*4882a593Smuzhiyun {0x1e, 0x6b},
150*4882a593Smuzhiyun {0x1f, 0x28},
151*4882a593Smuzhiyun /*0x89 travis20140801*/
152*4882a593Smuzhiyun {0x20, 0x8b},
153*4882a593Smuzhiyun {0x21, 0x49},
154*4882a593Smuzhiyun /*b0 travis 20140929 update for lag*/
155*4882a593Smuzhiyun {0x22, 0xb0},
156*4882a593Smuzhiyun {0x23, 0x04},
157*4882a593Smuzhiyun {0x24, 0x16},
158*4882a593Smuzhiyun {0x34, 0x20},
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /*BLK*/
161*4882a593Smuzhiyun {0x26, 0x23},
162*4882a593Smuzhiyun {0x28, 0xff},
163*4882a593Smuzhiyun {0x29, 0x00},
164*4882a593Smuzhiyun {0x32, 0x00},
165*4882a593Smuzhiyun {0x33, 0x10},
166*4882a593Smuzhiyun {0x37, 0x20},
167*4882a593Smuzhiyun {0x38, 0x10},
168*4882a593Smuzhiyun {0x47, 0x80},
169*4882a593Smuzhiyun {0x4e, 0x66},
170*4882a593Smuzhiyun {0xa8, 0x02},
171*4882a593Smuzhiyun {0xa9, 0x80},
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /*ISP reg*/
174*4882a593Smuzhiyun {0x40, 0xff},
175*4882a593Smuzhiyun {0x41, 0x21},
176*4882a593Smuzhiyun {0x42, 0xcf},
177*4882a593Smuzhiyun {0x44, 0x02},
178*4882a593Smuzhiyun {0x45, 0xa8},
179*4882a593Smuzhiyun /*sync 02*/
180*4882a593Smuzhiyun {0x46, 0x02},
181*4882a593Smuzhiyun {0x4a, 0x11},
182*4882a593Smuzhiyun {0x4b, 0x01},
183*4882a593Smuzhiyun {0x4c, 0x20},
184*4882a593Smuzhiyun {0x4d, 0x05},
185*4882a593Smuzhiyun {0x4f, 0x01},
186*4882a593Smuzhiyun {0x50, 0x01},
187*4882a593Smuzhiyun {0x54, 0x04},
188*4882a593Smuzhiyun {0x55, 0x01},
189*4882a593Smuzhiyun {0x56, 0xe0},
190*4882a593Smuzhiyun {0x57, 0x02},
191*4882a593Smuzhiyun {0x58, 0x80},
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /*GAIN*/
194*4882a593Smuzhiyun {0x70, 0x70},
195*4882a593Smuzhiyun {0x5a, 0x84},
196*4882a593Smuzhiyun {0x5b, 0xc9},
197*4882a593Smuzhiyun {0x5c, 0xed},
198*4882a593Smuzhiyun {0x77, 0x74},
199*4882a593Smuzhiyun {0x78, 0x40},
200*4882a593Smuzhiyun {0x79, 0x5f},
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /*DNDD*/
203*4882a593Smuzhiyun {0x82, 0x14},
204*4882a593Smuzhiyun {0x83, 0x0b},
205*4882a593Smuzhiyun {0x89, 0xf0},
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /*EEINTP*/
208*4882a593Smuzhiyun {0x8f, 0xaa},
209*4882a593Smuzhiyun {0x90, 0x8c},
210*4882a593Smuzhiyun {0x91, 0x90},
211*4882a593Smuzhiyun {0x92, 0x03},
212*4882a593Smuzhiyun {0x93, 0x03},
213*4882a593Smuzhiyun {0x94, 0x05},
214*4882a593Smuzhiyun {0x95, 0x65},
215*4882a593Smuzhiyun {0x96, 0xf0},
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /*ASDE*/
218*4882a593Smuzhiyun {0xfe, 0x00},
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun {0x9a, 0x20},
221*4882a593Smuzhiyun {0x9b, 0x80},
222*4882a593Smuzhiyun {0x9c, 0x40},
223*4882a593Smuzhiyun {0x9d, 0x80},
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun {0xa1, 0x30},
226*4882a593Smuzhiyun {0xa2, 0x32},
227*4882a593Smuzhiyun {0xa4, 0x80},
228*4882a593Smuzhiyun {0xa5, 0x28},
229*4882a593Smuzhiyun {0xaa, 0x30},
230*4882a593Smuzhiyun {0xac, 0x22},
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun /*GAMMA*/
233*4882a593Smuzhiyun {0xfe, 0x00},
234*4882a593Smuzhiyun {0xbf, 0x08},
235*4882a593Smuzhiyun {0xc0, 0x16},
236*4882a593Smuzhiyun {0xc1, 0x28},
237*4882a593Smuzhiyun {0xc2, 0x41},
238*4882a593Smuzhiyun {0xc3, 0x5a},
239*4882a593Smuzhiyun {0xc4, 0x6c},
240*4882a593Smuzhiyun {0xc5, 0x7a},
241*4882a593Smuzhiyun {0xc6, 0x96},
242*4882a593Smuzhiyun {0xc7, 0xac},
243*4882a593Smuzhiyun {0xc8, 0xbc},
244*4882a593Smuzhiyun {0xc9, 0xc9},
245*4882a593Smuzhiyun {0xca, 0xd3},
246*4882a593Smuzhiyun {0xcb, 0xdd},
247*4882a593Smuzhiyun {0xcc, 0xe5},
248*4882a593Smuzhiyun {0xcd, 0xf1},
249*4882a593Smuzhiyun {0xce, 0xfa},
250*4882a593Smuzhiyun {0xcf, 0xff},
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun /*YCP*/
253*4882a593Smuzhiyun {0xd0, 0x40},
254*4882a593Smuzhiyun {0xd1, 0x34},
255*4882a593Smuzhiyun {0xd2, 0x34},
256*4882a593Smuzhiyun {0xd3, 0x40},
257*4882a593Smuzhiyun {0xd6, 0xf2},
258*4882a593Smuzhiyun {0xd7, 0x1b},
259*4882a593Smuzhiyun {0xd8, 0x18},
260*4882a593Smuzhiyun {0xdd, 0x03},
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /*AEC*/
263*4882a593Smuzhiyun {0xfe, 0x01},
264*4882a593Smuzhiyun {0x05, 0x30},
265*4882a593Smuzhiyun {0x06, 0x75},
266*4882a593Smuzhiyun {0x07, 0x40},
267*4882a593Smuzhiyun {0x08, 0xb0},
268*4882a593Smuzhiyun {0x0a, 0xc5},
269*4882a593Smuzhiyun {0x0b, 0x11},
270*4882a593Smuzhiyun {0x0c, 0x00},
271*4882a593Smuzhiyun {0x12, 0x52},
272*4882a593Smuzhiyun {0x13, 0x38},
273*4882a593Smuzhiyun {0x18, 0x95},
274*4882a593Smuzhiyun {0x19, 0x96},
275*4882a593Smuzhiyun {0x1f, 0x20},
276*4882a593Smuzhiyun {0x20, 0xc0},
277*4882a593Smuzhiyun {0x3e, 0x40},
278*4882a593Smuzhiyun {0x3f, 0x57},
279*4882a593Smuzhiyun {0x40, 0x7d},
280*4882a593Smuzhiyun {0x03, 0x60},
281*4882a593Smuzhiyun {0x44, 0x02},
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /*AWB*/
284*4882a593Smuzhiyun {0xfe, 0x01},
285*4882a593Smuzhiyun {0x1c, 0x91},
286*4882a593Smuzhiyun {0x21, 0x15},
287*4882a593Smuzhiyun {0x50, 0x80},
288*4882a593Smuzhiyun {0x56, 0x04},
289*4882a593Smuzhiyun {0x59, 0x08},
290*4882a593Smuzhiyun {0x5b, 0x02},
291*4882a593Smuzhiyun {0x61, 0x8d},
292*4882a593Smuzhiyun {0x62, 0xa7},
293*4882a593Smuzhiyun {0x63, 0xd0},
294*4882a593Smuzhiyun {0x65, 0x06},
295*4882a593Smuzhiyun {0x66, 0x06},
296*4882a593Smuzhiyun {0x67, 0x84},
297*4882a593Smuzhiyun {0x69, 0x08},
298*4882a593Smuzhiyun {0x6a, 0x25},
299*4882a593Smuzhiyun {0x6b, 0x01},
300*4882a593Smuzhiyun {0x6c, 0x00},
301*4882a593Smuzhiyun {0x6d, 0x02},
302*4882a593Smuzhiyun {0x6e, 0xf0},
303*4882a593Smuzhiyun {0x6f, 0x80},
304*4882a593Smuzhiyun {0x76, 0x80},
305*4882a593Smuzhiyun {0x78, 0xaf},
306*4882a593Smuzhiyun {0x79, 0x75},
307*4882a593Smuzhiyun {0x7a, 0x40},
308*4882a593Smuzhiyun {0x7b, 0x50},
309*4882a593Smuzhiyun {0x7c, 0x0c},
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun {0x90, 0xc9},
312*4882a593Smuzhiyun {0x91, 0xbe},
313*4882a593Smuzhiyun {0x92, 0xe2},
314*4882a593Smuzhiyun {0x93, 0xc9},
315*4882a593Smuzhiyun {0x95, 0x1b},
316*4882a593Smuzhiyun {0x96, 0xe2},
317*4882a593Smuzhiyun {0x97, 0x49},
318*4882a593Smuzhiyun {0x98, 0x1b},
319*4882a593Smuzhiyun {0x9a, 0x49},
320*4882a593Smuzhiyun {0x9b, 0x1b},
321*4882a593Smuzhiyun {0x9c, 0xc3},
322*4882a593Smuzhiyun {0x9d, 0x49},
323*4882a593Smuzhiyun {0x9f, 0xc7},
324*4882a593Smuzhiyun {0xa0, 0xc8},
325*4882a593Smuzhiyun {0xa1, 0x00},
326*4882a593Smuzhiyun {0xa2, 0x00},
327*4882a593Smuzhiyun {0x86, 0x00},
328*4882a593Smuzhiyun {0x87, 0x00},
329*4882a593Smuzhiyun {0x88, 0x00},
330*4882a593Smuzhiyun {0x89, 0x00},
331*4882a593Smuzhiyun {0xa4, 0xb9},
332*4882a593Smuzhiyun {0xa5, 0xa0},
333*4882a593Smuzhiyun {0xa6, 0xba},
334*4882a593Smuzhiyun {0xa7, 0x92},
335*4882a593Smuzhiyun {0xa9, 0xba},
336*4882a593Smuzhiyun {0xaa, 0x80},
337*4882a593Smuzhiyun {0xab, 0x9d},
338*4882a593Smuzhiyun {0xac, 0x7f},
339*4882a593Smuzhiyun {0xae, 0xbb},
340*4882a593Smuzhiyun {0xaf, 0x9d},
341*4882a593Smuzhiyun {0xb0, 0xc8},
342*4882a593Smuzhiyun {0xb1, 0x97},
343*4882a593Smuzhiyun {0xb3, 0xb7},
344*4882a593Smuzhiyun {0xb4, 0x7f},
345*4882a593Smuzhiyun {0xb5, 0x00},
346*4882a593Smuzhiyun {0xb6, 0x00},
347*4882a593Smuzhiyun {0x8b, 0x00},
348*4882a593Smuzhiyun {0x8c, 0x00},
349*4882a593Smuzhiyun {0x8d, 0x00},
350*4882a593Smuzhiyun {0x8e, 0x00},
351*4882a593Smuzhiyun {0x94, 0x55},
352*4882a593Smuzhiyun {0x99, 0xa6},
353*4882a593Smuzhiyun {0x9e, 0xaa},
354*4882a593Smuzhiyun {0xa3, 0x0a},
355*4882a593Smuzhiyun {0x8a, 0x00},
356*4882a593Smuzhiyun {0xa8, 0x55},
357*4882a593Smuzhiyun {0xad, 0x55},
358*4882a593Smuzhiyun {0xb2, 0x55},
359*4882a593Smuzhiyun {0xb7, 0x05},
360*4882a593Smuzhiyun {0x8f, 0x00},
361*4882a593Smuzhiyun {0xb8, 0xcb},
362*4882a593Smuzhiyun {0xb9, 0x9b},
363*4882a593Smuzhiyun /*CC*/
364*4882a593Smuzhiyun {0xfe, 0x01},
365*4882a593Smuzhiyun /*skin white*/
366*4882a593Smuzhiyun {0xd0, 0x38},
367*4882a593Smuzhiyun {0xd1, 0x00},
368*4882a593Smuzhiyun {0xd2, 0x02},
369*4882a593Smuzhiyun {0xd3, 0x04},
370*4882a593Smuzhiyun {0xd4, 0x38},
371*4882a593Smuzhiyun {0xd5, 0x12},
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun {0xd6, 0x30},
374*4882a593Smuzhiyun {0xd7, 0x00},
375*4882a593Smuzhiyun {0xd8, 0x0a},
376*4882a593Smuzhiyun {0xd9, 0x16},
377*4882a593Smuzhiyun {0xda, 0x39},
378*4882a593Smuzhiyun {0xdb, 0xf8},
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun /*LSC*/
381*4882a593Smuzhiyun {0xfe, 0x01},
382*4882a593Smuzhiyun {0xc1, 0x3c},
383*4882a593Smuzhiyun {0xc2, 0x50},
384*4882a593Smuzhiyun {0xc3, 0x00},
385*4882a593Smuzhiyun {0xc4, 0x40},
386*4882a593Smuzhiyun {0xc5, 0x30},
387*4882a593Smuzhiyun {0xc6, 0x30},
388*4882a593Smuzhiyun {0xc7, 0x10},
389*4882a593Smuzhiyun {0xc8, 0x00},
390*4882a593Smuzhiyun {0xc9, 0x00},
391*4882a593Smuzhiyun {0xdc, 0x20},
392*4882a593Smuzhiyun {0xdd, 0x10},
393*4882a593Smuzhiyun {0xdf, 0x00},
394*4882a593Smuzhiyun {0xde, 0x00},
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun /*Histogram*/
397*4882a593Smuzhiyun {0x01, 0x10},
398*4882a593Smuzhiyun {0x0b, 0x31},
399*4882a593Smuzhiyun {0x0e, 0x50},
400*4882a593Smuzhiyun {0x0f, 0x0f},
401*4882a593Smuzhiyun {0x10, 0x6e},
402*4882a593Smuzhiyun {0x12, 0xa0},
403*4882a593Smuzhiyun {0x15, 0x60},
404*4882a593Smuzhiyun {0x16, 0x60},
405*4882a593Smuzhiyun {0x17, 0xe0},
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /*Measure Window*/
408*4882a593Smuzhiyun {0xcc, 0x0c},
409*4882a593Smuzhiyun {0xcd, 0x10},
410*4882a593Smuzhiyun {0xce, 0xa0},
411*4882a593Smuzhiyun {0xcf, 0xe6},
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /*dark sun*/
414*4882a593Smuzhiyun {0x45, 0xf7},
415*4882a593Smuzhiyun {0x46, 0xff},
416*4882a593Smuzhiyun {0x47, 0x15},
417*4882a593Smuzhiyun {0x48, 0x03},
418*4882a593Smuzhiyun {0x4f, 0x60},
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun /*banding*/
421*4882a593Smuzhiyun {0xfe, 0x00},
422*4882a593Smuzhiyun {0x05, 0x00},
423*4882a593Smuzhiyun /*HB*/
424*4882a593Smuzhiyun {0x06, 0x90},
425*4882a593Smuzhiyun {0x07, 0x00},
426*4882a593Smuzhiyun /*VB*/
427*4882a593Smuzhiyun {0x08, 0x64},
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun {0xfe, 0x01},
430*4882a593Smuzhiyun /*anti-flicker step [11:8]*/
431*4882a593Smuzhiyun {0x25, 0x00},
432*4882a593Smuzhiyun /*anti-flicker step [7:0]*/
433*4882a593Smuzhiyun {0x26, 0xb3},
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun /*exp level 0 */
436*4882a593Smuzhiyun {0x27, 0x02},
437*4882a593Smuzhiyun {0x28, 0x19},
438*4882a593Smuzhiyun /*exp level 1 */
439*4882a593Smuzhiyun {0x29, 0x02},
440*4882a593Smuzhiyun {0x2a, 0x19},
441*4882a593Smuzhiyun /*7.14fps*/
442*4882a593Smuzhiyun {0x2b, 0x02},
443*4882a593Smuzhiyun {0x2c, 0x19},
444*4882a593Smuzhiyun /*exp level 3 */
445*4882a593Smuzhiyun {0x2d, 0x02},
446*4882a593Smuzhiyun {0x2e, 0x19},
447*4882a593Smuzhiyun {0x3c, 0x20},
448*4882a593Smuzhiyun {0xfe, 0x00},
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun /*DVP*/
451*4882a593Smuzhiyun {0xfe, 0x03},
452*4882a593Smuzhiyun {0x01, 0x00},
453*4882a593Smuzhiyun {0x02, 0x00},
454*4882a593Smuzhiyun {0x10, 0x00},
455*4882a593Smuzhiyun {0x15, 0x00},
456*4882a593Smuzhiyun {0xfe, 0x00},
457*4882a593Smuzhiyun {REG_NULL, 0x00},
458*4882a593Smuzhiyun };
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun static const struct gc0312_framesize gc0312_framesizes[] = {
461*4882a593Smuzhiyun { /* VGA */
462*4882a593Smuzhiyun .width = 640,
463*4882a593Smuzhiyun .height = 480,
464*4882a593Smuzhiyun .max_fps = {
465*4882a593Smuzhiyun .numerator = 10000,
466*4882a593Smuzhiyun .denominator = 300000,
467*4882a593Smuzhiyun },
468*4882a593Smuzhiyun .regs = gc0312_vga_regs,
469*4882a593Smuzhiyun .max_exp_lines = 488,
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun };
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun static const struct gc0312_pixfmt gc0312_formats[] = {
474*4882a593Smuzhiyun {
475*4882a593Smuzhiyun .code = MEDIA_BUS_FMT_YUYV8_2X8,
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun };
478*4882a593Smuzhiyun
to_gc0312(struct v4l2_subdev * sd)479*4882a593Smuzhiyun static inline struct gc0312 *to_gc0312(struct v4l2_subdev *sd)
480*4882a593Smuzhiyun {
481*4882a593Smuzhiyun return container_of(sd, struct gc0312, sd);
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /* sensor register write */
gc0312_write(struct i2c_client * client,u8 reg,u8 val)485*4882a593Smuzhiyun static int gc0312_write(struct i2c_client *client, u8 reg, u8 val)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun struct i2c_msg msg;
488*4882a593Smuzhiyun u8 buf[2];
489*4882a593Smuzhiyun int ret;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun buf[0] = reg & 0xFF;
492*4882a593Smuzhiyun buf[1] = val;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun msg.addr = client->addr;
495*4882a593Smuzhiyun msg.flags = client->flags;
496*4882a593Smuzhiyun msg.buf = buf;
497*4882a593Smuzhiyun msg.len = sizeof(buf);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun ret = i2c_transfer(client->adapter, &msg, 1);
500*4882a593Smuzhiyun if (ret >= 0)
501*4882a593Smuzhiyun return 0;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun dev_err(&client->dev,
504*4882a593Smuzhiyun "gc0312 write reg(0x%x val:0x%x) failed !\n", reg, val);
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun return ret;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun /* sensor register read */
gc0312_read(struct i2c_client * client,u8 reg,u8 * val)510*4882a593Smuzhiyun static int gc0312_read(struct i2c_client *client, u8 reg, u8 *val)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun struct i2c_msg msg[2];
513*4882a593Smuzhiyun u8 buf[1];
514*4882a593Smuzhiyun int ret;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun buf[0] = reg & 0xFF;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun msg[0].addr = client->addr;
519*4882a593Smuzhiyun msg[0].flags = client->flags;
520*4882a593Smuzhiyun msg[0].buf = buf;
521*4882a593Smuzhiyun msg[0].len = sizeof(buf);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun msg[1].addr = client->addr;
524*4882a593Smuzhiyun msg[1].flags = client->flags | I2C_M_RD;
525*4882a593Smuzhiyun msg[1].buf = buf;
526*4882a593Smuzhiyun msg[1].len = 1;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun ret = i2c_transfer(client->adapter, msg, 2);
529*4882a593Smuzhiyun if (ret >= 0) {
530*4882a593Smuzhiyun *val = buf[0];
531*4882a593Smuzhiyun return 0;
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun dev_err(&client->dev,
535*4882a593Smuzhiyun "gc0312 read reg:0x%x failed !\n", reg);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun return ret;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
gc0312_write_array(struct i2c_client * client,const struct sensor_register * regs)540*4882a593Smuzhiyun static int gc0312_write_array(struct i2c_client *client,
541*4882a593Smuzhiyun const struct sensor_register *regs)
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun int i, ret = 0;
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun i = 0;
546*4882a593Smuzhiyun while (regs[i].addr != REG_NULL) {
547*4882a593Smuzhiyun ret = gc0312_write(client, regs[i].addr, regs[i].value);
548*4882a593Smuzhiyun if (ret) {
549*4882a593Smuzhiyun dev_err(&client->dev, "%s failed !\n", __func__);
550*4882a593Smuzhiyun break;
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun i++;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun return ret;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
gc0312_get_default_format(struct v4l2_mbus_framefmt * format)559*4882a593Smuzhiyun static void gc0312_get_default_format(struct v4l2_mbus_framefmt *format)
560*4882a593Smuzhiyun {
561*4882a593Smuzhiyun format->width = gc0312_framesizes[0].width;
562*4882a593Smuzhiyun format->height = gc0312_framesizes[0].height;
563*4882a593Smuzhiyun format->colorspace = V4L2_COLORSPACE_SRGB;
564*4882a593Smuzhiyun format->code = gc0312_formats[0].code;
565*4882a593Smuzhiyun format->field = V4L2_FIELD_NONE;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun
gc0312_set_streaming(struct gc0312 * gc0312,int on)568*4882a593Smuzhiyun static void gc0312_set_streaming(struct gc0312 *gc0312, int on)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun struct i2c_client *client = gc0312->client;
571*4882a593Smuzhiyun int ret;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun ret = gc0312_write(client, REG_SOFTWARE_STANDBY, on);
576*4882a593Smuzhiyun if (ret)
577*4882a593Smuzhiyun dev_err(&client->dev, "gc0312 soft standby failed\n");
578*4882a593Smuzhiyun }
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun /*
581*4882a593Smuzhiyun * V4L2 subdev video and pad level operations
582*4882a593Smuzhiyun */
583*4882a593Smuzhiyun
gc0312_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)584*4882a593Smuzhiyun static int gc0312_enum_mbus_code(struct v4l2_subdev *sd,
585*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
586*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code)
587*4882a593Smuzhiyun {
588*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun if (code->index >= ARRAY_SIZE(gc0312_formats))
593*4882a593Smuzhiyun return -EINVAL;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun code->code = gc0312_formats[code->index].code;
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun return 0;
598*4882a593Smuzhiyun }
599*4882a593Smuzhiyun
gc0312_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)600*4882a593Smuzhiyun static int gc0312_enum_frame_sizes(struct v4l2_subdev *sd,
601*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
602*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
605*4882a593Smuzhiyun int i = ARRAY_SIZE(gc0312_formats);
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun if (fse->index >= ARRAY_SIZE(gc0312_framesizes))
610*4882a593Smuzhiyun return -EINVAL;
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun while (--i)
613*4882a593Smuzhiyun if (fse->code == gc0312_formats[i].code)
614*4882a593Smuzhiyun break;
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun fse->code = gc0312_formats[i].code;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun fse->min_width = gc0312_framesizes[fse->index].width;
619*4882a593Smuzhiyun fse->max_width = fse->min_width;
620*4882a593Smuzhiyun fse->max_height = gc0312_framesizes[fse->index].height;
621*4882a593Smuzhiyun fse->min_height = fse->max_height;
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun return 0;
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun
gc0312_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)626*4882a593Smuzhiyun static int gc0312_get_fmt(struct v4l2_subdev *sd,
627*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
628*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
631*4882a593Smuzhiyun struct gc0312 *gc0312 = to_gc0312(sd);
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun dev_dbg(&client->dev, "%s enter\n", __func__);
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
636*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
637*4882a593Smuzhiyun struct v4l2_mbus_framefmt *mf;
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun mf = v4l2_subdev_get_try_format(sd, cfg, 0);
640*4882a593Smuzhiyun mutex_lock(&gc0312->lock);
641*4882a593Smuzhiyun fmt->format = *mf;
642*4882a593Smuzhiyun mutex_unlock(&gc0312->lock);
643*4882a593Smuzhiyun return 0;
644*4882a593Smuzhiyun #else
645*4882a593Smuzhiyun return -ENOTTY;
646*4882a593Smuzhiyun #endif
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun mutex_lock(&gc0312->lock);
650*4882a593Smuzhiyun fmt->format = gc0312->format;
651*4882a593Smuzhiyun mutex_unlock(&gc0312->lock);
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun dev_dbg(&client->dev, "%s: %x %dx%d\n", __func__,
654*4882a593Smuzhiyun gc0312->format.code, gc0312->format.width,
655*4882a593Smuzhiyun gc0312->format.height);
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun return 0;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun
__gc0312_try_frame_size(struct v4l2_mbus_framefmt * mf,const struct gc0312_framesize ** size)660*4882a593Smuzhiyun static void __gc0312_try_frame_size(struct v4l2_mbus_framefmt *mf,
661*4882a593Smuzhiyun const struct gc0312_framesize **size)
662*4882a593Smuzhiyun {
663*4882a593Smuzhiyun const struct gc0312_framesize *fsize = &gc0312_framesizes[0];
664*4882a593Smuzhiyun const struct gc0312_framesize *match = NULL;
665*4882a593Smuzhiyun int i = ARRAY_SIZE(gc0312_framesizes);
666*4882a593Smuzhiyun unsigned int min_err = UINT_MAX;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun while (i--) {
669*4882a593Smuzhiyun unsigned int err = abs(fsize->width - mf->width)
670*4882a593Smuzhiyun + abs(fsize->height - mf->height);
671*4882a593Smuzhiyun if (err < min_err && fsize->regs[0].addr) {
672*4882a593Smuzhiyun min_err = err;
673*4882a593Smuzhiyun match = fsize;
674*4882a593Smuzhiyun }
675*4882a593Smuzhiyun fsize++;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun if (!match)
679*4882a593Smuzhiyun match = &gc0312_framesizes[0];
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun mf->width = match->width;
682*4882a593Smuzhiyun mf->height = match->height;
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun if (size)
685*4882a593Smuzhiyun *size = match;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun
gc0312_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)688*4882a593Smuzhiyun static int gc0312_set_fmt(struct v4l2_subdev *sd,
689*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
690*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
691*4882a593Smuzhiyun {
692*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
693*4882a593Smuzhiyun int index = ARRAY_SIZE(gc0312_formats);
694*4882a593Smuzhiyun struct v4l2_mbus_framefmt *mf = &fmt->format;
695*4882a593Smuzhiyun const struct gc0312_framesize *size = NULL;
696*4882a593Smuzhiyun struct gc0312 *gc0312 = to_gc0312(sd);
697*4882a593Smuzhiyun int ret = 0;
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun dev_dbg(&client->dev, "%s enter\n", __func__);
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun __gc0312_try_frame_size(mf, &size);
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun while (--index >= 0)
704*4882a593Smuzhiyun if (gc0312_formats[index].code == mf->code)
705*4882a593Smuzhiyun break;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun if (index < 0)
708*4882a593Smuzhiyun return -EINVAL;
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun mf->colorspace = V4L2_COLORSPACE_SRGB;
711*4882a593Smuzhiyun mf->code = gc0312_formats[index].code;
712*4882a593Smuzhiyun mf->field = V4L2_FIELD_NONE;
713*4882a593Smuzhiyun
714*4882a593Smuzhiyun mutex_lock(&gc0312->lock);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
717*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
718*4882a593Smuzhiyun mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
719*4882a593Smuzhiyun *mf = fmt->format;
720*4882a593Smuzhiyun #else
721*4882a593Smuzhiyun return -ENOTTY;
722*4882a593Smuzhiyun #endif
723*4882a593Smuzhiyun } else {
724*4882a593Smuzhiyun if (gc0312->streaming) {
725*4882a593Smuzhiyun mutex_unlock(&gc0312->lock);
726*4882a593Smuzhiyun return -EBUSY;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun gc0312->frame_size = size;
730*4882a593Smuzhiyun gc0312->format = fmt->format;
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun mutex_unlock(&gc0312->lock);
734*4882a593Smuzhiyun return ret;
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun
gc0312_get_module_inf(struct gc0312 * gc0312,struct rkmodule_inf * inf)737*4882a593Smuzhiyun static void gc0312_get_module_inf(struct gc0312 *gc0312,
738*4882a593Smuzhiyun struct rkmodule_inf *inf)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun memset(inf, 0, sizeof(*inf));
741*4882a593Smuzhiyun strlcpy(inf->base.sensor, DRIVER_NAME, sizeof(inf->base.sensor));
742*4882a593Smuzhiyun strlcpy(inf->base.module, gc0312->module_name,
743*4882a593Smuzhiyun sizeof(inf->base.module));
744*4882a593Smuzhiyun strlcpy(inf->base.lens, gc0312->len_name, sizeof(inf->base.lens));
745*4882a593Smuzhiyun }
746*4882a593Smuzhiyun
gc0312_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)747*4882a593Smuzhiyun static long gc0312_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
748*4882a593Smuzhiyun {
749*4882a593Smuzhiyun struct gc0312 *gc0312 = to_gc0312(sd);
750*4882a593Smuzhiyun long ret = 0;
751*4882a593Smuzhiyun u32 stream = 0;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun switch (cmd) {
754*4882a593Smuzhiyun case RKMODULE_GET_MODULE_INFO:
755*4882a593Smuzhiyun gc0312_get_module_inf(gc0312, (struct rkmodule_inf *)arg);
756*4882a593Smuzhiyun break;
757*4882a593Smuzhiyun case RKMODULE_SET_QUICK_STREAM:
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun stream = *((u32 *)arg);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun if (stream)
762*4882a593Smuzhiyun gc0312_set_streaming(gc0312, 0xff);
763*4882a593Smuzhiyun else
764*4882a593Smuzhiyun gc0312_set_streaming(gc0312, 0x00);
765*4882a593Smuzhiyun break;
766*4882a593Smuzhiyun default:
767*4882a593Smuzhiyun ret = -ENOIOCTLCMD;
768*4882a593Smuzhiyun break;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun return ret;
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
gc0312_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)775*4882a593Smuzhiyun static long gc0312_compat_ioctl32(struct v4l2_subdev *sd,
776*4882a593Smuzhiyun unsigned int cmd, unsigned long arg)
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun void __user *up = compat_ptr(arg);
779*4882a593Smuzhiyun struct rkmodule_inf *inf;
780*4882a593Smuzhiyun struct rkmodule_awb_cfg *cfg;
781*4882a593Smuzhiyun long ret;
782*4882a593Smuzhiyun u32 stream = 0;
783*4882a593Smuzhiyun
784*4882a593Smuzhiyun switch (cmd) {
785*4882a593Smuzhiyun case RKMODULE_GET_MODULE_INFO:
786*4882a593Smuzhiyun inf = kzalloc(sizeof(*inf), GFP_KERNEL);
787*4882a593Smuzhiyun if (!inf) {
788*4882a593Smuzhiyun ret = -ENOMEM;
789*4882a593Smuzhiyun return ret;
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun ret = gc0312_ioctl(sd, cmd, inf);
793*4882a593Smuzhiyun if (!ret)
794*4882a593Smuzhiyun ret = copy_to_user(up, inf, sizeof(*inf));
795*4882a593Smuzhiyun kfree(inf);
796*4882a593Smuzhiyun break;
797*4882a593Smuzhiyun case RKMODULE_AWB_CFG:
798*4882a593Smuzhiyun cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
799*4882a593Smuzhiyun if (!cfg) {
800*4882a593Smuzhiyun ret = -ENOMEM;
801*4882a593Smuzhiyun return ret;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun ret = copy_from_user(cfg, up, sizeof(*cfg));
805*4882a593Smuzhiyun if (!ret)
806*4882a593Smuzhiyun ret = gc0312_ioctl(sd, cmd, cfg);
807*4882a593Smuzhiyun kfree(cfg);
808*4882a593Smuzhiyun break;
809*4882a593Smuzhiyun case RKMODULE_SET_QUICK_STREAM:
810*4882a593Smuzhiyun ret = copy_from_user(&stream, up, sizeof(u32));
811*4882a593Smuzhiyun if (!ret)
812*4882a593Smuzhiyun ret = gc0312_ioctl(sd, cmd, &stream);
813*4882a593Smuzhiyun break;
814*4882a593Smuzhiyun default:
815*4882a593Smuzhiyun ret = -ENOIOCTLCMD;
816*4882a593Smuzhiyun break;
817*4882a593Smuzhiyun }
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun return ret;
820*4882a593Smuzhiyun }
821*4882a593Smuzhiyun #endif
822*4882a593Smuzhiyun
gc0312_s_stream(struct v4l2_subdev * sd,int on)823*4882a593Smuzhiyun static int gc0312_s_stream(struct v4l2_subdev *sd, int on)
824*4882a593Smuzhiyun {
825*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
826*4882a593Smuzhiyun struct gc0312 *gc0312 = to_gc0312(sd);
827*4882a593Smuzhiyun int ret = 0;
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun dev_dbg(&client->dev, "%s: on: %d\n", __func__, on);
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun mutex_lock(&gc0312->lock);
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun on = !!on;
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun if (gc0312->streaming == on)
836*4882a593Smuzhiyun goto unlock;
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun if (!on) {
839*4882a593Smuzhiyun /* Stop Streaming Sequence */
840*4882a593Smuzhiyun gc0312_set_streaming(gc0312, 0x00);
841*4882a593Smuzhiyun gc0312->streaming = on;
842*4882a593Smuzhiyun if (!IS_ERR(gc0312->pwdn_gpio)) {
843*4882a593Smuzhiyun gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
844*4882a593Smuzhiyun usleep_range(2000, 5000);
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun goto unlock;
847*4882a593Smuzhiyun }
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun if (!IS_ERR(gc0312->pwdn_gpio)) {
850*4882a593Smuzhiyun gpiod_set_value_cansleep(gc0312->pwdn_gpio, 0);
851*4882a593Smuzhiyun usleep_range(2000, 5000);
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun ret = gc0312_write_array(client, gc0312->frame_size->regs);
855*4882a593Smuzhiyun if (ret)
856*4882a593Smuzhiyun goto unlock;
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun gc0312_set_streaming(gc0312, 0xFF);
859*4882a593Smuzhiyun gc0312->streaming = on;
860*4882a593Smuzhiyun
861*4882a593Smuzhiyun unlock:
862*4882a593Smuzhiyun mutex_unlock(&gc0312->lock);
863*4882a593Smuzhiyun return ret;
864*4882a593Smuzhiyun }
865*4882a593Smuzhiyun
gc0312_set_test_pattern(struct gc0312 * gc0312,int value)866*4882a593Smuzhiyun static int gc0312_set_test_pattern(struct gc0312 *gc0312, int value)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun return 0;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun
gc0312_s_ctrl(struct v4l2_ctrl * ctrl)871*4882a593Smuzhiyun static int gc0312_s_ctrl(struct v4l2_ctrl *ctrl)
872*4882a593Smuzhiyun {
873*4882a593Smuzhiyun struct gc0312 *gc0312 =
874*4882a593Smuzhiyun container_of(ctrl->handler, struct gc0312, ctrls);
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun switch (ctrl->id) {
877*4882a593Smuzhiyun case V4L2_CID_TEST_PATTERN:
878*4882a593Smuzhiyun return gc0312_set_test_pattern(gc0312, ctrl->val);
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun return 0;
882*4882a593Smuzhiyun }
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun static const struct v4l2_ctrl_ops gc0312_ctrl_ops = {
885*4882a593Smuzhiyun .s_ctrl = gc0312_s_ctrl,
886*4882a593Smuzhiyun };
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun static const char * const gc0312_test_pattern_menu[] = {
889*4882a593Smuzhiyun "Disabled",
890*4882a593Smuzhiyun "Vertical Color Bars",
891*4882a593Smuzhiyun };
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
894*4882a593Smuzhiyun * V4L2 subdev internal operations
895*4882a593Smuzhiyun */
896*4882a593Smuzhiyun
897*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
gc0312_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)898*4882a593Smuzhiyun static int gc0312_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(sd);
901*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format =
902*4882a593Smuzhiyun v4l2_subdev_get_try_format(sd, fh->pad, 0);
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
905*4882a593Smuzhiyun
906*4882a593Smuzhiyun gc0312_get_default_format(format);
907*4882a593Smuzhiyun
908*4882a593Smuzhiyun return 0;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun #endif
911*4882a593Smuzhiyun
gc0312_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)912*4882a593Smuzhiyun static int gc0312_g_mbus_config(struct v4l2_subdev *sd,
913*4882a593Smuzhiyun struct v4l2_mbus_config *config)
914*4882a593Smuzhiyun {
915*4882a593Smuzhiyun config->type = V4L2_MBUS_PARALLEL;
916*4882a593Smuzhiyun config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
917*4882a593Smuzhiyun V4L2_MBUS_VSYNC_ACTIVE_LOW |
918*4882a593Smuzhiyun V4L2_MBUS_PCLK_SAMPLE_RISING;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun return 0;
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun
gc0312_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)923*4882a593Smuzhiyun static int gc0312_enum_frame_interval(struct v4l2_subdev *sd,
924*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
925*4882a593Smuzhiyun struct v4l2_subdev_frame_interval_enum *fie)
926*4882a593Smuzhiyun {
927*4882a593Smuzhiyun if (fie->index >= ARRAY_SIZE(gc0312_framesizes))
928*4882a593Smuzhiyun return -EINVAL;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun fie->code = MEDIA_BUS_FMT_YUYV8_2X8;
931*4882a593Smuzhiyun fie->width = gc0312_framesizes[fie->index].width;
932*4882a593Smuzhiyun fie->height = gc0312_framesizes[fie->index].height;
933*4882a593Smuzhiyun fie->interval = gc0312_framesizes[fie->index].max_fps;
934*4882a593Smuzhiyun return 0;
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops gc0312_subdev_core_ops = {
938*4882a593Smuzhiyun .log_status = v4l2_ctrl_subdev_log_status,
939*4882a593Smuzhiyun .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
940*4882a593Smuzhiyun .unsubscribe_event = v4l2_event_subdev_unsubscribe,
941*4882a593Smuzhiyun .ioctl = gc0312_ioctl,
942*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
943*4882a593Smuzhiyun .compat_ioctl32 = gc0312_compat_ioctl32,
944*4882a593Smuzhiyun #endif
945*4882a593Smuzhiyun };
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops gc0312_subdev_video_ops = {
948*4882a593Smuzhiyun .s_stream = gc0312_s_stream,
949*4882a593Smuzhiyun .g_mbus_config = gc0312_g_mbus_config,
950*4882a593Smuzhiyun };
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops gc0312_subdev_pad_ops = {
953*4882a593Smuzhiyun .enum_mbus_code = gc0312_enum_mbus_code,
954*4882a593Smuzhiyun .enum_frame_size = gc0312_enum_frame_sizes,
955*4882a593Smuzhiyun .enum_frame_interval = gc0312_enum_frame_interval,
956*4882a593Smuzhiyun .get_fmt = gc0312_get_fmt,
957*4882a593Smuzhiyun .set_fmt = gc0312_set_fmt,
958*4882a593Smuzhiyun };
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
961*4882a593Smuzhiyun static const struct v4l2_subdev_ops gc0312_subdev_ops = {
962*4882a593Smuzhiyun .core = &gc0312_subdev_core_ops,
963*4882a593Smuzhiyun .video = &gc0312_subdev_video_ops,
964*4882a593Smuzhiyun .pad = &gc0312_subdev_pad_ops,
965*4882a593Smuzhiyun };
966*4882a593Smuzhiyun
967*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops gc0312_subdev_internal_ops = {
968*4882a593Smuzhiyun .open = gc0312_open,
969*4882a593Smuzhiyun };
970*4882a593Smuzhiyun #endif
971*4882a593Smuzhiyun
gc0312_detect(struct gc0312 * gc0312)972*4882a593Smuzhiyun static int gc0312_detect(struct gc0312 *gc0312)
973*4882a593Smuzhiyun {
974*4882a593Smuzhiyun struct i2c_client *client = gc0312->client;
975*4882a593Smuzhiyun u8 pid, ver;
976*4882a593Smuzhiyun int ret;
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun dev_dbg(&client->dev, "%s:\n", __func__);
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun /* Check sensor revision */
981*4882a593Smuzhiyun ret = gc0312_read(client, REG_SC_CHIP_ID_H, &pid);
982*4882a593Smuzhiyun if (!ret)
983*4882a593Smuzhiyun ret = gc0312_read(client, REG_SC_CHIP_ID_L, &ver);
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun if (!ret) {
986*4882a593Smuzhiyun unsigned short id;
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun id = SENSOR_ID(pid, ver);
989*4882a593Smuzhiyun if (id != GC0312_ID) {
990*4882a593Smuzhiyun ret = -1;
991*4882a593Smuzhiyun dev_err(&client->dev,
992*4882a593Smuzhiyun "Sensor detection failed (%04X, %d)\n",
993*4882a593Smuzhiyun id, ret);
994*4882a593Smuzhiyun } else {
995*4882a593Smuzhiyun dev_info(&client->dev, "Found GC%04X sensor\n", id);
996*4882a593Smuzhiyun if (!IS_ERR(gc0312->pwdn_gpio))
997*4882a593Smuzhiyun gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun return ret;
1002*4882a593Smuzhiyun }
1003*4882a593Smuzhiyun
__gc0312_power_on(struct gc0312 * gc0312)1004*4882a593Smuzhiyun static int __gc0312_power_on(struct gc0312 *gc0312)
1005*4882a593Smuzhiyun {
1006*4882a593Smuzhiyun int ret;
1007*4882a593Smuzhiyun struct device *dev = &gc0312->client->dev;
1008*4882a593Smuzhiyun
1009*4882a593Smuzhiyun if (!IS_ERR(gc0312->xvclk)) {
1010*4882a593Smuzhiyun ret = clk_set_rate(gc0312->xvclk, 24000000);
1011*4882a593Smuzhiyun if (ret < 0)
1012*4882a593Smuzhiyun dev_info(dev, "Failed to set xvclk rate (24MHz)\n");
1013*4882a593Smuzhiyun }
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun if (!IS_ERR(gc0312->pwdn_gpio)) {
1016*4882a593Smuzhiyun gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
1017*4882a593Smuzhiyun usleep_range(2000, 5000);
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun
1020*4882a593Smuzhiyun if (!IS_ERR(gc0312->supplies)) {
1021*4882a593Smuzhiyun ret = regulator_bulk_enable(GC0312_NUM_SUPPLIES,
1022*4882a593Smuzhiyun gc0312->supplies);
1023*4882a593Smuzhiyun if (ret < 0)
1024*4882a593Smuzhiyun dev_info(dev, "Failed to enable regulators\n");
1025*4882a593Smuzhiyun
1026*4882a593Smuzhiyun usleep_range(2000, 5000);
1027*4882a593Smuzhiyun }
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun if (!IS_ERR(gc0312->pwdn_gpio)) {
1030*4882a593Smuzhiyun gpiod_set_value_cansleep(gc0312->pwdn_gpio, 0);
1031*4882a593Smuzhiyun usleep_range(2000, 5000);
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun if (!IS_ERR(gc0312->xvclk)) {
1035*4882a593Smuzhiyun ret = clk_prepare_enable(gc0312->xvclk);
1036*4882a593Smuzhiyun if (ret < 0)
1037*4882a593Smuzhiyun dev_info(dev, "Failed to enable xvclk\n");
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun usleep_range(7000, 10000);
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun return 0;
1043*4882a593Smuzhiyun }
1044*4882a593Smuzhiyun
__gc0312_power_off(struct gc0312 * gc0312)1045*4882a593Smuzhiyun static void __gc0312_power_off(struct gc0312 *gc0312)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun if (!IS_ERR(gc0312->xvclk))
1048*4882a593Smuzhiyun clk_disable_unprepare(gc0312->xvclk);
1049*4882a593Smuzhiyun if (!IS_ERR(gc0312->supplies))
1050*4882a593Smuzhiyun regulator_bulk_disable(GC0312_NUM_SUPPLIES, gc0312->supplies);
1051*4882a593Smuzhiyun if (!IS_ERR(gc0312->pwdn_gpio))
1052*4882a593Smuzhiyun gpiod_set_value_cansleep(gc0312->pwdn_gpio, 1);
1053*4882a593Smuzhiyun }
1054*4882a593Smuzhiyun
gc0312_configure_regulators(struct gc0312 * gc0312)1055*4882a593Smuzhiyun static int gc0312_configure_regulators(struct gc0312 *gc0312)
1056*4882a593Smuzhiyun {
1057*4882a593Smuzhiyun unsigned int i;
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun for (i = 0; i < GC0312_NUM_SUPPLIES; i++)
1060*4882a593Smuzhiyun gc0312->supplies[i].supply = gc0312_supply_names[i];
1061*4882a593Smuzhiyun
1062*4882a593Smuzhiyun return devm_regulator_bulk_get(&gc0312->client->dev,
1063*4882a593Smuzhiyun GC0312_NUM_SUPPLIES,
1064*4882a593Smuzhiyun gc0312->supplies);
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun
gc0312_parse_of(struct gc0312 * gc0312)1067*4882a593Smuzhiyun static int gc0312_parse_of(struct gc0312 *gc0312)
1068*4882a593Smuzhiyun {
1069*4882a593Smuzhiyun struct device *dev = &gc0312->client->dev;
1070*4882a593Smuzhiyun int ret;
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun gc0312->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1073*4882a593Smuzhiyun if (IS_ERR(gc0312->pwdn_gpio))
1074*4882a593Smuzhiyun dev_info(dev, "Failed to get pwdn-gpios, maybe no used\n");
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun ret = gc0312_configure_regulators(gc0312);
1077*4882a593Smuzhiyun if (ret)
1078*4882a593Smuzhiyun dev_info(dev, "Failed to get power regulators\n");
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun return __gc0312_power_on(gc0312);
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun
gc0312_probe(struct i2c_client * client,const struct i2c_device_id * id)1083*4882a593Smuzhiyun static int gc0312_probe(struct i2c_client *client,
1084*4882a593Smuzhiyun const struct i2c_device_id *id)
1085*4882a593Smuzhiyun {
1086*4882a593Smuzhiyun struct device *dev = &client->dev;
1087*4882a593Smuzhiyun struct device_node *node = dev->of_node;
1088*4882a593Smuzhiyun struct v4l2_subdev *sd;
1089*4882a593Smuzhiyun struct gc0312 *gc0312;
1090*4882a593Smuzhiyun char facing[2];
1091*4882a593Smuzhiyun int ret;
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun dev_info(dev, "driver version: %02x.%02x.%02x",
1094*4882a593Smuzhiyun DRIVER_VERSION >> 16,
1095*4882a593Smuzhiyun (DRIVER_VERSION & 0xff00) >> 8,
1096*4882a593Smuzhiyun DRIVER_VERSION & 0x00ff);
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun gc0312 = devm_kzalloc(&client->dev, sizeof(*gc0312), GFP_KERNEL);
1099*4882a593Smuzhiyun if (!gc0312)
1100*4882a593Smuzhiyun return -ENOMEM;
1101*4882a593Smuzhiyun
1102*4882a593Smuzhiyun ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1103*4882a593Smuzhiyun &gc0312->module_index);
1104*4882a593Smuzhiyun ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1105*4882a593Smuzhiyun &gc0312->module_facing);
1106*4882a593Smuzhiyun ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1107*4882a593Smuzhiyun &gc0312->module_name);
1108*4882a593Smuzhiyun ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1109*4882a593Smuzhiyun &gc0312->len_name);
1110*4882a593Smuzhiyun if (ret) {
1111*4882a593Smuzhiyun dev_err(dev, "could not get module information!\n");
1112*4882a593Smuzhiyun return -EINVAL;
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun
1115*4882a593Smuzhiyun gc0312->client = client;
1116*4882a593Smuzhiyun gc0312->xvclk = devm_clk_get(&client->dev, "xvclk");
1117*4882a593Smuzhiyun if (IS_ERR(gc0312->xvclk)) {
1118*4882a593Smuzhiyun dev_err(&client->dev, "Failed to get xvclk\n");
1119*4882a593Smuzhiyun return -EINVAL;
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun gc0312_parse_of(gc0312);
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun gc0312->xvclk_frequency = clk_get_rate(gc0312->xvclk);
1125*4882a593Smuzhiyun if (gc0312->xvclk_frequency < 6000000 ||
1126*4882a593Smuzhiyun gc0312->xvclk_frequency > 27000000)
1127*4882a593Smuzhiyun return -EINVAL;
1128*4882a593Smuzhiyun
1129*4882a593Smuzhiyun v4l2_ctrl_handler_init(&gc0312->ctrls, 2);
1130*4882a593Smuzhiyun gc0312->link_frequency =
1131*4882a593Smuzhiyun v4l2_ctrl_new_std(&gc0312->ctrls, &gc0312_ctrl_ops,
1132*4882a593Smuzhiyun V4L2_CID_PIXEL_RATE, 0,
1133*4882a593Smuzhiyun GC0312_PIXEL_RATE, 1,
1134*4882a593Smuzhiyun GC0312_PIXEL_RATE);
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun v4l2_ctrl_new_std_menu_items(&gc0312->ctrls, &gc0312_ctrl_ops,
1137*4882a593Smuzhiyun V4L2_CID_TEST_PATTERN,
1138*4882a593Smuzhiyun ARRAY_SIZE(gc0312_test_pattern_menu) - 1,
1139*4882a593Smuzhiyun 0, 0, gc0312_test_pattern_menu);
1140*4882a593Smuzhiyun gc0312->sd.ctrl_handler = &gc0312->ctrls;
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun if (gc0312->ctrls.error) {
1143*4882a593Smuzhiyun dev_err(&client->dev, "%s: control initialization error %d\n",
1144*4882a593Smuzhiyun __func__, gc0312->ctrls.error);
1145*4882a593Smuzhiyun return gc0312->ctrls.error;
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun
1148*4882a593Smuzhiyun sd = &gc0312->sd;
1149*4882a593Smuzhiyun client->flags |= I2C_CLIENT_SCCB;
1150*4882a593Smuzhiyun #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1151*4882a593Smuzhiyun v4l2_i2c_subdev_init(sd, client, &gc0312_subdev_ops);
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun sd->internal_ops = &gc0312_subdev_internal_ops;
1154*4882a593Smuzhiyun sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1155*4882a593Smuzhiyun V4L2_SUBDEV_FL_HAS_EVENTS;
1156*4882a593Smuzhiyun #endif
1157*4882a593Smuzhiyun
1158*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1159*4882a593Smuzhiyun gc0312->pad.flags = MEDIA_PAD_FL_SOURCE;
1160*4882a593Smuzhiyun sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1161*4882a593Smuzhiyun ret = media_entity_pads_init(&sd->entity, 1, &gc0312->pad);
1162*4882a593Smuzhiyun if (ret < 0) {
1163*4882a593Smuzhiyun v4l2_ctrl_handler_free(&gc0312->ctrls);
1164*4882a593Smuzhiyun return ret;
1165*4882a593Smuzhiyun }
1166*4882a593Smuzhiyun #endif
1167*4882a593Smuzhiyun
1168*4882a593Smuzhiyun mutex_init(&gc0312->lock);
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun gc0312_get_default_format(&gc0312->format);
1171*4882a593Smuzhiyun gc0312->frame_size = &gc0312_framesizes[0];
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun ret = gc0312_detect(gc0312);
1174*4882a593Smuzhiyun if (ret < 0)
1175*4882a593Smuzhiyun goto error;
1176*4882a593Smuzhiyun
1177*4882a593Smuzhiyun memset(facing, 0, sizeof(facing));
1178*4882a593Smuzhiyun if (strcmp(gc0312->module_facing, "back") == 0)
1179*4882a593Smuzhiyun facing[0] = 'b';
1180*4882a593Smuzhiyun else
1181*4882a593Smuzhiyun facing[0] = 'f';
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1184*4882a593Smuzhiyun gc0312->module_index, facing,
1185*4882a593Smuzhiyun DRIVER_NAME, dev_name(sd->dev));
1186*4882a593Smuzhiyun ret = v4l2_async_register_subdev_sensor_common(sd);
1187*4882a593Smuzhiyun if (ret)
1188*4882a593Smuzhiyun goto error;
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun dev_info(&client->dev, "%s sensor driver registered !!\n", sd->name);
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun return 0;
1193*4882a593Smuzhiyun
1194*4882a593Smuzhiyun error:
1195*4882a593Smuzhiyun v4l2_ctrl_handler_free(&gc0312->ctrls);
1196*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1197*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
1198*4882a593Smuzhiyun #endif
1199*4882a593Smuzhiyun mutex_destroy(&gc0312->lock);
1200*4882a593Smuzhiyun __gc0312_power_off(gc0312);
1201*4882a593Smuzhiyun return ret;
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun
gc0312_remove(struct i2c_client * client)1204*4882a593Smuzhiyun static int gc0312_remove(struct i2c_client *client)
1205*4882a593Smuzhiyun {
1206*4882a593Smuzhiyun struct v4l2_subdev *sd = i2c_get_clientdata(client);
1207*4882a593Smuzhiyun struct gc0312 *gc0312 = to_gc0312(sd);
1208*4882a593Smuzhiyun
1209*4882a593Smuzhiyun v4l2_ctrl_handler_free(&gc0312->ctrls);
1210*4882a593Smuzhiyun v4l2_async_unregister_subdev(sd);
1211*4882a593Smuzhiyun #if defined(CONFIG_MEDIA_CONTROLLER)
1212*4882a593Smuzhiyun media_entity_cleanup(&sd->entity);
1213*4882a593Smuzhiyun #endif
1214*4882a593Smuzhiyun mutex_destroy(&gc0312->lock);
1215*4882a593Smuzhiyun
1216*4882a593Smuzhiyun __gc0312_power_off(gc0312);
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun return 0;
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun static const struct i2c_device_id gc0312_id[] = {
1222*4882a593Smuzhiyun { "gc0312", 0 },
1223*4882a593Smuzhiyun { /* sentinel */ },
1224*4882a593Smuzhiyun };
1225*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, gc0312_id);
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_OF)
1228*4882a593Smuzhiyun static const struct of_device_id gc0312_of_match[] = {
1229*4882a593Smuzhiyun { .compatible = "galaxycore,gc0312", },
1230*4882a593Smuzhiyun { /* sentinel */ },
1231*4882a593Smuzhiyun };
1232*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, gc0312_of_match);
1233*4882a593Smuzhiyun #endif
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun static struct i2c_driver gc0312_i2c_driver = {
1236*4882a593Smuzhiyun .driver = {
1237*4882a593Smuzhiyun .name = DRIVER_NAME,
1238*4882a593Smuzhiyun .of_match_table = of_match_ptr(gc0312_of_match),
1239*4882a593Smuzhiyun },
1240*4882a593Smuzhiyun .probe = gc0312_probe,
1241*4882a593Smuzhiyun .remove = gc0312_remove,
1242*4882a593Smuzhiyun .id_table = gc0312_id,
1243*4882a593Smuzhiyun };
1244*4882a593Smuzhiyun
sensor_mod_init(void)1245*4882a593Smuzhiyun static int __init sensor_mod_init(void)
1246*4882a593Smuzhiyun {
1247*4882a593Smuzhiyun return i2c_add_driver(&gc0312_i2c_driver);
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun
sensor_mod_exit(void)1250*4882a593Smuzhiyun static void __exit sensor_mod_exit(void)
1251*4882a593Smuzhiyun {
1252*4882a593Smuzhiyun i2c_del_driver(&gc0312_i2c_driver);
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun
1255*4882a593Smuzhiyun device_initcall_sync(sensor_mod_init);
1256*4882a593Smuzhiyun module_exit(sensor_mod_exit);
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun MODULE_AUTHOR("Benoit Parrot <bparrot@ti.com>");
1259*4882a593Smuzhiyun MODULE_DESCRIPTION("GC0312 CMOS Image Sensor driver");
1260*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1261