1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * et8ek8_driver.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2008 Nokia Corporation
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Contact: Sakari Ailus <sakari.ailus@iki.fi>
8*4882a593Smuzhiyun * Tuukka Toivonen <tuukkat76@gmail.com>
9*4882a593Smuzhiyun * Pavel Machek <pavel@ucw.cz>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Based on code from Toni Leinonen <toni.leinonen@offcode.fi>.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * This driver is based on the Micron MT9T012 camera imager driver
14*4882a593Smuzhiyun * (C) Texas Instruments.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <linux/clk.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
20*4882a593Smuzhiyun #include <linux/i2c.h>
21*4882a593Smuzhiyun #include <linux/kernel.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun #include <linux/mutex.h>
24*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
25*4882a593Smuzhiyun #include <linux/slab.h>
26*4882a593Smuzhiyun #include <linux/sort.h>
27*4882a593Smuzhiyun #include <linux/v4l2-mediabus.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <media/media-entity.h>
30*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
31*4882a593Smuzhiyun #include <media/v4l2-device.h>
32*4882a593Smuzhiyun #include <media/v4l2-subdev.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "et8ek8_reg.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define ET8EK8_NAME "et8ek8"
37*4882a593Smuzhiyun #define ET8EK8_PRIV_MEM_SIZE 128
38*4882a593Smuzhiyun #define ET8EK8_MAX_MSG 8
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct et8ek8_sensor {
41*4882a593Smuzhiyun struct v4l2_subdev subdev;
42*4882a593Smuzhiyun struct media_pad pad;
43*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
44*4882a593Smuzhiyun struct gpio_desc *reset;
45*4882a593Smuzhiyun struct regulator *vana;
46*4882a593Smuzhiyun struct clk *ext_clk;
47*4882a593Smuzhiyun u32 xclk_freq;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun u16 version;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun struct v4l2_ctrl_handler ctrl_handler;
52*4882a593Smuzhiyun struct v4l2_ctrl *exposure;
53*4882a593Smuzhiyun struct v4l2_ctrl *pixel_rate;
54*4882a593Smuzhiyun struct et8ek8_reglist *current_reglist;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun u8 priv_mem[ET8EK8_PRIV_MEM_SIZE];
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun struct mutex power_lock;
59*4882a593Smuzhiyun int power_count;
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #define to_et8ek8_sensor(sd) container_of(sd, struct et8ek8_sensor, subdev)
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun enum et8ek8_versions {
65*4882a593Smuzhiyun ET8EK8_REV_1 = 0x0001,
66*4882a593Smuzhiyun ET8EK8_REV_2,
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /*
70*4882a593Smuzhiyun * This table describes what should be written to the sensor register
71*4882a593Smuzhiyun * for each gain value. The gain(index in the table) is in terms of
72*4882a593Smuzhiyun * 0.1EV, i.e. 10 indexes in the table give 2 time more gain [0] in
73*4882a593Smuzhiyun * the *analog gain, [1] in the digital gain
74*4882a593Smuzhiyun *
75*4882a593Smuzhiyun * Analog gain [dB] = 20*log10(regvalue/32); 0x20..0x100
76*4882a593Smuzhiyun */
77*4882a593Smuzhiyun static struct et8ek8_gain {
78*4882a593Smuzhiyun u16 analog;
79*4882a593Smuzhiyun u16 digital;
80*4882a593Smuzhiyun } const et8ek8_gain_table[] = {
81*4882a593Smuzhiyun { 32, 0}, /* x1 */
82*4882a593Smuzhiyun { 34, 0},
83*4882a593Smuzhiyun { 37, 0},
84*4882a593Smuzhiyun { 39, 0},
85*4882a593Smuzhiyun { 42, 0},
86*4882a593Smuzhiyun { 45, 0},
87*4882a593Smuzhiyun { 49, 0},
88*4882a593Smuzhiyun { 52, 0},
89*4882a593Smuzhiyun { 56, 0},
90*4882a593Smuzhiyun { 60, 0},
91*4882a593Smuzhiyun { 64, 0}, /* x2 */
92*4882a593Smuzhiyun { 69, 0},
93*4882a593Smuzhiyun { 74, 0},
94*4882a593Smuzhiyun { 79, 0},
95*4882a593Smuzhiyun { 84, 0},
96*4882a593Smuzhiyun { 91, 0},
97*4882a593Smuzhiyun { 97, 0},
98*4882a593Smuzhiyun {104, 0},
99*4882a593Smuzhiyun {111, 0},
100*4882a593Smuzhiyun {119, 0},
101*4882a593Smuzhiyun {128, 0}, /* x4 */
102*4882a593Smuzhiyun {137, 0},
103*4882a593Smuzhiyun {147, 0},
104*4882a593Smuzhiyun {158, 0},
105*4882a593Smuzhiyun {169, 0},
106*4882a593Smuzhiyun {181, 0},
107*4882a593Smuzhiyun {194, 0},
108*4882a593Smuzhiyun {208, 0},
109*4882a593Smuzhiyun {223, 0},
110*4882a593Smuzhiyun {239, 0},
111*4882a593Smuzhiyun {256, 0}, /* x8 */
112*4882a593Smuzhiyun {256, 73},
113*4882a593Smuzhiyun {256, 152},
114*4882a593Smuzhiyun {256, 236},
115*4882a593Smuzhiyun {256, 327},
116*4882a593Smuzhiyun {256, 424},
117*4882a593Smuzhiyun {256, 528},
118*4882a593Smuzhiyun {256, 639},
119*4882a593Smuzhiyun {256, 758},
120*4882a593Smuzhiyun {256, 886},
121*4882a593Smuzhiyun {256, 1023}, /* x16 */
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* Register definitions */
125*4882a593Smuzhiyun #define REG_REVISION_NUMBER_L 0x1200
126*4882a593Smuzhiyun #define REG_REVISION_NUMBER_H 0x1201
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define PRIV_MEM_START_REG 0x0008
129*4882a593Smuzhiyun #define PRIV_MEM_WIN_SIZE 8
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun #define ET8EK8_I2C_DELAY 3 /* msec delay b/w accesses */
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun #define USE_CRC 1
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /*
136*4882a593Smuzhiyun * Register access helpers
137*4882a593Smuzhiyun *
138*4882a593Smuzhiyun * Read a 8/16/32-bit i2c register. The value is returned in 'val'.
139*4882a593Smuzhiyun * Returns zero if successful, or non-zero otherwise.
140*4882a593Smuzhiyun */
et8ek8_i2c_read_reg(struct i2c_client * client,u16 data_length,u16 reg,u32 * val)141*4882a593Smuzhiyun static int et8ek8_i2c_read_reg(struct i2c_client *client, u16 data_length,
142*4882a593Smuzhiyun u16 reg, u32 *val)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun int r;
145*4882a593Smuzhiyun struct i2c_msg msg;
146*4882a593Smuzhiyun unsigned char data[4];
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (!client->adapter)
149*4882a593Smuzhiyun return -ENODEV;
150*4882a593Smuzhiyun if (data_length != ET8EK8_REG_8BIT && data_length != ET8EK8_REG_16BIT)
151*4882a593Smuzhiyun return -EINVAL;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun msg.addr = client->addr;
154*4882a593Smuzhiyun msg.flags = 0;
155*4882a593Smuzhiyun msg.len = 2;
156*4882a593Smuzhiyun msg.buf = data;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun /* high byte goes out first */
159*4882a593Smuzhiyun data[0] = (u8) (reg >> 8);
160*4882a593Smuzhiyun data[1] = (u8) (reg & 0xff);
161*4882a593Smuzhiyun r = i2c_transfer(client->adapter, &msg, 1);
162*4882a593Smuzhiyun if (r < 0)
163*4882a593Smuzhiyun goto err;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun msg.len = data_length;
166*4882a593Smuzhiyun msg.flags = I2C_M_RD;
167*4882a593Smuzhiyun r = i2c_transfer(client->adapter, &msg, 1);
168*4882a593Smuzhiyun if (r < 0)
169*4882a593Smuzhiyun goto err;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun *val = 0;
172*4882a593Smuzhiyun /* high byte comes first */
173*4882a593Smuzhiyun if (data_length == ET8EK8_REG_8BIT)
174*4882a593Smuzhiyun *val = data[0];
175*4882a593Smuzhiyun else
176*4882a593Smuzhiyun *val = (data[1] << 8) + data[0];
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun return 0;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun err:
181*4882a593Smuzhiyun dev_err(&client->dev, "read from offset 0x%x error %d\n", reg, r);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun return r;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
et8ek8_i2c_create_msg(struct i2c_client * client,u16 len,u16 reg,u32 val,struct i2c_msg * msg,unsigned char * buf)186*4882a593Smuzhiyun static void et8ek8_i2c_create_msg(struct i2c_client *client, u16 len, u16 reg,
187*4882a593Smuzhiyun u32 val, struct i2c_msg *msg,
188*4882a593Smuzhiyun unsigned char *buf)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun msg->addr = client->addr;
191*4882a593Smuzhiyun msg->flags = 0; /* Write */
192*4882a593Smuzhiyun msg->len = 2 + len;
193*4882a593Smuzhiyun msg->buf = buf;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun /* high byte goes out first */
196*4882a593Smuzhiyun buf[0] = (u8) (reg >> 8);
197*4882a593Smuzhiyun buf[1] = (u8) (reg & 0xff);
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun switch (len) {
200*4882a593Smuzhiyun case ET8EK8_REG_8BIT:
201*4882a593Smuzhiyun buf[2] = (u8) (val) & 0xff;
202*4882a593Smuzhiyun break;
203*4882a593Smuzhiyun case ET8EK8_REG_16BIT:
204*4882a593Smuzhiyun buf[2] = (u8) (val) & 0xff;
205*4882a593Smuzhiyun buf[3] = (u8) (val >> 8) & 0xff;
206*4882a593Smuzhiyun break;
207*4882a593Smuzhiyun default:
208*4882a593Smuzhiyun WARN_ONCE(1, ET8EK8_NAME ": %s: invalid message length.\n",
209*4882a593Smuzhiyun __func__);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /*
214*4882a593Smuzhiyun * A buffered write method that puts the wanted register write
215*4882a593Smuzhiyun * commands in smaller number of message lists and passes the lists to
216*4882a593Smuzhiyun * the i2c framework
217*4882a593Smuzhiyun */
et8ek8_i2c_buffered_write_regs(struct i2c_client * client,const struct et8ek8_reg * wnext,int cnt)218*4882a593Smuzhiyun static int et8ek8_i2c_buffered_write_regs(struct i2c_client *client,
219*4882a593Smuzhiyun const struct et8ek8_reg *wnext,
220*4882a593Smuzhiyun int cnt)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun struct i2c_msg msg[ET8EK8_MAX_MSG];
223*4882a593Smuzhiyun unsigned char data[ET8EK8_MAX_MSG][6];
224*4882a593Smuzhiyun int wcnt = 0;
225*4882a593Smuzhiyun u16 reg, data_length;
226*4882a593Smuzhiyun u32 val;
227*4882a593Smuzhiyun int rval;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* Create new write messages for all writes */
230*4882a593Smuzhiyun while (wcnt < cnt) {
231*4882a593Smuzhiyun data_length = wnext->type;
232*4882a593Smuzhiyun reg = wnext->reg;
233*4882a593Smuzhiyun val = wnext->val;
234*4882a593Smuzhiyun wnext++;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun et8ek8_i2c_create_msg(client, data_length, reg,
237*4882a593Smuzhiyun val, &msg[wcnt], &data[wcnt][0]);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* Update write count */
240*4882a593Smuzhiyun wcnt++;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun if (wcnt < ET8EK8_MAX_MSG)
243*4882a593Smuzhiyun continue;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun rval = i2c_transfer(client->adapter, msg, wcnt);
246*4882a593Smuzhiyun if (rval < 0)
247*4882a593Smuzhiyun return rval;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun cnt -= wcnt;
250*4882a593Smuzhiyun wcnt = 0;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun rval = i2c_transfer(client->adapter, msg, wcnt);
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun return rval < 0 ? rval : 0;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /*
259*4882a593Smuzhiyun * Write a list of registers to i2c device.
260*4882a593Smuzhiyun *
261*4882a593Smuzhiyun * The list of registers is terminated by ET8EK8_REG_TERM.
262*4882a593Smuzhiyun * Returns zero if successful, or non-zero otherwise.
263*4882a593Smuzhiyun */
et8ek8_i2c_write_regs(struct i2c_client * client,const struct et8ek8_reg * regs)264*4882a593Smuzhiyun static int et8ek8_i2c_write_regs(struct i2c_client *client,
265*4882a593Smuzhiyun const struct et8ek8_reg *regs)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun int r, cnt = 0;
268*4882a593Smuzhiyun const struct et8ek8_reg *next;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (!client->adapter)
271*4882a593Smuzhiyun return -ENODEV;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun if (!regs)
274*4882a593Smuzhiyun return -EINVAL;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* Initialize list pointers to the start of the list */
277*4882a593Smuzhiyun next = regs;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun do {
280*4882a593Smuzhiyun /*
281*4882a593Smuzhiyun * We have to go through the list to figure out how
282*4882a593Smuzhiyun * many regular writes we have in a row
283*4882a593Smuzhiyun */
284*4882a593Smuzhiyun while (next->type != ET8EK8_REG_TERM &&
285*4882a593Smuzhiyun next->type != ET8EK8_REG_DELAY) {
286*4882a593Smuzhiyun /*
287*4882a593Smuzhiyun * Here we check that the actual length fields
288*4882a593Smuzhiyun * are valid
289*4882a593Smuzhiyun */
290*4882a593Smuzhiyun if (WARN(next->type != ET8EK8_REG_8BIT &&
291*4882a593Smuzhiyun next->type != ET8EK8_REG_16BIT,
292*4882a593Smuzhiyun "Invalid type = %d", next->type)) {
293*4882a593Smuzhiyun return -EINVAL;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun /*
296*4882a593Smuzhiyun * Increment count of successive writes and
297*4882a593Smuzhiyun * read pointer
298*4882a593Smuzhiyun */
299*4882a593Smuzhiyun cnt++;
300*4882a593Smuzhiyun next++;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun /* Now we start writing ... */
304*4882a593Smuzhiyun r = et8ek8_i2c_buffered_write_regs(client, regs, cnt);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /* ... and then check that everything was OK */
307*4882a593Smuzhiyun if (r < 0) {
308*4882a593Smuzhiyun dev_err(&client->dev, "i2c transfer error!\n");
309*4882a593Smuzhiyun return r;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /*
313*4882a593Smuzhiyun * If we ran into a sleep statement when going through
314*4882a593Smuzhiyun * the list, this is where we snooze for the required time
315*4882a593Smuzhiyun */
316*4882a593Smuzhiyun if (next->type == ET8EK8_REG_DELAY) {
317*4882a593Smuzhiyun msleep(next->val);
318*4882a593Smuzhiyun /*
319*4882a593Smuzhiyun * ZZZ ...
320*4882a593Smuzhiyun * Update list pointers and cnt and start over ...
321*4882a593Smuzhiyun */
322*4882a593Smuzhiyun next++;
323*4882a593Smuzhiyun regs = next;
324*4882a593Smuzhiyun cnt = 0;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun } while (next->type != ET8EK8_REG_TERM);
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun return 0;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun /*
332*4882a593Smuzhiyun * Write to a 8/16-bit register.
333*4882a593Smuzhiyun * Returns zero if successful, or non-zero otherwise.
334*4882a593Smuzhiyun */
et8ek8_i2c_write_reg(struct i2c_client * client,u16 data_length,u16 reg,u32 val)335*4882a593Smuzhiyun static int et8ek8_i2c_write_reg(struct i2c_client *client, u16 data_length,
336*4882a593Smuzhiyun u16 reg, u32 val)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun int r;
339*4882a593Smuzhiyun struct i2c_msg msg;
340*4882a593Smuzhiyun unsigned char data[6];
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun if (!client->adapter)
343*4882a593Smuzhiyun return -ENODEV;
344*4882a593Smuzhiyun if (data_length != ET8EK8_REG_8BIT && data_length != ET8EK8_REG_16BIT)
345*4882a593Smuzhiyun return -EINVAL;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun et8ek8_i2c_create_msg(client, data_length, reg, val, &msg, data);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun r = i2c_transfer(client->adapter, &msg, 1);
350*4882a593Smuzhiyun if (r < 0) {
351*4882a593Smuzhiyun dev_err(&client->dev,
352*4882a593Smuzhiyun "wrote 0x%x to offset 0x%x error %d\n", val, reg, r);
353*4882a593Smuzhiyun return r;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun return 0;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
et8ek8_reglist_find_type(struct et8ek8_meta_reglist * meta,u16 type)359*4882a593Smuzhiyun static struct et8ek8_reglist *et8ek8_reglist_find_type(
360*4882a593Smuzhiyun struct et8ek8_meta_reglist *meta,
361*4882a593Smuzhiyun u16 type)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun struct et8ek8_reglist **next = &meta->reglist[0].ptr;
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun while (*next) {
366*4882a593Smuzhiyun if ((*next)->type == type)
367*4882a593Smuzhiyun return *next;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun next++;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun return NULL;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
et8ek8_i2c_reglist_find_write(struct i2c_client * client,struct et8ek8_meta_reglist * meta,u16 type)375*4882a593Smuzhiyun static int et8ek8_i2c_reglist_find_write(struct i2c_client *client,
376*4882a593Smuzhiyun struct et8ek8_meta_reglist *meta,
377*4882a593Smuzhiyun u16 type)
378*4882a593Smuzhiyun {
379*4882a593Smuzhiyun struct et8ek8_reglist *reglist;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun reglist = et8ek8_reglist_find_type(meta, type);
382*4882a593Smuzhiyun if (!reglist)
383*4882a593Smuzhiyun return -EINVAL;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun return et8ek8_i2c_write_regs(client, reglist->regs);
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun
et8ek8_reglist_first(struct et8ek8_meta_reglist * meta)388*4882a593Smuzhiyun static struct et8ek8_reglist **et8ek8_reglist_first(
389*4882a593Smuzhiyun struct et8ek8_meta_reglist *meta)
390*4882a593Smuzhiyun {
391*4882a593Smuzhiyun return &meta->reglist[0].ptr;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
et8ek8_reglist_to_mbus(const struct et8ek8_reglist * reglist,struct v4l2_mbus_framefmt * fmt)394*4882a593Smuzhiyun static void et8ek8_reglist_to_mbus(const struct et8ek8_reglist *reglist,
395*4882a593Smuzhiyun struct v4l2_mbus_framefmt *fmt)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun fmt->width = reglist->mode.window_width;
398*4882a593Smuzhiyun fmt->height = reglist->mode.window_height;
399*4882a593Smuzhiyun fmt->code = reglist->mode.bus_format;
400*4882a593Smuzhiyun }
401*4882a593Smuzhiyun
et8ek8_reglist_find_mode_fmt(struct et8ek8_meta_reglist * meta,struct v4l2_mbus_framefmt * fmt)402*4882a593Smuzhiyun static struct et8ek8_reglist *et8ek8_reglist_find_mode_fmt(
403*4882a593Smuzhiyun struct et8ek8_meta_reglist *meta,
404*4882a593Smuzhiyun struct v4l2_mbus_framefmt *fmt)
405*4882a593Smuzhiyun {
406*4882a593Smuzhiyun struct et8ek8_reglist **list = et8ek8_reglist_first(meta);
407*4882a593Smuzhiyun struct et8ek8_reglist *best_match = NULL;
408*4882a593Smuzhiyun struct et8ek8_reglist *best_other = NULL;
409*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
410*4882a593Smuzhiyun unsigned int max_dist_match = (unsigned int)-1;
411*4882a593Smuzhiyun unsigned int max_dist_other = (unsigned int)-1;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /*
414*4882a593Smuzhiyun * Find the mode with the closest image size. The distance between
415*4882a593Smuzhiyun * image sizes is the size in pixels of the non-overlapping regions
416*4882a593Smuzhiyun * between the requested size and the frame-specified size.
417*4882a593Smuzhiyun *
418*4882a593Smuzhiyun * Store both the closest mode that matches the requested format, and
419*4882a593Smuzhiyun * the closest mode for all other formats. The best match is returned
420*4882a593Smuzhiyun * if found, otherwise the best mode with a non-matching format is
421*4882a593Smuzhiyun * returned.
422*4882a593Smuzhiyun */
423*4882a593Smuzhiyun for (; *list; list++) {
424*4882a593Smuzhiyun unsigned int dist;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun if ((*list)->type != ET8EK8_REGLIST_MODE)
427*4882a593Smuzhiyun continue;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun et8ek8_reglist_to_mbus(*list, &format);
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun dist = min(fmt->width, format.width)
432*4882a593Smuzhiyun * min(fmt->height, format.height);
433*4882a593Smuzhiyun dist = format.width * format.height
434*4882a593Smuzhiyun + fmt->width * fmt->height - 2 * dist;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun if (fmt->code == format.code) {
438*4882a593Smuzhiyun if (dist < max_dist_match || !best_match) {
439*4882a593Smuzhiyun best_match = *list;
440*4882a593Smuzhiyun max_dist_match = dist;
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun } else {
443*4882a593Smuzhiyun if (dist < max_dist_other || !best_other) {
444*4882a593Smuzhiyun best_other = *list;
445*4882a593Smuzhiyun max_dist_other = dist;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun return best_match ? best_match : best_other;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun #define TIMEPERFRAME_AVG_FPS(t) \
454*4882a593Smuzhiyun (((t).denominator + ((t).numerator >> 1)) / (t).numerator)
455*4882a593Smuzhiyun
et8ek8_reglist_find_mode_ival(struct et8ek8_meta_reglist * meta,struct et8ek8_reglist * current_reglist,struct v4l2_fract * timeperframe)456*4882a593Smuzhiyun static struct et8ek8_reglist *et8ek8_reglist_find_mode_ival(
457*4882a593Smuzhiyun struct et8ek8_meta_reglist *meta,
458*4882a593Smuzhiyun struct et8ek8_reglist *current_reglist,
459*4882a593Smuzhiyun struct v4l2_fract *timeperframe)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun int fps = TIMEPERFRAME_AVG_FPS(*timeperframe);
462*4882a593Smuzhiyun struct et8ek8_reglist **list = et8ek8_reglist_first(meta);
463*4882a593Smuzhiyun struct et8ek8_mode *current_mode = ¤t_reglist->mode;
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun for (; *list; list++) {
466*4882a593Smuzhiyun struct et8ek8_mode *mode = &(*list)->mode;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun if ((*list)->type != ET8EK8_REGLIST_MODE)
469*4882a593Smuzhiyun continue;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun if (mode->window_width != current_mode->window_width ||
472*4882a593Smuzhiyun mode->window_height != current_mode->window_height)
473*4882a593Smuzhiyun continue;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun if (TIMEPERFRAME_AVG_FPS(mode->timeperframe) == fps)
476*4882a593Smuzhiyun return *list;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun return NULL;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun
et8ek8_reglist_cmp(const void * a,const void * b)482*4882a593Smuzhiyun static int et8ek8_reglist_cmp(const void *a, const void *b)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun const struct et8ek8_reglist **list1 = (const struct et8ek8_reglist **)a,
485*4882a593Smuzhiyun **list2 = (const struct et8ek8_reglist **)b;
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun /* Put real modes in the beginning. */
488*4882a593Smuzhiyun if ((*list1)->type == ET8EK8_REGLIST_MODE &&
489*4882a593Smuzhiyun (*list2)->type != ET8EK8_REGLIST_MODE)
490*4882a593Smuzhiyun return -1;
491*4882a593Smuzhiyun if ((*list1)->type != ET8EK8_REGLIST_MODE &&
492*4882a593Smuzhiyun (*list2)->type == ET8EK8_REGLIST_MODE)
493*4882a593Smuzhiyun return 1;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun /* Descending width. */
496*4882a593Smuzhiyun if ((*list1)->mode.window_width > (*list2)->mode.window_width)
497*4882a593Smuzhiyun return -1;
498*4882a593Smuzhiyun if ((*list1)->mode.window_width < (*list2)->mode.window_width)
499*4882a593Smuzhiyun return 1;
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun if ((*list1)->mode.window_height > (*list2)->mode.window_height)
502*4882a593Smuzhiyun return -1;
503*4882a593Smuzhiyun if ((*list1)->mode.window_height < (*list2)->mode.window_height)
504*4882a593Smuzhiyun return 1;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun return 0;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
et8ek8_reglist_import(struct i2c_client * client,struct et8ek8_meta_reglist * meta)509*4882a593Smuzhiyun static int et8ek8_reglist_import(struct i2c_client *client,
510*4882a593Smuzhiyun struct et8ek8_meta_reglist *meta)
511*4882a593Smuzhiyun {
512*4882a593Smuzhiyun int nlists = 0, i;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun dev_info(&client->dev, "meta_reglist version %s\n", meta->version);
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun while (meta->reglist[nlists].ptr)
517*4882a593Smuzhiyun nlists++;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun if (!nlists)
520*4882a593Smuzhiyun return -EINVAL;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun sort(&meta->reglist[0].ptr, nlists, sizeof(meta->reglist[0].ptr),
523*4882a593Smuzhiyun et8ek8_reglist_cmp, NULL);
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun i = nlists;
526*4882a593Smuzhiyun nlists = 0;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun while (i--) {
529*4882a593Smuzhiyun struct et8ek8_reglist *list;
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun list = meta->reglist[nlists].ptr;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun dev_dbg(&client->dev,
534*4882a593Smuzhiyun "%s: type %d\tw %d\th %d\tfmt %x\tival %d/%d\tptr %p\n",
535*4882a593Smuzhiyun __func__,
536*4882a593Smuzhiyun list->type,
537*4882a593Smuzhiyun list->mode.window_width, list->mode.window_height,
538*4882a593Smuzhiyun list->mode.bus_format,
539*4882a593Smuzhiyun list->mode.timeperframe.numerator,
540*4882a593Smuzhiyun list->mode.timeperframe.denominator,
541*4882a593Smuzhiyun (void *)meta->reglist[nlists].ptr);
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun nlists++;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun return 0;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun /* Called to change the V4L2 gain control value. This function
550*4882a593Smuzhiyun * rounds and clamps the given value and updates the V4L2 control value.
551*4882a593Smuzhiyun * If power is on, also updates the sensor analog and digital gains.
552*4882a593Smuzhiyun * gain is in 0.1 EV (exposure value) units.
553*4882a593Smuzhiyun */
et8ek8_set_gain(struct et8ek8_sensor * sensor,s32 gain)554*4882a593Smuzhiyun static int et8ek8_set_gain(struct et8ek8_sensor *sensor, s32 gain)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
557*4882a593Smuzhiyun struct et8ek8_gain new;
558*4882a593Smuzhiyun int r;
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun new = et8ek8_gain_table[gain];
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun /* FIXME: optimise I2C writes! */
563*4882a593Smuzhiyun r = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT,
564*4882a593Smuzhiyun 0x124a, new.analog >> 8);
565*4882a593Smuzhiyun if (r)
566*4882a593Smuzhiyun return r;
567*4882a593Smuzhiyun r = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT,
568*4882a593Smuzhiyun 0x1249, new.analog & 0xff);
569*4882a593Smuzhiyun if (r)
570*4882a593Smuzhiyun return r;
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun r = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT,
573*4882a593Smuzhiyun 0x124d, new.digital >> 8);
574*4882a593Smuzhiyun if (r)
575*4882a593Smuzhiyun return r;
576*4882a593Smuzhiyun r = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT,
577*4882a593Smuzhiyun 0x124c, new.digital & 0xff);
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun return r;
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
et8ek8_set_test_pattern(struct et8ek8_sensor * sensor,s32 mode)582*4882a593Smuzhiyun static int et8ek8_set_test_pattern(struct et8ek8_sensor *sensor, s32 mode)
583*4882a593Smuzhiyun {
584*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
585*4882a593Smuzhiyun int cbh_mode, cbv_mode, tp_mode, din_sw, r1420, rval;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun /* Values for normal mode */
588*4882a593Smuzhiyun cbh_mode = 0;
589*4882a593Smuzhiyun cbv_mode = 0;
590*4882a593Smuzhiyun tp_mode = 0;
591*4882a593Smuzhiyun din_sw = 0x00;
592*4882a593Smuzhiyun r1420 = 0xF0;
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun if (mode) {
595*4882a593Smuzhiyun /* Test pattern mode */
596*4882a593Smuzhiyun if (mode < 5) {
597*4882a593Smuzhiyun cbh_mode = 1;
598*4882a593Smuzhiyun cbv_mode = 1;
599*4882a593Smuzhiyun tp_mode = mode + 3;
600*4882a593Smuzhiyun } else {
601*4882a593Smuzhiyun cbh_mode = 0;
602*4882a593Smuzhiyun cbv_mode = 0;
603*4882a593Smuzhiyun tp_mode = mode - 4 + 3;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun din_sw = 0x01;
607*4882a593Smuzhiyun r1420 = 0xE0;
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun
610*4882a593Smuzhiyun rval = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x111B,
611*4882a593Smuzhiyun tp_mode << 4);
612*4882a593Smuzhiyun if (rval)
613*4882a593Smuzhiyun return rval;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun rval = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x1121,
616*4882a593Smuzhiyun cbh_mode << 7);
617*4882a593Smuzhiyun if (rval)
618*4882a593Smuzhiyun return rval;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun rval = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x1124,
621*4882a593Smuzhiyun cbv_mode << 7);
622*4882a593Smuzhiyun if (rval)
623*4882a593Smuzhiyun return rval;
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun rval = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x112C, din_sw);
626*4882a593Smuzhiyun if (rval)
627*4882a593Smuzhiyun return rval;
628*4882a593Smuzhiyun
629*4882a593Smuzhiyun return et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x1420, r1420);
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun /* -----------------------------------------------------------------------------
633*4882a593Smuzhiyun * V4L2 controls
634*4882a593Smuzhiyun */
635*4882a593Smuzhiyun
et8ek8_set_ctrl(struct v4l2_ctrl * ctrl)636*4882a593Smuzhiyun static int et8ek8_set_ctrl(struct v4l2_ctrl *ctrl)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun struct et8ek8_sensor *sensor =
639*4882a593Smuzhiyun container_of(ctrl->handler, struct et8ek8_sensor, ctrl_handler);
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun switch (ctrl->id) {
642*4882a593Smuzhiyun case V4L2_CID_GAIN:
643*4882a593Smuzhiyun return et8ek8_set_gain(sensor, ctrl->val);
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun case V4L2_CID_EXPOSURE:
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun struct i2c_client *client =
648*4882a593Smuzhiyun v4l2_get_subdevdata(&sensor->subdev);
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun return et8ek8_i2c_write_reg(client, ET8EK8_REG_16BIT, 0x1243,
651*4882a593Smuzhiyun ctrl->val);
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun case V4L2_CID_TEST_PATTERN:
655*4882a593Smuzhiyun return et8ek8_set_test_pattern(sensor, ctrl->val);
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun case V4L2_CID_PIXEL_RATE:
658*4882a593Smuzhiyun return 0;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun default:
661*4882a593Smuzhiyun return -EINVAL;
662*4882a593Smuzhiyun }
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun static const struct v4l2_ctrl_ops et8ek8_ctrl_ops = {
666*4882a593Smuzhiyun .s_ctrl = et8ek8_set_ctrl,
667*4882a593Smuzhiyun };
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun static const char * const et8ek8_test_pattern_menu[] = {
670*4882a593Smuzhiyun "Normal",
671*4882a593Smuzhiyun "Vertical colorbar",
672*4882a593Smuzhiyun "Horizontal colorbar",
673*4882a593Smuzhiyun "Scale",
674*4882a593Smuzhiyun "Ramp",
675*4882a593Smuzhiyun "Small vertical colorbar",
676*4882a593Smuzhiyun "Small horizontal colorbar",
677*4882a593Smuzhiyun "Small scale",
678*4882a593Smuzhiyun "Small ramp",
679*4882a593Smuzhiyun };
680*4882a593Smuzhiyun
et8ek8_init_controls(struct et8ek8_sensor * sensor)681*4882a593Smuzhiyun static int et8ek8_init_controls(struct et8ek8_sensor *sensor)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun s32 max_rows;
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun v4l2_ctrl_handler_init(&sensor->ctrl_handler, 4);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun /* V4L2_CID_GAIN */
688*4882a593Smuzhiyun v4l2_ctrl_new_std(&sensor->ctrl_handler, &et8ek8_ctrl_ops,
689*4882a593Smuzhiyun V4L2_CID_GAIN, 0, ARRAY_SIZE(et8ek8_gain_table) - 1,
690*4882a593Smuzhiyun 1, 0);
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun max_rows = sensor->current_reglist->mode.max_exp;
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun u32 min = 1, max = max_rows;
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun sensor->exposure =
697*4882a593Smuzhiyun v4l2_ctrl_new_std(&sensor->ctrl_handler,
698*4882a593Smuzhiyun &et8ek8_ctrl_ops, V4L2_CID_EXPOSURE,
699*4882a593Smuzhiyun min, max, min, max);
700*4882a593Smuzhiyun }
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun /* V4L2_CID_PIXEL_RATE */
703*4882a593Smuzhiyun sensor->pixel_rate =
704*4882a593Smuzhiyun v4l2_ctrl_new_std(&sensor->ctrl_handler, &et8ek8_ctrl_ops,
705*4882a593Smuzhiyun V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1, 1);
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun /* V4L2_CID_TEST_PATTERN */
708*4882a593Smuzhiyun v4l2_ctrl_new_std_menu_items(&sensor->ctrl_handler,
709*4882a593Smuzhiyun &et8ek8_ctrl_ops, V4L2_CID_TEST_PATTERN,
710*4882a593Smuzhiyun ARRAY_SIZE(et8ek8_test_pattern_menu) - 1,
711*4882a593Smuzhiyun 0, 0, et8ek8_test_pattern_menu);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun if (sensor->ctrl_handler.error)
714*4882a593Smuzhiyun return sensor->ctrl_handler.error;
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun sensor->subdev.ctrl_handler = &sensor->ctrl_handler;
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun return 0;
719*4882a593Smuzhiyun }
720*4882a593Smuzhiyun
et8ek8_update_controls(struct et8ek8_sensor * sensor)721*4882a593Smuzhiyun static void et8ek8_update_controls(struct et8ek8_sensor *sensor)
722*4882a593Smuzhiyun {
723*4882a593Smuzhiyun struct v4l2_ctrl *ctrl;
724*4882a593Smuzhiyun struct et8ek8_mode *mode = &sensor->current_reglist->mode;
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun u32 min, max, pixel_rate;
727*4882a593Smuzhiyun static const int S = 8;
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun ctrl = sensor->exposure;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun min = 1;
732*4882a593Smuzhiyun max = mode->max_exp;
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun /*
735*4882a593Smuzhiyun * Calculate average pixel clock per line. Assume buffers can spread
736*4882a593Smuzhiyun * the data over horizontal blanking time. Rounding upwards.
737*4882a593Smuzhiyun * Formula taken from stock Nokia N900 kernel.
738*4882a593Smuzhiyun */
739*4882a593Smuzhiyun pixel_rate = ((mode->pixel_clock + (1 << S) - 1) >> S) + mode->width;
740*4882a593Smuzhiyun pixel_rate = mode->window_width * (pixel_rate - 1) / mode->width;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun __v4l2_ctrl_modify_range(ctrl, min, max, min, max);
743*4882a593Smuzhiyun __v4l2_ctrl_s_ctrl_int64(sensor->pixel_rate, pixel_rate << S);
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun
et8ek8_configure(struct et8ek8_sensor * sensor)746*4882a593Smuzhiyun static int et8ek8_configure(struct et8ek8_sensor *sensor)
747*4882a593Smuzhiyun {
748*4882a593Smuzhiyun struct v4l2_subdev *subdev = &sensor->subdev;
749*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(subdev);
750*4882a593Smuzhiyun int rval;
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun rval = et8ek8_i2c_write_regs(client, sensor->current_reglist->regs);
753*4882a593Smuzhiyun if (rval)
754*4882a593Smuzhiyun goto fail;
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun /* Controls set while the power to the sensor is turned off are saved
757*4882a593Smuzhiyun * but not applied to the hardware. Now that we're about to start
758*4882a593Smuzhiyun * streaming apply all the current values to the hardware.
759*4882a593Smuzhiyun */
760*4882a593Smuzhiyun rval = v4l2_ctrl_handler_setup(&sensor->ctrl_handler);
761*4882a593Smuzhiyun if (rval)
762*4882a593Smuzhiyun goto fail;
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun return 0;
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun fail:
767*4882a593Smuzhiyun dev_err(&client->dev, "sensor configuration failed\n");
768*4882a593Smuzhiyun
769*4882a593Smuzhiyun return rval;
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
et8ek8_stream_on(struct et8ek8_sensor * sensor)772*4882a593Smuzhiyun static int et8ek8_stream_on(struct et8ek8_sensor *sensor)
773*4882a593Smuzhiyun {
774*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun return et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x1252, 0xb0);
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun
et8ek8_stream_off(struct et8ek8_sensor * sensor)779*4882a593Smuzhiyun static int et8ek8_stream_off(struct et8ek8_sensor *sensor)
780*4882a593Smuzhiyun {
781*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&sensor->subdev);
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun return et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x1252, 0x30);
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun
et8ek8_s_stream(struct v4l2_subdev * subdev,int streaming)786*4882a593Smuzhiyun static int et8ek8_s_stream(struct v4l2_subdev *subdev, int streaming)
787*4882a593Smuzhiyun {
788*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
789*4882a593Smuzhiyun int ret;
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun if (!streaming)
792*4882a593Smuzhiyun return et8ek8_stream_off(sensor);
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun ret = et8ek8_configure(sensor);
795*4882a593Smuzhiyun if (ret < 0)
796*4882a593Smuzhiyun return ret;
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun return et8ek8_stream_on(sensor);
799*4882a593Smuzhiyun }
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun /* --------------------------------------------------------------------------
802*4882a593Smuzhiyun * V4L2 subdev operations
803*4882a593Smuzhiyun */
804*4882a593Smuzhiyun
et8ek8_power_off(struct et8ek8_sensor * sensor)805*4882a593Smuzhiyun static int et8ek8_power_off(struct et8ek8_sensor *sensor)
806*4882a593Smuzhiyun {
807*4882a593Smuzhiyun gpiod_set_value(sensor->reset, 0);
808*4882a593Smuzhiyun udelay(1);
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun clk_disable_unprepare(sensor->ext_clk);
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun return regulator_disable(sensor->vana);
813*4882a593Smuzhiyun }
814*4882a593Smuzhiyun
et8ek8_power_on(struct et8ek8_sensor * sensor)815*4882a593Smuzhiyun static int et8ek8_power_on(struct et8ek8_sensor *sensor)
816*4882a593Smuzhiyun {
817*4882a593Smuzhiyun struct v4l2_subdev *subdev = &sensor->subdev;
818*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(subdev);
819*4882a593Smuzhiyun unsigned int xclk_freq;
820*4882a593Smuzhiyun int val, rval;
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun rval = regulator_enable(sensor->vana);
823*4882a593Smuzhiyun if (rval) {
824*4882a593Smuzhiyun dev_err(&client->dev, "failed to enable vana regulator\n");
825*4882a593Smuzhiyun return rval;
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun if (sensor->current_reglist)
829*4882a593Smuzhiyun xclk_freq = sensor->current_reglist->mode.ext_clock;
830*4882a593Smuzhiyun else
831*4882a593Smuzhiyun xclk_freq = sensor->xclk_freq;
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun rval = clk_set_rate(sensor->ext_clk, xclk_freq);
834*4882a593Smuzhiyun if (rval < 0) {
835*4882a593Smuzhiyun dev_err(&client->dev, "unable to set extclk clock freq to %u\n",
836*4882a593Smuzhiyun xclk_freq);
837*4882a593Smuzhiyun goto out;
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun rval = clk_prepare_enable(sensor->ext_clk);
840*4882a593Smuzhiyun if (rval < 0) {
841*4882a593Smuzhiyun dev_err(&client->dev, "failed to enable extclk\n");
842*4882a593Smuzhiyun goto out;
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun if (rval)
846*4882a593Smuzhiyun goto out;
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun udelay(10); /* I wish this is a good value */
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun gpiod_set_value(sensor->reset, 1);
851*4882a593Smuzhiyun
852*4882a593Smuzhiyun msleep(5000 * 1000 / xclk_freq + 1); /* Wait 5000 cycles */
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun rval = et8ek8_i2c_reglist_find_write(client, &meta_reglist,
855*4882a593Smuzhiyun ET8EK8_REGLIST_POWERON);
856*4882a593Smuzhiyun if (rval)
857*4882a593Smuzhiyun goto out;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun #ifdef USE_CRC
860*4882a593Smuzhiyun rval = et8ek8_i2c_read_reg(client, ET8EK8_REG_8BIT, 0x1263, &val);
861*4882a593Smuzhiyun if (rval)
862*4882a593Smuzhiyun goto out;
863*4882a593Smuzhiyun #if USE_CRC /* TODO get crc setting from DT */
864*4882a593Smuzhiyun val |= BIT(4);
865*4882a593Smuzhiyun #else
866*4882a593Smuzhiyun val &= ~BIT(4);
867*4882a593Smuzhiyun #endif
868*4882a593Smuzhiyun rval = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x1263, val);
869*4882a593Smuzhiyun if (rval)
870*4882a593Smuzhiyun goto out;
871*4882a593Smuzhiyun #endif
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun out:
874*4882a593Smuzhiyun if (rval)
875*4882a593Smuzhiyun et8ek8_power_off(sensor);
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun return rval;
878*4882a593Smuzhiyun }
879*4882a593Smuzhiyun
880*4882a593Smuzhiyun /* --------------------------------------------------------------------------
881*4882a593Smuzhiyun * V4L2 subdev video operations
882*4882a593Smuzhiyun */
883*4882a593Smuzhiyun #define MAX_FMTS 4
et8ek8_enum_mbus_code(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)884*4882a593Smuzhiyun static int et8ek8_enum_mbus_code(struct v4l2_subdev *subdev,
885*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
886*4882a593Smuzhiyun struct v4l2_subdev_mbus_code_enum *code)
887*4882a593Smuzhiyun {
888*4882a593Smuzhiyun struct et8ek8_reglist **list =
889*4882a593Smuzhiyun et8ek8_reglist_first(&meta_reglist);
890*4882a593Smuzhiyun u32 pixelformat[MAX_FMTS];
891*4882a593Smuzhiyun int npixelformat = 0;
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun if (code->index >= MAX_FMTS)
894*4882a593Smuzhiyun return -EINVAL;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun for (; *list; list++) {
897*4882a593Smuzhiyun struct et8ek8_mode *mode = &(*list)->mode;
898*4882a593Smuzhiyun int i;
899*4882a593Smuzhiyun
900*4882a593Smuzhiyun if ((*list)->type != ET8EK8_REGLIST_MODE)
901*4882a593Smuzhiyun continue;
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun for (i = 0; i < npixelformat; i++) {
904*4882a593Smuzhiyun if (pixelformat[i] == mode->bus_format)
905*4882a593Smuzhiyun break;
906*4882a593Smuzhiyun }
907*4882a593Smuzhiyun if (i != npixelformat)
908*4882a593Smuzhiyun continue;
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun if (code->index == npixelformat) {
911*4882a593Smuzhiyun code->code = mode->bus_format;
912*4882a593Smuzhiyun return 0;
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun pixelformat[npixelformat] = mode->bus_format;
916*4882a593Smuzhiyun npixelformat++;
917*4882a593Smuzhiyun }
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun return -EINVAL;
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun
et8ek8_enum_frame_size(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)922*4882a593Smuzhiyun static int et8ek8_enum_frame_size(struct v4l2_subdev *subdev,
923*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
924*4882a593Smuzhiyun struct v4l2_subdev_frame_size_enum *fse)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun struct et8ek8_reglist **list =
927*4882a593Smuzhiyun et8ek8_reglist_first(&meta_reglist);
928*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
929*4882a593Smuzhiyun int cmp_width = INT_MAX;
930*4882a593Smuzhiyun int cmp_height = INT_MAX;
931*4882a593Smuzhiyun int index = fse->index;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun for (; *list; list++) {
934*4882a593Smuzhiyun if ((*list)->type != ET8EK8_REGLIST_MODE)
935*4882a593Smuzhiyun continue;
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun et8ek8_reglist_to_mbus(*list, &format);
938*4882a593Smuzhiyun if (fse->code != format.code)
939*4882a593Smuzhiyun continue;
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun /* Assume that the modes are grouped by frame size. */
942*4882a593Smuzhiyun if (format.width == cmp_width && format.height == cmp_height)
943*4882a593Smuzhiyun continue;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun cmp_width = format.width;
946*4882a593Smuzhiyun cmp_height = format.height;
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun if (index-- == 0) {
949*4882a593Smuzhiyun fse->min_width = format.width;
950*4882a593Smuzhiyun fse->min_height = format.height;
951*4882a593Smuzhiyun fse->max_width = format.width;
952*4882a593Smuzhiyun fse->max_height = format.height;
953*4882a593Smuzhiyun return 0;
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun return -EINVAL;
958*4882a593Smuzhiyun }
959*4882a593Smuzhiyun
et8ek8_enum_frame_ival(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)960*4882a593Smuzhiyun static int et8ek8_enum_frame_ival(struct v4l2_subdev *subdev,
961*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
962*4882a593Smuzhiyun struct v4l2_subdev_frame_interval_enum *fie)
963*4882a593Smuzhiyun {
964*4882a593Smuzhiyun struct et8ek8_reglist **list =
965*4882a593Smuzhiyun et8ek8_reglist_first(&meta_reglist);
966*4882a593Smuzhiyun struct v4l2_mbus_framefmt format;
967*4882a593Smuzhiyun int index = fie->index;
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun for (; *list; list++) {
970*4882a593Smuzhiyun struct et8ek8_mode *mode = &(*list)->mode;
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun if ((*list)->type != ET8EK8_REGLIST_MODE)
973*4882a593Smuzhiyun continue;
974*4882a593Smuzhiyun
975*4882a593Smuzhiyun et8ek8_reglist_to_mbus(*list, &format);
976*4882a593Smuzhiyun if (fie->code != format.code)
977*4882a593Smuzhiyun continue;
978*4882a593Smuzhiyun
979*4882a593Smuzhiyun if (fie->width != format.width || fie->height != format.height)
980*4882a593Smuzhiyun continue;
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun if (index-- == 0) {
983*4882a593Smuzhiyun fie->interval = mode->timeperframe;
984*4882a593Smuzhiyun return 0;
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun return -EINVAL;
989*4882a593Smuzhiyun }
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun static struct v4l2_mbus_framefmt *
__et8ek8_get_pad_format(struct et8ek8_sensor * sensor,struct v4l2_subdev_pad_config * cfg,unsigned int pad,enum v4l2_subdev_format_whence which)992*4882a593Smuzhiyun __et8ek8_get_pad_format(struct et8ek8_sensor *sensor,
993*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
994*4882a593Smuzhiyun unsigned int pad, enum v4l2_subdev_format_whence which)
995*4882a593Smuzhiyun {
996*4882a593Smuzhiyun switch (which) {
997*4882a593Smuzhiyun case V4L2_SUBDEV_FORMAT_TRY:
998*4882a593Smuzhiyun return v4l2_subdev_get_try_format(&sensor->subdev, cfg, pad);
999*4882a593Smuzhiyun case V4L2_SUBDEV_FORMAT_ACTIVE:
1000*4882a593Smuzhiyun return &sensor->format;
1001*4882a593Smuzhiyun default:
1002*4882a593Smuzhiyun return NULL;
1003*4882a593Smuzhiyun }
1004*4882a593Smuzhiyun }
1005*4882a593Smuzhiyun
et8ek8_get_pad_format(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1006*4882a593Smuzhiyun static int et8ek8_get_pad_format(struct v4l2_subdev *subdev,
1007*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1008*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
1009*4882a593Smuzhiyun {
1010*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1011*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun format = __et8ek8_get_pad_format(sensor, cfg, fmt->pad, fmt->which);
1014*4882a593Smuzhiyun if (!format)
1015*4882a593Smuzhiyun return -EINVAL;
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun fmt->format = *format;
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun return 0;
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun
et8ek8_set_pad_format(struct v4l2_subdev * subdev,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1022*4882a593Smuzhiyun static int et8ek8_set_pad_format(struct v4l2_subdev *subdev,
1023*4882a593Smuzhiyun struct v4l2_subdev_pad_config *cfg,
1024*4882a593Smuzhiyun struct v4l2_subdev_format *fmt)
1025*4882a593Smuzhiyun {
1026*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1027*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
1028*4882a593Smuzhiyun struct et8ek8_reglist *reglist;
1029*4882a593Smuzhiyun
1030*4882a593Smuzhiyun format = __et8ek8_get_pad_format(sensor, cfg, fmt->pad, fmt->which);
1031*4882a593Smuzhiyun if (!format)
1032*4882a593Smuzhiyun return -EINVAL;
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun reglist = et8ek8_reglist_find_mode_fmt(&meta_reglist, &fmt->format);
1035*4882a593Smuzhiyun et8ek8_reglist_to_mbus(reglist, &fmt->format);
1036*4882a593Smuzhiyun *format = fmt->format;
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
1039*4882a593Smuzhiyun sensor->current_reglist = reglist;
1040*4882a593Smuzhiyun et8ek8_update_controls(sensor);
1041*4882a593Smuzhiyun }
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun return 0;
1044*4882a593Smuzhiyun }
1045*4882a593Smuzhiyun
et8ek8_get_frame_interval(struct v4l2_subdev * subdev,struct v4l2_subdev_frame_interval * fi)1046*4882a593Smuzhiyun static int et8ek8_get_frame_interval(struct v4l2_subdev *subdev,
1047*4882a593Smuzhiyun struct v4l2_subdev_frame_interval *fi)
1048*4882a593Smuzhiyun {
1049*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun memset(fi, 0, sizeof(*fi));
1052*4882a593Smuzhiyun fi->interval = sensor->current_reglist->mode.timeperframe;
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun return 0;
1055*4882a593Smuzhiyun }
1056*4882a593Smuzhiyun
et8ek8_set_frame_interval(struct v4l2_subdev * subdev,struct v4l2_subdev_frame_interval * fi)1057*4882a593Smuzhiyun static int et8ek8_set_frame_interval(struct v4l2_subdev *subdev,
1058*4882a593Smuzhiyun struct v4l2_subdev_frame_interval *fi)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1061*4882a593Smuzhiyun struct et8ek8_reglist *reglist;
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun reglist = et8ek8_reglist_find_mode_ival(&meta_reglist,
1064*4882a593Smuzhiyun sensor->current_reglist,
1065*4882a593Smuzhiyun &fi->interval);
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun if (!reglist)
1068*4882a593Smuzhiyun return -EINVAL;
1069*4882a593Smuzhiyun
1070*4882a593Smuzhiyun if (sensor->current_reglist->mode.ext_clock != reglist->mode.ext_clock)
1071*4882a593Smuzhiyun return -EINVAL;
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun sensor->current_reglist = reglist;
1074*4882a593Smuzhiyun et8ek8_update_controls(sensor);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun return 0;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
et8ek8_g_priv_mem(struct v4l2_subdev * subdev)1079*4882a593Smuzhiyun static int et8ek8_g_priv_mem(struct v4l2_subdev *subdev)
1080*4882a593Smuzhiyun {
1081*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1082*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(subdev);
1083*4882a593Smuzhiyun unsigned int length = ET8EK8_PRIV_MEM_SIZE;
1084*4882a593Smuzhiyun unsigned int offset = 0;
1085*4882a593Smuzhiyun u8 *ptr = sensor->priv_mem;
1086*4882a593Smuzhiyun int rval = 0;
1087*4882a593Smuzhiyun
1088*4882a593Smuzhiyun /* Read the EEPROM window-by-window, each window 8 bytes */
1089*4882a593Smuzhiyun do {
1090*4882a593Smuzhiyun u8 buffer[PRIV_MEM_WIN_SIZE];
1091*4882a593Smuzhiyun struct i2c_msg msg;
1092*4882a593Smuzhiyun int bytes, i;
1093*4882a593Smuzhiyun int ofs;
1094*4882a593Smuzhiyun
1095*4882a593Smuzhiyun /* Set the current window */
1096*4882a593Smuzhiyun rval = et8ek8_i2c_write_reg(client, ET8EK8_REG_8BIT, 0x0001,
1097*4882a593Smuzhiyun 0xe0 | (offset >> 3));
1098*4882a593Smuzhiyun if (rval < 0)
1099*4882a593Smuzhiyun return rval;
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun /* Wait for status bit */
1102*4882a593Smuzhiyun for (i = 0; i < 1000; ++i) {
1103*4882a593Smuzhiyun u32 status;
1104*4882a593Smuzhiyun
1105*4882a593Smuzhiyun rval = et8ek8_i2c_read_reg(client, ET8EK8_REG_8BIT,
1106*4882a593Smuzhiyun 0x0003, &status);
1107*4882a593Smuzhiyun if (rval < 0)
1108*4882a593Smuzhiyun return rval;
1109*4882a593Smuzhiyun if (!(status & 0x08))
1110*4882a593Smuzhiyun break;
1111*4882a593Smuzhiyun usleep_range(1000, 2000);
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun
1114*4882a593Smuzhiyun if (i == 1000)
1115*4882a593Smuzhiyun return -EIO;
1116*4882a593Smuzhiyun
1117*4882a593Smuzhiyun /* Read window, 8 bytes at once, and copy to user space */
1118*4882a593Smuzhiyun ofs = offset & 0x07; /* Offset within this window */
1119*4882a593Smuzhiyun bytes = length + ofs > 8 ? 8-ofs : length;
1120*4882a593Smuzhiyun msg.addr = client->addr;
1121*4882a593Smuzhiyun msg.flags = 0;
1122*4882a593Smuzhiyun msg.len = 2;
1123*4882a593Smuzhiyun msg.buf = buffer;
1124*4882a593Smuzhiyun ofs += PRIV_MEM_START_REG;
1125*4882a593Smuzhiyun buffer[0] = (u8)(ofs >> 8);
1126*4882a593Smuzhiyun buffer[1] = (u8)(ofs & 0xFF);
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun rval = i2c_transfer(client->adapter, &msg, 1);
1129*4882a593Smuzhiyun if (rval < 0)
1130*4882a593Smuzhiyun return rval;
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun mdelay(ET8EK8_I2C_DELAY);
1133*4882a593Smuzhiyun msg.addr = client->addr;
1134*4882a593Smuzhiyun msg.len = bytes;
1135*4882a593Smuzhiyun msg.flags = I2C_M_RD;
1136*4882a593Smuzhiyun msg.buf = buffer;
1137*4882a593Smuzhiyun memset(buffer, 0, sizeof(buffer));
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun rval = i2c_transfer(client->adapter, &msg, 1);
1140*4882a593Smuzhiyun if (rval < 0)
1141*4882a593Smuzhiyun return rval;
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun rval = 0;
1144*4882a593Smuzhiyun memcpy(ptr, buffer, bytes);
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun length -= bytes;
1147*4882a593Smuzhiyun offset += bytes;
1148*4882a593Smuzhiyun ptr += bytes;
1149*4882a593Smuzhiyun } while (length > 0);
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun return rval;
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun
et8ek8_dev_init(struct v4l2_subdev * subdev)1154*4882a593Smuzhiyun static int et8ek8_dev_init(struct v4l2_subdev *subdev)
1155*4882a593Smuzhiyun {
1156*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1157*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(subdev);
1158*4882a593Smuzhiyun int rval, rev_l, rev_h;
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun rval = et8ek8_power_on(sensor);
1161*4882a593Smuzhiyun if (rval) {
1162*4882a593Smuzhiyun dev_err(&client->dev, "could not power on\n");
1163*4882a593Smuzhiyun return rval;
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun rval = et8ek8_i2c_read_reg(client, ET8EK8_REG_8BIT,
1167*4882a593Smuzhiyun REG_REVISION_NUMBER_L, &rev_l);
1168*4882a593Smuzhiyun if (!rval)
1169*4882a593Smuzhiyun rval = et8ek8_i2c_read_reg(client, ET8EK8_REG_8BIT,
1170*4882a593Smuzhiyun REG_REVISION_NUMBER_H, &rev_h);
1171*4882a593Smuzhiyun if (rval) {
1172*4882a593Smuzhiyun dev_err(&client->dev, "no et8ek8 sensor detected\n");
1173*4882a593Smuzhiyun goto out_poweroff;
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun sensor->version = (rev_h << 8) + rev_l;
1177*4882a593Smuzhiyun if (sensor->version != ET8EK8_REV_1 && sensor->version != ET8EK8_REV_2)
1178*4882a593Smuzhiyun dev_info(&client->dev,
1179*4882a593Smuzhiyun "unknown version 0x%x detected, continuing anyway\n",
1180*4882a593Smuzhiyun sensor->version);
1181*4882a593Smuzhiyun
1182*4882a593Smuzhiyun rval = et8ek8_reglist_import(client, &meta_reglist);
1183*4882a593Smuzhiyun if (rval) {
1184*4882a593Smuzhiyun dev_err(&client->dev,
1185*4882a593Smuzhiyun "invalid register list %s, import failed\n",
1186*4882a593Smuzhiyun ET8EK8_NAME);
1187*4882a593Smuzhiyun goto out_poweroff;
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun
1190*4882a593Smuzhiyun sensor->current_reglist = et8ek8_reglist_find_type(&meta_reglist,
1191*4882a593Smuzhiyun ET8EK8_REGLIST_MODE);
1192*4882a593Smuzhiyun if (!sensor->current_reglist) {
1193*4882a593Smuzhiyun dev_err(&client->dev,
1194*4882a593Smuzhiyun "invalid register list %s, no mode found\n",
1195*4882a593Smuzhiyun ET8EK8_NAME);
1196*4882a593Smuzhiyun rval = -ENODEV;
1197*4882a593Smuzhiyun goto out_poweroff;
1198*4882a593Smuzhiyun }
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun et8ek8_reglist_to_mbus(sensor->current_reglist, &sensor->format);
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun rval = et8ek8_i2c_reglist_find_write(client, &meta_reglist,
1203*4882a593Smuzhiyun ET8EK8_REGLIST_POWERON);
1204*4882a593Smuzhiyun if (rval) {
1205*4882a593Smuzhiyun dev_err(&client->dev,
1206*4882a593Smuzhiyun "invalid register list %s, no POWERON mode found\n",
1207*4882a593Smuzhiyun ET8EK8_NAME);
1208*4882a593Smuzhiyun goto out_poweroff;
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun rval = et8ek8_stream_on(sensor); /* Needed to be able to read EEPROM */
1211*4882a593Smuzhiyun if (rval)
1212*4882a593Smuzhiyun goto out_poweroff;
1213*4882a593Smuzhiyun rval = et8ek8_g_priv_mem(subdev);
1214*4882a593Smuzhiyun if (rval)
1215*4882a593Smuzhiyun dev_warn(&client->dev,
1216*4882a593Smuzhiyun "can not read OTP (EEPROM) memory from sensor\n");
1217*4882a593Smuzhiyun rval = et8ek8_stream_off(sensor);
1218*4882a593Smuzhiyun if (rval)
1219*4882a593Smuzhiyun goto out_poweroff;
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun rval = et8ek8_power_off(sensor);
1222*4882a593Smuzhiyun if (rval)
1223*4882a593Smuzhiyun goto out_poweroff;
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun return 0;
1226*4882a593Smuzhiyun
1227*4882a593Smuzhiyun out_poweroff:
1228*4882a593Smuzhiyun et8ek8_power_off(sensor);
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun return rval;
1231*4882a593Smuzhiyun }
1232*4882a593Smuzhiyun
1233*4882a593Smuzhiyun /* --------------------------------------------------------------------------
1234*4882a593Smuzhiyun * sysfs attributes
1235*4882a593Smuzhiyun */
1236*4882a593Smuzhiyun static ssize_t
et8ek8_priv_mem_read(struct device * dev,struct device_attribute * attr,char * buf)1237*4882a593Smuzhiyun et8ek8_priv_mem_read(struct device *dev, struct device_attribute *attr,
1238*4882a593Smuzhiyun char *buf)
1239*4882a593Smuzhiyun {
1240*4882a593Smuzhiyun struct v4l2_subdev *subdev = i2c_get_clientdata(to_i2c_client(dev));
1241*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1242*4882a593Smuzhiyun
1243*4882a593Smuzhiyun #if PAGE_SIZE < ET8EK8_PRIV_MEM_SIZE
1244*4882a593Smuzhiyun #error PAGE_SIZE too small!
1245*4882a593Smuzhiyun #endif
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun memcpy(buf, sensor->priv_mem, ET8EK8_PRIV_MEM_SIZE);
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun return ET8EK8_PRIV_MEM_SIZE;
1250*4882a593Smuzhiyun }
1251*4882a593Smuzhiyun static DEVICE_ATTR(priv_mem, 0444, et8ek8_priv_mem_read, NULL);
1252*4882a593Smuzhiyun
1253*4882a593Smuzhiyun /* --------------------------------------------------------------------------
1254*4882a593Smuzhiyun * V4L2 subdev core operations
1255*4882a593Smuzhiyun */
1256*4882a593Smuzhiyun
1257*4882a593Smuzhiyun static int
et8ek8_registered(struct v4l2_subdev * subdev)1258*4882a593Smuzhiyun et8ek8_registered(struct v4l2_subdev *subdev)
1259*4882a593Smuzhiyun {
1260*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1261*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(subdev);
1262*4882a593Smuzhiyun int rval;
1263*4882a593Smuzhiyun
1264*4882a593Smuzhiyun dev_dbg(&client->dev, "registered!");
1265*4882a593Smuzhiyun
1266*4882a593Smuzhiyun rval = device_create_file(&client->dev, &dev_attr_priv_mem);
1267*4882a593Smuzhiyun if (rval) {
1268*4882a593Smuzhiyun dev_err(&client->dev, "could not register sysfs entry\n");
1269*4882a593Smuzhiyun return rval;
1270*4882a593Smuzhiyun }
1271*4882a593Smuzhiyun
1272*4882a593Smuzhiyun rval = et8ek8_dev_init(subdev);
1273*4882a593Smuzhiyun if (rval)
1274*4882a593Smuzhiyun goto err_file;
1275*4882a593Smuzhiyun
1276*4882a593Smuzhiyun rval = et8ek8_init_controls(sensor);
1277*4882a593Smuzhiyun if (rval) {
1278*4882a593Smuzhiyun dev_err(&client->dev, "controls initialization failed\n");
1279*4882a593Smuzhiyun goto err_file;
1280*4882a593Smuzhiyun }
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun __et8ek8_get_pad_format(sensor, NULL, 0, V4L2_SUBDEV_FORMAT_ACTIVE);
1283*4882a593Smuzhiyun
1284*4882a593Smuzhiyun return 0;
1285*4882a593Smuzhiyun
1286*4882a593Smuzhiyun err_file:
1287*4882a593Smuzhiyun device_remove_file(&client->dev, &dev_attr_priv_mem);
1288*4882a593Smuzhiyun
1289*4882a593Smuzhiyun return rval;
1290*4882a593Smuzhiyun }
1291*4882a593Smuzhiyun
__et8ek8_set_power(struct et8ek8_sensor * sensor,bool on)1292*4882a593Smuzhiyun static int __et8ek8_set_power(struct et8ek8_sensor *sensor, bool on)
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun return on ? et8ek8_power_on(sensor) : et8ek8_power_off(sensor);
1295*4882a593Smuzhiyun }
1296*4882a593Smuzhiyun
et8ek8_set_power(struct v4l2_subdev * subdev,int on)1297*4882a593Smuzhiyun static int et8ek8_set_power(struct v4l2_subdev *subdev, int on)
1298*4882a593Smuzhiyun {
1299*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1300*4882a593Smuzhiyun int ret = 0;
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun mutex_lock(&sensor->power_lock);
1303*4882a593Smuzhiyun
1304*4882a593Smuzhiyun /* If the power count is modified from 0 to != 0 or from != 0 to 0,
1305*4882a593Smuzhiyun * update the power state.
1306*4882a593Smuzhiyun */
1307*4882a593Smuzhiyun if (sensor->power_count == !on) {
1308*4882a593Smuzhiyun ret = __et8ek8_set_power(sensor, !!on);
1309*4882a593Smuzhiyun if (ret < 0)
1310*4882a593Smuzhiyun goto done;
1311*4882a593Smuzhiyun }
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun /* Update the power count. */
1314*4882a593Smuzhiyun sensor->power_count += on ? 1 : -1;
1315*4882a593Smuzhiyun WARN_ON(sensor->power_count < 0);
1316*4882a593Smuzhiyun
1317*4882a593Smuzhiyun done:
1318*4882a593Smuzhiyun mutex_unlock(&sensor->power_lock);
1319*4882a593Smuzhiyun
1320*4882a593Smuzhiyun return ret;
1321*4882a593Smuzhiyun }
1322*4882a593Smuzhiyun
et8ek8_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1323*4882a593Smuzhiyun static int et8ek8_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1324*4882a593Smuzhiyun {
1325*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(sd);
1326*4882a593Smuzhiyun struct v4l2_mbus_framefmt *format;
1327*4882a593Smuzhiyun struct et8ek8_reglist *reglist;
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun reglist = et8ek8_reglist_find_type(&meta_reglist, ET8EK8_REGLIST_MODE);
1330*4882a593Smuzhiyun format = __et8ek8_get_pad_format(sensor, fh->pad, 0,
1331*4882a593Smuzhiyun V4L2_SUBDEV_FORMAT_TRY);
1332*4882a593Smuzhiyun et8ek8_reglist_to_mbus(reglist, format);
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun return et8ek8_set_power(sd, true);
1335*4882a593Smuzhiyun }
1336*4882a593Smuzhiyun
et8ek8_close(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1337*4882a593Smuzhiyun static int et8ek8_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1338*4882a593Smuzhiyun {
1339*4882a593Smuzhiyun return et8ek8_set_power(sd, false);
1340*4882a593Smuzhiyun }
1341*4882a593Smuzhiyun
1342*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops et8ek8_video_ops = {
1343*4882a593Smuzhiyun .s_stream = et8ek8_s_stream,
1344*4882a593Smuzhiyun .g_frame_interval = et8ek8_get_frame_interval,
1345*4882a593Smuzhiyun .s_frame_interval = et8ek8_set_frame_interval,
1346*4882a593Smuzhiyun };
1347*4882a593Smuzhiyun
1348*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops et8ek8_core_ops = {
1349*4882a593Smuzhiyun .s_power = et8ek8_set_power,
1350*4882a593Smuzhiyun };
1351*4882a593Smuzhiyun
1352*4882a593Smuzhiyun static const struct v4l2_subdev_pad_ops et8ek8_pad_ops = {
1353*4882a593Smuzhiyun .enum_mbus_code = et8ek8_enum_mbus_code,
1354*4882a593Smuzhiyun .enum_frame_size = et8ek8_enum_frame_size,
1355*4882a593Smuzhiyun .enum_frame_interval = et8ek8_enum_frame_ival,
1356*4882a593Smuzhiyun .get_fmt = et8ek8_get_pad_format,
1357*4882a593Smuzhiyun .set_fmt = et8ek8_set_pad_format,
1358*4882a593Smuzhiyun };
1359*4882a593Smuzhiyun
1360*4882a593Smuzhiyun static const struct v4l2_subdev_ops et8ek8_ops = {
1361*4882a593Smuzhiyun .core = &et8ek8_core_ops,
1362*4882a593Smuzhiyun .video = &et8ek8_video_ops,
1363*4882a593Smuzhiyun .pad = &et8ek8_pad_ops,
1364*4882a593Smuzhiyun };
1365*4882a593Smuzhiyun
1366*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops et8ek8_internal_ops = {
1367*4882a593Smuzhiyun .registered = et8ek8_registered,
1368*4882a593Smuzhiyun .open = et8ek8_open,
1369*4882a593Smuzhiyun .close = et8ek8_close,
1370*4882a593Smuzhiyun };
1371*4882a593Smuzhiyun
1372*4882a593Smuzhiyun /* --------------------------------------------------------------------------
1373*4882a593Smuzhiyun * I2C driver
1374*4882a593Smuzhiyun */
et8ek8_suspend(struct device * dev)1375*4882a593Smuzhiyun static int __maybe_unused et8ek8_suspend(struct device *dev)
1376*4882a593Smuzhiyun {
1377*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
1378*4882a593Smuzhiyun struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1379*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun if (!sensor->power_count)
1382*4882a593Smuzhiyun return 0;
1383*4882a593Smuzhiyun
1384*4882a593Smuzhiyun return __et8ek8_set_power(sensor, false);
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun
et8ek8_resume(struct device * dev)1387*4882a593Smuzhiyun static int __maybe_unused et8ek8_resume(struct device *dev)
1388*4882a593Smuzhiyun {
1389*4882a593Smuzhiyun struct i2c_client *client = to_i2c_client(dev);
1390*4882a593Smuzhiyun struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1391*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1392*4882a593Smuzhiyun
1393*4882a593Smuzhiyun if (!sensor->power_count)
1394*4882a593Smuzhiyun return 0;
1395*4882a593Smuzhiyun
1396*4882a593Smuzhiyun return __et8ek8_set_power(sensor, true);
1397*4882a593Smuzhiyun }
1398*4882a593Smuzhiyun
et8ek8_probe(struct i2c_client * client)1399*4882a593Smuzhiyun static int et8ek8_probe(struct i2c_client *client)
1400*4882a593Smuzhiyun {
1401*4882a593Smuzhiyun struct et8ek8_sensor *sensor;
1402*4882a593Smuzhiyun struct device *dev = &client->dev;
1403*4882a593Smuzhiyun int ret;
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL);
1406*4882a593Smuzhiyun if (!sensor)
1407*4882a593Smuzhiyun return -ENOMEM;
1408*4882a593Smuzhiyun
1409*4882a593Smuzhiyun sensor->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1410*4882a593Smuzhiyun if (IS_ERR(sensor->reset)) {
1411*4882a593Smuzhiyun dev_dbg(&client->dev, "could not request reset gpio\n");
1412*4882a593Smuzhiyun return PTR_ERR(sensor->reset);
1413*4882a593Smuzhiyun }
1414*4882a593Smuzhiyun
1415*4882a593Smuzhiyun sensor->vana = devm_regulator_get(dev, "vana");
1416*4882a593Smuzhiyun if (IS_ERR(sensor->vana)) {
1417*4882a593Smuzhiyun dev_err(&client->dev, "could not get regulator for vana\n");
1418*4882a593Smuzhiyun return PTR_ERR(sensor->vana);
1419*4882a593Smuzhiyun }
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun sensor->ext_clk = devm_clk_get(dev, NULL);
1422*4882a593Smuzhiyun if (IS_ERR(sensor->ext_clk)) {
1423*4882a593Smuzhiyun dev_err(&client->dev, "could not get clock\n");
1424*4882a593Smuzhiyun return PTR_ERR(sensor->ext_clk);
1425*4882a593Smuzhiyun }
1426*4882a593Smuzhiyun
1427*4882a593Smuzhiyun ret = of_property_read_u32(dev->of_node, "clock-frequency",
1428*4882a593Smuzhiyun &sensor->xclk_freq);
1429*4882a593Smuzhiyun if (ret) {
1430*4882a593Smuzhiyun dev_warn(dev, "can't get clock-frequency\n");
1431*4882a593Smuzhiyun return ret;
1432*4882a593Smuzhiyun }
1433*4882a593Smuzhiyun
1434*4882a593Smuzhiyun mutex_init(&sensor->power_lock);
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun v4l2_i2c_subdev_init(&sensor->subdev, client, &et8ek8_ops);
1437*4882a593Smuzhiyun sensor->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1438*4882a593Smuzhiyun sensor->subdev.internal_ops = &et8ek8_internal_ops;
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun sensor->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1441*4882a593Smuzhiyun sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
1442*4882a593Smuzhiyun ret = media_entity_pads_init(&sensor->subdev.entity, 1, &sensor->pad);
1443*4882a593Smuzhiyun if (ret < 0) {
1444*4882a593Smuzhiyun dev_err(&client->dev, "media entity init failed!\n");
1445*4882a593Smuzhiyun goto err_mutex;
1446*4882a593Smuzhiyun }
1447*4882a593Smuzhiyun
1448*4882a593Smuzhiyun ret = v4l2_async_register_subdev_sensor_common(&sensor->subdev);
1449*4882a593Smuzhiyun if (ret < 0)
1450*4882a593Smuzhiyun goto err_entity;
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun dev_dbg(dev, "initialized!\n");
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun return 0;
1455*4882a593Smuzhiyun
1456*4882a593Smuzhiyun err_entity:
1457*4882a593Smuzhiyun media_entity_cleanup(&sensor->subdev.entity);
1458*4882a593Smuzhiyun err_mutex:
1459*4882a593Smuzhiyun mutex_destroy(&sensor->power_lock);
1460*4882a593Smuzhiyun return ret;
1461*4882a593Smuzhiyun }
1462*4882a593Smuzhiyun
et8ek8_remove(struct i2c_client * client)1463*4882a593Smuzhiyun static int __exit et8ek8_remove(struct i2c_client *client)
1464*4882a593Smuzhiyun {
1465*4882a593Smuzhiyun struct v4l2_subdev *subdev = i2c_get_clientdata(client);
1466*4882a593Smuzhiyun struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev);
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun if (sensor->power_count) {
1469*4882a593Smuzhiyun WARN_ON(1);
1470*4882a593Smuzhiyun et8ek8_power_off(sensor);
1471*4882a593Smuzhiyun sensor->power_count = 0;
1472*4882a593Smuzhiyun }
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun v4l2_device_unregister_subdev(&sensor->subdev);
1475*4882a593Smuzhiyun device_remove_file(&client->dev, &dev_attr_priv_mem);
1476*4882a593Smuzhiyun v4l2_ctrl_handler_free(&sensor->ctrl_handler);
1477*4882a593Smuzhiyun v4l2_async_unregister_subdev(&sensor->subdev);
1478*4882a593Smuzhiyun media_entity_cleanup(&sensor->subdev.entity);
1479*4882a593Smuzhiyun mutex_destroy(&sensor->power_lock);
1480*4882a593Smuzhiyun
1481*4882a593Smuzhiyun return 0;
1482*4882a593Smuzhiyun }
1483*4882a593Smuzhiyun
1484*4882a593Smuzhiyun static const struct of_device_id et8ek8_of_table[] = {
1485*4882a593Smuzhiyun { .compatible = "toshiba,et8ek8" },
1486*4882a593Smuzhiyun { },
1487*4882a593Smuzhiyun };
1488*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, et8ek8_of_table);
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun static const struct i2c_device_id et8ek8_id_table[] = {
1491*4882a593Smuzhiyun { ET8EK8_NAME, 0 },
1492*4882a593Smuzhiyun { }
1493*4882a593Smuzhiyun };
1494*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, et8ek8_id_table);
1495*4882a593Smuzhiyun
1496*4882a593Smuzhiyun static const struct dev_pm_ops et8ek8_pm_ops = {
1497*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(et8ek8_suspend, et8ek8_resume)
1498*4882a593Smuzhiyun };
1499*4882a593Smuzhiyun
1500*4882a593Smuzhiyun static struct i2c_driver et8ek8_i2c_driver = {
1501*4882a593Smuzhiyun .driver = {
1502*4882a593Smuzhiyun .name = ET8EK8_NAME,
1503*4882a593Smuzhiyun .pm = &et8ek8_pm_ops,
1504*4882a593Smuzhiyun .of_match_table = et8ek8_of_table,
1505*4882a593Smuzhiyun },
1506*4882a593Smuzhiyun .probe_new = et8ek8_probe,
1507*4882a593Smuzhiyun .remove = __exit_p(et8ek8_remove),
1508*4882a593Smuzhiyun .id_table = et8ek8_id_table,
1509*4882a593Smuzhiyun };
1510*4882a593Smuzhiyun
1511*4882a593Smuzhiyun module_i2c_driver(et8ek8_i2c_driver);
1512*4882a593Smuzhiyun
1513*4882a593Smuzhiyun MODULE_AUTHOR("Sakari Ailus <sakari.ailus@iki.fi>, Pavel Machek <pavel@ucw.cz");
1514*4882a593Smuzhiyun MODULE_DESCRIPTION("Toshiba ET8EK8 camera sensor driver");
1515*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1516