xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/ep9461e.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Jianwei Fan <jianwei.fan@rock-chips.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * V0.0X01.0X00 first version.
8*4882a593Smuzhiyun  * V0.0X01.0X01 add device attr hdmirxsel.
9*4882a593Smuzhiyun  * V0.0X01.0X02 add device attr hdmiautoswitch.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun // #define DEBUG
14*4882a593Smuzhiyun #include <linux/miscdevice.h>
15*4882a593Smuzhiyun #include <linux/cdev.h>
16*4882a593Smuzhiyun #include <linux/device.h>
17*4882a593Smuzhiyun #include <linux/fs.h>
18*4882a593Smuzhiyun #include <linux/i2c-dev.h>
19*4882a593Smuzhiyun #include <linux/i2c.h>
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/kernel.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun #include <linux/notifier.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <linux/uaccess.h>
26*4882a593Smuzhiyun #include <linux/compat.h>
27*4882a593Smuzhiyun #include <linux/printk.h>
28*4882a593Smuzhiyun #include <linux/kobject.h>
29*4882a593Smuzhiyun #include <linux/version.h>
30*4882a593Smuzhiyun #include <linux/time.h>
31*4882a593Smuzhiyun #include <linux/timer.h>
32*4882a593Smuzhiyun #include <linux/workqueue.h>
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define DRIVER_VERSION		KERNEL_VERSION(0, 0x01, 0x02)
35*4882a593Smuzhiyun #define DRIVER_NAME		"EP9461E"
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /*control reg*/
38*4882a593Smuzhiyun #define RX_SIGNAL_DETECT	0x00
39*4882a593Smuzhiyun #define GENERAL_CONTROL		0x08
40*4882a593Smuzhiyun #define RX_SEL_CONTROL		0x09
41*4882a593Smuzhiyun #define EDID_ENABLE		0x0B
42*4882a593Smuzhiyun #define ENTER_CODE		0x07
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /*control mask*/
45*4882a593Smuzhiyun #define MASK_RX0_SIGNAL		0x10
46*4882a593Smuzhiyun #define MASK_AUTO_SWITCH	0x40
47*4882a593Smuzhiyun #define MASK_CEC_SWITCH		0x20
48*4882a593Smuzhiyun #define MASK_POWER		0x80
49*4882a593Smuzhiyun #define MASK_RX_SEL		0x0f
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun struct ep9461e_dev {
52*4882a593Smuzhiyun 	struct		device *dev;
53*4882a593Smuzhiyun 	struct		miscdevice miscdev;
54*4882a593Smuzhiyun 	struct		i2c_client *client;
55*4882a593Smuzhiyun 	struct		mutex confctl_mutex;
56*4882a593Smuzhiyun 	struct		timer_list timer;
57*4882a593Smuzhiyun 	struct		delayed_work work_i2c_poll;
58*4882a593Smuzhiyun 	bool		auto_switch_en;
59*4882a593Smuzhiyun 	bool		power_up_chip_en;
60*4882a593Smuzhiyun 	bool		cec_switch_en;
61*4882a593Smuzhiyun 	bool		nosignal;
62*4882a593Smuzhiyun 	u32		hdmi_rx_sel;
63*4882a593Smuzhiyun 	int		err_cnt;
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun static struct ep9461e_dev *g_ep9461e;
67*4882a593Smuzhiyun static struct ep9461e_dev *ep9461e;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun static void ep9461e_rx_select(struct ep9461e_dev *ep9461e);
70*4882a593Smuzhiyun static void ep9461e_rx_manual_select(struct ep9461e_dev *ep9461e);
71*4882a593Smuzhiyun 
i2c_wr(struct ep9461e_dev * ep9461e,u16 reg,u8 * val,u32 n)72*4882a593Smuzhiyun static void i2c_wr(struct ep9461e_dev *ep9461e, u16 reg, u8 *val, u32 n)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun 	struct i2c_msg msg;
75*4882a593Smuzhiyun 	struct i2c_client *client = ep9461e->client;
76*4882a593Smuzhiyun 	int err;
77*4882a593Smuzhiyun 	u8 data[128];
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	data[0] = reg;
80*4882a593Smuzhiyun 	memcpy(&data[1], val, n);
81*4882a593Smuzhiyun 	msg.addr = client->addr;
82*4882a593Smuzhiyun 	msg.flags = 0;
83*4882a593Smuzhiyun 	msg.buf = data;
84*4882a593Smuzhiyun 	msg.len = n + 1;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	err = i2c_transfer(client->adapter, &msg, 1);
87*4882a593Smuzhiyun 	if (err != 1) {
88*4882a593Smuzhiyun 		dev_err(ep9461e->dev, "writing register 0x%x from 0x%x failed\n",
89*4882a593Smuzhiyun 			reg, client->addr);
90*4882a593Smuzhiyun 	} else {
91*4882a593Smuzhiyun 		switch (n) {
92*4882a593Smuzhiyun 		case 1:
93*4882a593Smuzhiyun 			dev_dbg(ep9461e->dev, "I2C write 0x%02x = 0x%02x\n",
94*4882a593Smuzhiyun 				reg, data[1]);
95*4882a593Smuzhiyun 			break;
96*4882a593Smuzhiyun 		case 2:
97*4882a593Smuzhiyun 			dev_dbg(ep9461e->dev,
98*4882a593Smuzhiyun 				"I2C write 0x%02x = 0x%02x%02x\n",
99*4882a593Smuzhiyun 				reg, data[2], data[1]);
100*4882a593Smuzhiyun 			break;
101*4882a593Smuzhiyun 		case 4:
102*4882a593Smuzhiyun 			dev_dbg(ep9461e->dev,
103*4882a593Smuzhiyun 				"I2C write 0x%02x = 0x%02x%02x%02x%02x\n",
104*4882a593Smuzhiyun 				reg, data[4], data[3], data[2], data[1]);
105*4882a593Smuzhiyun 			break;
106*4882a593Smuzhiyun 		default:
107*4882a593Smuzhiyun 			dev_dbg(ep9461e->dev,
108*4882a593Smuzhiyun 				"I2C write %d bytes from address 0x%02x\n",
109*4882a593Smuzhiyun 				n, reg);
110*4882a593Smuzhiyun 		}
111*4882a593Smuzhiyun 	}
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
i2c_rd(struct ep9461e_dev * ep9461e,u16 reg,u8 * val,u32 n)114*4882a593Smuzhiyun static void i2c_rd(struct ep9461e_dev *ep9461e, u16 reg, u8 *val, u32 n)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	struct i2c_msg msg[2];
117*4882a593Smuzhiyun 	struct i2c_client *client = ep9461e->client;
118*4882a593Smuzhiyun 	int err;
119*4882a593Smuzhiyun 	u8 buf[1] = { reg };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	/*msg[0] addr to read*/
122*4882a593Smuzhiyun 	msg[0].addr = client->addr;
123*4882a593Smuzhiyun 	msg[0].flags = 0;
124*4882a593Smuzhiyun 	msg[0].buf = buf;
125*4882a593Smuzhiyun 	msg[0].len = 1;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/*msg[1] read data*/
128*4882a593Smuzhiyun 	msg[1].addr = client->addr;
129*4882a593Smuzhiyun 	msg[1].flags = I2C_M_RD;
130*4882a593Smuzhiyun 	msg[1].buf = val;
131*4882a593Smuzhiyun 	msg[1].len = n;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	err = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
134*4882a593Smuzhiyun 	if (err != ARRAY_SIZE(msg)) {
135*4882a593Smuzhiyun 		dev_err(ep9461e->dev, "reading register 0x%x from 0x%x failed\n",
136*4882a593Smuzhiyun 			reg, client->addr);
137*4882a593Smuzhiyun 	}
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
i2c_rd8(struct ep9461e_dev * ep9461e,u16 reg,u8 * val)140*4882a593Smuzhiyun static void i2c_rd8(struct ep9461e_dev *ep9461e, u16 reg, u8 *val)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	i2c_rd(ep9461e, reg, val, 1);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
i2c_wr8(struct ep9461e_dev * ep9461e,u16 reg,u8 buf)145*4882a593Smuzhiyun static void i2c_wr8(struct ep9461e_dev *ep9461e, u16 reg, u8 buf)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	i2c_wr(ep9461e, reg, &buf, 1);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
i2c_wr8_and_or(struct ep9461e_dev * ep9461e,u16 reg,u32 mask,u32 val)150*4882a593Smuzhiyun static void i2c_wr8_and_or(struct ep9461e_dev *ep9461e, u16 reg, u32 mask,
151*4882a593Smuzhiyun 			   u32 val)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	u8 val_p;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	i2c_rd8(ep9461e, reg, &val_p);
156*4882a593Smuzhiyun 	i2c_wr8(ep9461e, reg, (val_p & mask) | val);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun 
ep9461e_ioctl(struct file * file,uint32_t cmd,unsigned long arg)159*4882a593Smuzhiyun static long ep9461e_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	return 0;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
ep9461e_write(struct file * file,const char __user * buf,size_t size,loff_t * ppos)164*4882a593Smuzhiyun static ssize_t ep9461e_write(struct file *file, const char __user *buf,
165*4882a593Smuzhiyun 			     size_t size, loff_t *ppos)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	return 1;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
ep9461e_read(struct file * file,char __user * buf,size_t size,loff_t * ppos)170*4882a593Smuzhiyun static ssize_t ep9461e_read(struct file *file, char __user *buf, size_t size,
171*4882a593Smuzhiyun 			    loff_t *ppos)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	return 1;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
hdmirxsel_show(struct device * dev,struct device_attribute * attr,char * buf)176*4882a593Smuzhiyun static ssize_t hdmirxsel_show(struct device *dev,
177*4882a593Smuzhiyun 				      struct device_attribute *attr, char *buf)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	struct ep9461e_dev *ep9461e = g_ep9461e;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	dev_info(ep9461e->dev, "%s: hdmi rx select state: %d\n",
182*4882a593Smuzhiyun 			__func__, ep9461e->hdmi_rx_sel);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", ep9461e->hdmi_rx_sel);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun 
hdmirxsel_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)187*4882a593Smuzhiyun static ssize_t hdmirxsel_store(struct device *dev,
188*4882a593Smuzhiyun 				       struct device_attribute *attr,
189*4882a593Smuzhiyun 				       const char *buf, size_t count)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	struct ep9461e_dev *ep9461e = g_ep9461e;
192*4882a593Smuzhiyun 	u32 hdmirxstate = 0;
193*4882a593Smuzhiyun 	int ret;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	ret = kstrtouint(buf, 10, &hdmirxstate);
196*4882a593Smuzhiyun 	if (!ret) {
197*4882a593Smuzhiyun 		dev_dbg(ep9461e->dev, "state: %d\n", hdmirxstate);
198*4882a593Smuzhiyun 		ep9461e->hdmi_rx_sel = hdmirxstate;
199*4882a593Smuzhiyun 		if (ep9461e->auto_switch_en | ep9461e->cec_switch_en)
200*4882a593Smuzhiyun 			ep9461e->auto_switch_en = ep9461e->cec_switch_en = 0;
201*4882a593Smuzhiyun 		ep9461e_rx_select(ep9461e);
202*4882a593Smuzhiyun 	} else {
203*4882a593Smuzhiyun 		dev_err(ep9461e->dev, "write hdmi_rx_sel failed!!!\n");
204*4882a593Smuzhiyun 	}
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	return count;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun 
hdmiautoswitch_show(struct device * dev,struct device_attribute * attr,char * buf)209*4882a593Smuzhiyun static ssize_t hdmiautoswitch_show(struct device *dev,
210*4882a593Smuzhiyun 				      struct device_attribute *attr, char *buf)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	struct ep9461e_dev *ep9461e = g_ep9461e;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	dev_info(ep9461e->dev, "hdmi rx select auto_switch state: %d\n",
215*4882a593Smuzhiyun 				ep9461e->auto_switch_en);
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", ep9461e->auto_switch_en);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
hdmiautoswitch_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)220*4882a593Smuzhiyun static ssize_t hdmiautoswitch_store(struct device *dev,
221*4882a593Smuzhiyun 					    struct device_attribute *attr,
222*4882a593Smuzhiyun 					    const char *buf, size_t count)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	struct ep9461e_dev *ep9461e = g_ep9461e;
225*4882a593Smuzhiyun 	u32 hdmiautoswitch = 0;
226*4882a593Smuzhiyun 	int ret;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	ret = kstrtouint(buf, 10, &hdmiautoswitch);
229*4882a593Smuzhiyun 	if (!ret) {
230*4882a593Smuzhiyun 		dev_dbg(ep9461e->dev, "state: %d\n", hdmiautoswitch);
231*4882a593Smuzhiyun 		ep9461e->auto_switch_en = hdmiautoswitch;
232*4882a593Smuzhiyun 		ep9461e_rx_select(ep9461e);
233*4882a593Smuzhiyun 	} else {
234*4882a593Smuzhiyun 		dev_err(ep9461e->dev, "write hdmi auto switch failed!!!\n");
235*4882a593Smuzhiyun 	}
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	return count;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun static DEVICE_ATTR_RW(hdmirxsel);
241*4882a593Smuzhiyun static DEVICE_ATTR_RW(hdmiautoswitch);
242*4882a593Smuzhiyun 
detect_rx_signal(struct ep9461e_dev * ep9461e)243*4882a593Smuzhiyun static inline bool detect_rx_signal(struct ep9461e_dev *ep9461e)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	u8 val;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	i2c_rd8(ep9461e, RX_SIGNAL_DETECT, &val);
248*4882a593Smuzhiyun 	if (!(val & MASK_RX0_SIGNAL))
249*4882a593Smuzhiyun 		return false;
250*4882a593Smuzhiyun 	else
251*4882a593Smuzhiyun 		return true;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun 
ep9461e_init(struct ep9461e_dev * ep9461e)254*4882a593Smuzhiyun static void ep9461e_init(struct ep9461e_dev *ep9461e)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun 	ep9461e->power_up_chip_en = false;
257*4882a593Smuzhiyun 	ep9461e->auto_switch_en = false;
258*4882a593Smuzhiyun 	ep9461e->hdmi_rx_sel = 0;
259*4882a593Smuzhiyun 	ep9461e->err_cnt = 0;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	if (ep9461e->power_up_chip_en) {
262*4882a593Smuzhiyun 		i2c_wr8_and_or(ep9461e, GENERAL_CONTROL, ~MASK_POWER,
263*4882a593Smuzhiyun 			       MASK_POWER);
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 	ep9461e_rx_select(ep9461e);
266*4882a593Smuzhiyun 	schedule_delayed_work(&ep9461e->work_i2c_poll, msecs_to_jiffies(1000));
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
ep9461e_rx_manual_select(struct ep9461e_dev * ep9461e)269*4882a593Smuzhiyun static void ep9461e_rx_manual_select(struct ep9461e_dev *ep9461e)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	i2c_wr8(ep9461e, RX_SEL_CONTROL, ep9461e->hdmi_rx_sel);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun 
ep9461e_rx_select(struct ep9461e_dev * ep9461e)274*4882a593Smuzhiyun static void ep9461e_rx_select(struct ep9461e_dev *ep9461e)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun 	int ret;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	if (ep9461e->auto_switch_en) {
279*4882a593Smuzhiyun 		i2c_wr8_and_or(ep9461e, GENERAL_CONTROL, ~MASK_AUTO_SWITCH,
280*4882a593Smuzhiyun 			       MASK_AUTO_SWITCH);
281*4882a593Smuzhiyun 	} else {
282*4882a593Smuzhiyun 		ep9461e_rx_manual_select(ep9461e);
283*4882a593Smuzhiyun 	}
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	ret = detect_rx_signal(ep9461e);
286*4882a593Smuzhiyun 	if (ret)
287*4882a593Smuzhiyun 		dev_info(ep9461e->dev, "Detect HDMI RX valid signal!\n");
288*4882a593Smuzhiyun 	else
289*4882a593Smuzhiyun 		dev_err(ep9461e->dev, "HDMI RX has no valid signal!\n");
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 
ep9461e_work_i2c_poll(struct work_struct * work)293*4882a593Smuzhiyun static void ep9461e_work_i2c_poll(struct work_struct *work)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun 	int ret;
296*4882a593Smuzhiyun 	struct delayed_work *dwork = to_delayed_work(work);
297*4882a593Smuzhiyun 	struct ep9461e_dev *ep9461e =
298*4882a593Smuzhiyun 		container_of(dwork, struct ep9461e_dev, work_i2c_poll);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	ret = detect_rx_signal(ep9461e);
301*4882a593Smuzhiyun 	if (!ret && (ep9461e->err_cnt < 10)) {
302*4882a593Smuzhiyun 		ep9461e->err_cnt++;
303*4882a593Smuzhiyun 		dev_err(ep9461e->dev,
304*4882a593Smuzhiyun 			"ERROR: HDMI RX has no valid signal, err cnt: %d\n",
305*4882a593Smuzhiyun 			ep9461e->err_cnt);
306*4882a593Smuzhiyun 		if (ep9461e->err_cnt >= 10)
307*4882a593Smuzhiyun 			dev_err(ep9461e->dev,
308*4882a593Smuzhiyun 				"error count greater than 10, please check HDMIRX!");
309*4882a593Smuzhiyun 	} else if (ret) {
310*4882a593Smuzhiyun 		ep9461e->err_cnt = 0;
311*4882a593Smuzhiyun 	}
312*4882a593Smuzhiyun 	schedule_delayed_work(&ep9461e->work_i2c_poll, msecs_to_jiffies(1000));
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun static const struct file_operations ep9461e_fops = {
316*4882a593Smuzhiyun 	.owner = THIS_MODULE,
317*4882a593Smuzhiyun 	.read = ep9461e_read,
318*4882a593Smuzhiyun 	.write = ep9461e_write,
319*4882a593Smuzhiyun 	.unlocked_ioctl = ep9461e_ioctl,
320*4882a593Smuzhiyun };
321*4882a593Smuzhiyun 
322*4882a593Smuzhiyun struct miscdevice ep9461e_miscdev = {
323*4882a593Smuzhiyun 	.minor = MISC_DYNAMIC_MINOR,
324*4882a593Smuzhiyun 	.name = "ep9461e_dev",
325*4882a593Smuzhiyun 	.fops = &ep9461e_fops,
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun 
ep9461e_probe(struct i2c_client * client,const struct i2c_device_id * id)328*4882a593Smuzhiyun static int ep9461e_probe(struct i2c_client *client,
329*4882a593Smuzhiyun 			 const struct i2c_device_id *id)
330*4882a593Smuzhiyun {
331*4882a593Smuzhiyun 	struct ep9461e_dev *ep9461e;
332*4882a593Smuzhiyun 	struct device *dev = &client->dev;
333*4882a593Smuzhiyun 	int ret;
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	dev_info(dev, "driver version: %02x.%02x.%02x",
336*4882a593Smuzhiyun 		DRIVER_VERSION >> 16,
337*4882a593Smuzhiyun 		(DRIVER_VERSION & 0xff00) >> 8,
338*4882a593Smuzhiyun 		DRIVER_VERSION & 0x00ff);
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
341*4882a593Smuzhiyun 		return -EIO;
342*4882a593Smuzhiyun 	dev_info(dev, "chip found @ 0x%x (%s)\n", client->addr << 1,
343*4882a593Smuzhiyun 		client->adapter->name);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	ep9461e = devm_kzalloc(dev, sizeof(struct ep9461e_dev), GFP_KERNEL);
346*4882a593Smuzhiyun 	if (!ep9461e)
347*4882a593Smuzhiyun 		return -ENOMEM;
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	ep9461e->client = client;
350*4882a593Smuzhiyun 	ep9461e->dev = dev;
351*4882a593Smuzhiyun 	client->flags |= I2C_CLIENT_SCCB;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	ret = misc_register(&ep9461e_miscdev);
354*4882a593Smuzhiyun 	if (ret) {
355*4882a593Smuzhiyun 		dev_err(ep9461e->dev,
356*4882a593Smuzhiyun 			"EP9461E ERROR: could not register ep9461e device\n");
357*4882a593Smuzhiyun 		return ret;
358*4882a593Smuzhiyun 	}
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	mutex_init(&ep9461e->confctl_mutex);
361*4882a593Smuzhiyun 	ret = device_create_file(ep9461e_miscdev.this_device,
362*4882a593Smuzhiyun 				&dev_attr_hdmirxsel);
363*4882a593Smuzhiyun 	if (ret) {
364*4882a593Smuzhiyun 		dev_err(ep9461e->dev, "failed to create attr hdmirxsel!\n");
365*4882a593Smuzhiyun 		goto err1;
366*4882a593Smuzhiyun 	}
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	ret = device_create_file(ep9461e_miscdev.this_device,
369*4882a593Smuzhiyun 				&dev_attr_hdmiautoswitch);
370*4882a593Smuzhiyun 	if (ret) {
371*4882a593Smuzhiyun 		dev_err(ep9461e->dev,
372*4882a593Smuzhiyun 			"failed to create attr hdmiautoswitch!\n");
373*4882a593Smuzhiyun 		goto err;
374*4882a593Smuzhiyun 	}
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&ep9461e->work_i2c_poll, ep9461e_work_i2c_poll);
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	ep9461e_init(ep9461e);
379*4882a593Smuzhiyun 	g_ep9461e = ep9461e;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	dev_info(ep9461e->dev, "%s found @ 0x%x (%s)\n",
382*4882a593Smuzhiyun 				client->name, client->addr << 1,
383*4882a593Smuzhiyun 				client->adapter->name);
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun 	return 0;
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun err:
388*4882a593Smuzhiyun 	device_remove_file(ep9461e_miscdev.this_device,
389*4882a593Smuzhiyun 			  &dev_attr_hdmirxsel);
390*4882a593Smuzhiyun err1:
391*4882a593Smuzhiyun 	misc_deregister(&ep9461e_miscdev);
392*4882a593Smuzhiyun 	return ret;
393*4882a593Smuzhiyun }
394*4882a593Smuzhiyun 
ep9461e_remove(struct i2c_client * client)395*4882a593Smuzhiyun static int ep9461e_remove(struct i2c_client *client)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun 	cancel_delayed_work_sync(&ep9461e->work_i2c_poll);
398*4882a593Smuzhiyun 	device_remove_file(ep9461e_miscdev.this_device,
399*4882a593Smuzhiyun 			  &dev_attr_hdmirxsel);
400*4882a593Smuzhiyun 	device_remove_file(ep9461e_miscdev.this_device,
401*4882a593Smuzhiyun 			  &dev_attr_hdmiautoswitch);
402*4882a593Smuzhiyun 	mutex_destroy(&ep9461e->confctl_mutex);
403*4882a593Smuzhiyun 	misc_deregister(&ep9461e_miscdev);
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	return 0;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun static const struct of_device_id ep9461e_of_match[] = {
409*4882a593Smuzhiyun 	{ .compatible = "semiconn,ep9461e" },
410*4882a593Smuzhiyun 	{}
411*4882a593Smuzhiyun };
412*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, ep9461e_of_match);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun static struct i2c_driver ep9461e_driver = {
415*4882a593Smuzhiyun 	.probe = ep9461e_probe,
416*4882a593Smuzhiyun 	.remove = ep9461e_remove,
417*4882a593Smuzhiyun 	.driver = {
418*4882a593Smuzhiyun 		.owner = THIS_MODULE,
419*4882a593Smuzhiyun 		.name = DRIVER_NAME,
420*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(ep9461e_of_match),
421*4882a593Smuzhiyun 	},
422*4882a593Smuzhiyun };
423*4882a593Smuzhiyun 
ep9461e_driver_init(void)424*4882a593Smuzhiyun static int __init ep9461e_driver_init(void)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun 	return i2c_add_driver(&ep9461e_driver);
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun 
ep9461e_driver_exit(void)429*4882a593Smuzhiyun static void __exit ep9461e_driver_exit(void)
430*4882a593Smuzhiyun {
431*4882a593Smuzhiyun 	i2c_del_driver(&ep9461e_driver);
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun device_initcall_sync(ep9461e_driver_init);
435*4882a593Smuzhiyun module_exit(ep9461e_driver_exit);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun MODULE_DESCRIPTION("semiconn EP9461E 4 HDMI in switch driver");
438*4882a593Smuzhiyun MODULE_AUTHOR("Jianwei Fan <jianwei.fan@rock-chips.com>");
439*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
440