xref: /OK3568_Linux_fs/kernel/drivers/media/i2c/dw9800w.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * dw9800w vcm driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2022 Rockchip Electronics Co., Ltd.
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun //#define DEBUG
8*4882a593Smuzhiyun #include <linux/delay.h>
9*4882a593Smuzhiyun #include <linux/i2c.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/pm_runtime.h>
12*4882a593Smuzhiyun #include <linux/rk-camera-module.h>
13*4882a593Smuzhiyun #include <linux/version.h>
14*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
15*4882a593Smuzhiyun #include <media/v4l2-device.h>
16*4882a593Smuzhiyun #include <linux/rk_vcm_head.h>
17*4882a593Smuzhiyun #include <linux/compat.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x0)
20*4882a593Smuzhiyun #define DW9800W_NAME			"dw9800w"
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define DW9800W_MAX_CURRENT		1023U
23*4882a593Smuzhiyun #define DW9800W_MAX_REG			1023U
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define DW9800W_DEFAULT_START_CURRENT	553
26*4882a593Smuzhiyun #define DW9800W_DEFAULT_RATED_CURRENT	853
27*4882a593Smuzhiyun #define DW9800W_DEFAULT_STEP_MODE	0x0
28*4882a593Smuzhiyun #define DW9800W_DEFAULT_T_SACT		0x10
29*4882a593Smuzhiyun #define DW9800W_DEFAULT_T_DIV		0x1
30*4882a593Smuzhiyun #define REG_NULL			0xFF
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define DW9800W_CHIP_ID			0xF2
33*4882a593Smuzhiyun #define DW9800W_REG_CHIP_ID		0x00
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun enum mode_e {
36*4882a593Smuzhiyun 	SAC2_MODE,
37*4882a593Smuzhiyun 	SAC3_MODE,
38*4882a593Smuzhiyun 	SAC4_MODE,
39*4882a593Smuzhiyun 	SAC5_MODE,
40*4882a593Smuzhiyun 	DIRECT_MODE,
41*4882a593Smuzhiyun 	LSC_MODE,
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* dw9800w device structure */
45*4882a593Smuzhiyun struct dw9800w_device {
46*4882a593Smuzhiyun 	struct v4l2_ctrl_handler ctrls_vcm;
47*4882a593Smuzhiyun 	struct i2c_client *client;
48*4882a593Smuzhiyun 	struct v4l2_subdev sd;
49*4882a593Smuzhiyun 	struct v4l2_device vdev;
50*4882a593Smuzhiyun 	u16 current_val;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	struct gpio_desc *power_gpio;
53*4882a593Smuzhiyun 	unsigned short current_related_pos;
54*4882a593Smuzhiyun 	unsigned short current_lens_pos;
55*4882a593Smuzhiyun 	unsigned int start_current;
56*4882a593Smuzhiyun 	unsigned int rated_current;
57*4882a593Smuzhiyun 	unsigned int step;
58*4882a593Smuzhiyun 	unsigned int step_mode;
59*4882a593Smuzhiyun 	unsigned int vcm_movefull_t;
60*4882a593Smuzhiyun 	unsigned int t_src;
61*4882a593Smuzhiyun 	unsigned int t_div;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	struct __kernel_old_timeval start_move_tv;
64*4882a593Smuzhiyun 	struct __kernel_old_timeval end_move_tv;
65*4882a593Smuzhiyun 	unsigned long move_us;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	u32 module_index;
68*4882a593Smuzhiyun 	const char *module_facing;
69*4882a593Smuzhiyun 	struct rk_cam_vcm_cfg vcm_cfg;
70*4882a593Smuzhiyun 	int max_ma;
71*4882a593Smuzhiyun 	struct mutex lock;
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun 
to_dw9800w_vcm(struct v4l2_ctrl * ctrl)74*4882a593Smuzhiyun static inline struct dw9800w_device *to_dw9800w_vcm(struct v4l2_ctrl *ctrl)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun 	return container_of(ctrl->handler, struct dw9800w_device, ctrls_vcm);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
sd_to_dw9800w_vcm(struct v4l2_subdev * subdev)79*4882a593Smuzhiyun static inline struct dw9800w_device *sd_to_dw9800w_vcm(struct v4l2_subdev *subdev)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	return container_of(subdev, struct dw9800w_device, sd);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
dw9800w_write_reg(struct i2c_client * client,u8 reg,u32 len,u32 val)84*4882a593Smuzhiyun static int dw9800w_write_reg(struct i2c_client *client, u8 reg,
85*4882a593Smuzhiyun 			    u32 len, u32 val)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun 	u32 buf_i, val_i;
88*4882a593Smuzhiyun 	u8 buf[5];
89*4882a593Smuzhiyun 	u8 *val_p;
90*4882a593Smuzhiyun 	__be32 val_be;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	if (len > 4)
93*4882a593Smuzhiyun 		return -EINVAL;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	buf[0] = reg;
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	val_be = cpu_to_be32(val);
98*4882a593Smuzhiyun 	val_p = (u8 *)&val_be;
99*4882a593Smuzhiyun 	buf_i = 1;
100*4882a593Smuzhiyun 	val_i = 4 - len;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	while (val_i < 4)
103*4882a593Smuzhiyun 		buf[buf_i++] = val_p[val_i++];
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	if (i2c_master_send(client, buf, len + 1) != len + 1) {
106*4882a593Smuzhiyun 		dev_err(&client->dev, "Failed to write 0x%04x,0x%x\n", reg, val);
107*4882a593Smuzhiyun 		return -EIO;
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 	return 0;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
dw9800w_read_reg(struct i2c_client * client,u8 reg,unsigned int len,u32 * val)112*4882a593Smuzhiyun static int dw9800w_read_reg(struct i2c_client *client,
113*4882a593Smuzhiyun 			    u8 reg,
114*4882a593Smuzhiyun 			    unsigned int len,
115*4882a593Smuzhiyun 			    u32 *val)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	struct i2c_msg msgs[2];
118*4882a593Smuzhiyun 	u8 *data_be_p;
119*4882a593Smuzhiyun 	__be32 data_be = 0;
120*4882a593Smuzhiyun 	int ret;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	if (len > 4 || !len)
123*4882a593Smuzhiyun 		return -EINVAL;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	data_be_p = (u8 *)&data_be;
126*4882a593Smuzhiyun 	/* Write register address */
127*4882a593Smuzhiyun 	msgs[0].addr = client->addr;
128*4882a593Smuzhiyun 	msgs[0].flags = 0;
129*4882a593Smuzhiyun 	msgs[0].len = 1;
130*4882a593Smuzhiyun 	msgs[0].buf = (u8 *)&reg;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	/* Read data from register */
133*4882a593Smuzhiyun 	msgs[1].addr = client->addr;
134*4882a593Smuzhiyun 	msgs[1].flags = I2C_M_RD;
135*4882a593Smuzhiyun 	msgs[1].len = len;
136*4882a593Smuzhiyun 	msgs[1].buf = &data_be_p[4 - len];
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
139*4882a593Smuzhiyun 	if (ret != ARRAY_SIZE(msgs))
140*4882a593Smuzhiyun 		return -EIO;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	*val = be32_to_cpu(data_be);
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	return 0;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
dw9800w_move_time_div(struct dw9800w_device * dev_vcm,unsigned int move_time_us)147*4882a593Smuzhiyun static unsigned int dw9800w_move_time_div(struct dw9800w_device *dev_vcm,
148*4882a593Smuzhiyun 					 unsigned int move_time_us)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
151*4882a593Smuzhiyun 	unsigned int move_time = 0;
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	switch (dev_vcm->t_div) {
154*4882a593Smuzhiyun 	case 0:
155*4882a593Smuzhiyun 		move_time = move_time_us * 2;
156*4882a593Smuzhiyun 		break;
157*4882a593Smuzhiyun 	case 1:
158*4882a593Smuzhiyun 		move_time = move_time_us;
159*4882a593Smuzhiyun 		break;
160*4882a593Smuzhiyun 	case 2:
161*4882a593Smuzhiyun 		move_time = move_time_us / 2;
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	case 3:
164*4882a593Smuzhiyun 		move_time = move_time_us / 4;
165*4882a593Smuzhiyun 		break;
166*4882a593Smuzhiyun 	case 4:
167*4882a593Smuzhiyun 		move_time = move_time_us * 8;
168*4882a593Smuzhiyun 		break;
169*4882a593Smuzhiyun 	case 5:
170*4882a593Smuzhiyun 		move_time = move_time_us * 4;
171*4882a593Smuzhiyun 		break;
172*4882a593Smuzhiyun 	default:
173*4882a593Smuzhiyun 		dev_err(&client->dev,
174*4882a593Smuzhiyun 			"%s: t_div parameter err %d\n",
175*4882a593Smuzhiyun 			__func__, dev_vcm->t_div);
176*4882a593Smuzhiyun 		break;
177*4882a593Smuzhiyun 	}
178*4882a593Smuzhiyun 	return move_time;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
dw9800w_move_time(struct dw9800w_device * dev_vcm,unsigned int move_pos)181*4882a593Smuzhiyun static unsigned int dw9800w_move_time(struct dw9800w_device *dev_vcm,
182*4882a593Smuzhiyun 	unsigned int move_pos)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
185*4882a593Smuzhiyun 	unsigned int move_time_us = 0;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	switch (dev_vcm->step_mode) {
188*4882a593Smuzhiyun 	case LSC_MODE:
189*4882a593Smuzhiyun 		move_time_us = 252 + dev_vcm->t_src * 4;
190*4882a593Smuzhiyun 		move_time_us = move_time_us * move_pos;
191*4882a593Smuzhiyun 		break;
192*4882a593Smuzhiyun 	case SAC2_MODE:
193*4882a593Smuzhiyun 	case SAC3_MODE:
194*4882a593Smuzhiyun 	case SAC4_MODE:
195*4882a593Smuzhiyun 	case SAC5_MODE:
196*4882a593Smuzhiyun 		move_time_us = 6300 + dev_vcm->t_src * 100;
197*4882a593Smuzhiyun 		move_time_us = dw9800w_move_time_div(dev_vcm, move_time_us);
198*4882a593Smuzhiyun 		break;
199*4882a593Smuzhiyun 	case DIRECT_MODE:
200*4882a593Smuzhiyun 		move_time_us = 30000;
201*4882a593Smuzhiyun 		break;
202*4882a593Smuzhiyun 	default:
203*4882a593Smuzhiyun 		dev_err(&client->dev,
204*4882a593Smuzhiyun 			"%s: step_mode is error %d\n",
205*4882a593Smuzhiyun 			__func__, dev_vcm->step_mode);
206*4882a593Smuzhiyun 		break;
207*4882a593Smuzhiyun 	}
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	dev_err(&client->dev,
210*4882a593Smuzhiyun 		"%s: vcm_movefull_t is: %d us\n",
211*4882a593Smuzhiyun 		__func__, move_time_us);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	return move_time_us;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
dw9800w_get_pos(struct dw9800w_device * dev_vcm,unsigned int * cur_pos)216*4882a593Smuzhiyun static int dw9800w_get_pos(struct dw9800w_device *dev_vcm,
217*4882a593Smuzhiyun 	unsigned int *cur_pos)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
220*4882a593Smuzhiyun 	int ret;
221*4882a593Smuzhiyun 	unsigned int abs_step;
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	ret = dw9800w_read_reg(client, 0x03, 2, &abs_step);
224*4882a593Smuzhiyun 	if (ret != 0)
225*4882a593Smuzhiyun 		goto err;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	if (abs_step <= dev_vcm->start_current)
228*4882a593Smuzhiyun 		abs_step = VCMDRV_MAX_LOG;
229*4882a593Smuzhiyun 	else if ((abs_step > dev_vcm->start_current) &&
230*4882a593Smuzhiyun 		 (abs_step <= dev_vcm->rated_current))
231*4882a593Smuzhiyun 		abs_step = (dev_vcm->rated_current - abs_step) / dev_vcm->step;
232*4882a593Smuzhiyun 	else
233*4882a593Smuzhiyun 		abs_step = 0;
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun 	*cur_pos = abs_step;
236*4882a593Smuzhiyun 	dev_dbg(&client->dev, "%s: get position %d\n", __func__, *cur_pos);
237*4882a593Smuzhiyun 	return 0;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun err:
240*4882a593Smuzhiyun 	dev_err(&client->dev,
241*4882a593Smuzhiyun 		"%s: failed with error %d\n", __func__, ret);
242*4882a593Smuzhiyun 	return ret;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
dw9800w_set_pos(struct dw9800w_device * dev_vcm,unsigned int dest_pos)245*4882a593Smuzhiyun static int dw9800w_set_pos(struct dw9800w_device *dev_vcm,
246*4882a593Smuzhiyun 	unsigned int dest_pos)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun 	int ret;
249*4882a593Smuzhiyun 	unsigned int position = 0;
250*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
251*4882a593Smuzhiyun 	u32 is_busy, i;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	if (dest_pos >= VCMDRV_MAX_LOG)
254*4882a593Smuzhiyun 		position = dev_vcm->start_current;
255*4882a593Smuzhiyun 	else
256*4882a593Smuzhiyun 		position = dev_vcm->start_current +
257*4882a593Smuzhiyun 			   (dev_vcm->step * (VCMDRV_MAX_LOG - dest_pos));
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	if (position > DW9800W_MAX_REG)
260*4882a593Smuzhiyun 		position = DW9800W_MAX_REG;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	dev_vcm->current_lens_pos = position;
263*4882a593Smuzhiyun 	dev_vcm->current_related_pos = dest_pos;
264*4882a593Smuzhiyun 	for (i = 0; i < 100; i++) {
265*4882a593Smuzhiyun 		ret = dw9800w_read_reg(client, 0x05, 1, &is_busy);
266*4882a593Smuzhiyun 		if (!ret && !(is_busy & 0x01))
267*4882a593Smuzhiyun 			break;
268*4882a593Smuzhiyun 		usleep_range(100, 200);
269*4882a593Smuzhiyun 	}
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	ret = dw9800w_write_reg(client, 0x03, 2, dev_vcm->current_lens_pos);
272*4882a593Smuzhiyun 	if (ret != 0)
273*4882a593Smuzhiyun 		goto err;
274*4882a593Smuzhiyun 	dev_info(&client->dev,
275*4882a593Smuzhiyun 		"%s: set reg val %d\n", __func__, dev_vcm->current_lens_pos);
276*4882a593Smuzhiyun 	return ret;
277*4882a593Smuzhiyun err:
278*4882a593Smuzhiyun 	dev_err(&client->dev,
279*4882a593Smuzhiyun 		"%s: failed with error %d\n", __func__, ret);
280*4882a593Smuzhiyun 	return ret;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun 
dw9800w_get_ctrl(struct v4l2_ctrl * ctrl)283*4882a593Smuzhiyun static int dw9800w_get_ctrl(struct v4l2_ctrl *ctrl)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun 	struct dw9800w_device *dev_vcm = to_dw9800w_vcm(ctrl);
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE)
288*4882a593Smuzhiyun 		return dw9800w_get_pos(dev_vcm, &ctrl->val);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	return -EINVAL;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun 
dw9800w_set_ctrl(struct v4l2_ctrl * ctrl)293*4882a593Smuzhiyun static int dw9800w_set_ctrl(struct v4l2_ctrl *ctrl)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun 	struct dw9800w_device *dev_vcm = to_dw9800w_vcm(ctrl);
296*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
297*4882a593Smuzhiyun 	unsigned int dest_pos = ctrl->val;
298*4882a593Smuzhiyun 	int move_pos;
299*4882a593Smuzhiyun 	long mv_us;
300*4882a593Smuzhiyun 	int ret = 0;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	dev_dbg(&client->dev, "ctrl->id: 0x%x, ctrl->val: 0x%x\n",
303*4882a593Smuzhiyun 		ctrl->id, ctrl->val);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	if (ctrl->id == V4L2_CID_FOCUS_ABSOLUTE) {
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 		if (dest_pos > VCMDRV_MAX_LOG) {
308*4882a593Smuzhiyun 			dev_info(&client->dev,
309*4882a593Smuzhiyun 				"%s dest_pos is error. %d > %d\n",
310*4882a593Smuzhiyun 				__func__, dest_pos, VCMDRV_MAX_LOG);
311*4882a593Smuzhiyun 			return -EINVAL;
312*4882a593Smuzhiyun 		}
313*4882a593Smuzhiyun 		/* calculate move time */
314*4882a593Smuzhiyun 		move_pos = dev_vcm->current_related_pos - dest_pos;
315*4882a593Smuzhiyun 		if (move_pos < 0)
316*4882a593Smuzhiyun 			move_pos = -move_pos;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 		ret = dw9800w_set_pos(dev_vcm, dest_pos);
319*4882a593Smuzhiyun 		if (dev_vcm->step_mode == LSC_MODE)
320*4882a593Smuzhiyun 			dev_vcm->move_us = ((dev_vcm->vcm_movefull_t * (uint32_t)move_pos) /
321*4882a593Smuzhiyun 					   VCMDRV_MAX_LOG);
322*4882a593Smuzhiyun 		else
323*4882a593Smuzhiyun 			dev_vcm->move_us = dev_vcm->vcm_movefull_t;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 		dev_dbg(&client->dev,
326*4882a593Smuzhiyun 			"dest_pos %d, move_us %ld\n",
327*4882a593Smuzhiyun 			dest_pos, dev_vcm->move_us);
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 		dev_vcm->start_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
330*4882a593Smuzhiyun 		mv_us = dev_vcm->start_move_tv.tv_usec +
331*4882a593Smuzhiyun 				dev_vcm->move_us;
332*4882a593Smuzhiyun 		if (mv_us >= 1000000) {
333*4882a593Smuzhiyun 			dev_vcm->end_move_tv.tv_sec =
334*4882a593Smuzhiyun 				dev_vcm->start_move_tv.tv_sec + 1;
335*4882a593Smuzhiyun 			dev_vcm->end_move_tv.tv_usec = mv_us - 1000000;
336*4882a593Smuzhiyun 		} else {
337*4882a593Smuzhiyun 			dev_vcm->end_move_tv.tv_sec =
338*4882a593Smuzhiyun 					dev_vcm->start_move_tv.tv_sec;
339*4882a593Smuzhiyun 			dev_vcm->end_move_tv.tv_usec = mv_us;
340*4882a593Smuzhiyun 		}
341*4882a593Smuzhiyun 	}
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	return ret;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun static const struct v4l2_ctrl_ops dw9800w_vcm_ctrl_ops = {
347*4882a593Smuzhiyun 	.g_volatile_ctrl = dw9800w_get_ctrl,
348*4882a593Smuzhiyun 	.s_ctrl = dw9800w_set_ctrl,
349*4882a593Smuzhiyun };
350*4882a593Smuzhiyun 
dw9800w_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)351*4882a593Smuzhiyun static int dw9800w_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun 	int rval;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	rval = pm_runtime_get_sync(sd->dev);
356*4882a593Smuzhiyun 	if (rval < 0) {
357*4882a593Smuzhiyun 		pm_runtime_put_noidle(sd->dev);
358*4882a593Smuzhiyun 		return rval;
359*4882a593Smuzhiyun 	}
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	return 0;
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun 
dw9800w_close(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)364*4882a593Smuzhiyun static int dw9800w_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun 	pm_runtime_put(sd->dev);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	return 0;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun static const struct v4l2_subdev_internal_ops dw9800w_int_ops = {
372*4882a593Smuzhiyun 	.open = dw9800w_open,
373*4882a593Smuzhiyun 	.close = dw9800w_close,
374*4882a593Smuzhiyun };
375*4882a593Smuzhiyun 
dw9800w_update_vcm_cfg(struct dw9800w_device * dev_vcm)376*4882a593Smuzhiyun static void dw9800w_update_vcm_cfg(struct dw9800w_device *dev_vcm)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
379*4882a593Smuzhiyun 	int cur_dist;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	if (dev_vcm->max_ma == 0) {
382*4882a593Smuzhiyun 		dev_err(&client->dev, "max current is zero");
383*4882a593Smuzhiyun 		return;
384*4882a593Smuzhiyun 	}
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	cur_dist = dev_vcm->vcm_cfg.rated_ma - dev_vcm->vcm_cfg.start_ma;
387*4882a593Smuzhiyun 	cur_dist = cur_dist * DW9800W_MAX_REG / dev_vcm->max_ma;
388*4882a593Smuzhiyun 	dev_vcm->step = (cur_dist + (VCMDRV_MAX_LOG - 1)) / VCMDRV_MAX_LOG;
389*4882a593Smuzhiyun 	dev_vcm->start_current = dev_vcm->vcm_cfg.start_ma *
390*4882a593Smuzhiyun 				 DW9800W_MAX_REG / dev_vcm->max_ma;
391*4882a593Smuzhiyun 	dev_vcm->rated_current = dev_vcm->vcm_cfg.rated_ma *
392*4882a593Smuzhiyun 				 DW9800W_MAX_REG / dev_vcm->max_ma;
393*4882a593Smuzhiyun 	dev_vcm->step_mode = dev_vcm->vcm_cfg.step_mode;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	dev_info(&client->dev,
396*4882a593Smuzhiyun 		"vcm_cfg: %d, %d, %d, max_ma %d\n",
397*4882a593Smuzhiyun 		dev_vcm->vcm_cfg.start_ma,
398*4882a593Smuzhiyun 		dev_vcm->vcm_cfg.rated_ma,
399*4882a593Smuzhiyun 		dev_vcm->vcm_cfg.step_mode,
400*4882a593Smuzhiyun 		dev_vcm->max_ma);
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun 
dw9800w_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)403*4882a593Smuzhiyun static long dw9800w_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun 	struct dw9800w_device *dev_vcm = sd_to_dw9800w_vcm(sd);
406*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
407*4882a593Smuzhiyun 	struct rk_cam_vcm_tim *vcm_tim;
408*4882a593Smuzhiyun 	struct rk_cam_vcm_cfg *vcm_cfg;
409*4882a593Smuzhiyun 	int ret = 0;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	if (cmd == RK_VIDIOC_VCM_TIMEINFO) {
412*4882a593Smuzhiyun 		vcm_tim = (struct rk_cam_vcm_tim *)arg;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 		vcm_tim->vcm_start_t.tv_sec = dev_vcm->start_move_tv.tv_sec;
415*4882a593Smuzhiyun 		vcm_tim->vcm_start_t.tv_usec =
416*4882a593Smuzhiyun 				dev_vcm->start_move_tv.tv_usec;
417*4882a593Smuzhiyun 		vcm_tim->vcm_end_t.tv_sec = dev_vcm->end_move_tv.tv_sec;
418*4882a593Smuzhiyun 		vcm_tim->vcm_end_t.tv_usec = dev_vcm->end_move_tv.tv_usec;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 		dev_dbg(&client->dev, "dw9800w_get_move_res 0x%lx, 0x%lx, 0x%lx, 0x%lx\n",
421*4882a593Smuzhiyun 			vcm_tim->vcm_start_t.tv_sec,
422*4882a593Smuzhiyun 			vcm_tim->vcm_start_t.tv_usec,
423*4882a593Smuzhiyun 			vcm_tim->vcm_end_t.tv_sec,
424*4882a593Smuzhiyun 			vcm_tim->vcm_end_t.tv_usec);
425*4882a593Smuzhiyun 	} else if (cmd == RK_VIDIOC_GET_VCM_CFG) {
426*4882a593Smuzhiyun 		vcm_cfg = (struct rk_cam_vcm_cfg *)arg;
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 		vcm_cfg->start_ma = dev_vcm->vcm_cfg.start_ma;
429*4882a593Smuzhiyun 		vcm_cfg->rated_ma = dev_vcm->vcm_cfg.rated_ma;
430*4882a593Smuzhiyun 		vcm_cfg->step_mode = dev_vcm->vcm_cfg.step_mode;
431*4882a593Smuzhiyun 	} else if (cmd == RK_VIDIOC_SET_VCM_CFG) {
432*4882a593Smuzhiyun 		vcm_cfg = (struct rk_cam_vcm_cfg *)arg;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 		if (vcm_cfg->start_ma == 0 && vcm_cfg->rated_ma == 0) {
435*4882a593Smuzhiyun 			dev_err(&client->dev,
436*4882a593Smuzhiyun 				"vcm_cfg err, start_ma %d, rated_ma %d\n",
437*4882a593Smuzhiyun 				vcm_cfg->start_ma, vcm_cfg->rated_ma);
438*4882a593Smuzhiyun 			return -EINVAL;
439*4882a593Smuzhiyun 		}
440*4882a593Smuzhiyun 		dev_vcm->vcm_cfg.start_ma = vcm_cfg->start_ma;
441*4882a593Smuzhiyun 		dev_vcm->vcm_cfg.rated_ma = vcm_cfg->rated_ma;
442*4882a593Smuzhiyun 		dev_vcm->vcm_cfg.step_mode = vcm_cfg->step_mode;
443*4882a593Smuzhiyun 		dw9800w_update_vcm_cfg(dev_vcm);
444*4882a593Smuzhiyun 	} else {
445*4882a593Smuzhiyun 		dev_err(&client->dev,
446*4882a593Smuzhiyun 			"cmd 0x%x not supported\n", cmd);
447*4882a593Smuzhiyun 		return -EINVAL;
448*4882a593Smuzhiyun 	}
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	return ret;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
dw9800w_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)454*4882a593Smuzhiyun static long dw9800w_compat_ioctl32(struct v4l2_subdev *sd,
455*4882a593Smuzhiyun 	unsigned int cmd, unsigned long arg)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun 	struct dw9800w_device *dev_vcm = sd_to_dw9800w_vcm(sd);
458*4882a593Smuzhiyun 	struct i2c_client *client = dev_vcm->client;
459*4882a593Smuzhiyun 	void __user *up = compat_ptr(arg);
460*4882a593Smuzhiyun 	struct rk_cam_compat_vcm_tim compat_vcm_tim;
461*4882a593Smuzhiyun 	struct rk_cam_vcm_tim vcm_tim;
462*4882a593Smuzhiyun 	struct rk_cam_vcm_cfg vcm_cfg;
463*4882a593Smuzhiyun 	long ret;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	if (cmd == RK_VIDIOC_COMPAT_VCM_TIMEINFO) {
466*4882a593Smuzhiyun 		struct rk_cam_compat_vcm_tim __user *p32 = up;
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 		ret = dw9800w_ioctl(sd, RK_VIDIOC_VCM_TIMEINFO, &vcm_tim);
469*4882a593Smuzhiyun 		compat_vcm_tim.vcm_start_t.tv_sec = vcm_tim.vcm_start_t.tv_sec;
470*4882a593Smuzhiyun 		compat_vcm_tim.vcm_start_t.tv_usec = vcm_tim.vcm_start_t.tv_usec;
471*4882a593Smuzhiyun 		compat_vcm_tim.vcm_end_t.tv_sec = vcm_tim.vcm_end_t.tv_sec;
472*4882a593Smuzhiyun 		compat_vcm_tim.vcm_end_t.tv_usec = vcm_tim.vcm_end_t.tv_usec;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 		put_user(compat_vcm_tim.vcm_start_t.tv_sec,
475*4882a593Smuzhiyun 			&p32->vcm_start_t.tv_sec);
476*4882a593Smuzhiyun 		put_user(compat_vcm_tim.vcm_start_t.tv_usec,
477*4882a593Smuzhiyun 			&p32->vcm_start_t.tv_usec);
478*4882a593Smuzhiyun 		put_user(compat_vcm_tim.vcm_end_t.tv_sec,
479*4882a593Smuzhiyun 			&p32->vcm_end_t.tv_sec);
480*4882a593Smuzhiyun 		put_user(compat_vcm_tim.vcm_end_t.tv_usec,
481*4882a593Smuzhiyun 			&p32->vcm_end_t.tv_usec);
482*4882a593Smuzhiyun 	} else if (cmd == RK_VIDIOC_GET_VCM_CFG) {
483*4882a593Smuzhiyun 		ret = dw9800w_ioctl(sd, RK_VIDIOC_GET_VCM_CFG, &vcm_cfg);
484*4882a593Smuzhiyun 		if (!ret) {
485*4882a593Smuzhiyun 			ret = copy_to_user(up, &vcm_cfg, sizeof(vcm_cfg));
486*4882a593Smuzhiyun 			if (ret)
487*4882a593Smuzhiyun 				ret = -EFAULT;
488*4882a593Smuzhiyun 		}
489*4882a593Smuzhiyun 	} else if (cmd == RK_VIDIOC_SET_VCM_CFG) {
490*4882a593Smuzhiyun 		ret = copy_from_user(&vcm_cfg, up, sizeof(vcm_cfg));
491*4882a593Smuzhiyun 		if (!ret)
492*4882a593Smuzhiyun 			ret = dw9800w_ioctl(sd, cmd, &vcm_cfg);
493*4882a593Smuzhiyun 		else
494*4882a593Smuzhiyun 			ret = -EFAULT;
495*4882a593Smuzhiyun 	} else {
496*4882a593Smuzhiyun 		dev_err(&client->dev,
497*4882a593Smuzhiyun 			"cmd 0x%x not supported\n", cmd);
498*4882a593Smuzhiyun 		return -EINVAL;
499*4882a593Smuzhiyun 	}
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	return ret;
502*4882a593Smuzhiyun }
503*4882a593Smuzhiyun #endif
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun static const struct v4l2_subdev_core_ops dw9800w_core_ops = {
506*4882a593Smuzhiyun 	.ioctl = dw9800w_ioctl,
507*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
508*4882a593Smuzhiyun 	.compat_ioctl32 = dw9800w_compat_ioctl32
509*4882a593Smuzhiyun #endif
510*4882a593Smuzhiyun };
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun static const struct v4l2_subdev_ops dw9800w_ops = {
513*4882a593Smuzhiyun 	.core = &dw9800w_core_ops,
514*4882a593Smuzhiyun };
515*4882a593Smuzhiyun 
dw9800w_subdev_cleanup(struct dw9800w_device * dw9800w_dev)516*4882a593Smuzhiyun static void dw9800w_subdev_cleanup(struct dw9800w_device *dw9800w_dev)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun 	v4l2_device_unregister_subdev(&dw9800w_dev->sd);
519*4882a593Smuzhiyun 	v4l2_device_unregister(&dw9800w_dev->vdev);
520*4882a593Smuzhiyun 	v4l2_ctrl_handler_free(&dw9800w_dev->ctrls_vcm);
521*4882a593Smuzhiyun 	media_entity_cleanup(&dw9800w_dev->sd.entity);
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun 
dw9800w_init_controls(struct dw9800w_device * dev_vcm)524*4882a593Smuzhiyun static int dw9800w_init_controls(struct dw9800w_device *dev_vcm)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun 	struct v4l2_ctrl_handler *hdl = &dev_vcm->ctrls_vcm;
527*4882a593Smuzhiyun 	const struct v4l2_ctrl_ops *ops = &dw9800w_vcm_ctrl_ops;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	v4l2_ctrl_handler_init(hdl, 1);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	v4l2_ctrl_new_std(hdl, ops, V4L2_CID_FOCUS_ABSOLUTE,
532*4882a593Smuzhiyun 			  0, VCMDRV_MAX_LOG, 1, 32);
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	if (hdl->error)
535*4882a593Smuzhiyun 		dev_err(dev_vcm->sd.dev, "%s fail error: 0x%x\n",
536*4882a593Smuzhiyun 			__func__, hdl->error);
537*4882a593Smuzhiyun 	dev_vcm->sd.ctrl_handler = hdl;
538*4882a593Smuzhiyun 	return hdl->error;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun 
__dw9800w_set_power(struct dw9800w_device * dw9800w_dev,bool on)541*4882a593Smuzhiyun static int __dw9800w_set_power(struct dw9800w_device *dw9800w_dev, bool on)
542*4882a593Smuzhiyun {
543*4882a593Smuzhiyun 	if (dw9800w_dev->power_gpio)
544*4882a593Smuzhiyun 		gpiod_direction_output(dw9800w_dev->power_gpio, on);
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	return 0;
547*4882a593Smuzhiyun }
548*4882a593Smuzhiyun 
dw9800w_check_id(struct dw9800w_device * dw9800w_dev)549*4882a593Smuzhiyun static int dw9800w_check_id(struct dw9800w_device *dw9800w_dev)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun 	int ret = 0;
552*4882a593Smuzhiyun 	unsigned int pid = 0x00;
553*4882a593Smuzhiyun 	struct i2c_client *client = dw9800w_dev->client;
554*4882a593Smuzhiyun 	struct device *dev = &client->dev;
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	__dw9800w_set_power(dw9800w_dev, true);
557*4882a593Smuzhiyun 	ret = dw9800w_read_reg(client, DW9800W_REG_CHIP_ID, 1, &pid);
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun 	if (pid != DW9800W_CHIP_ID) {
560*4882a593Smuzhiyun 		dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", pid, ret);
561*4882a593Smuzhiyun 		return -ENODEV;
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	dev_info(&dw9800w_dev->client->dev,
565*4882a593Smuzhiyun 		 "Detected dw9800w vcm id:0x%x\n", DW9800W_CHIP_ID);
566*4882a593Smuzhiyun 	return 0;
567*4882a593Smuzhiyun }
dw9800w_probe_init(struct i2c_client * client)568*4882a593Smuzhiyun static int dw9800w_probe_init(struct i2c_client *client)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun 	int ret = 0;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	/* Default goto power down mode when finished probe */
573*4882a593Smuzhiyun 	ret = dw9800w_write_reg(client, 0x02, 1, 0x01);
574*4882a593Smuzhiyun 	if (ret)
575*4882a593Smuzhiyun 		goto err;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	return 0;
578*4882a593Smuzhiyun err:
579*4882a593Smuzhiyun 	dev_err(&client->dev, "probe init failed with error %d\n", ret);
580*4882a593Smuzhiyun 	return -1;
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun 
dw9800w_probe(struct i2c_client * client,const struct i2c_device_id * id)583*4882a593Smuzhiyun static int dw9800w_probe(struct i2c_client *client,
584*4882a593Smuzhiyun 			const struct i2c_device_id *id)
585*4882a593Smuzhiyun {
586*4882a593Smuzhiyun 	struct device_node *np = of_node_get(client->dev.of_node);
587*4882a593Smuzhiyun 	struct dw9800w_device *dw9800w_dev;
588*4882a593Smuzhiyun 	unsigned int max_ma, start_ma, rated_ma, step_mode;
589*4882a593Smuzhiyun 	unsigned int t_src, t_div;
590*4882a593Smuzhiyun 	struct v4l2_subdev *sd;
591*4882a593Smuzhiyun 	char facing[2];
592*4882a593Smuzhiyun 	int ret;
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	dev_info(&client->dev, "probing...\n");
595*4882a593Smuzhiyun 	if (of_property_read_u32(np,
596*4882a593Smuzhiyun 		OF_CAMERA_VCMDRV_MAX_CURRENT,
597*4882a593Smuzhiyun 		(unsigned int *)&max_ma)) {
598*4882a593Smuzhiyun 		max_ma = DW9800W_MAX_CURRENT;
599*4882a593Smuzhiyun 		dev_info(&client->dev,
600*4882a593Smuzhiyun 			"could not get module %s from dts!\n",
601*4882a593Smuzhiyun 			OF_CAMERA_VCMDRV_MAX_CURRENT);
602*4882a593Smuzhiyun 	}
603*4882a593Smuzhiyun 	if (max_ma == 0)
604*4882a593Smuzhiyun 		max_ma = DW9800W_MAX_CURRENT;
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun 	if (of_property_read_u32(np,
607*4882a593Smuzhiyun 		OF_CAMERA_VCMDRV_START_CURRENT,
608*4882a593Smuzhiyun 		(unsigned int *)&start_ma)) {
609*4882a593Smuzhiyun 		start_ma = DW9800W_DEFAULT_START_CURRENT;
610*4882a593Smuzhiyun 		dev_info(&client->dev,
611*4882a593Smuzhiyun 			"could not get module %s from dts!\n",
612*4882a593Smuzhiyun 			OF_CAMERA_VCMDRV_START_CURRENT);
613*4882a593Smuzhiyun 	}
614*4882a593Smuzhiyun 	if (of_property_read_u32(np,
615*4882a593Smuzhiyun 		OF_CAMERA_VCMDRV_RATED_CURRENT,
616*4882a593Smuzhiyun 		(unsigned int *)&rated_ma)) {
617*4882a593Smuzhiyun 		rated_ma = DW9800W_DEFAULT_RATED_CURRENT;
618*4882a593Smuzhiyun 		dev_info(&client->dev,
619*4882a593Smuzhiyun 			"could not get module %s from dts!\n",
620*4882a593Smuzhiyun 			OF_CAMERA_VCMDRV_RATED_CURRENT);
621*4882a593Smuzhiyun 	}
622*4882a593Smuzhiyun 	if (of_property_read_u32(np,
623*4882a593Smuzhiyun 		OF_CAMERA_VCMDRV_STEP_MODE,
624*4882a593Smuzhiyun 		(unsigned int *)&step_mode)) {
625*4882a593Smuzhiyun 		step_mode = DW9800W_DEFAULT_STEP_MODE;
626*4882a593Smuzhiyun 		dev_info(&client->dev,
627*4882a593Smuzhiyun 			"could not get module %s from dts!\n",
628*4882a593Smuzhiyun 			OF_CAMERA_VCMDRV_STEP_MODE);
629*4882a593Smuzhiyun 	}
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	if (of_property_read_u32(np,
632*4882a593Smuzhiyun 		OF_CAMERA_VCMDRV_T_SRC,
633*4882a593Smuzhiyun 		(unsigned int *)&t_src)) {
634*4882a593Smuzhiyun 		t_src = DW9800W_DEFAULT_T_SACT;
635*4882a593Smuzhiyun 		dev_info(&client->dev,
636*4882a593Smuzhiyun 			"could not get module %s from dts!\n",
637*4882a593Smuzhiyun 			OF_CAMERA_VCMDRV_T_SRC);
638*4882a593Smuzhiyun 	}
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun 	if (of_property_read_u32(np,
641*4882a593Smuzhiyun 		OF_CAMERA_VCMDRV_T_DIV,
642*4882a593Smuzhiyun 		(unsigned int *)&t_div)) {
643*4882a593Smuzhiyun 		t_div = DW9800W_DEFAULT_T_DIV;
644*4882a593Smuzhiyun 		dev_info(&client->dev,
645*4882a593Smuzhiyun 			"could not get module %s from dts!\n",
646*4882a593Smuzhiyun 			OF_CAMERA_VCMDRV_T_DIV);
647*4882a593Smuzhiyun 	}
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun 	dw9800w_dev = devm_kzalloc(&client->dev, sizeof(*dw9800w_dev),
650*4882a593Smuzhiyun 				  GFP_KERNEL);
651*4882a593Smuzhiyun 	if (dw9800w_dev == NULL)
652*4882a593Smuzhiyun 		return -ENOMEM;
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	ret = of_property_read_u32(np, RKMODULE_CAMERA_MODULE_INDEX,
655*4882a593Smuzhiyun 				   &dw9800w_dev->module_index);
656*4882a593Smuzhiyun 	ret |= of_property_read_string(np, RKMODULE_CAMERA_MODULE_FACING,
657*4882a593Smuzhiyun 				       &dw9800w_dev->module_facing);
658*4882a593Smuzhiyun 	if (ret) {
659*4882a593Smuzhiyun 		dev_err(&client->dev,
660*4882a593Smuzhiyun 			"could not get module information!\n");
661*4882a593Smuzhiyun 		return -EINVAL;
662*4882a593Smuzhiyun 	}
663*4882a593Smuzhiyun 	dw9800w_dev->client = client;
664*4882a593Smuzhiyun 	dw9800w_dev->power_gpio = devm_gpiod_get(&client->dev,
665*4882a593Smuzhiyun 					"power", GPIOD_OUT_LOW);
666*4882a593Smuzhiyun 	if (IS_ERR(dw9800w_dev->power_gpio)) {
667*4882a593Smuzhiyun 		dw9800w_dev->power_gpio = NULL;
668*4882a593Smuzhiyun 		dev_warn(&client->dev,
669*4882a593Smuzhiyun 			"Failed to get power-gpios, maybe no use\n");
670*4882a593Smuzhiyun 	}
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	ret = dw9800w_check_id(dw9800w_dev);
673*4882a593Smuzhiyun 	if (ret)
674*4882a593Smuzhiyun 		goto err_power_off;
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	/* enter power down mode */
677*4882a593Smuzhiyun 	dw9800w_probe_init(client);
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	v4l2_i2c_subdev_init(&dw9800w_dev->sd, client, &dw9800w_ops);
680*4882a593Smuzhiyun 	dw9800w_dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
681*4882a593Smuzhiyun 	dw9800w_dev->sd.internal_ops = &dw9800w_int_ops;
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	ret = dw9800w_init_controls(dw9800w_dev);
684*4882a593Smuzhiyun 	if (ret)
685*4882a593Smuzhiyun 		goto err_cleanup;
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 	ret = media_entity_pads_init(&dw9800w_dev->sd.entity, 0, NULL);
688*4882a593Smuzhiyun 	if (ret < 0)
689*4882a593Smuzhiyun 		goto err_cleanup;
690*4882a593Smuzhiyun 
691*4882a593Smuzhiyun 	sd = &dw9800w_dev->sd;
692*4882a593Smuzhiyun 	sd->entity.function = MEDIA_ENT_F_LENS;
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 	memset(facing, 0, sizeof(facing));
695*4882a593Smuzhiyun 	if (strcmp(dw9800w_dev->module_facing, "back") == 0)
696*4882a593Smuzhiyun 		facing[0] = 'b';
697*4882a593Smuzhiyun 	else
698*4882a593Smuzhiyun 		facing[0] = 'f';
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
701*4882a593Smuzhiyun 		 dw9800w_dev->module_index, facing,
702*4882a593Smuzhiyun 		 DW9800W_NAME, dev_name(sd->dev));
703*4882a593Smuzhiyun 	ret = v4l2_async_register_subdev(sd);
704*4882a593Smuzhiyun 	if (ret)
705*4882a593Smuzhiyun 		dev_err(&client->dev, "v4l2 async register subdev failed\n");
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	dw9800w_dev->max_ma = max_ma;
708*4882a593Smuzhiyun 	dw9800w_dev->vcm_cfg.start_ma = start_ma;
709*4882a593Smuzhiyun 	dw9800w_dev->vcm_cfg.rated_ma = rated_ma;
710*4882a593Smuzhiyun 	dw9800w_dev->vcm_cfg.step_mode = step_mode;
711*4882a593Smuzhiyun 	dw9800w_update_vcm_cfg(dw9800w_dev);
712*4882a593Smuzhiyun 	dw9800w_dev->move_us	= 0;
713*4882a593Smuzhiyun 	dw9800w_dev->current_related_pos = VCMDRV_MAX_LOG;
714*4882a593Smuzhiyun 	dw9800w_dev->start_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
715*4882a593Smuzhiyun 	dw9800w_dev->end_move_tv = ns_to_kernel_old_timeval(ktime_get_ns());
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	dw9800w_dev->t_src = t_src;
718*4882a593Smuzhiyun 	dw9800w_dev->t_div = t_div;
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	i2c_set_clientdata(client, dw9800w_dev);
721*4882a593Smuzhiyun 	mutex_init(&dw9800w_dev->lock);
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	dw9800w_dev->vcm_movefull_t =
724*4882a593Smuzhiyun 		dw9800w_move_time(dw9800w_dev, DW9800W_MAX_REG);
725*4882a593Smuzhiyun 	pm_runtime_set_active(&client->dev);
726*4882a593Smuzhiyun 	pm_runtime_enable(&client->dev);
727*4882a593Smuzhiyun 	pm_runtime_idle(&client->dev);
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	dev_info(&client->dev, "probing successful\n");
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	return 0;
732*4882a593Smuzhiyun err_cleanup:
733*4882a593Smuzhiyun 	dw9800w_subdev_cleanup(dw9800w_dev);
734*4882a593Smuzhiyun err_power_off:
735*4882a593Smuzhiyun 	__dw9800w_set_power(dw9800w_dev, false);
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	dev_err(&client->dev, "Probe failed: %d\n", ret);
738*4882a593Smuzhiyun 
739*4882a593Smuzhiyun 	return ret;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun 
dw9800w_remove(struct i2c_client * client)742*4882a593Smuzhiyun static int dw9800w_remove(struct i2c_client *client)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun 	struct dw9800w_device *dw9800w_dev = i2c_get_clientdata(client);
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun 	mutex_destroy(&dw9800w_dev->lock);
747*4882a593Smuzhiyun 	pm_runtime_disable(&client->dev);
748*4882a593Smuzhiyun 	dw9800w_subdev_cleanup(dw9800w_dev);
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun 	return 0;
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun 
dw9800w_init(struct i2c_client * client)753*4882a593Smuzhiyun static int dw9800w_init(struct i2c_client *client)
754*4882a593Smuzhiyun {
755*4882a593Smuzhiyun 	struct dw9800w_device *dev_vcm = i2c_get_clientdata(client);
756*4882a593Smuzhiyun 	int ret = 0;
757*4882a593Smuzhiyun 	u32 ring = 0;
758*4882a593Smuzhiyun 	u32 mode_val = 0;
759*4882a593Smuzhiyun 	u32 algo_time = 0;
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	/* Delay 200us~300us */
763*4882a593Smuzhiyun 	usleep_range(200, 300);
764*4882a593Smuzhiyun 	ret = dw9800w_write_reg(client, 0x02, 1, 0x00);
765*4882a593Smuzhiyun 	if (ret)
766*4882a593Smuzhiyun 		goto err;
767*4882a593Smuzhiyun 	usleep_range(100, 200);
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 	if (dev_vcm->step_mode != DIRECT_MODE &&
770*4882a593Smuzhiyun 	    dev_vcm->step_mode != LSC_MODE)
771*4882a593Smuzhiyun 		ring = 0x02;
772*4882a593Smuzhiyun 	ret = dw9800w_write_reg(client, 0x02, 1, ring);
773*4882a593Smuzhiyun 	if (ret)
774*4882a593Smuzhiyun 		goto err;
775*4882a593Smuzhiyun 	switch (dev_vcm->step_mode) {
776*4882a593Smuzhiyun 	case SAC2_MODE:
777*4882a593Smuzhiyun 	case SAC3_MODE:
778*4882a593Smuzhiyun 	case SAC4_MODE:
779*4882a593Smuzhiyun 	case SAC5_MODE:
780*4882a593Smuzhiyun 		mode_val |= dev_vcm->step_mode << 6;
781*4882a593Smuzhiyun 		break;
782*4882a593Smuzhiyun 	case LSC_MODE:
783*4882a593Smuzhiyun 		mode_val |= 0x80;
784*4882a593Smuzhiyun 		break;
785*4882a593Smuzhiyun 	default:
786*4882a593Smuzhiyun 		break;
787*4882a593Smuzhiyun 	}
788*4882a593Smuzhiyun 	mode_val |= ((dev_vcm->t_div >> 2) & 0x01);
789*4882a593Smuzhiyun 	algo_time = dev_vcm->t_div << 6 | dev_vcm->t_src;
790*4882a593Smuzhiyun 	ret = dw9800w_write_reg(client, 0x06, 1, mode_val);
791*4882a593Smuzhiyun 	if (ret)
792*4882a593Smuzhiyun 		goto err;
793*4882a593Smuzhiyun 	ret = dw9800w_write_reg(client, 0x07, 1, algo_time);
794*4882a593Smuzhiyun 	if (ret)
795*4882a593Smuzhiyun 		goto err;
796*4882a593Smuzhiyun 	usleep_range(100, 200);
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	return 0;
799*4882a593Smuzhiyun err:
800*4882a593Smuzhiyun 	dev_err(&client->dev, "init failed with error %d\n", ret);
801*4882a593Smuzhiyun 	return -1;
802*4882a593Smuzhiyun }
803*4882a593Smuzhiyun 
dw9800w_vcm_suspend(struct device * dev)804*4882a593Smuzhiyun static int __maybe_unused dw9800w_vcm_suspend(struct device *dev)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
807*4882a593Smuzhiyun 	int ret = 0;
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun 	/* set to power down mode */
810*4882a593Smuzhiyun 	ret = dw9800w_write_reg(client, 0x02, 1, 0x01);
811*4882a593Smuzhiyun 	if (ret)
812*4882a593Smuzhiyun 		dev_err(&client->dev, "failed to set power down mode!\n");
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun 	return 0;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun 
dw9800w_vcm_resume(struct device * dev)817*4882a593Smuzhiyun static int __maybe_unused dw9800w_vcm_resume(struct device *dev)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
820*4882a593Smuzhiyun 	struct dw9800w_device *dev_vcm = i2c_get_clientdata(client);
821*4882a593Smuzhiyun 
822*4882a593Smuzhiyun 	dw9800w_init(client);
823*4882a593Smuzhiyun 	dw9800w_set_pos(dev_vcm, dev_vcm->current_related_pos);
824*4882a593Smuzhiyun 	return 0;
825*4882a593Smuzhiyun }
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun static const struct i2c_device_id dw9800w_id_table[] = {
828*4882a593Smuzhiyun 	{ DW9800W_NAME, 0 },
829*4882a593Smuzhiyun 	{ { 0 } }
830*4882a593Smuzhiyun };
831*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, dw9800w_id_table);
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun static const struct of_device_id dw9800w_of_table[] = {
834*4882a593Smuzhiyun 	{ .compatible = "dongwoon,dw9800w" },
835*4882a593Smuzhiyun 	{ { 0 } }
836*4882a593Smuzhiyun };
837*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, dw9800w_of_table);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun static const struct dev_pm_ops dw9800w_pm_ops = {
840*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(dw9800w_vcm_suspend, dw9800w_vcm_resume)
841*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(dw9800w_vcm_suspend, dw9800w_vcm_resume, NULL)
842*4882a593Smuzhiyun };
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun static struct i2c_driver dw9800w_i2c_driver = {
845*4882a593Smuzhiyun 	.driver = {
846*4882a593Smuzhiyun 		.name = DW9800W_NAME,
847*4882a593Smuzhiyun 		.pm = &dw9800w_pm_ops,
848*4882a593Smuzhiyun 		.of_match_table = dw9800w_of_table,
849*4882a593Smuzhiyun 	},
850*4882a593Smuzhiyun 	.probe = &dw9800w_probe,
851*4882a593Smuzhiyun 	.remove = &dw9800w_remove,
852*4882a593Smuzhiyun 	.id_table = dw9800w_id_table,
853*4882a593Smuzhiyun };
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun module_i2c_driver(dw9800w_i2c_driver);
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun MODULE_DESCRIPTION("DW9800W VCM driver");
858*4882a593Smuzhiyun MODULE_LICENSE("GPL");
859