1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * bt819 - BT819A VideoStream Decoder (Rockwell Part)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 1999 Mike Bernson <mike@mlb.org>
6*4882a593Smuzhiyun * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Modifications for LML33/DC10plus unified driver
9*4882a593Smuzhiyun * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
12*4882a593Smuzhiyun * - moved over to linux>=2.4.x i2c protocol (9/9/2002)
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * This code was modify/ported from the saa7111 driver written
15*4882a593Smuzhiyun * by Dave Perks.
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/types.h>
20*4882a593Smuzhiyun #include <linux/ioctl.h>
21*4882a593Smuzhiyun #include <linux/delay.h>
22*4882a593Smuzhiyun #include <linux/i2c.h>
23*4882a593Smuzhiyun #include <linux/videodev2.h>
24*4882a593Smuzhiyun #include <linux/slab.h>
25*4882a593Smuzhiyun #include <media/v4l2-device.h>
26*4882a593Smuzhiyun #include <media/v4l2-ctrls.h>
27*4882a593Smuzhiyun #include <media/i2c/bt819.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun MODULE_DESCRIPTION("Brooktree-819 video decoder driver");
30*4882a593Smuzhiyun MODULE_AUTHOR("Mike Bernson & Dave Perks");
31*4882a593Smuzhiyun MODULE_LICENSE("GPL");
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static int debug;
34*4882a593Smuzhiyun module_param(debug, int, 0);
35*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Debug level (0-1)");
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun struct bt819 {
41*4882a593Smuzhiyun struct v4l2_subdev sd;
42*4882a593Smuzhiyun struct v4l2_ctrl_handler hdl;
43*4882a593Smuzhiyun unsigned char reg[32];
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun v4l2_std_id norm;
46*4882a593Smuzhiyun int input;
47*4882a593Smuzhiyun int enable;
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun
to_bt819(struct v4l2_subdev * sd)50*4882a593Smuzhiyun static inline struct bt819 *to_bt819(struct v4l2_subdev *sd)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun return container_of(sd, struct bt819, sd);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
to_sd(struct v4l2_ctrl * ctrl)55*4882a593Smuzhiyun static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun return &container_of(ctrl->handler, struct bt819, hdl)->sd;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun struct timing {
61*4882a593Smuzhiyun int hactive;
62*4882a593Smuzhiyun int hdelay;
63*4882a593Smuzhiyun int vactive;
64*4882a593Smuzhiyun int vdelay;
65*4882a593Smuzhiyun int hscale;
66*4882a593Smuzhiyun int vscale;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun /* for values, see the bt819 datasheet */
70*4882a593Smuzhiyun static struct timing timing_data[] = {
71*4882a593Smuzhiyun {864 - 24, 20, 625 - 2, 1, 0x0504, 0x0000},
72*4882a593Smuzhiyun {858 - 24, 20, 525 - 2, 1, 0x00f8, 0x0000},
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
76*4882a593Smuzhiyun
bt819_write(struct bt819 * decoder,u8 reg,u8 value)77*4882a593Smuzhiyun static inline int bt819_write(struct bt819 *decoder, u8 reg, u8 value)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&decoder->sd);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun decoder->reg[reg] = value;
82*4882a593Smuzhiyun return i2c_smbus_write_byte_data(client, reg, value);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
bt819_setbit(struct bt819 * decoder,u8 reg,u8 bit,u8 value)85*4882a593Smuzhiyun static inline int bt819_setbit(struct bt819 *decoder, u8 reg, u8 bit, u8 value)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun return bt819_write(decoder, reg,
88*4882a593Smuzhiyun (decoder->reg[reg] & ~(1 << bit)) | (value ? (1 << bit) : 0));
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
bt819_write_block(struct bt819 * decoder,const u8 * data,unsigned int len)91*4882a593Smuzhiyun static int bt819_write_block(struct bt819 *decoder, const u8 *data, unsigned int len)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&decoder->sd);
94*4882a593Smuzhiyun int ret = -1;
95*4882a593Smuzhiyun u8 reg;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* the bt819 has an autoincrement function, use it if
98*4882a593Smuzhiyun * the adapter understands raw I2C */
99*4882a593Smuzhiyun if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
100*4882a593Smuzhiyun /* do raw I2C, not smbus compatible */
101*4882a593Smuzhiyun u8 block_data[32];
102*4882a593Smuzhiyun int block_len;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun while (len >= 2) {
105*4882a593Smuzhiyun block_len = 0;
106*4882a593Smuzhiyun block_data[block_len++] = reg = data[0];
107*4882a593Smuzhiyun do {
108*4882a593Smuzhiyun block_data[block_len++] =
109*4882a593Smuzhiyun decoder->reg[reg++] = data[1];
110*4882a593Smuzhiyun len -= 2;
111*4882a593Smuzhiyun data += 2;
112*4882a593Smuzhiyun } while (len >= 2 && data[0] == reg && block_len < 32);
113*4882a593Smuzhiyun ret = i2c_master_send(client, block_data, block_len);
114*4882a593Smuzhiyun if (ret < 0)
115*4882a593Smuzhiyun break;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun } else {
118*4882a593Smuzhiyun /* do some slow I2C emulation kind of thing */
119*4882a593Smuzhiyun while (len >= 2) {
120*4882a593Smuzhiyun reg = *data++;
121*4882a593Smuzhiyun ret = bt819_write(decoder, reg, *data++);
122*4882a593Smuzhiyun if (ret < 0)
123*4882a593Smuzhiyun break;
124*4882a593Smuzhiyun len -= 2;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return ret;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
bt819_read(struct bt819 * decoder,u8 reg)131*4882a593Smuzhiyun static inline int bt819_read(struct bt819 *decoder, u8 reg)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct i2c_client *client = v4l2_get_subdevdata(&decoder->sd);
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return i2c_smbus_read_byte_data(client, reg);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
bt819_init(struct v4l2_subdev * sd)138*4882a593Smuzhiyun static int bt819_init(struct v4l2_subdev *sd)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun static unsigned char init[] = {
141*4882a593Smuzhiyun /*0x1f, 0x00,*/ /* Reset */
142*4882a593Smuzhiyun 0x01, 0x59, /* 0x01 input format */
143*4882a593Smuzhiyun 0x02, 0x00, /* 0x02 temporal decimation */
144*4882a593Smuzhiyun 0x03, 0x12, /* 0x03 Cropping msb */
145*4882a593Smuzhiyun 0x04, 0x16, /* 0x04 Vertical Delay, lsb */
146*4882a593Smuzhiyun 0x05, 0xe0, /* 0x05 Vertical Active lsb */
147*4882a593Smuzhiyun 0x06, 0x80, /* 0x06 Horizontal Delay lsb */
148*4882a593Smuzhiyun 0x07, 0xd0, /* 0x07 Horizontal Active lsb */
149*4882a593Smuzhiyun 0x08, 0x00, /* 0x08 Horizontal Scaling msb */
150*4882a593Smuzhiyun 0x09, 0xf8, /* 0x09 Horizontal Scaling lsb */
151*4882a593Smuzhiyun 0x0a, 0x00, /* 0x0a Brightness control */
152*4882a593Smuzhiyun 0x0b, 0x30, /* 0x0b Miscellaneous control */
153*4882a593Smuzhiyun 0x0c, 0xd8, /* 0x0c Luma Gain lsb */
154*4882a593Smuzhiyun 0x0d, 0xfe, /* 0x0d Chroma Gain (U) lsb */
155*4882a593Smuzhiyun 0x0e, 0xb4, /* 0x0e Chroma Gain (V) msb */
156*4882a593Smuzhiyun 0x0f, 0x00, /* 0x0f Hue control */
157*4882a593Smuzhiyun 0x12, 0x04, /* 0x12 Output Format */
158*4882a593Smuzhiyun 0x13, 0x20, /* 0x13 Vertical Scaling msb 0x00
159*4882a593Smuzhiyun chroma comb OFF, line drop scaling, interlace scaling
160*4882a593Smuzhiyun BUG? Why does turning the chroma comb on screw up color?
161*4882a593Smuzhiyun Bug in the bt819 stepping on my board?
162*4882a593Smuzhiyun */
163*4882a593Smuzhiyun 0x14, 0x00, /* 0x14 Vertical Scaling lsb */
164*4882a593Smuzhiyun 0x16, 0x07, /* 0x16 Video Timing Polarity
165*4882a593Smuzhiyun ACTIVE=active low
166*4882a593Smuzhiyun FIELD: high=odd,
167*4882a593Smuzhiyun vreset=active high,
168*4882a593Smuzhiyun hreset=active high */
169*4882a593Smuzhiyun 0x18, 0x68, /* 0x18 AGC Delay */
170*4882a593Smuzhiyun 0x19, 0x5d, /* 0x19 Burst Gate Delay */
171*4882a593Smuzhiyun 0x1a, 0x80, /* 0x1a ADC Interface */
172*4882a593Smuzhiyun };
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun struct bt819 *decoder = to_bt819(sd);
175*4882a593Smuzhiyun struct timing *timing = &timing_data[(decoder->norm & V4L2_STD_525_60) ? 1 : 0];
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun init[0x03 * 2 - 1] =
178*4882a593Smuzhiyun (((timing->vdelay >> 8) & 0x03) << 6) |
179*4882a593Smuzhiyun (((timing->vactive >> 8) & 0x03) << 4) |
180*4882a593Smuzhiyun (((timing->hdelay >> 8) & 0x03) << 2) |
181*4882a593Smuzhiyun ((timing->hactive >> 8) & 0x03);
182*4882a593Smuzhiyun init[0x04 * 2 - 1] = timing->vdelay & 0xff;
183*4882a593Smuzhiyun init[0x05 * 2 - 1] = timing->vactive & 0xff;
184*4882a593Smuzhiyun init[0x06 * 2 - 1] = timing->hdelay & 0xff;
185*4882a593Smuzhiyun init[0x07 * 2 - 1] = timing->hactive & 0xff;
186*4882a593Smuzhiyun init[0x08 * 2 - 1] = timing->hscale >> 8;
187*4882a593Smuzhiyun init[0x09 * 2 - 1] = timing->hscale & 0xff;
188*4882a593Smuzhiyun /* 0x15 in array is address 0x19 */
189*4882a593Smuzhiyun init[0x15 * 2 - 1] = (decoder->norm & V4L2_STD_625_50) ? 115 : 93; /* Chroma burst delay */
190*4882a593Smuzhiyun /* reset */
191*4882a593Smuzhiyun bt819_write(decoder, 0x1f, 0x00);
192*4882a593Smuzhiyun mdelay(1);
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /* init */
195*4882a593Smuzhiyun return bt819_write_block(decoder, init, sizeof(init));
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
199*4882a593Smuzhiyun
bt819_status(struct v4l2_subdev * sd,u32 * pstatus,v4l2_std_id * pstd)200*4882a593Smuzhiyun static int bt819_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun struct bt819 *decoder = to_bt819(sd);
203*4882a593Smuzhiyun int status = bt819_read(decoder, 0x00);
204*4882a593Smuzhiyun int res = V4L2_IN_ST_NO_SIGNAL;
205*4882a593Smuzhiyun v4l2_std_id std = pstd ? *pstd : V4L2_STD_ALL;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if ((status & 0x80))
208*4882a593Smuzhiyun res = 0;
209*4882a593Smuzhiyun else
210*4882a593Smuzhiyun std = V4L2_STD_UNKNOWN;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if ((status & 0x10))
213*4882a593Smuzhiyun std &= V4L2_STD_PAL;
214*4882a593Smuzhiyun else
215*4882a593Smuzhiyun std &= V4L2_STD_NTSC;
216*4882a593Smuzhiyun if (pstd)
217*4882a593Smuzhiyun *pstd = std;
218*4882a593Smuzhiyun if (pstatus)
219*4882a593Smuzhiyun *pstatus = res;
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun v4l2_dbg(1, debug, sd, "get status %x\n", status);
222*4882a593Smuzhiyun return 0;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
bt819_querystd(struct v4l2_subdev * sd,v4l2_std_id * std)225*4882a593Smuzhiyun static int bt819_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun return bt819_status(sd, NULL, std);
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
bt819_g_input_status(struct v4l2_subdev * sd,u32 * status)230*4882a593Smuzhiyun static int bt819_g_input_status(struct v4l2_subdev *sd, u32 *status)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun return bt819_status(sd, status, NULL);
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
bt819_s_std(struct v4l2_subdev * sd,v4l2_std_id std)235*4882a593Smuzhiyun static int bt819_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun struct bt819 *decoder = to_bt819(sd);
238*4882a593Smuzhiyun struct timing *timing = NULL;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun v4l2_dbg(1, debug, sd, "set norm %llx\n", (unsigned long long)std);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun if (sd->v4l2_dev == NULL || sd->v4l2_dev->notify == NULL)
243*4882a593Smuzhiyun v4l2_err(sd, "no notify found!\n");
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun if (std & V4L2_STD_NTSC) {
246*4882a593Smuzhiyun v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, NULL);
247*4882a593Smuzhiyun bt819_setbit(decoder, 0x01, 0, 1);
248*4882a593Smuzhiyun bt819_setbit(decoder, 0x01, 1, 0);
249*4882a593Smuzhiyun bt819_setbit(decoder, 0x01, 5, 0);
250*4882a593Smuzhiyun bt819_write(decoder, 0x18, 0x68);
251*4882a593Smuzhiyun bt819_write(decoder, 0x19, 0x5d);
252*4882a593Smuzhiyun /* bt819_setbit(decoder, 0x1a, 5, 1); */
253*4882a593Smuzhiyun timing = &timing_data[1];
254*4882a593Smuzhiyun } else if (std & V4L2_STD_PAL) {
255*4882a593Smuzhiyun v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, NULL);
256*4882a593Smuzhiyun bt819_setbit(decoder, 0x01, 0, 1);
257*4882a593Smuzhiyun bt819_setbit(decoder, 0x01, 1, 1);
258*4882a593Smuzhiyun bt819_setbit(decoder, 0x01, 5, 1);
259*4882a593Smuzhiyun bt819_write(decoder, 0x18, 0x7f);
260*4882a593Smuzhiyun bt819_write(decoder, 0x19, 0x72);
261*4882a593Smuzhiyun /* bt819_setbit(decoder, 0x1a, 5, 0); */
262*4882a593Smuzhiyun timing = &timing_data[0];
263*4882a593Smuzhiyun } else {
264*4882a593Smuzhiyun v4l2_dbg(1, debug, sd, "unsupported norm %llx\n",
265*4882a593Smuzhiyun (unsigned long long)std);
266*4882a593Smuzhiyun return -EINVAL;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun bt819_write(decoder, 0x03,
269*4882a593Smuzhiyun (((timing->vdelay >> 8) & 0x03) << 6) |
270*4882a593Smuzhiyun (((timing->vactive >> 8) & 0x03) << 4) |
271*4882a593Smuzhiyun (((timing->hdelay >> 8) & 0x03) << 2) |
272*4882a593Smuzhiyun ((timing->hactive >> 8) & 0x03));
273*4882a593Smuzhiyun bt819_write(decoder, 0x04, timing->vdelay & 0xff);
274*4882a593Smuzhiyun bt819_write(decoder, 0x05, timing->vactive & 0xff);
275*4882a593Smuzhiyun bt819_write(decoder, 0x06, timing->hdelay & 0xff);
276*4882a593Smuzhiyun bt819_write(decoder, 0x07, timing->hactive & 0xff);
277*4882a593Smuzhiyun bt819_write(decoder, 0x08, (timing->hscale >> 8) & 0xff);
278*4882a593Smuzhiyun bt819_write(decoder, 0x09, timing->hscale & 0xff);
279*4882a593Smuzhiyun decoder->norm = std;
280*4882a593Smuzhiyun v4l2_subdev_notify(sd, BT819_FIFO_RESET_HIGH, NULL);
281*4882a593Smuzhiyun return 0;
282*4882a593Smuzhiyun }
283*4882a593Smuzhiyun
bt819_s_routing(struct v4l2_subdev * sd,u32 input,u32 output,u32 config)284*4882a593Smuzhiyun static int bt819_s_routing(struct v4l2_subdev *sd,
285*4882a593Smuzhiyun u32 input, u32 output, u32 config)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun struct bt819 *decoder = to_bt819(sd);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun v4l2_dbg(1, debug, sd, "set input %x\n", input);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (input > 7)
292*4882a593Smuzhiyun return -EINVAL;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (sd->v4l2_dev == NULL || sd->v4l2_dev->notify == NULL)
295*4882a593Smuzhiyun v4l2_err(sd, "no notify found!\n");
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun if (decoder->input != input) {
298*4882a593Smuzhiyun v4l2_subdev_notify(sd, BT819_FIFO_RESET_LOW, NULL);
299*4882a593Smuzhiyun decoder->input = input;
300*4882a593Smuzhiyun /* select mode */
301*4882a593Smuzhiyun if (decoder->input == 0) {
302*4882a593Smuzhiyun bt819_setbit(decoder, 0x0b, 6, 0);
303*4882a593Smuzhiyun bt819_setbit(decoder, 0x1a, 1, 1);
304*4882a593Smuzhiyun } else {
305*4882a593Smuzhiyun bt819_setbit(decoder, 0x0b, 6, 1);
306*4882a593Smuzhiyun bt819_setbit(decoder, 0x1a, 1, 0);
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun v4l2_subdev_notify(sd, BT819_FIFO_RESET_HIGH, NULL);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
bt819_s_stream(struct v4l2_subdev * sd,int enable)313*4882a593Smuzhiyun static int bt819_s_stream(struct v4l2_subdev *sd, int enable)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun struct bt819 *decoder = to_bt819(sd);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun v4l2_dbg(1, debug, sd, "enable output %x\n", enable);
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun if (decoder->enable != enable) {
320*4882a593Smuzhiyun decoder->enable = enable;
321*4882a593Smuzhiyun bt819_setbit(decoder, 0x16, 7, !enable);
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun return 0;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
bt819_s_ctrl(struct v4l2_ctrl * ctrl)326*4882a593Smuzhiyun static int bt819_s_ctrl(struct v4l2_ctrl *ctrl)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun struct v4l2_subdev *sd = to_sd(ctrl);
329*4882a593Smuzhiyun struct bt819 *decoder = to_bt819(sd);
330*4882a593Smuzhiyun int temp;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun switch (ctrl->id) {
333*4882a593Smuzhiyun case V4L2_CID_BRIGHTNESS:
334*4882a593Smuzhiyun bt819_write(decoder, 0x0a, ctrl->val);
335*4882a593Smuzhiyun break;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun case V4L2_CID_CONTRAST:
338*4882a593Smuzhiyun bt819_write(decoder, 0x0c, ctrl->val & 0xff);
339*4882a593Smuzhiyun bt819_setbit(decoder, 0x0b, 2, ((ctrl->val >> 8) & 0x01));
340*4882a593Smuzhiyun break;
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun case V4L2_CID_SATURATION:
343*4882a593Smuzhiyun bt819_write(decoder, 0x0d, (ctrl->val >> 7) & 0xff);
344*4882a593Smuzhiyun bt819_setbit(decoder, 0x0b, 1, ((ctrl->val >> 15) & 0x01));
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /* Ratio between U gain and V gain must stay the same as
347*4882a593Smuzhiyun the ratio between the default U and V gain values. */
348*4882a593Smuzhiyun temp = (ctrl->val * 180) / 254;
349*4882a593Smuzhiyun bt819_write(decoder, 0x0e, (temp >> 7) & 0xff);
350*4882a593Smuzhiyun bt819_setbit(decoder, 0x0b, 0, (temp >> 15) & 0x01);
351*4882a593Smuzhiyun break;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun case V4L2_CID_HUE:
354*4882a593Smuzhiyun bt819_write(decoder, 0x0f, ctrl->val);
355*4882a593Smuzhiyun break;
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun default:
358*4882a593Smuzhiyun return -EINVAL;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun return 0;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun static const struct v4l2_ctrl_ops bt819_ctrl_ops = {
366*4882a593Smuzhiyun .s_ctrl = bt819_s_ctrl,
367*4882a593Smuzhiyun };
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun static const struct v4l2_subdev_video_ops bt819_video_ops = {
370*4882a593Smuzhiyun .s_std = bt819_s_std,
371*4882a593Smuzhiyun .s_routing = bt819_s_routing,
372*4882a593Smuzhiyun .s_stream = bt819_s_stream,
373*4882a593Smuzhiyun .querystd = bt819_querystd,
374*4882a593Smuzhiyun .g_input_status = bt819_g_input_status,
375*4882a593Smuzhiyun };
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun static const struct v4l2_subdev_ops bt819_ops = {
378*4882a593Smuzhiyun .video = &bt819_video_ops,
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
382*4882a593Smuzhiyun
bt819_probe(struct i2c_client * client,const struct i2c_device_id * id)383*4882a593Smuzhiyun static int bt819_probe(struct i2c_client *client,
384*4882a593Smuzhiyun const struct i2c_device_id *id)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun int i, ver;
387*4882a593Smuzhiyun struct bt819 *decoder;
388*4882a593Smuzhiyun struct v4l2_subdev *sd;
389*4882a593Smuzhiyun const char *name;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun /* Check if the adapter supports the needed features */
392*4882a593Smuzhiyun if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
393*4882a593Smuzhiyun return -ENODEV;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
396*4882a593Smuzhiyun if (decoder == NULL)
397*4882a593Smuzhiyun return -ENOMEM;
398*4882a593Smuzhiyun sd = &decoder->sd;
399*4882a593Smuzhiyun v4l2_i2c_subdev_init(sd, client, &bt819_ops);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun ver = bt819_read(decoder, 0x17);
402*4882a593Smuzhiyun switch (ver & 0xf0) {
403*4882a593Smuzhiyun case 0x70:
404*4882a593Smuzhiyun name = "bt819a";
405*4882a593Smuzhiyun break;
406*4882a593Smuzhiyun case 0x60:
407*4882a593Smuzhiyun name = "bt817a";
408*4882a593Smuzhiyun break;
409*4882a593Smuzhiyun case 0x20:
410*4882a593Smuzhiyun name = "bt815a";
411*4882a593Smuzhiyun break;
412*4882a593Smuzhiyun default:
413*4882a593Smuzhiyun v4l2_dbg(1, debug, sd,
414*4882a593Smuzhiyun "unknown chip version 0x%02x\n", ver);
415*4882a593Smuzhiyun return -ENODEV;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun v4l_info(client, "%s found @ 0x%x (%s)\n", name,
419*4882a593Smuzhiyun client->addr << 1, client->adapter->name);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun decoder->norm = V4L2_STD_NTSC;
422*4882a593Smuzhiyun decoder->input = 0;
423*4882a593Smuzhiyun decoder->enable = 1;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun i = bt819_init(sd);
426*4882a593Smuzhiyun if (i < 0)
427*4882a593Smuzhiyun v4l2_dbg(1, debug, sd, "init status %d\n", i);
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun v4l2_ctrl_handler_init(&decoder->hdl, 4);
430*4882a593Smuzhiyun v4l2_ctrl_new_std(&decoder->hdl, &bt819_ctrl_ops,
431*4882a593Smuzhiyun V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
432*4882a593Smuzhiyun v4l2_ctrl_new_std(&decoder->hdl, &bt819_ctrl_ops,
433*4882a593Smuzhiyun V4L2_CID_CONTRAST, 0, 511, 1, 0xd8);
434*4882a593Smuzhiyun v4l2_ctrl_new_std(&decoder->hdl, &bt819_ctrl_ops,
435*4882a593Smuzhiyun V4L2_CID_SATURATION, 0, 511, 1, 0xfe);
436*4882a593Smuzhiyun v4l2_ctrl_new_std(&decoder->hdl, &bt819_ctrl_ops,
437*4882a593Smuzhiyun V4L2_CID_HUE, -128, 127, 1, 0);
438*4882a593Smuzhiyun sd->ctrl_handler = &decoder->hdl;
439*4882a593Smuzhiyun if (decoder->hdl.error) {
440*4882a593Smuzhiyun int err = decoder->hdl.error;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun v4l2_ctrl_handler_free(&decoder->hdl);
443*4882a593Smuzhiyun return err;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun v4l2_ctrl_handler_setup(&decoder->hdl);
446*4882a593Smuzhiyun return 0;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
bt819_remove(struct i2c_client * client)449*4882a593Smuzhiyun static int bt819_remove(struct i2c_client *client)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun struct v4l2_subdev *sd = i2c_get_clientdata(client);
452*4882a593Smuzhiyun struct bt819 *decoder = to_bt819(sd);
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun v4l2_device_unregister_subdev(sd);
455*4882a593Smuzhiyun v4l2_ctrl_handler_free(&decoder->hdl);
456*4882a593Smuzhiyun return 0;
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun /* ----------------------------------------------------------------------- */
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun static const struct i2c_device_id bt819_id[] = {
462*4882a593Smuzhiyun { "bt819a", 0 },
463*4882a593Smuzhiyun { "bt817a", 0 },
464*4882a593Smuzhiyun { "bt815a", 0 },
465*4882a593Smuzhiyun { }
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, bt819_id);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun static struct i2c_driver bt819_driver = {
470*4882a593Smuzhiyun .driver = {
471*4882a593Smuzhiyun .name = "bt819",
472*4882a593Smuzhiyun },
473*4882a593Smuzhiyun .probe = bt819_probe,
474*4882a593Smuzhiyun .remove = bt819_remove,
475*4882a593Smuzhiyun .id_table = bt819_id,
476*4882a593Smuzhiyun };
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun module_i2c_driver(bt819_driver);
479