1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ar0230 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 * V0.0X01.0X01 add enum_frame_interval function.
7 * V0.0X01.0X02 add quick stream on/off
8 */
9
10 #include <linux/clk.h>
11 #include <linux/device.h>
12 #include <linux/delay.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/slab.h>
19 #include <linux/sysfs.h>
20 #include <linux/version.h>
21 #include <linux/rk-camera-module.h>
22 #include <media/media-entity.h>
23 #include <media/v4l2-async.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-subdev.h>
26
27 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x02)
28
29 #ifndef V4L2_CID_DIGITAL_GAIN
30 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
31 #endif
32
33 /* 74.25Mhz */
34 #define AR0230_PIXEL_RATE (74250000)
35 #define AR0230_XVCLK_FREQ 24000000
36
37 #define CHIP_ID 0x3020
38 #define AR0230_REG_CHIP_ID 0x31fc
39
40 #define AR0230_REG_CTRL_MODE 0x301A
41 #define AR0230_MODE_SW_STANDBY 0x10D8
42 #define AR0230_MODE_STREAMING 0x10DC
43
44 #define AR0230_REG_EXPOSURE 0x3012
45 #define AR0230_EXPOSURE_MIN 0
46 #define AR0230_EXPOSURE_STEP 1
47 #define AR0230_VTS_MAX 0x044A
48
49 #define AR0230_REG_ANALOG_GAIN 0x3060
50 #define ANALOG_GAIN_MIN 0x0
51 #define ANALOG_GAIN_MAX 0xFB7
52 #define ANALOG_GAIN_STEP 1
53 #define ANALOG_GAIN_DEFAULT 0xC0
54
55 #define AR0230_REG_VTS 0x300a
56
57 #define AR0230_REG_ORIENTATION 0x3040
58 #define AR0230_ORIENTATION_H bit(14)
59 #define AR0230_ORIENTATION_V bit(15)
60
61 #define REG_NULL 0xFFFF
62 #define REG_DELAY 0xFFFE
63
64 #define AR0230_REG_VALUE_08BIT 1
65 #define AR0230_REG_VALUE_16BIT 2
66 #define AR0230_REG_VALUE_24BIT 3
67
68 #define USE_HDR_MODE
69
70 /* h_offs 35 v_offs 14 */
71 #define PIX_FORMAT MEDIA_BUS_FMT_SGRBG12_1X12
72
73 #define AR0230_NAME "ar0230"
74
75 struct cam_regulator {
76 char name[32];
77 int val;
78 };
79
80 static const struct cam_regulator ar0230_regulator[] = {
81 {"avdd", 2800000}, /* Analog power */
82 {"dovdd", 1800000}, /* Digital I/O power */
83 {"dvdd", 1800000}, /* Digital core power */
84 };
85
86 #define AR0230_NUM_SUPPLIES ARRAY_SIZE(ar0230_regulator)
87
88 struct regval {
89 u16 addr;
90 u16 val;
91 };
92
93 struct ar0230_mode {
94 u32 width;
95 u32 height;
96 struct v4l2_fract max_fps;
97 u32 hts_def;
98 u32 vts_def;
99 u32 exp_def;
100 const struct regval *reg_list;
101 };
102
103 struct ar0230 {
104 struct i2c_client *client;
105 struct clk *xvclk;
106 struct gpio_desc *reset_gpio;
107 struct gpio_desc *pwdn_gpio;
108 struct regulator_bulk_data supplies[AR0230_NUM_SUPPLIES];
109
110 struct v4l2_subdev subdev;
111 struct media_pad pad;
112 struct v4l2_ctrl_handler ctrl_handler;
113 struct v4l2_ctrl *exposure;
114 struct v4l2_ctrl *anal_gain;
115 struct v4l2_ctrl *digi_gain;
116 struct v4l2_ctrl *hblank;
117 struct v4l2_ctrl *vblank;
118 struct v4l2_ctrl *test_pattern;
119 struct mutex mutex;
120 bool streaming;
121 bool power_on;
122 const struct ar0230_mode *cur_mode;
123 u32 module_index;
124 const char *module_facing;
125 const char *module_name;
126 const char *len_name;
127 };
128
129 #define to_ar0230(sd) container_of(sd, struct ar0230, subdev)
130
131 /*
132 * Xclk 24Mhz
133 * Pclk 74.25Mhz
134 * linelength 0x469
135 * framelength 0x44a
136 * grabwindow_width 1920
137 * grabwindow_height 1080
138 * max_framerate 30fps
139 * dvp bt601 12bit
140 */
141 static const struct regval ar0230_regs[] = {
142 #ifdef USE_HDR_MODE
143 {0x301A, 0x0001},
144 {REG_DELAY, 20000},
145 {0x301A, 0x10D8},
146 {REG_DELAY, 20000},
147 {0x3088, 0x8000},
148 {0x3086, 0x4558},
149 {0x3086, 0x729B},
150 {0x3086, 0x4A31},
151 {0x3086, 0x4342},
152 {0x3086, 0x8E03},
153 {0x3086, 0x2A14},
154 {0x3086, 0x4578},
155 {0x3086, 0x7B3D},
156 {0x3086, 0xFF3D},
157 {0x3086, 0xFF3D},
158 {0x3086, 0xEA2A},
159 {0x3086, 0x043D},
160 {0x3086, 0x102A},
161 {0x3086, 0x052A},
162 {0x3086, 0x1535},
163 {0x3086, 0x2A05},
164 {0x3086, 0x3D10},
165 {0x3086, 0x4558},
166 {0x3086, 0x2A04},
167 {0x3086, 0x2A14},
168 {0x3086, 0x3DFF},
169 {0x3086, 0x3DFF},
170 {0x3086, 0x3DEA},
171 {0x3086, 0x2A04},
172 {0x3086, 0x622A},
173 {0x3086, 0x288E},
174 {0x3086, 0x0036},
175 {0x3086, 0x2A08},
176 {0x3086, 0x3D64},
177 {0x3086, 0x7A3D},
178 {0x3086, 0x0444},
179 {0x3086, 0x2C4B},
180 {0x3086, 0x8F00},
181 {0x3086, 0x430C},
182 {0x3086, 0x2D63},
183 {0x3086, 0x4316},
184 {0x3086, 0x8E03},
185 {0x3086, 0x2AFC},
186 {0x3086, 0x5C1D},
187 {0x3086, 0x5754},
188 {0x3086, 0x495F},
189 {0x3086, 0x5305},
190 {0x3086, 0x5307},
191 {0x3086, 0x4D2B},
192 {0x3086, 0xF810},
193 {0x3086, 0x164C},
194 {0x3086, 0x0855},
195 {0x3086, 0x562B},
196 {0x3086, 0xB82B},
197 {0x3086, 0x984E},
198 {0x3086, 0x1129},
199 {0x3086, 0x0429},
200 {0x3086, 0x8429},
201 {0x3086, 0x9460},
202 {0x3086, 0x5C19},
203 {0x3086, 0x5C1B},
204 {0x3086, 0x4548},
205 {0x3086, 0x4508},
206 {0x3086, 0x4588},
207 {0x3086, 0x29B6},
208 {0x3086, 0x8E01},
209 {0x3086, 0x2AF8},
210 {0x3086, 0x3E02},
211 {0x3086, 0x2AFA},
212 {0x3086, 0x3F09},
213 {0x3086, 0x5C1B},
214 {0x3086, 0x29B2},
215 {0x3086, 0x3F0C},
216 {0x3086, 0x3E02},
217 {0x3086, 0x3E13},
218 {0x3086, 0x5C13},
219 {0x3086, 0x3F11},
220 {0x3086, 0x3E0B},
221 {0x3086, 0x5F2B},
222 {0x3086, 0x902A},
223 {0x3086, 0xF22B},
224 {0x3086, 0x803E},
225 {0x3086, 0x043F},
226 {0x3086, 0x0660},
227 {0x3086, 0x29A2},
228 {0x3086, 0x29A3},
229 {0x3086, 0x5F4D},
230 {0x3086, 0x192A},
231 {0x3086, 0xFA29},
232 {0x3086, 0x8345},
233 {0x3086, 0xA83E},
234 {0x3086, 0x072A},
235 {0x3086, 0xFB3E},
236 {0x3086, 0x2945},
237 {0x3086, 0x8821},
238 {0x3086, 0x3E08},
239 {0x3086, 0x2AFA},
240 {0x3086, 0x5D29},
241 {0x3086, 0x9288},
242 {0x3086, 0x102B},
243 {0x3086, 0x048B},
244 {0x3086, 0x1685},
245 {0x3086, 0x8D48},
246 {0x3086, 0x4D4E},
247 {0x3086, 0x2B80},
248 {0x3086, 0x4C0B},
249 {0x3086, 0x603F},
250 {0x3086, 0x282A},
251 {0x3086, 0xF23F},
252 {0x3086, 0x0F29},
253 {0x3086, 0x8229},
254 {0x3086, 0x8329},
255 {0x3086, 0x435C},
256 {0x3086, 0x155F},
257 {0x3086, 0x4D19},
258 {0x3086, 0x2AFA},
259 {0x3086, 0x4558},
260 {0x3086, 0x8E00},
261 {0x3086, 0x2A98},
262 {0x3086, 0x3F06},
263 {0x3086, 0x1244},
264 {0x3086, 0x4A04},
265 {0x3086, 0x4316},
266 {0x3086, 0x0543},
267 {0x3086, 0x1658},
268 {0x3086, 0x4316},
269 {0x3086, 0x5A43},
270 {0x3086, 0x1606},
271 {0x3086, 0x4316},
272 {0x3086, 0x0743},
273 {0x3086, 0x168E},
274 {0x3086, 0x032A},
275 {0x3086, 0x9C45},
276 {0x3086, 0x787B},
277 {0x3086, 0x3F07},
278 {0x3086, 0x2A9D},
279 {0x3086, 0x3E2E},
280 {0x3086, 0x4558},
281 {0x3086, 0x253E},
282 {0x3086, 0x068E},
283 {0x3086, 0x012A},
284 {0x3086, 0x988E},
285 {0x3086, 0x0012},
286 {0x3086, 0x444B},
287 {0x3086, 0x0343},
288 {0x3086, 0x2D46},
289 {0x3086, 0x4316},
290 {0x3086, 0xA343},
291 {0x3086, 0x165D},
292 {0x3086, 0x0D29},
293 {0x3086, 0x4488},
294 {0x3086, 0x102B},
295 {0x3086, 0x0453},
296 {0x3086, 0x0D8B},
297 {0x3086, 0x1685},
298 {0x3086, 0x448E},
299 {0x3086, 0x032A},
300 {0x3086, 0xFC5C},
301 {0x3086, 0x1D8D},
302 {0x3086, 0x6057},
303 {0x3086, 0x5449},
304 {0x3086, 0x5F53},
305 {0x3086, 0x0553},
306 {0x3086, 0x074D},
307 {0x3086, 0x2BF8},
308 {0x3086, 0x1016},
309 {0x3086, 0x4C08},
310 {0x3086, 0x5556},
311 {0x3086, 0x2BB8},
312 {0x3086, 0x2B98},
313 {0x3086, 0x4E11},
314 {0x3086, 0x2904},
315 {0x3086, 0x2984},
316 {0x3086, 0x2994},
317 {0x3086, 0x605C},
318 {0x3086, 0x195C},
319 {0x3086, 0x1B45},
320 {0x3086, 0x4845},
321 {0x3086, 0x0845},
322 {0x3086, 0x8829},
323 {0x3086, 0xB68E},
324 {0x3086, 0x012A},
325 {0x3086, 0xF83E},
326 {0x3086, 0x022A},
327 {0x3086, 0xFA3F},
328 {0x3086, 0x095C},
329 {0x3086, 0x1B29},
330 {0x3086, 0xB23F},
331 {0x3086, 0x0C3E},
332 {0x3086, 0x023E},
333 {0x3086, 0x135C},
334 {0x3086, 0x133F},
335 {0x3086, 0x113E},
336 {0x3086, 0x0B5F},
337 {0x3086, 0x2B90},
338 {0x3086, 0x2AF2},
339 {0x3086, 0x2B80},
340 {0x3086, 0x3E04},
341 {0x3086, 0x3F06},
342 {0x3086, 0x6029},
343 {0x3086, 0xA229},
344 {0x3086, 0xA35F},
345 {0x3086, 0x4D1C},
346 {0x3086, 0x2AFA},
347 {0x3086, 0x2983},
348 {0x3086, 0x45A8},
349 {0x3086, 0x3E07},
350 {0x3086, 0x2AFB},
351 {0x3086, 0x3E29},
352 {0x3086, 0x4588},
353 {0x3086, 0x243E},
354 {0x3086, 0x082A},
355 {0x3086, 0xFA5D},
356 {0x3086, 0x2992},
357 {0x3086, 0x8810},
358 {0x3086, 0x2B04},
359 {0x3086, 0x8B16},
360 {0x3086, 0x868D},
361 {0x3086, 0x484D},
362 {0x3086, 0x4E2B},
363 {0x3086, 0x804C},
364 {0x3086, 0x0B60},
365 {0x3086, 0x3F28},
366 {0x3086, 0x2AF2},
367 {0x3086, 0x3F0F},
368 {0x3086, 0x2982},
369 {0x3086, 0x2983},
370 {0x3086, 0x2943},
371 {0x3086, 0x5C15},
372 {0x3086, 0x5F4D},
373 {0x3086, 0x1C2A},
374 {0x3086, 0xFA45},
375 {0x3086, 0x588E},
376 {0x3086, 0x002A},
377 {0x3086, 0x983F},
378 {0x3086, 0x064A},
379 {0x3086, 0x739D},
380 {0x3086, 0x0A43},
381 {0x3086, 0x160B},
382 {0x3086, 0x4316},
383 {0x3086, 0x8E03},
384 {0x3086, 0x2A9C},
385 {0x3086, 0x4578},
386 {0x3086, 0x3F07},
387 {0x3086, 0x2A9D},
388 {0x3086, 0x3E12},
389 {0x3086, 0x4558},
390 {0x3086, 0x3F04},
391 {0x3086, 0x8E01},
392 {0x3086, 0x2A98},
393 {0x3086, 0x8E00},
394 {0x3086, 0x9176},
395 {0x3086, 0x9C77},
396 {0x3086, 0x9C46},
397 {0x3086, 0x4416},
398 {0x3086, 0x1690},
399 {0x3086, 0x7A12},
400 {0x3086, 0x444B},
401 {0x3086, 0x4A00},
402 {0x3086, 0x4316},
403 {0x3086, 0x6343},
404 {0x3086, 0x1608},
405 {0x3086, 0x4316},
406 {0x3086, 0x5043},
407 {0x3086, 0x1665},
408 {0x3086, 0x4316},
409 {0x3086, 0x6643},
410 {0x3086, 0x168E},
411 {0x3086, 0x032A},
412 {0x3086, 0x9C45},
413 {0x3086, 0x783F},
414 {0x3086, 0x072A},
415 {0x3086, 0x9D5D},
416 {0x3086, 0x0C29},
417 {0x3086, 0x4488},
418 {0x3086, 0x102B},
419 {0x3086, 0x0453},
420 {0x3086, 0x0D8B},
421 {0x3086, 0x1686},
422 {0x3086, 0x3E1F},
423 {0x3086, 0x4558},
424 {0x3086, 0x283E},
425 {0x3086, 0x068E},
426 {0x3086, 0x012A},
427 {0x3086, 0x988E},
428 {0x3086, 0x008D},
429 {0x3086, 0x6012},
430 {0x3086, 0x444B},
431 {0x3086, 0x2C2C},
432 {0x3086, 0x2C2C},
433 {0x2436, 0x000E},
434 {0x320C, 0x0180},
435 {0x320E, 0x0300},
436 {0x3210, 0x0500},
437 {0x3204, 0x0B6D},
438 {0x30FE, 0x0080},
439 {0x3ED8, 0x7B99},
440 {0x3EDC, 0x9BA8},
441 {0x3EDA, 0x9B9B},
442 {0x3092, 0x006F},
443 {0x3EEC, 0x1C04},
444 {0x30BA, 0x779C},
445 {0x3EF6, 0xA70F},
446 {0x3044, 0x0410},
447 {0x3ED0, 0xFF44},
448 {0x3ED4, 0x031F},
449 {0x30FE, 0x0080},
450 {0x3EE2, 0x8866},
451 {0x3EE4, 0x6623},
452 {0x3EE6, 0x2263},
453 {0x30E0, 0x4283},
454 {0x30F0, 0x1283},
455 {0x30B0, 0x0118},
456 {0x31AC, 0x100C},
457 {0x3040, 0x0000},
458 {0x31AE, 0x0301},
459 {0x3082, 0x0008},
460 {0x31E0, 0x0200},
461 {0x2420, 0x0000},
462 {0x2440, 0x0004},
463 {0x2442, 0x0080},
464 {0x301E, 0x0000},
465 {0x2450, 0x0000},
466 {0x320A, 0x0080},
467 {0x31D0, 0x0000},
468 {0x2400, 0x0002},
469 {0x2410, 0x0005},
470 {0x2412, 0x002D},
471 {0x2444, 0xF400},
472 {0x2446, 0x0001},
473 {0x2438, 0x0010},
474 {0x243A, 0x0012},
475 {0x243C, 0xFFFF},
476 {0x243E, 0x0100},
477 {0x3206, 0x0B08},
478 {0x3208, 0x1E13},
479 {0x3202, 0x0080},
480 {0x3200, 0x0002},
481 {0x3190, 0x0000},
482 {0x318A, 0x0E74},
483 {0x318C, 0xC000},
484 {0x3192, 0x0400},
485 {0x3198, 0x183C},
486 {0x3060, 0x000B},
487 {0x3096, 0x0480},
488 {0x3098, 0x0480},
489 {0x3206, 0x0B08},
490 {0x3208, 0x1E13},
491 {0x3202, 0x0080},
492 {0x3200, 0x0002},
493 {0x3100, 0x0000},
494 {0x30BA, 0x779C},
495 {0x318E, 0x0200},
496 {0x3064, 0x1982},
497 {0x3064, 0x1802},
498 {0x302A, 0x0008},
499 {0x302C, 0x0001},
500 {0x302E, 0x0008},
501 {0x3030, 0x00C6},
502 {0x3036, 0x0006},
503 {0x3038, 0x0001},
504 {0x31AE, 0x0301},
505 {0x30BA, 0x769C},
506 {0x3002, 0x0004},
507 {0x3004, 0x000c},
508 {0x3006, 0x043b},
509 {0x3008, 0x078b},
510 {0x300A, 0x044A},
511 {0x300C, 0x0469},
512 {0x3012, 0x0148},
513 {0x3180, 0x0008},
514 {0x3062, 0x2333},
515 {0x30B0, 0x0118},
516 {0x30A2, 0x0001},
517 {0x30A6, 0x0001},
518 {0x3082, 0x0008},
519 {0x3040, 0x0000},
520 {0x318E, 0x0000},
521 #else
522 {0x301A, 0x0001},
523 {REG_DELAY, 20000},
524 {0x301A, 0x10D8},
525 {REG_DELAY, 20000},
526 {0x3088, 0x8242},
527 {0x3086, 0x4558},
528 {0x3086, 0x729B},
529 {0x3086, 0x4A31},
530 {0x3086, 0x4342},
531 {0x3086, 0x8E03},
532 {0x3086, 0x2A14},
533 {0x3086, 0x4578},
534 {0x3086, 0x7B3D},
535 {0x3086, 0xFF3D},
536 {0x3086, 0xFF3D},
537 {0x3086, 0xEA2A},
538 {0x3086, 0x043D},
539 {0x3086, 0x102A},
540 {0x3086, 0x052A},
541 {0x3086, 0x1535},
542 {0x3086, 0x2A05},
543 {0x3086, 0x3D10},
544 {0x3086, 0x4558},
545 {0x3086, 0x2A04},
546 {0x3086, 0x2A14},
547 {0x3086, 0x3DFF},
548 {0x3086, 0x3DFF},
549 {0x3086, 0x3DEA},
550 {0x3086, 0x2A04},
551 {0x3086, 0x622A},
552 {0x3086, 0x288E},
553 {0x3086, 0x0036},
554 {0x3086, 0x2A08},
555 {0x3086, 0x3D64},
556 {0x3086, 0x7A3D},
557 {0x3086, 0x0444},
558 {0x3086, 0x2C4B},
559 {0x3086, 0x8F03},
560 {0x3086, 0x430D},
561 {0x3086, 0x2D46},
562 {0x3086, 0x4316},
563 {0x3086, 0x5F16},
564 {0x3086, 0x530D},
565 {0x3086, 0x1660},
566 {0x3086, 0x3E4C},
567 {0x3086, 0x2904},
568 {0x3086, 0x2984},
569 {0x3086, 0x8E03},
570 {0x3086, 0x2AFC},
571 {0x3086, 0x5C1D},
572 {0x3086, 0x5754},
573 {0x3086, 0x495F},
574 {0x3086, 0x5305},
575 {0x3086, 0x5307},
576 {0x3086, 0x4D2B},
577 {0x3086, 0xF810},
578 {0x3086, 0x164C},
579 {0x3086, 0x0955},
580 {0x3086, 0x562B},
581 {0x3086, 0xB82B},
582 {0x3086, 0x984E},
583 {0x3086, 0x1129},
584 {0x3086, 0x9460},
585 {0x3086, 0x5C19},
586 {0x3086, 0x5C1B},
587 {0x3086, 0x4548},
588 {0x3086, 0x4508},
589 {0x3086, 0x4588},
590 {0x3086, 0x29B6},
591 {0x3086, 0x8E01},
592 {0x3086, 0x2AF8},
593 {0x3086, 0x1702},
594 {0x3086, 0x2AFA},
595 {0x3086, 0x1709},
596 {0x3086, 0x5C1B},
597 {0x3086, 0x29B2},
598 {0x3086, 0x170C},
599 {0x3086, 0x1703},
600 {0x3086, 0x1715},
601 {0x3086, 0x5C13},
602 {0x3086, 0x1711},
603 {0x3086, 0x170F},
604 {0x3086, 0x5F2B},
605 {0x3086, 0x902A},
606 {0x3086, 0xF22B},
607 {0x3086, 0x8017},
608 {0x3086, 0x0617},
609 {0x3086, 0x0660},
610 {0x3086, 0x29A2},
611 {0x3086, 0x29A3},
612 {0x3086, 0x5F4D},
613 {0x3086, 0x1C2A},
614 {0x3086, 0xFA29},
615 {0x3086, 0x8345},
616 {0x3086, 0xA817},
617 {0x3086, 0x072A},
618 {0x3086, 0xFB17},
619 {0x3086, 0x2945},
620 {0x3086, 0x8824},
621 {0x3086, 0x1708},
622 {0x3086, 0x2AFA},
623 {0x3086, 0x5D29},
624 {0x3086, 0x9288},
625 {0x3086, 0x102B},
626 {0x3086, 0x048B},
627 {0x3086, 0x1686},
628 {0x3086, 0x8D48},
629 {0x3086, 0x4D4E},
630 {0x3086, 0x2B80},
631 {0x3086, 0x4C0B},
632 {0x3086, 0x6017},
633 {0x3086, 0x302A},
634 {0x3086, 0xF217},
635 {0x3086, 0x1017},
636 {0x3086, 0x8F29},
637 {0x3086, 0x8229},
638 {0x3086, 0x8329},
639 {0x3086, 0x435C},
640 {0x3086, 0x155F},
641 {0x3086, 0x4D1C},
642 {0x3086, 0x2AFA},
643 {0x3086, 0x4558},
644 {0x3086, 0x8E00},
645 {0x3086, 0x2A98},
646 {0x3086, 0x170A},
647 {0x3086, 0x4A0A},
648 {0x3086, 0x4316},
649 {0x3086, 0x0B43},
650 {0x3086, 0x168E},
651 {0x3086, 0x032A},
652 {0x3086, 0x9C45},
653 {0x3086, 0x7817},
654 {0x3086, 0x072A},
655 {0x3086, 0x9D17},
656 {0x3086, 0x305D},
657 {0x3086, 0x2944},
658 {0x3086, 0x8810},
659 {0x3086, 0x2B04},
660 {0x3086, 0x530D},
661 {0x3086, 0x4558},
662 {0x3086, 0x1708},
663 {0x3086, 0x8E01},
664 {0x3086, 0x2A98},
665 {0x3086, 0x8E00},
666 {0x3086, 0x769C},
667 {0x3086, 0x779C},
668 {0x3086, 0x4644},
669 {0x3086, 0x1616},
670 {0x3086, 0x907A},
671 {0x3086, 0x1244},
672 {0x3086, 0x4B18},
673 {0x3086, 0x4A04},
674 {0x3086, 0x4316},
675 {0x3086, 0x0643},
676 {0x3086, 0x1605},
677 {0x3086, 0x4316},
678 {0x3086, 0x0743},
679 {0x3086, 0x1658},
680 {0x3086, 0x4316},
681 {0x3086, 0x5A43},
682 {0x3086, 0x1645},
683 {0x3086, 0x588E},
684 {0x3086, 0x032A},
685 {0x3086, 0x9C45},
686 {0x3086, 0x787B},
687 {0x3086, 0x1707},
688 {0x3086, 0x2A9D},
689 {0x3086, 0x530D},
690 {0x3086, 0x8B16},
691 {0x3086, 0x8617},
692 {0x3086, 0x2345},
693 {0x3086, 0x5825},
694 {0x3086, 0x1710},
695 {0x3086, 0x8E01},
696 {0x3086, 0x2A98},
697 {0x3086, 0x8E00},
698 {0x3086, 0x1710},
699 {0x3086, 0x8D60},
700 {0x3086, 0x1244},
701 {0x3086, 0x4B2C},
702 {0x3086, 0x2C2C},
703 {0x2436, 0x000E},
704 {0x320C, 0x0180},
705 {0x320E, 0x0300},
706 {0x3210, 0x0500},
707 {0x3204, 0x0B6D},
708 {0x30FE, 0x0080},
709 {0x3ED8, 0x7B99},
710 {0x3EDC, 0x9BA8},
711 {0x3EDA, 0x9B9B},
712 {0x3092, 0x006F},
713 {0x3EEC, 0x1C04},
714 {0x30BA, 0x779C},
715 {0x3EF6, 0xA70F},
716 {0x3044, 0x0410},
717 {0x3ED0, 0xFF44},
718 {0x3ED4, 0x031F},
719 {0x30FE, 0x0080},
720 {0x3EE2, 0x8866},
721 {0x3EE4, 0x6623},
722 {0x3EE6, 0x2263},
723 {0x30E0, 0x4283},
724 {0x30F0, 0x1283},
725 {0x30B0, 0x0118},
726 {0x31AC, 0x0C0C},
727 {0x3040, 0x0000},
728 {0x31AE, 0x0301},
729 {0x3082, 0x0009},
730 {0x30BA, 0x769C},
731 {0x31E0, 0x0200},
732 {0x318C, 0x0000},
733 {0x3060, 0x000B},
734 {0x3096, 0x0080},
735 {0x3098, 0x0080},
736 {0x3206, 0x0B08},
737 {0x3208, 0x1E13},
738 {0x3202, 0x0080},
739 {0x3200, 0x0002},
740 {0x3100, 0x0000},
741 {0x3200, 0x0000},
742 {0x31D0, 0x0000},
743 {0x2400, 0x0003},
744 {0x301E, 0x00A8},
745 {0x2450, 0x0000},
746 {0x320A, 0x0080},
747 {0x3064, 0x1982},
748 {0x3064, 0x1802},
749 {0x302A, 0x0008},
750 {0x302C, 0x0001},
751 {0x302E, 0x0008},
752 {0x3030, 0x00C6},
753 {0x3036, 0x0006},
754 {0x3038, 0x0001},
755 {0x31AE, 0x0301},
756 {0x30BA, 0x769C},
757 {0x3002, 0x0004},
758 {0x3004, 0x000C},
759 {0x3006, 0x043B},
760 {0x3008, 0x078B},
761 {0x300A, 0x0448},
762 {0x300C, 0x0469},
763 {0x3012, 0x03DA},
764 {0x3180, 0x0008},
765 {0x3062, 0x2333},
766 {0x30B0, 0x0118},
767 {0x30A2, 0x0001},
768 {0x30A6, 0x0001},
769 {0x3082, 0x0009},
770 {0x3040, 0x0000},
771 {0x318E, 0x0000},
772 {0x301A, 0x10D8},
773 #endif
774 {REG_NULL, 0x00},
775 };
776
777 static const struct ar0230_mode supported_modes[] = {
778 {
779 .width = 1920,
780 .height = 1080,
781 .max_fps = {
782 .numerator = 10000,
783 .denominator = 300000,
784 },
785 .exp_def = 0x0100,
786 .hts_def = 0x0469 * 2,
787 .vts_def = 0x044a,
788 .reg_list = ar0230_regs,
789 }
790 };
791
792 static const char * const ar0230_test_pattern_menu[] = {
793 "Disabled",
794 "Vertical Color Bar Type 1",
795 "Vertical Color Bar Type 2",
796 "Vertical Color Bar Type 3",
797 "Vertical Color Bar Type 4"
798 };
799
800 /* Write registers up to 4 at a time */
ar0230_write_reg(struct i2c_client * client,u16 reg,int len,u32 val)801 static int ar0230_write_reg(struct i2c_client *client, u16 reg,
802 int len, u32 val)
803 {
804 u32 buf_i, val_i;
805 u8 buf[6];
806 u8 *val_p;
807 __be32 val_be;
808
809 if (len > 4)
810 return -EINVAL;
811
812 buf[0] = reg >> 8;
813 buf[1] = reg & 0xff;
814
815 val_be = cpu_to_be32(val);
816 val_p = (u8 *)&val_be;
817 buf_i = 2;
818 val_i = 4 - len;
819
820 while (val_i < 4)
821 buf[buf_i++] = val_p[val_i++];
822 //printk("czf reg = 0x%04x, value = 0x%04x\n", reg, val);
823 if (i2c_master_send(client, buf, len + 2) != len + 2)
824 return -EIO;
825 usleep_range(10, 20);
826 return 0;
827 }
828
ar0230_write_array(struct i2c_client * client,const struct regval * regs)829 static int ar0230_write_array(struct i2c_client *client,
830 const struct regval *regs)
831 {
832 u32 i;
833 int ret = 0;
834
835 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
836 if (unlikely(regs[i].addr == REG_DELAY))
837 usleep_range(regs[i].val, regs[i].val * 2);
838 else
839 ret = ar0230_write_reg(client, regs[i].addr,
840 AR0230_REG_VALUE_16BIT,
841 regs[i].val);
842 }
843
844 return ret;
845 }
846
847 /* Read registers up to 4 at a time */
ar0230_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)848 static int ar0230_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
849 u32 *val)
850 {
851 struct i2c_msg msgs[2];
852 u8 *data_be_p;
853 __be32 data_be = 0;
854 __be16 reg_addr_be = cpu_to_be16(reg);
855 int ret;
856
857 if (len > 4 || !len)
858 return -EINVAL;
859
860 data_be_p = (u8 *)&data_be;
861 /* Write register address */
862 msgs[0].addr = client->addr;
863 msgs[0].flags = 0;
864 msgs[0].len = 2;
865 msgs[0].buf = (u8 *)®_addr_be;
866
867 /* Read data from register */
868 msgs[1].addr = client->addr;
869 msgs[1].flags = I2C_M_RD;
870 msgs[1].len = len;
871 msgs[1].buf = &data_be_p[4 - len];
872
873 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
874 if (ret != ARRAY_SIZE(msgs))
875 return -EIO;
876
877 *val = be32_to_cpu(data_be);
878
879 return 0;
880 }
881
ar0230_get_reso_dist(const struct ar0230_mode * mode,struct v4l2_mbus_framefmt * framefmt)882 static int ar0230_get_reso_dist(const struct ar0230_mode *mode,
883 struct v4l2_mbus_framefmt *framefmt)
884 {
885 return abs(mode->width - framefmt->width) +
886 abs(mode->height - framefmt->height);
887 }
888
889 static const struct ar0230_mode *
ar0230_find_best_fit(struct v4l2_subdev_format * fmt)890 ar0230_find_best_fit(struct v4l2_subdev_format *fmt)
891 {
892 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
893 int dist;
894 int cur_best_fit = 0;
895 int cur_best_fit_dist = -1;
896 u32 i;
897
898 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
899 dist = ar0230_get_reso_dist(&supported_modes[i], framefmt);
900 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
901 cur_best_fit_dist = dist;
902 cur_best_fit = i;
903 }
904 }
905
906 return &supported_modes[cur_best_fit];
907 }
908
ar0230_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)909 static int ar0230_set_fmt(struct v4l2_subdev *sd,
910 struct v4l2_subdev_pad_config *cfg,
911 struct v4l2_subdev_format *fmt)
912 {
913 struct ar0230 *ar0230 = to_ar0230(sd);
914 const struct ar0230_mode *mode;
915 s64 h_blank, vblank_def;
916
917 mutex_lock(&ar0230->mutex);
918
919 mode = ar0230_find_best_fit(fmt);
920 fmt->format.code = PIX_FORMAT;
921 fmt->format.width = mode->width;
922 fmt->format.height = mode->height;
923 fmt->format.field = V4L2_FIELD_NONE;
924 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
925 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
926 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
927 #else
928 mutex_unlock(&ar0230->mutex);
929 return -ENOTTY;
930 #endif
931 } else {
932 ar0230->cur_mode = mode;
933 h_blank = mode->hts_def - mode->width;
934 __v4l2_ctrl_modify_range(ar0230->hblank, h_blank,
935 h_blank, 1, h_blank);
936 vblank_def = mode->vts_def - mode->height;
937 __v4l2_ctrl_modify_range(ar0230->vblank, vblank_def,
938 AR0230_VTS_MAX - mode->height,
939 1, vblank_def);
940 }
941
942 mutex_unlock(&ar0230->mutex);
943
944 return 0;
945 }
946
ar0230_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)947 static int ar0230_get_fmt(struct v4l2_subdev *sd,
948 struct v4l2_subdev_pad_config *cfg,
949 struct v4l2_subdev_format *fmt)
950 {
951 struct ar0230 *ar0230 = to_ar0230(sd);
952 const struct ar0230_mode *mode = ar0230->cur_mode;
953
954 mutex_lock(&ar0230->mutex);
955 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
956 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
957 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
958 #else
959 mutex_unlock(&ar0230->mutex);
960 return -ENOTTY;
961 #endif
962 } else {
963 fmt->format.width = mode->width;
964 fmt->format.height = mode->height;
965 fmt->format.code = PIX_FORMAT;
966 fmt->format.field = V4L2_FIELD_NONE;
967 }
968 mutex_unlock(&ar0230->mutex);
969
970 return 0;
971 }
972
ar0230_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)973 static int ar0230_enum_mbus_code(struct v4l2_subdev *sd,
974 struct v4l2_subdev_pad_config *cfg,
975 struct v4l2_subdev_mbus_code_enum *code)
976 {
977 if (code->index != 0)
978 return -EINVAL;
979 code->code = PIX_FORMAT;
980
981 return 0;
982 }
983
ar0230_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)984 static int ar0230_enum_frame_sizes(struct v4l2_subdev *sd,
985 struct v4l2_subdev_pad_config *cfg,
986 struct v4l2_subdev_frame_size_enum *fse)
987 {
988 if (fse->index >= ARRAY_SIZE(supported_modes))
989 return -EINVAL;
990
991 if (fse->code != PIX_FORMAT)
992 return -EINVAL;
993
994 fse->min_width = supported_modes[fse->index].width;
995 fse->max_width = supported_modes[fse->index].width;
996 fse->max_height = supported_modes[fse->index].height;
997 fse->min_height = supported_modes[fse->index].height;
998
999 return 0;
1000 }
1001
ar0230_enable_test_pattern(struct ar0230 * ar0230,u32 pattern)1002 static int ar0230_enable_test_pattern(struct ar0230 *ar0230, u32 pattern)
1003 {
1004 return 0;
1005 }
1006
ar0230_get_module_inf(struct ar0230 * ar0230,struct rkmodule_inf * inf)1007 static void ar0230_get_module_inf(struct ar0230 *ar0230,
1008 struct rkmodule_inf *inf)
1009 {
1010 memset(inf, 0, sizeof(*inf));
1011 strlcpy(inf->base.sensor, AR0230_NAME, sizeof(inf->base.sensor));
1012 strlcpy(inf->base.module, ar0230->module_name,
1013 sizeof(inf->base.module));
1014 strlcpy(inf->base.lens, ar0230->len_name, sizeof(inf->base.lens));
1015 }
1016
ar0230_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1017 static long ar0230_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1018 {
1019 struct ar0230 *ar0230 = to_ar0230(sd);
1020 long ret = 0;
1021 u32 stream = 0;
1022
1023 switch (cmd) {
1024 case RKMODULE_GET_MODULE_INFO:
1025 ar0230_get_module_inf(ar0230, (struct rkmodule_inf *)arg);
1026 break;
1027 case RKMODULE_SET_QUICK_STREAM:
1028 stream = *((u32 *)arg);
1029 if (stream)
1030 ret = ar0230_write_reg(ar0230->client, AR0230_REG_CTRL_MODE,
1031 AR0230_REG_VALUE_16BIT, AR0230_MODE_STREAMING);
1032 else
1033 ret = ar0230_write_reg(ar0230->client, AR0230_REG_CTRL_MODE,
1034 AR0230_REG_VALUE_16BIT, AR0230_MODE_SW_STANDBY);
1035 break;
1036 default:
1037 ret = -ENOIOCTLCMD;
1038 break;
1039 }
1040
1041 return ret;
1042 }
1043
1044 #ifdef CONFIG_COMPAT
ar0230_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)1045 static long ar0230_compat_ioctl32(struct v4l2_subdev *sd,
1046 unsigned int cmd, unsigned long arg)
1047 {
1048 void __user *up = compat_ptr(arg);
1049 struct rkmodule_inf *inf;
1050 long ret;
1051 u32 stream = 0;
1052
1053 switch (cmd) {
1054 case RKMODULE_GET_MODULE_INFO:
1055 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
1056 if (!inf) {
1057 ret = -ENOMEM;
1058 return ret;
1059 }
1060
1061 ret = ar0230_ioctl(sd, cmd, inf);
1062 if (!ret)
1063 ret = copy_to_user(up, inf, sizeof(*inf));
1064 kfree(inf);
1065 break;
1066 case RKMODULE_SET_QUICK_STREAM:
1067 ret = copy_from_user(&stream, up, sizeof(u32));
1068 if (!ret)
1069 ret = ar0230_ioctl(sd, cmd, &stream);
1070 break;
1071 default:
1072 ret = -ENOIOCTLCMD;
1073 break;
1074 }
1075
1076 return ret;
1077 }
1078 #endif
1079
__ar0230_start_stream(struct ar0230 * ar0230)1080 static int __ar0230_start_stream(struct ar0230 *ar0230)
1081 {
1082 int ret;
1083
1084 ret = ar0230_write_array(ar0230->client, ar0230->cur_mode->reg_list);
1085 if (ret)
1086 return ret;
1087
1088 /* In case these controls are set before streaming */
1089 mutex_unlock(&ar0230->mutex);
1090 ret = v4l2_ctrl_handler_setup(&ar0230->ctrl_handler);
1091 mutex_lock(&ar0230->mutex);
1092 if (ret)
1093 return ret;
1094
1095 return ar0230_write_reg(ar0230->client, AR0230_REG_CTRL_MODE,
1096 AR0230_REG_VALUE_16BIT, AR0230_MODE_STREAMING);
1097 }
1098
__ar0230_stop_stream(struct ar0230 * ar0230)1099 static int __ar0230_stop_stream(struct ar0230 *ar0230)
1100 {
1101 return ar0230_write_reg(ar0230->client, AR0230_REG_CTRL_MODE,
1102 AR0230_REG_VALUE_16BIT, AR0230_MODE_SW_STANDBY);
1103 }
1104
ar0230_s_stream(struct v4l2_subdev * sd,int on)1105 static int ar0230_s_stream(struct v4l2_subdev *sd, int on)
1106 {
1107 struct ar0230 *ar0230 = to_ar0230(sd);
1108 struct i2c_client *client = ar0230->client;
1109 int ret = 0;
1110
1111 mutex_lock(&ar0230->mutex);
1112 on = !!on;
1113 if (on == ar0230->streaming)
1114 goto unlock_and_return;
1115
1116 if (on) {
1117 ret = pm_runtime_get_sync(&client->dev);
1118 if (ret < 0) {
1119 pm_runtime_put_noidle(&client->dev);
1120 goto unlock_and_return;
1121 }
1122
1123 ret = __ar0230_start_stream(ar0230);
1124 if (ret) {
1125 v4l2_err(sd, "start stream failed while write regs\n");
1126 pm_runtime_put(&client->dev);
1127 goto unlock_and_return;
1128 }
1129 } else {
1130 __ar0230_stop_stream(ar0230);
1131 pm_runtime_put(&client->dev);
1132 }
1133
1134 ar0230->streaming = on;
1135 unlock_and_return:
1136 mutex_unlock(&ar0230->mutex);
1137
1138 return ret;
1139 }
1140
ar0230_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)1141 static int ar0230_g_frame_interval(struct v4l2_subdev *sd,
1142 struct v4l2_subdev_frame_interval *fi)
1143 {
1144 struct ar0230 *ar0230 = to_ar0230(sd);
1145 const struct ar0230_mode *mode = ar0230->cur_mode;
1146
1147 fi->interval = mode->max_fps;
1148
1149 return 0;
1150 }
1151
ar0230_s_power(struct v4l2_subdev * sd,int on)1152 static int ar0230_s_power(struct v4l2_subdev *sd, int on)
1153 {
1154 struct ar0230 *ar0230 = to_ar0230(sd);
1155 struct i2c_client *client = ar0230->client;
1156 int ret = 0;
1157
1158 mutex_lock(&ar0230->mutex);
1159
1160 /* If the power state is not modified - no work to do. */
1161 if (ar0230->power_on == !!on)
1162 goto unlock_and_return;
1163
1164 if (on) {
1165 ret = pm_runtime_get_sync(&client->dev);
1166 if (ret < 0) {
1167 pm_runtime_put_noidle(&client->dev);
1168 goto unlock_and_return;
1169 }
1170
1171 ar0230->power_on = true;
1172 } else {
1173 pm_runtime_put(&client->dev);
1174 ar0230->power_on = false;
1175 }
1176
1177 unlock_and_return:
1178 mutex_unlock(&ar0230->mutex);
1179
1180 return ret;
1181 }
1182
1183 /* Calculate the delay in us by clock rate and clock cycles */
ar0230_cal_delay(u32 cycles)1184 static inline u32 ar0230_cal_delay(u32 cycles)
1185 {
1186 return DIV_ROUND_UP(cycles, AR0230_XVCLK_FREQ / 1000 / 1000);
1187 }
1188
__ar0230_power_on(struct ar0230 * ar0230)1189 static int __ar0230_power_on(struct ar0230 *ar0230)
1190 {
1191 int ret;
1192 u32 i, delay_us;
1193 struct device *dev = &ar0230->client->dev;
1194
1195 ret = clk_set_rate(ar0230->xvclk, AR0230_XVCLK_FREQ);
1196 if (ret < 0) {
1197 dev_err(dev, "Failed to set xvclk rate (%d)\n",
1198 AR0230_XVCLK_FREQ);
1199 return ret;
1200 }
1201 if (clk_get_rate(ar0230->xvclk) != AR0230_XVCLK_FREQ)
1202 dev_warn(dev, "xvclk mismatched, modes are based on %d\n",
1203 AR0230_XVCLK_FREQ);
1204 ret = clk_prepare_enable(ar0230->xvclk);
1205 if (ret < 0) {
1206 dev_err(dev, "Failed to enable xvclk\n");
1207 return ret;
1208 }
1209
1210 if (!IS_ERR(ar0230->reset_gpio))
1211 gpiod_set_value_cansleep(ar0230->reset_gpio, 0);
1212
1213 for (i = 0; i < AR0230_NUM_SUPPLIES; i++)
1214 regulator_set_voltage(ar0230->supplies[i].consumer,
1215 ar0230_regulator[i].val,
1216 ar0230_regulator[i].val);
1217
1218 ret = regulator_bulk_enable(AR0230_NUM_SUPPLIES, ar0230->supplies);
1219 if (ret < 0) {
1220 dev_err(dev, "Failed to enable regulators\n");
1221 goto disable_clk;
1222 }
1223
1224 if (!IS_ERR(ar0230->reset_gpio))
1225 gpiod_set_value_cansleep(ar0230->reset_gpio, 1);
1226
1227 if (!IS_ERR(ar0230->pwdn_gpio))
1228 gpiod_set_value_cansleep(ar0230->pwdn_gpio, 1);
1229
1230 /* 8192 cycles prior to first SCCB transaction */
1231 delay_us = ar0230_cal_delay(92000);
1232 usleep_range(delay_us, delay_us * 2);
1233
1234 return 0;
1235
1236 disable_clk:
1237 clk_disable_unprepare(ar0230->xvclk);
1238
1239 return ret;
1240 }
1241
__ar0230_power_off(struct ar0230 * ar0230)1242 static void __ar0230_power_off(struct ar0230 *ar0230)
1243 {
1244 if (!IS_ERR(ar0230->pwdn_gpio))
1245 gpiod_set_value_cansleep(ar0230->pwdn_gpio, 0);
1246 clk_disable_unprepare(ar0230->xvclk);
1247 if (!IS_ERR(ar0230->reset_gpio))
1248 gpiod_set_value_cansleep(ar0230->reset_gpio, 0);
1249 regulator_bulk_disable(AR0230_NUM_SUPPLIES, ar0230->supplies);
1250 }
1251
ar0230_runtime_resume(struct device * dev)1252 static int ar0230_runtime_resume(struct device *dev)
1253 {
1254 struct i2c_client *client = to_i2c_client(dev);
1255 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1256 struct ar0230 *ar0230 = to_ar0230(sd);
1257
1258 return __ar0230_power_on(ar0230);
1259 }
1260
ar0230_runtime_suspend(struct device * dev)1261 static int ar0230_runtime_suspend(struct device *dev)
1262 {
1263 struct i2c_client *client = to_i2c_client(dev);
1264 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1265 struct ar0230 *ar0230 = to_ar0230(sd);
1266
1267 __ar0230_power_off(ar0230);
1268
1269 return 0;
1270 }
1271
1272 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ar0230_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1273 static int ar0230_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1274 {
1275 struct ar0230 *ar0230 = to_ar0230(sd);
1276 struct v4l2_mbus_framefmt *try_fmt =
1277 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1278 const struct ar0230_mode *def_mode = &supported_modes[0];
1279
1280 mutex_lock(&ar0230->mutex);
1281 /* Initialize try_fmt */
1282 try_fmt->width = def_mode->width;
1283 try_fmt->height = def_mode->height;
1284 try_fmt->code = PIX_FORMAT;
1285 try_fmt->field = V4L2_FIELD_NONE;
1286 mutex_unlock(&ar0230->mutex);
1287 /* No crop or compose */
1288
1289 return 0;
1290 }
1291 #endif
1292
ar0230_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)1293 static int ar0230_g_mbus_config(struct v4l2_subdev *sd, unsigned int pad_id,
1294 struct v4l2_mbus_config *config)
1295 {
1296 config->type = V4L2_MBUS_PARALLEL;
1297 config->flags = V4L2_MBUS_HSYNC_ACTIVE_HIGH |
1298 V4L2_MBUS_VSYNC_ACTIVE_HIGH |
1299 V4L2_MBUS_PCLK_SAMPLE_FALLING;
1300 return 0;
1301 }
1302
ar0230_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1303 static int ar0230_enum_frame_interval(struct v4l2_subdev *sd,
1304 struct v4l2_subdev_pad_config *cfg,
1305 struct v4l2_subdev_frame_interval_enum *fie)
1306 {
1307 if (fie->index >= ARRAY_SIZE(supported_modes))
1308 return -EINVAL;
1309
1310 fie->code = PIX_FORMAT;
1311 fie->width = supported_modes[fie->index].width;
1312 fie->height = supported_modes[fie->index].height;
1313 fie->interval = supported_modes[fie->index].max_fps;
1314 return 0;
1315 }
1316
1317 static const struct dev_pm_ops ar0230_pm_ops = {
1318 SET_RUNTIME_PM_OPS(ar0230_runtime_suspend,
1319 ar0230_runtime_resume, NULL)
1320 };
1321
1322 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1323 static const struct v4l2_subdev_internal_ops ar0230_internal_ops = {
1324 .open = ar0230_open,
1325 };
1326 #endif
1327
1328 static const struct v4l2_subdev_core_ops ar0230_core_ops = {
1329 .s_power = ar0230_s_power,
1330 .ioctl = ar0230_ioctl,
1331 #ifdef CONFIG_COMPAT
1332 .compat_ioctl32 = ar0230_compat_ioctl32,
1333 #endif
1334 };
1335
1336 static const struct v4l2_subdev_video_ops ar0230_video_ops = {
1337 .s_stream = ar0230_s_stream,
1338 .g_frame_interval = ar0230_g_frame_interval,
1339 };
1340
1341 static const struct v4l2_subdev_pad_ops ar0230_pad_ops = {
1342 .enum_mbus_code = ar0230_enum_mbus_code,
1343 .enum_frame_size = ar0230_enum_frame_sizes,
1344 .enum_frame_interval = ar0230_enum_frame_interval,
1345 .get_fmt = ar0230_get_fmt,
1346 .set_fmt = ar0230_set_fmt,
1347 .get_mbus_config = ar0230_g_mbus_config,
1348 };
1349
1350 static const struct v4l2_subdev_ops ar0230_subdev_ops = {
1351 .core = &ar0230_core_ops,
1352 .video = &ar0230_video_ops,
1353 .pad = &ar0230_pad_ops,
1354 };
1355
ar0230_set_gain(struct ar0230 * ar0230,int gain)1356 static int ar0230_set_gain(struct ar0230 *ar0230, int gain)
1357 {
1358 int ret = 0;
1359 u32 again = 0;
1360
1361 if (gain < 192)
1362 gain = 192;
1363 if (gain < 256) {
1364 again = (u32)(32 - (32 * 128 / gain));
1365 ret = ar0230_write_reg(ar0230->client, 0x3100,
1366 AR0230_REG_VALUE_16BIT, 0);
1367 ret |= ar0230_write_reg(ar0230->client, AR0230_REG_ANALOG_GAIN,
1368 AR0230_REG_VALUE_16BIT, again);
1369 } else if (gain >= 256 && gain < 345) {
1370 again = (u32)(32 - (64 * 128 / gain));
1371 again |= 0x0010;
1372 ret = ar0230_write_reg(ar0230->client, 0x3100,
1373 AR0230_REG_VALUE_16BIT, 0);
1374 ret |= ar0230_write_reg(ar0230->client, AR0230_REG_ANALOG_GAIN,
1375 AR0230_REG_VALUE_16BIT, again);
1376 } else if (gain >= 345 && gain < 691) {
1377 again = (u32)(32 - (32 * 345 / gain));
1378 ret = ar0230_write_reg(ar0230->client, 0x3100,
1379 AR0230_REG_VALUE_16BIT, 4);
1380 ret |= ar0230_write_reg(ar0230->client, AR0230_REG_ANALOG_GAIN,
1381 AR0230_REG_VALUE_16BIT, again);
1382 } else if (gain >= 691 && gain < 1382) {
1383 again = (u32)(32 - (64 * 345 / gain));
1384 again |= 0x0010;
1385 ret = ar0230_write_reg(ar0230->client, 0x3100,
1386 AR0230_REG_VALUE_16BIT, 4);
1387 ret |= ar0230_write_reg(ar0230->client, AR0230_REG_ANALOG_GAIN,
1388 AR0230_REG_VALUE_16BIT, again);
1389 } else if (gain >= 1382 && gain < 2764) {
1390 again = (u32)(32 - (128 * 345 / gain));
1391 again |= 0x0020;
1392 ret = ar0230_write_reg(ar0230->client, 0x3100,
1393 AR0230_REG_VALUE_16BIT, 4);
1394 ret |= ar0230_write_reg(ar0230->client, AR0230_REG_ANALOG_GAIN,
1395 AR0230_REG_VALUE_16BIT, again);
1396 } else if (gain >= 2764 && gain < 4023) {
1397 again = (u32)(32 - (256 * 345 / gain));
1398 again |= 0x0030;
1399 ret = ar0230_write_reg(ar0230->client, 0x3100,
1400 AR0230_REG_VALUE_16BIT, 4);
1401 ret |= ar0230_write_reg(ar0230->client, AR0230_REG_ANALOG_GAIN,
1402 AR0230_REG_VALUE_16BIT, again);
1403 }
1404 return ret;
1405 }
1406
ar0230_set_ctrl(struct v4l2_ctrl * ctrl)1407 static int ar0230_set_ctrl(struct v4l2_ctrl *ctrl)
1408 {
1409 struct ar0230 *ar0230 = container_of(ctrl->handler,
1410 struct ar0230, ctrl_handler);
1411 struct i2c_client *client = ar0230->client;
1412 int ret = 0;
1413
1414 if (!pm_runtime_get_if_in_use(&client->dev))
1415 return 0;
1416
1417 switch (ctrl->id) {
1418 case V4L2_CID_EXPOSURE:
1419 ret = ar0230_write_reg(ar0230->client, AR0230_REG_EXPOSURE,
1420 AR0230_REG_VALUE_16BIT, ctrl->val);
1421 break;
1422 case V4L2_CID_ANALOGUE_GAIN:
1423 ret = ar0230_set_gain(ar0230, ctrl->val);
1424 break;
1425 case V4L2_CID_VBLANK:
1426 ret = ar0230_write_reg(ar0230->client, AR0230_REG_VTS,
1427 AR0230_REG_VALUE_16BIT,
1428 ctrl->val + ar0230->cur_mode->height);
1429 break;
1430 case V4L2_CID_TEST_PATTERN:
1431 ret = ar0230_enable_test_pattern(ar0230, ctrl->val);
1432 break;
1433 default:
1434 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1435 __func__, ctrl->id, ctrl->val);
1436 break;
1437 }
1438
1439 pm_runtime_put(&client->dev);
1440
1441 return ret;
1442 }
1443
1444 static const struct v4l2_ctrl_ops ar0230_ctrl_ops = {
1445 .s_ctrl = ar0230_set_ctrl,
1446 };
1447
ar0230_initialize_controls(struct ar0230 * ar0230)1448 static int ar0230_initialize_controls(struct ar0230 *ar0230)
1449 {
1450 const struct ar0230_mode *mode;
1451 struct v4l2_ctrl_handler *handler;
1452 s64 exposure_max, vblank_def;
1453 u32 h_blank;
1454 int ret;
1455
1456 handler = &ar0230->ctrl_handler;
1457 mode = ar0230->cur_mode;
1458 ret = v4l2_ctrl_handler_init(handler, 8);
1459 if (ret)
1460 return ret;
1461 handler->lock = &ar0230->mutex;
1462
1463 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1464 0, AR0230_PIXEL_RATE, 1, AR0230_PIXEL_RATE);
1465
1466 h_blank = mode->hts_def - mode->width;
1467 ar0230->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1468 h_blank, h_blank, 1, h_blank);
1469 if (ar0230->hblank)
1470 ar0230->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1471
1472 vblank_def = mode->vts_def - mode->height;
1473 ar0230->vblank = v4l2_ctrl_new_std(handler, &ar0230_ctrl_ops,
1474 V4L2_CID_VBLANK, vblank_def,
1475 AR0230_VTS_MAX - mode->height,
1476 1, vblank_def);
1477
1478 exposure_max = mode->vts_def - 1;
1479 ar0230->exposure = v4l2_ctrl_new_std(handler, &ar0230_ctrl_ops,
1480 V4L2_CID_EXPOSURE, AR0230_EXPOSURE_MIN,
1481 exposure_max, AR0230_EXPOSURE_STEP,
1482 mode->exp_def);
1483
1484 ar0230->anal_gain = v4l2_ctrl_new_std(handler, &ar0230_ctrl_ops,
1485 V4L2_CID_ANALOGUE_GAIN, ANALOG_GAIN_MIN,
1486 ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
1487 ANALOG_GAIN_DEFAULT);
1488
1489 ar0230->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1490 &ar0230_ctrl_ops, V4L2_CID_TEST_PATTERN,
1491 ARRAY_SIZE(ar0230_test_pattern_menu) - 1,
1492 0, 0, ar0230_test_pattern_menu);
1493
1494 if (handler->error) {
1495 ret = handler->error;
1496 dev_err(&ar0230->client->dev,
1497 "Failed to init controls(%d)\n", ret);
1498 goto err_free_handler;
1499 }
1500
1501 ar0230->subdev.ctrl_handler = handler;
1502
1503 return 0;
1504
1505 err_free_handler:
1506 v4l2_ctrl_handler_free(handler);
1507
1508 return ret;
1509 }
1510
ar0230_check_sensor_id(struct ar0230 * ar0230,struct i2c_client * client)1511 static int ar0230_check_sensor_id(struct ar0230 *ar0230,
1512 struct i2c_client *client)
1513 {
1514 struct device *dev = &ar0230->client->dev;
1515 u32 id = 0;
1516 int ret;
1517
1518 ret = ar0230_read_reg(client, AR0230_REG_CHIP_ID,
1519 AR0230_REG_VALUE_16BIT, &id);
1520 if (id != CHIP_ID) {
1521 dev_err(dev, "Unexpected sensor id(%x), ret(%d)\n", id, ret);
1522 return -ENODEV;
1523 }
1524
1525 dev_info(dev, "Detected AR0230 sensor\n");
1526
1527 return 0;
1528 }
1529
ar0230_configure_regulators(struct ar0230 * ar0230)1530 static int ar0230_configure_regulators(struct ar0230 *ar0230)
1531 {
1532 u32 i;
1533
1534 for (i = 0; i < AR0230_NUM_SUPPLIES; i++)
1535 ar0230->supplies[i].supply =
1536 ar0230_regulator[i].name;
1537
1538 return devm_regulator_bulk_get(&ar0230->client->dev,
1539 AR0230_NUM_SUPPLIES,
1540 ar0230->supplies);
1541 }
1542
ar0230_probe(struct i2c_client * client,const struct i2c_device_id * id)1543 static int ar0230_probe(struct i2c_client *client,
1544 const struct i2c_device_id *id)
1545 {
1546 struct device *dev = &client->dev;
1547 struct device_node *node = dev->of_node;
1548 struct ar0230 *ar0230;
1549 struct v4l2_subdev *sd;
1550 char facing[2];
1551 int ret;
1552
1553 dev_info(dev, "driver version: %02x.%02x.%02x",
1554 DRIVER_VERSION >> 16,
1555 (DRIVER_VERSION & 0xff00) >> 8,
1556 DRIVER_VERSION & 0x00ff);
1557
1558 ar0230 = devm_kzalloc(dev, sizeof(*ar0230), GFP_KERNEL);
1559 if (!ar0230)
1560 return -ENOMEM;
1561
1562 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1563 &ar0230->module_index);
1564 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1565 &ar0230->module_facing);
1566 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1567 &ar0230->module_name);
1568 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1569 &ar0230->len_name);
1570 if (ret) {
1571 dev_err(dev, "could not get module information!\n");
1572 return -EINVAL;
1573 }
1574
1575 ar0230->client = client;
1576 ar0230->cur_mode = &supported_modes[0];
1577
1578 ar0230->xvclk = devm_clk_get(dev, "xvclk");
1579 if (IS_ERR(ar0230->xvclk)) {
1580 dev_err(dev, "Failed to get xvclk\n");
1581 return -EINVAL;
1582 }
1583
1584 ar0230->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1585 if (IS_ERR(ar0230->reset_gpio))
1586 dev_warn(dev, "Failed to get reset-gpios\n");
1587
1588 ar0230->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1589 if (IS_ERR(ar0230->pwdn_gpio))
1590 dev_warn(dev, "Failed to get pwdn-gpios\n");
1591
1592 ret = ar0230_configure_regulators(ar0230);
1593 if (ret) {
1594 dev_err(dev, "Failed to get power regulators\n");
1595 return ret;
1596 }
1597
1598 mutex_init(&ar0230->mutex);
1599
1600 sd = &ar0230->subdev;
1601 v4l2_i2c_subdev_init(sd, client, &ar0230_subdev_ops);
1602 ret = ar0230_initialize_controls(ar0230);
1603 if (ret)
1604 goto err_destroy_mutex;
1605
1606 ret = __ar0230_power_on(ar0230);
1607 if (ret)
1608 goto err_free_handler;
1609
1610 ret = ar0230_check_sensor_id(ar0230, client);
1611 if (ret)
1612 goto err_power_off;
1613
1614 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1615 sd->internal_ops = &ar0230_internal_ops;
1616 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1617 V4L2_SUBDEV_FL_HAS_EVENTS;
1618 #endif
1619 #if defined(CONFIG_MEDIA_CONTROLLER)
1620 ar0230->pad.flags = MEDIA_PAD_FL_SOURCE;
1621 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1622 ret = media_entity_pads_init(&sd->entity, 1, &ar0230->pad);
1623 if (ret < 0)
1624 goto err_power_off;
1625 #endif
1626
1627 memset(facing, 0, sizeof(facing));
1628 if (strcmp(ar0230->module_facing, "back") == 0)
1629 facing[0] = 'b';
1630 else
1631 facing[0] = 'f';
1632
1633 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1634 ar0230->module_index, facing,
1635 AR0230_NAME, dev_name(sd->dev));
1636 ret = v4l2_async_register_subdev_sensor_common(sd);
1637 if (ret) {
1638 dev_err(dev, "v4l2 async register subdev failed\n");
1639 goto err_clean_entity;
1640 }
1641
1642 pm_runtime_set_active(dev);
1643 pm_runtime_enable(dev);
1644 pm_runtime_idle(dev);
1645
1646 return 0;
1647
1648 err_clean_entity:
1649 #if defined(CONFIG_MEDIA_CONTROLLER)
1650 media_entity_cleanup(&sd->entity);
1651 #endif
1652 err_power_off:
1653 __ar0230_power_off(ar0230);
1654 err_free_handler:
1655 v4l2_ctrl_handler_free(&ar0230->ctrl_handler);
1656 err_destroy_mutex:
1657 mutex_destroy(&ar0230->mutex);
1658
1659 return ret;
1660 }
1661
ar0230_remove(struct i2c_client * client)1662 static int ar0230_remove(struct i2c_client *client)
1663 {
1664 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1665 struct ar0230 *ar0230 = to_ar0230(sd);
1666
1667 v4l2_async_unregister_subdev(sd);
1668 #if defined(CONFIG_MEDIA_CONTROLLER)
1669 media_entity_cleanup(&sd->entity);
1670 #endif
1671 v4l2_ctrl_handler_free(&ar0230->ctrl_handler);
1672 mutex_destroy(&ar0230->mutex);
1673
1674 pm_runtime_disable(&client->dev);
1675 if (!pm_runtime_status_suspended(&client->dev))
1676 __ar0230_power_off(ar0230);
1677 pm_runtime_set_suspended(&client->dev);
1678
1679 return 0;
1680 }
1681
1682 #if IS_ENABLED(CONFIG_OF)
1683 static const struct of_device_id ar0230_of_match[] = {
1684 { .compatible = "aptina,ar0230" },
1685 {},
1686 };
1687 MODULE_DEVICE_TABLE(of, ar0230_of_match);
1688 #endif
1689
1690 static const struct i2c_device_id ar0230_match_id[] = {
1691 { "aptina,ar0230", 0 },
1692 { },
1693 };
1694
1695 static struct i2c_driver ar0230_i2c_driver = {
1696 .driver = {
1697 .name = AR0230_NAME,
1698 .pm = &ar0230_pm_ops,
1699 .of_match_table = of_match_ptr(ar0230_of_match),
1700 },
1701 .probe = &ar0230_probe,
1702 .remove = &ar0230_remove,
1703 .id_table = ar0230_match_id,
1704 };
1705
sensor_mod_init(void)1706 static int __init sensor_mod_init(void)
1707 {
1708 return i2c_add_driver(&ar0230_i2c_driver);
1709 }
1710
sensor_mod_exit(void)1711 static void __exit sensor_mod_exit(void)
1712 {
1713 i2c_del_driver(&ar0230_i2c_driver);
1714 }
1715
1716 device_initcall_sync(sensor_mod_init);
1717 module_exit(sensor_mod_exit);
1718
1719 MODULE_DESCRIPTION("Aptina ar0230 sensor driver");
1720 MODULE_LICENSE("GPL v2");
1721