xref: /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/zl10039.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Driver for Zarlink ZL10039 DVB-S tuner
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright 2007 Jan D. Louw <jd.louw@mweb.co.za>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/string.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/dvb/frontend.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <media/dvb_frontend.h>
15*4882a593Smuzhiyun #include "zl10039.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun static int debug;
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun /* Max transfer size done by I2C transfer functions */
20*4882a593Smuzhiyun #define MAX_XFER_SIZE  64
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #define dprintk(args...) \
23*4882a593Smuzhiyun 	do { \
24*4882a593Smuzhiyun 		if (debug) \
25*4882a593Smuzhiyun 			printk(KERN_DEBUG args); \
26*4882a593Smuzhiyun 	} while (0)
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun enum zl10039_model_id {
29*4882a593Smuzhiyun 	ID_ZL10039 = 1
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun struct zl10039_state {
33*4882a593Smuzhiyun 	struct i2c_adapter *i2c;
34*4882a593Smuzhiyun 	u8 i2c_addr;
35*4882a593Smuzhiyun 	u8 id;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun enum zl10039_reg_addr {
39*4882a593Smuzhiyun 	PLL0 = 0,
40*4882a593Smuzhiyun 	PLL1,
41*4882a593Smuzhiyun 	PLL2,
42*4882a593Smuzhiyun 	PLL3,
43*4882a593Smuzhiyun 	RFFE,
44*4882a593Smuzhiyun 	BASE0,
45*4882a593Smuzhiyun 	BASE1,
46*4882a593Smuzhiyun 	BASE2,
47*4882a593Smuzhiyun 	LO0,
48*4882a593Smuzhiyun 	LO1,
49*4882a593Smuzhiyun 	LO2,
50*4882a593Smuzhiyun 	LO3,
51*4882a593Smuzhiyun 	LO4,
52*4882a593Smuzhiyun 	LO5,
53*4882a593Smuzhiyun 	LO6,
54*4882a593Smuzhiyun 	GENERAL
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun 
zl10039_read(const struct zl10039_state * state,const enum zl10039_reg_addr reg,u8 * buf,const size_t count)57*4882a593Smuzhiyun static int zl10039_read(const struct zl10039_state *state,
58*4882a593Smuzhiyun 			const enum zl10039_reg_addr reg, u8 *buf,
59*4882a593Smuzhiyun 			const size_t count)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	u8 regbuf[] = { reg };
62*4882a593Smuzhiyun 	struct i2c_msg msg[] = {
63*4882a593Smuzhiyun 		{/* Write register address */
64*4882a593Smuzhiyun 			.addr = state->i2c_addr,
65*4882a593Smuzhiyun 			.flags = 0,
66*4882a593Smuzhiyun 			.buf = regbuf,
67*4882a593Smuzhiyun 			.len = 1,
68*4882a593Smuzhiyun 		}, {/* Read count bytes */
69*4882a593Smuzhiyun 			.addr = state->i2c_addr,
70*4882a593Smuzhiyun 			.flags = I2C_M_RD,
71*4882a593Smuzhiyun 			.buf = buf,
72*4882a593Smuzhiyun 			.len = count,
73*4882a593Smuzhiyun 		},
74*4882a593Smuzhiyun 	};
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	if (i2c_transfer(state->i2c, msg, 2) != 2) {
79*4882a593Smuzhiyun 		dprintk("%s: i2c read error\n", __func__);
80*4882a593Smuzhiyun 		return -EREMOTEIO;
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return 0; /* Success */
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
zl10039_write(struct zl10039_state * state,const enum zl10039_reg_addr reg,const u8 * src,const size_t count)86*4882a593Smuzhiyun static int zl10039_write(struct zl10039_state *state,
87*4882a593Smuzhiyun 			const enum zl10039_reg_addr reg, const u8 *src,
88*4882a593Smuzhiyun 			const size_t count)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	u8 buf[MAX_XFER_SIZE];
91*4882a593Smuzhiyun 	struct i2c_msg msg = {
92*4882a593Smuzhiyun 		.addr = state->i2c_addr,
93*4882a593Smuzhiyun 		.flags = 0,
94*4882a593Smuzhiyun 		.buf = buf,
95*4882a593Smuzhiyun 		.len = count + 1,
96*4882a593Smuzhiyun 	};
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	if (1 + count > sizeof(buf)) {
99*4882a593Smuzhiyun 		printk(KERN_WARNING
100*4882a593Smuzhiyun 		       "%s: i2c wr reg=%04x: len=%zu is too big!\n",
101*4882a593Smuzhiyun 		       KBUILD_MODNAME, reg, count);
102*4882a593Smuzhiyun 		return -EINVAL;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
106*4882a593Smuzhiyun 	/* Write register address and data in one go */
107*4882a593Smuzhiyun 	buf[0] = reg;
108*4882a593Smuzhiyun 	memcpy(&buf[1], src, count);
109*4882a593Smuzhiyun 	if (i2c_transfer(state->i2c, &msg, 1) != 1) {
110*4882a593Smuzhiyun 		dprintk("%s: i2c write error\n", __func__);
111*4882a593Smuzhiyun 		return -EREMOTEIO;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	return 0; /* Success */
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
zl10039_readreg(struct zl10039_state * state,const enum zl10039_reg_addr reg,u8 * val)117*4882a593Smuzhiyun static inline int zl10039_readreg(struct zl10039_state *state,
118*4882a593Smuzhiyun 				const enum zl10039_reg_addr reg, u8 *val)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	return zl10039_read(state, reg, val, 1);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
zl10039_writereg(struct zl10039_state * state,const enum zl10039_reg_addr reg,const u8 val)123*4882a593Smuzhiyun static inline int zl10039_writereg(struct zl10039_state *state,
124*4882a593Smuzhiyun 				const enum zl10039_reg_addr reg,
125*4882a593Smuzhiyun 				const u8 val)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	const u8 tmp = val; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	return zl10039_write(state, reg, &tmp, 1);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
zl10039_init(struct dvb_frontend * fe)132*4882a593Smuzhiyun static int zl10039_init(struct dvb_frontend *fe)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	struct zl10039_state *state = fe->tuner_priv;
135*4882a593Smuzhiyun 	int ret;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
138*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
139*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 1);
140*4882a593Smuzhiyun 	/* Reset logic */
141*4882a593Smuzhiyun 	ret = zl10039_writereg(state, GENERAL, 0x40);
142*4882a593Smuzhiyun 	if (ret < 0) {
143*4882a593Smuzhiyun 		dprintk("Note: i2c write error normal when resetting the tuner\n");
144*4882a593Smuzhiyun 	}
145*4882a593Smuzhiyun 	/* Wake up */
146*4882a593Smuzhiyun 	ret = zl10039_writereg(state, GENERAL, 0x01);
147*4882a593Smuzhiyun 	if (ret < 0) {
148*4882a593Smuzhiyun 		dprintk("Tuner power up failed\n");
149*4882a593Smuzhiyun 		return ret;
150*4882a593Smuzhiyun 	}
151*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
152*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 0);
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	return 0;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
zl10039_sleep(struct dvb_frontend * fe)157*4882a593Smuzhiyun static int zl10039_sleep(struct dvb_frontend *fe)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	struct zl10039_state *state = fe->tuner_priv;
160*4882a593Smuzhiyun 	int ret;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
163*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
164*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 1);
165*4882a593Smuzhiyun 	ret = zl10039_writereg(state, GENERAL, 0x80);
166*4882a593Smuzhiyun 	if (ret < 0) {
167*4882a593Smuzhiyun 		dprintk("Tuner sleep failed\n");
168*4882a593Smuzhiyun 		return ret;
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
171*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 0);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 	return 0;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
zl10039_set_params(struct dvb_frontend * fe)176*4882a593Smuzhiyun static int zl10039_set_params(struct dvb_frontend *fe)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
179*4882a593Smuzhiyun 	struct zl10039_state *state = fe->tuner_priv;
180*4882a593Smuzhiyun 	u8 buf[6];
181*4882a593Smuzhiyun 	u8 bf;
182*4882a593Smuzhiyun 	u32 fbw;
183*4882a593Smuzhiyun 	u32 div;
184*4882a593Smuzhiyun 	int ret;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
187*4882a593Smuzhiyun 	dprintk("Set frequency = %d, symbol rate = %d\n",
188*4882a593Smuzhiyun 			c->frequency, c->symbol_rate);
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	/* Assumed 10.111 MHz crystal oscillator */
191*4882a593Smuzhiyun 	/* Cancelled num/den 80 to prevent overflow */
192*4882a593Smuzhiyun 	div = (c->frequency * 1000) / 126387;
193*4882a593Smuzhiyun 	fbw = (c->symbol_rate * 27) / 32000;
194*4882a593Smuzhiyun 	/* Cancelled num/den 10 to prevent overflow */
195*4882a593Smuzhiyun 	bf = ((fbw * 5088) / 1011100) - 1;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	/*PLL divider*/
198*4882a593Smuzhiyun 	buf[0] = (div >> 8) & 0x7f;
199*4882a593Smuzhiyun 	buf[1] = (div >> 0) & 0xff;
200*4882a593Smuzhiyun 	/*Reference divider*/
201*4882a593Smuzhiyun 	/* Select reference ratio of 80 */
202*4882a593Smuzhiyun 	buf[2] = 0x1D;
203*4882a593Smuzhiyun 	/*PLL test modes*/
204*4882a593Smuzhiyun 	buf[3] = 0x40;
205*4882a593Smuzhiyun 	/*RF Control register*/
206*4882a593Smuzhiyun 	buf[4] = 0x6E; /* Bypass enable */
207*4882a593Smuzhiyun 	/*Baseband filter cutoff */
208*4882a593Smuzhiyun 	buf[5] = bf;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	/* Open i2c gate */
211*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
212*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 1);
213*4882a593Smuzhiyun 	/* BR = 10, Enable filter adjustment */
214*4882a593Smuzhiyun 	ret = zl10039_writereg(state, BASE1, 0x0A);
215*4882a593Smuzhiyun 	if (ret < 0)
216*4882a593Smuzhiyun 		goto error;
217*4882a593Smuzhiyun 	/* Write new config values */
218*4882a593Smuzhiyun 	ret = zl10039_write(state, PLL0, buf, sizeof(buf));
219*4882a593Smuzhiyun 	if (ret < 0)
220*4882a593Smuzhiyun 		goto error;
221*4882a593Smuzhiyun 	/* BR = 10, Disable filter adjustment */
222*4882a593Smuzhiyun 	ret = zl10039_writereg(state, BASE1, 0x6A);
223*4882a593Smuzhiyun 	if (ret < 0)
224*4882a593Smuzhiyun 		goto error;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	/* Close i2c gate */
227*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
228*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 0);
229*4882a593Smuzhiyun 	return 0;
230*4882a593Smuzhiyun error:
231*4882a593Smuzhiyun 	dprintk("Error setting tuner\n");
232*4882a593Smuzhiyun 	return ret;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun 
zl10039_release(struct dvb_frontend * fe)235*4882a593Smuzhiyun static void zl10039_release(struct dvb_frontend *fe)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct zl10039_state *state = fe->tuner_priv;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
240*4882a593Smuzhiyun 	kfree(state);
241*4882a593Smuzhiyun 	fe->tuner_priv = NULL;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun static const struct dvb_tuner_ops zl10039_ops = {
245*4882a593Smuzhiyun 	.release = zl10039_release,
246*4882a593Smuzhiyun 	.init = zl10039_init,
247*4882a593Smuzhiyun 	.sleep = zl10039_sleep,
248*4882a593Smuzhiyun 	.set_params = zl10039_set_params,
249*4882a593Smuzhiyun };
250*4882a593Smuzhiyun 
zl10039_attach(struct dvb_frontend * fe,u8 i2c_addr,struct i2c_adapter * i2c)251*4882a593Smuzhiyun struct dvb_frontend *zl10039_attach(struct dvb_frontend *fe,
252*4882a593Smuzhiyun 		u8 i2c_addr, struct i2c_adapter *i2c)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun 	struct zl10039_state *state = NULL;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	dprintk("%s\n", __func__);
257*4882a593Smuzhiyun 	state = kmalloc(sizeof(struct zl10039_state), GFP_KERNEL);
258*4882a593Smuzhiyun 	if (state == NULL)
259*4882a593Smuzhiyun 		goto error;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	state->i2c = i2c;
262*4882a593Smuzhiyun 	state->i2c_addr = i2c_addr;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	/* Open i2c gate */
265*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
266*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 1);
267*4882a593Smuzhiyun 	/* check if this is a valid tuner */
268*4882a593Smuzhiyun 	if (zl10039_readreg(state, GENERAL, &state->id) < 0) {
269*4882a593Smuzhiyun 		/* Close i2c gate */
270*4882a593Smuzhiyun 		if (fe->ops.i2c_gate_ctrl)
271*4882a593Smuzhiyun 			fe->ops.i2c_gate_ctrl(fe, 0);
272*4882a593Smuzhiyun 		goto error;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 	/* Close i2c gate */
275*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
276*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 0);
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	state->id = state->id & 0x0f;
279*4882a593Smuzhiyun 	switch (state->id) {
280*4882a593Smuzhiyun 	case ID_ZL10039:
281*4882a593Smuzhiyun 		strscpy(fe->ops.tuner_ops.info.name,
282*4882a593Smuzhiyun 			"Zarlink ZL10039 DVB-S tuner",
283*4882a593Smuzhiyun 			sizeof(fe->ops.tuner_ops.info.name));
284*4882a593Smuzhiyun 		break;
285*4882a593Smuzhiyun 	default:
286*4882a593Smuzhiyun 		dprintk("Chip ID=%x does not match a known type\n", state->id);
287*4882a593Smuzhiyun 		goto error;
288*4882a593Smuzhiyun 	}
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	memcpy(&fe->ops.tuner_ops, &zl10039_ops, sizeof(struct dvb_tuner_ops));
291*4882a593Smuzhiyun 	fe->tuner_priv = state;
292*4882a593Smuzhiyun 	dprintk("Tuner attached @ i2c address 0x%02x\n", i2c_addr);
293*4882a593Smuzhiyun 	return fe;
294*4882a593Smuzhiyun error:
295*4882a593Smuzhiyun 	kfree(state);
296*4882a593Smuzhiyun 	return NULL;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun EXPORT_SYMBOL(zl10039_attach);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun module_param(debug, int, 0644);
301*4882a593Smuzhiyun MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
302*4882a593Smuzhiyun MODULE_DESCRIPTION("Zarlink ZL10039 DVB-S tuner driver");
303*4882a593Smuzhiyun MODULE_AUTHOR("Jan D. Louw <jd.louw@mweb.co.za>");
304*4882a593Smuzhiyun MODULE_LICENSE("GPL");
305