1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * tda18271c2dd: Driver for the TDA18271C2 tuner
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2010 Digital Devices GmbH
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/firmware.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <asm/div64.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <media/dvb_frontend.h>
17*4882a593Smuzhiyun #include "tda18271c2dd.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* Max transfer size done by I2C transfer functions */
20*4882a593Smuzhiyun #define MAX_XFER_SIZE 64
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun struct SStandardParam {
23*4882a593Smuzhiyun s32 m_IFFrequency;
24*4882a593Smuzhiyun u32 m_BandWidth;
25*4882a593Smuzhiyun u8 m_EP3_4_0;
26*4882a593Smuzhiyun u8 m_EB22;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun struct SMap {
30*4882a593Smuzhiyun u32 m_Frequency;
31*4882a593Smuzhiyun u8 m_Param;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct SMapI {
35*4882a593Smuzhiyun u32 m_Frequency;
36*4882a593Smuzhiyun s32 m_Param;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun struct SMap2 {
40*4882a593Smuzhiyun u32 m_Frequency;
41*4882a593Smuzhiyun u8 m_Param1;
42*4882a593Smuzhiyun u8 m_Param2;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun struct SRFBandMap {
46*4882a593Smuzhiyun u32 m_RF_max;
47*4882a593Smuzhiyun u32 m_RF1_Default;
48*4882a593Smuzhiyun u32 m_RF2_Default;
49*4882a593Smuzhiyun u32 m_RF3_Default;
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun enum ERegister {
53*4882a593Smuzhiyun ID = 0,
54*4882a593Smuzhiyun TM,
55*4882a593Smuzhiyun PL,
56*4882a593Smuzhiyun EP1, EP2, EP3, EP4, EP5,
57*4882a593Smuzhiyun CPD, CD1, CD2, CD3,
58*4882a593Smuzhiyun MPD, MD1, MD2, MD3,
59*4882a593Smuzhiyun EB1, EB2, EB3, EB4, EB5, EB6, EB7, EB8, EB9, EB10,
60*4882a593Smuzhiyun EB11, EB12, EB13, EB14, EB15, EB16, EB17, EB18, EB19, EB20,
61*4882a593Smuzhiyun EB21, EB22, EB23,
62*4882a593Smuzhiyun NUM_REGS
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun struct tda_state {
66*4882a593Smuzhiyun struct i2c_adapter *i2c;
67*4882a593Smuzhiyun u8 adr;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun u32 m_Frequency;
70*4882a593Smuzhiyun u32 IF;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun u8 m_IFLevelAnalog;
73*4882a593Smuzhiyun u8 m_IFLevelDigital;
74*4882a593Smuzhiyun u8 m_IFLevelDVBC;
75*4882a593Smuzhiyun u8 m_IFLevelDVBT;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun u8 m_EP4;
78*4882a593Smuzhiyun u8 m_EP3_Standby;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun bool m_bMaster;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun s32 m_SettlingTime;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun u8 m_Regs[NUM_REGS];
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /* Tracking filter settings for band 0..6 */
87*4882a593Smuzhiyun u32 m_RF1[7];
88*4882a593Smuzhiyun s32 m_RF_A1[7];
89*4882a593Smuzhiyun s32 m_RF_B1[7];
90*4882a593Smuzhiyun u32 m_RF2[7];
91*4882a593Smuzhiyun s32 m_RF_A2[7];
92*4882a593Smuzhiyun s32 m_RF_B2[7];
93*4882a593Smuzhiyun u32 m_RF3[7];
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun u8 m_TMValue_RFCal; /* Calibration temperature */
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun bool m_bFMInput; /* true to use Pin 8 for FM Radio */
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun static int PowerScan(struct tda_state *state,
102*4882a593Smuzhiyun u8 RFBand, u32 RF_in,
103*4882a593Smuzhiyun u32 *pRF_Out, bool *pbcal);
104*4882a593Smuzhiyun
i2c_readn(struct i2c_adapter * adapter,u8 adr,u8 * data,int len)105*4882a593Smuzhiyun static int i2c_readn(struct i2c_adapter *adapter, u8 adr, u8 *data, int len)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
108*4882a593Smuzhiyun .buf = data, .len = len} };
109*4882a593Smuzhiyun return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
i2c_write(struct i2c_adapter * adap,u8 adr,u8 * data,int len)112*4882a593Smuzhiyun static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct i2c_msg msg = {.addr = adr, .flags = 0,
115*4882a593Smuzhiyun .buf = data, .len = len};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (i2c_transfer(adap, &msg, 1) != 1) {
118*4882a593Smuzhiyun printk(KERN_ERR "tda18271c2dd: i2c write error at addr %i\n", adr);
119*4882a593Smuzhiyun return -1;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
WriteRegs(struct tda_state * state,u8 SubAddr,u8 * Regs,u16 nRegs)124*4882a593Smuzhiyun static int WriteRegs(struct tda_state *state,
125*4882a593Smuzhiyun u8 SubAddr, u8 *Regs, u16 nRegs)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun u8 data[MAX_XFER_SIZE];
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun if (1 + nRegs > sizeof(data)) {
130*4882a593Smuzhiyun printk(KERN_WARNING
131*4882a593Smuzhiyun "%s: i2c wr: len=%d is too big!\n",
132*4882a593Smuzhiyun KBUILD_MODNAME, nRegs);
133*4882a593Smuzhiyun return -EINVAL;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun data[0] = SubAddr;
137*4882a593Smuzhiyun memcpy(data + 1, Regs, nRegs);
138*4882a593Smuzhiyun return i2c_write(state->i2c, state->adr, data, nRegs + 1);
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
WriteReg(struct tda_state * state,u8 SubAddr,u8 Reg)141*4882a593Smuzhiyun static int WriteReg(struct tda_state *state, u8 SubAddr, u8 Reg)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun u8 msg[2] = {SubAddr, Reg};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return i2c_write(state->i2c, state->adr, msg, 2);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
Read(struct tda_state * state,u8 * Regs)148*4882a593Smuzhiyun static int Read(struct tda_state *state, u8 * Regs)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun return i2c_readn(state->i2c, state->adr, Regs, 16);
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
ReadExtented(struct tda_state * state,u8 * Regs)153*4882a593Smuzhiyun static int ReadExtented(struct tda_state *state, u8 * Regs)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun return i2c_readn(state->i2c, state->adr, Regs, NUM_REGS);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
UpdateRegs(struct tda_state * state,u8 RegFrom,u8 RegTo)158*4882a593Smuzhiyun static int UpdateRegs(struct tda_state *state, u8 RegFrom, u8 RegTo)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun return WriteRegs(state, RegFrom,
161*4882a593Smuzhiyun &state->m_Regs[RegFrom], RegTo-RegFrom+1);
162*4882a593Smuzhiyun }
UpdateReg(struct tda_state * state,u8 Reg)163*4882a593Smuzhiyun static int UpdateReg(struct tda_state *state, u8 Reg)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun return WriteReg(state, Reg, state->m_Regs[Reg]);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun #include "tda18271c2dd_maps.h"
169*4882a593Smuzhiyun
reset(struct tda_state * state)170*4882a593Smuzhiyun static void reset(struct tda_state *state)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun u32 ulIFLevelAnalog = 0;
173*4882a593Smuzhiyun u32 ulIFLevelDigital = 2;
174*4882a593Smuzhiyun u32 ulIFLevelDVBC = 7;
175*4882a593Smuzhiyun u32 ulIFLevelDVBT = 6;
176*4882a593Smuzhiyun u32 ulXTOut = 0;
177*4882a593Smuzhiyun u32 ulStandbyMode = 0x06; /* Send in stdb, but leave osc on */
178*4882a593Smuzhiyun u32 ulSlave = 0;
179*4882a593Smuzhiyun u32 ulFMInput = 0;
180*4882a593Smuzhiyun u32 ulSettlingTime = 100;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun state->m_Frequency = 0;
183*4882a593Smuzhiyun state->m_SettlingTime = 100;
184*4882a593Smuzhiyun state->m_IFLevelAnalog = (ulIFLevelAnalog & 0x07) << 2;
185*4882a593Smuzhiyun state->m_IFLevelDigital = (ulIFLevelDigital & 0x07) << 2;
186*4882a593Smuzhiyun state->m_IFLevelDVBC = (ulIFLevelDVBC & 0x07) << 2;
187*4882a593Smuzhiyun state->m_IFLevelDVBT = (ulIFLevelDVBT & 0x07) << 2;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun state->m_EP4 = 0x20;
190*4882a593Smuzhiyun if (ulXTOut != 0)
191*4882a593Smuzhiyun state->m_EP4 |= 0x40;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun state->m_EP3_Standby = ((ulStandbyMode & 0x07) << 5) | 0x0F;
194*4882a593Smuzhiyun state->m_bMaster = (ulSlave == 0);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun state->m_SettlingTime = ulSettlingTime;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun state->m_bFMInput = (ulFMInput == 2);
199*4882a593Smuzhiyun }
200*4882a593Smuzhiyun
SearchMap1(const struct SMap map[],u32 frequency,u8 * param)201*4882a593Smuzhiyun static bool SearchMap1(const struct SMap map[], u32 frequency, u8 *param)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun int i = 0;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun while ((map[i].m_Frequency != 0) && (frequency > map[i].m_Frequency))
206*4882a593Smuzhiyun i += 1;
207*4882a593Smuzhiyun if (map[i].m_Frequency == 0)
208*4882a593Smuzhiyun return false;
209*4882a593Smuzhiyun *param = map[i].m_Param;
210*4882a593Smuzhiyun return true;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
SearchMap2(const struct SMapI map[],u32 frequency,s32 * param)213*4882a593Smuzhiyun static bool SearchMap2(const struct SMapI map[], u32 frequency, s32 *param)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun int i = 0;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun while ((map[i].m_Frequency != 0) &&
218*4882a593Smuzhiyun (frequency > map[i].m_Frequency))
219*4882a593Smuzhiyun i += 1;
220*4882a593Smuzhiyun if (map[i].m_Frequency == 0)
221*4882a593Smuzhiyun return false;
222*4882a593Smuzhiyun *param = map[i].m_Param;
223*4882a593Smuzhiyun return true;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
SearchMap3(const struct SMap2 map[],u32 frequency,u8 * param1,u8 * param2)226*4882a593Smuzhiyun static bool SearchMap3(const struct SMap2 map[], u32 frequency, u8 *param1,
227*4882a593Smuzhiyun u8 *param2)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun int i = 0;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun while ((map[i].m_Frequency != 0) &&
232*4882a593Smuzhiyun (frequency > map[i].m_Frequency))
233*4882a593Smuzhiyun i += 1;
234*4882a593Smuzhiyun if (map[i].m_Frequency == 0)
235*4882a593Smuzhiyun return false;
236*4882a593Smuzhiyun *param1 = map[i].m_Param1;
237*4882a593Smuzhiyun *param2 = map[i].m_Param2;
238*4882a593Smuzhiyun return true;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
SearchMap4(const struct SRFBandMap map[],u32 frequency,u8 * rfband)241*4882a593Smuzhiyun static bool SearchMap4(const struct SRFBandMap map[], u32 frequency, u8 *rfband)
242*4882a593Smuzhiyun {
243*4882a593Smuzhiyun int i = 0;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun while (i < 7 && (frequency > map[i].m_RF_max))
246*4882a593Smuzhiyun i += 1;
247*4882a593Smuzhiyun if (i == 7)
248*4882a593Smuzhiyun return false;
249*4882a593Smuzhiyun *rfband = i;
250*4882a593Smuzhiyun return true;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
ThermometerRead(struct tda_state * state,u8 * pTM_Value)253*4882a593Smuzhiyun static int ThermometerRead(struct tda_state *state, u8 *pTM_Value)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun int status = 0;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun do {
258*4882a593Smuzhiyun u8 Regs[16];
259*4882a593Smuzhiyun state->m_Regs[TM] |= 0x10;
260*4882a593Smuzhiyun status = UpdateReg(state, TM);
261*4882a593Smuzhiyun if (status < 0)
262*4882a593Smuzhiyun break;
263*4882a593Smuzhiyun status = Read(state, Regs);
264*4882a593Smuzhiyun if (status < 0)
265*4882a593Smuzhiyun break;
266*4882a593Smuzhiyun if (((Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20) ||
267*4882a593Smuzhiyun ((Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00)) {
268*4882a593Smuzhiyun state->m_Regs[TM] ^= 0x20;
269*4882a593Smuzhiyun status = UpdateReg(state, TM);
270*4882a593Smuzhiyun if (status < 0)
271*4882a593Smuzhiyun break;
272*4882a593Smuzhiyun msleep(10);
273*4882a593Smuzhiyun status = Read(state, Regs);
274*4882a593Smuzhiyun if (status < 0)
275*4882a593Smuzhiyun break;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun *pTM_Value = (Regs[TM] & 0x20)
278*4882a593Smuzhiyun ? m_Thermometer_Map_2[Regs[TM] & 0x0F]
279*4882a593Smuzhiyun : m_Thermometer_Map_1[Regs[TM] & 0x0F] ;
280*4882a593Smuzhiyun state->m_Regs[TM] &= ~0x10; /* Thermometer off */
281*4882a593Smuzhiyun status = UpdateReg(state, TM);
282*4882a593Smuzhiyun if (status < 0)
283*4882a593Smuzhiyun break;
284*4882a593Smuzhiyun state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 ????????? */
285*4882a593Smuzhiyun status = UpdateReg(state, EP4);
286*4882a593Smuzhiyun if (status < 0)
287*4882a593Smuzhiyun break;
288*4882a593Smuzhiyun } while (0);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun return status;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
StandBy(struct tda_state * state)293*4882a593Smuzhiyun static int StandBy(struct tda_state *state)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun int status = 0;
296*4882a593Smuzhiyun do {
297*4882a593Smuzhiyun state->m_Regs[EB12] &= ~0x20; /* PD_AGC1_Det = 0 */
298*4882a593Smuzhiyun status = UpdateReg(state, EB12);
299*4882a593Smuzhiyun if (status < 0)
300*4882a593Smuzhiyun break;
301*4882a593Smuzhiyun state->m_Regs[EB18] &= ~0x83; /* AGC1_loop_off = 0, AGC1_Gain = 6 dB */
302*4882a593Smuzhiyun status = UpdateReg(state, EB18);
303*4882a593Smuzhiyun if (status < 0)
304*4882a593Smuzhiyun break;
305*4882a593Smuzhiyun state->m_Regs[EB21] |= 0x03; /* AGC2_Gain = -6 dB */
306*4882a593Smuzhiyun state->m_Regs[EP3] = state->m_EP3_Standby;
307*4882a593Smuzhiyun status = UpdateReg(state, EP3);
308*4882a593Smuzhiyun if (status < 0)
309*4882a593Smuzhiyun break;
310*4882a593Smuzhiyun state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LP_Fc[2] = 0 */
311*4882a593Smuzhiyun status = UpdateRegs(state, EB21, EB23);
312*4882a593Smuzhiyun if (status < 0)
313*4882a593Smuzhiyun break;
314*4882a593Smuzhiyun } while (0);
315*4882a593Smuzhiyun return status;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
CalcMainPLL(struct tda_state * state,u32 freq)318*4882a593Smuzhiyun static int CalcMainPLL(struct tda_state *state, u32 freq)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun u8 PostDiv;
322*4882a593Smuzhiyun u8 Div;
323*4882a593Smuzhiyun u64 OscFreq;
324*4882a593Smuzhiyun u32 MainDiv;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div))
327*4882a593Smuzhiyun return -EINVAL;
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun OscFreq = (u64) freq * (u64) Div;
330*4882a593Smuzhiyun OscFreq *= (u64) 16384;
331*4882a593Smuzhiyun do_div(OscFreq, (u64)16000000);
332*4882a593Smuzhiyun MainDiv = OscFreq;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun state->m_Regs[MPD] = PostDiv & 0x77;
335*4882a593Smuzhiyun state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F);
336*4882a593Smuzhiyun state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF);
337*4882a593Smuzhiyun state->m_Regs[MD3] = (MainDiv & 0xFF);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun return UpdateRegs(state, MPD, MD3);
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
CalcCalPLL(struct tda_state * state,u32 freq)342*4882a593Smuzhiyun static int CalcCalPLL(struct tda_state *state, u32 freq)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun u8 PostDiv;
345*4882a593Smuzhiyun u8 Div;
346*4882a593Smuzhiyun u64 OscFreq;
347*4882a593Smuzhiyun u32 CalDiv;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun if (!SearchMap3(m_Cal_PLL_Map, freq, &PostDiv, &Div))
350*4882a593Smuzhiyun return -EINVAL;
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun OscFreq = (u64)freq * (u64)Div;
353*4882a593Smuzhiyun /* CalDiv = u32( OscFreq * 16384 / 16000000 ); */
354*4882a593Smuzhiyun OscFreq *= (u64)16384;
355*4882a593Smuzhiyun do_div(OscFreq, (u64)16000000);
356*4882a593Smuzhiyun CalDiv = OscFreq;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun state->m_Regs[CPD] = PostDiv;
359*4882a593Smuzhiyun state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF);
360*4882a593Smuzhiyun state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF);
361*4882a593Smuzhiyun state->m_Regs[CD3] = (CalDiv & 0xFF);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun return UpdateRegs(state, CPD, CD3);
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
CalibrateRF(struct tda_state * state,u8 RFBand,u32 freq,s32 * pCprog)366*4882a593Smuzhiyun static int CalibrateRF(struct tda_state *state,
367*4882a593Smuzhiyun u8 RFBand, u32 freq, s32 *pCprog)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun int status = 0;
370*4882a593Smuzhiyun u8 Regs[NUM_REGS];
371*4882a593Smuzhiyun do {
372*4882a593Smuzhiyun u8 BP_Filter = 0;
373*4882a593Smuzhiyun u8 GainTaper = 0;
374*4882a593Smuzhiyun u8 RFC_K = 0;
375*4882a593Smuzhiyun u8 RFC_M = 0;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 */
378*4882a593Smuzhiyun status = UpdateReg(state, EP4);
379*4882a593Smuzhiyun if (status < 0)
380*4882a593Smuzhiyun break;
381*4882a593Smuzhiyun state->m_Regs[EB18] |= 0x03; /* AGC1_Gain = 3 */
382*4882a593Smuzhiyun status = UpdateReg(state, EB18);
383*4882a593Smuzhiyun if (status < 0)
384*4882a593Smuzhiyun break;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /* Switching off LT (as datasheet says) causes calibration on C1 to fail */
387*4882a593Smuzhiyun /* (Readout of Cprog is always 255) */
388*4882a593Smuzhiyun if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */
389*4882a593Smuzhiyun state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun if (!(SearchMap1(m_BP_Filter_Map, freq, &BP_Filter) &&
392*4882a593Smuzhiyun SearchMap1(m_GainTaper_Map, freq, &GainTaper) &&
393*4882a593Smuzhiyun SearchMap3(m_KM_Map, freq, &RFC_K, &RFC_M)))
394*4882a593Smuzhiyun return -EINVAL;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter;
397*4882a593Smuzhiyun state->m_Regs[EP2] = (RFBand << 5) | GainTaper;
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun status = UpdateRegs(state, EP1, EP3);
402*4882a593Smuzhiyun if (status < 0)
403*4882a593Smuzhiyun break;
404*4882a593Smuzhiyun status = UpdateReg(state, EB13);
405*4882a593Smuzhiyun if (status < 0)
406*4882a593Smuzhiyun break;
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun state->m_Regs[EB4] |= 0x20; /* LO_ForceSrce = 1 */
409*4882a593Smuzhiyun status = UpdateReg(state, EB4);
410*4882a593Smuzhiyun if (status < 0)
411*4882a593Smuzhiyun break;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun state->m_Regs[EB7] |= 0x20; /* CAL_ForceSrce = 1 */
414*4882a593Smuzhiyun status = UpdateReg(state, EB7);
415*4882a593Smuzhiyun if (status < 0)
416*4882a593Smuzhiyun break;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun state->m_Regs[EB14] = 0; /* RFC_Cprog = 0 */
419*4882a593Smuzhiyun status = UpdateReg(state, EB14);
420*4882a593Smuzhiyun if (status < 0)
421*4882a593Smuzhiyun break;
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun state->m_Regs[EB20] &= ~0x20; /* ForceLock = 0; */
424*4882a593Smuzhiyun status = UpdateReg(state, EB20);
425*4882a593Smuzhiyun if (status < 0)
426*4882a593Smuzhiyun break;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun state->m_Regs[EP4] |= 0x03; /* CAL_Mode = 3 */
429*4882a593Smuzhiyun status = UpdateRegs(state, EP4, EP5);
430*4882a593Smuzhiyun if (status < 0)
431*4882a593Smuzhiyun break;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun status = CalcCalPLL(state, freq);
434*4882a593Smuzhiyun if (status < 0)
435*4882a593Smuzhiyun break;
436*4882a593Smuzhiyun status = CalcMainPLL(state, freq + 1000000);
437*4882a593Smuzhiyun if (status < 0)
438*4882a593Smuzhiyun break;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun msleep(5);
441*4882a593Smuzhiyun status = UpdateReg(state, EP2);
442*4882a593Smuzhiyun if (status < 0)
443*4882a593Smuzhiyun break;
444*4882a593Smuzhiyun status = UpdateReg(state, EP1);
445*4882a593Smuzhiyun if (status < 0)
446*4882a593Smuzhiyun break;
447*4882a593Smuzhiyun status = UpdateReg(state, EP2);
448*4882a593Smuzhiyun if (status < 0)
449*4882a593Smuzhiyun break;
450*4882a593Smuzhiyun status = UpdateReg(state, EP1);
451*4882a593Smuzhiyun if (status < 0)
452*4882a593Smuzhiyun break;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun state->m_Regs[EB4] &= ~0x20; /* LO_ForceSrce = 0 */
455*4882a593Smuzhiyun status = UpdateReg(state, EB4);
456*4882a593Smuzhiyun if (status < 0)
457*4882a593Smuzhiyun break;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun state->m_Regs[EB7] &= ~0x20; /* CAL_ForceSrce = 0 */
460*4882a593Smuzhiyun status = UpdateReg(state, EB7);
461*4882a593Smuzhiyun if (status < 0)
462*4882a593Smuzhiyun break;
463*4882a593Smuzhiyun msleep(10);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun state->m_Regs[EB20] |= 0x20; /* ForceLock = 1; */
466*4882a593Smuzhiyun status = UpdateReg(state, EB20);
467*4882a593Smuzhiyun if (status < 0)
468*4882a593Smuzhiyun break;
469*4882a593Smuzhiyun msleep(60);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun state->m_Regs[EP4] &= ~0x03; /* CAL_Mode = 0 */
472*4882a593Smuzhiyun state->m_Regs[EP3] &= ~0x40; /* SM_LT = 0 */
473*4882a593Smuzhiyun state->m_Regs[EB18] &= ~0x03; /* AGC1_Gain = 0 */
474*4882a593Smuzhiyun status = UpdateReg(state, EB18);
475*4882a593Smuzhiyun if (status < 0)
476*4882a593Smuzhiyun break;
477*4882a593Smuzhiyun status = UpdateRegs(state, EP3, EP4);
478*4882a593Smuzhiyun if (status < 0)
479*4882a593Smuzhiyun break;
480*4882a593Smuzhiyun status = UpdateReg(state, EP1);
481*4882a593Smuzhiyun if (status < 0)
482*4882a593Smuzhiyun break;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun status = ReadExtented(state, Regs);
485*4882a593Smuzhiyun if (status < 0)
486*4882a593Smuzhiyun break;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun *pCprog = Regs[EB14];
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun } while (0);
491*4882a593Smuzhiyun return status;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
RFTrackingFiltersInit(struct tda_state * state,u8 RFBand)494*4882a593Smuzhiyun static int RFTrackingFiltersInit(struct tda_state *state,
495*4882a593Smuzhiyun u8 RFBand)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun int status = 0;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun u32 RF1 = m_RF_Band_Map[RFBand].m_RF1_Default;
500*4882a593Smuzhiyun u32 RF2 = m_RF_Band_Map[RFBand].m_RF2_Default;
501*4882a593Smuzhiyun u32 RF3 = m_RF_Band_Map[RFBand].m_RF3_Default;
502*4882a593Smuzhiyun bool bcal = false;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun s32 Cprog_cal1 = 0;
505*4882a593Smuzhiyun s32 Cprog_table1 = 0;
506*4882a593Smuzhiyun s32 Cprog_cal2 = 0;
507*4882a593Smuzhiyun s32 Cprog_table2 = 0;
508*4882a593Smuzhiyun s32 Cprog_cal3 = 0;
509*4882a593Smuzhiyun s32 Cprog_table3 = 0;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun state->m_RF_A1[RFBand] = 0;
512*4882a593Smuzhiyun state->m_RF_B1[RFBand] = 0;
513*4882a593Smuzhiyun state->m_RF_A2[RFBand] = 0;
514*4882a593Smuzhiyun state->m_RF_B2[RFBand] = 0;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun do {
517*4882a593Smuzhiyun status = PowerScan(state, RFBand, RF1, &RF1, &bcal);
518*4882a593Smuzhiyun if (status < 0)
519*4882a593Smuzhiyun break;
520*4882a593Smuzhiyun if (bcal) {
521*4882a593Smuzhiyun status = CalibrateRF(state, RFBand, RF1, &Cprog_cal1);
522*4882a593Smuzhiyun if (status < 0)
523*4882a593Smuzhiyun break;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun SearchMap2(m_RF_Cal_Map, RF1, &Cprog_table1);
526*4882a593Smuzhiyun if (!bcal)
527*4882a593Smuzhiyun Cprog_cal1 = Cprog_table1;
528*4882a593Smuzhiyun state->m_RF_B1[RFBand] = Cprog_cal1 - Cprog_table1;
529*4882a593Smuzhiyun /* state->m_RF_A1[RF_Band] = ???? */
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun if (RF2 == 0)
532*4882a593Smuzhiyun break;
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun status = PowerScan(state, RFBand, RF2, &RF2, &bcal);
535*4882a593Smuzhiyun if (status < 0)
536*4882a593Smuzhiyun break;
537*4882a593Smuzhiyun if (bcal) {
538*4882a593Smuzhiyun status = CalibrateRF(state, RFBand, RF2, &Cprog_cal2);
539*4882a593Smuzhiyun if (status < 0)
540*4882a593Smuzhiyun break;
541*4882a593Smuzhiyun }
542*4882a593Smuzhiyun SearchMap2(m_RF_Cal_Map, RF2, &Cprog_table2);
543*4882a593Smuzhiyun if (!bcal)
544*4882a593Smuzhiyun Cprog_cal2 = Cprog_table2;
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun state->m_RF_A1[RFBand] =
547*4882a593Smuzhiyun (Cprog_cal2 - Cprog_table2 - Cprog_cal1 + Cprog_table1) /
548*4882a593Smuzhiyun ((s32)(RF2) - (s32)(RF1));
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun if (RF3 == 0)
551*4882a593Smuzhiyun break;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun status = PowerScan(state, RFBand, RF3, &RF3, &bcal);
554*4882a593Smuzhiyun if (status < 0)
555*4882a593Smuzhiyun break;
556*4882a593Smuzhiyun if (bcal) {
557*4882a593Smuzhiyun status = CalibrateRF(state, RFBand, RF3, &Cprog_cal3);
558*4882a593Smuzhiyun if (status < 0)
559*4882a593Smuzhiyun break;
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun SearchMap2(m_RF_Cal_Map, RF3, &Cprog_table3);
562*4882a593Smuzhiyun if (!bcal)
563*4882a593Smuzhiyun Cprog_cal3 = Cprog_table3;
564*4882a593Smuzhiyun state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3) - (s32)(RF2));
565*4882a593Smuzhiyun state->m_RF_B2[RFBand] = Cprog_cal2 - Cprog_table2;
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun } while (0);
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun state->m_RF1[RFBand] = RF1;
570*4882a593Smuzhiyun state->m_RF2[RFBand] = RF2;
571*4882a593Smuzhiyun state->m_RF3[RFBand] = RF3;
572*4882a593Smuzhiyun
573*4882a593Smuzhiyun #if 0
574*4882a593Smuzhiyun printk(KERN_ERR "tda18271c2dd: %s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __func__,
575*4882a593Smuzhiyun RFBand, RF1, state->m_RF_A1[RFBand], state->m_RF_B1[RFBand], RF2,
576*4882a593Smuzhiyun state->m_RF_A2[RFBand], state->m_RF_B2[RFBand], RF3);
577*4882a593Smuzhiyun #endif
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun return status;
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
PowerScan(struct tda_state * state,u8 RFBand,u32 RF_in,u32 * pRF_Out,bool * pbcal)582*4882a593Smuzhiyun static int PowerScan(struct tda_state *state,
583*4882a593Smuzhiyun u8 RFBand, u32 RF_in, u32 *pRF_Out, bool *pbcal)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun int status = 0;
586*4882a593Smuzhiyun do {
587*4882a593Smuzhiyun u8 Gain_Taper = 0;
588*4882a593Smuzhiyun s32 RFC_Cprog = 0;
589*4882a593Smuzhiyun u8 CID_Target = 0;
590*4882a593Smuzhiyun u8 CountLimit = 0;
591*4882a593Smuzhiyun u32 freq_MainPLL;
592*4882a593Smuzhiyun u8 Regs[NUM_REGS];
593*4882a593Smuzhiyun u8 CID_Gain;
594*4882a593Smuzhiyun s32 Count = 0;
595*4882a593Smuzhiyun int sign = 1;
596*4882a593Smuzhiyun bool wait = false;
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun if (!(SearchMap2(m_RF_Cal_Map, RF_in, &RFC_Cprog) &&
599*4882a593Smuzhiyun SearchMap1(m_GainTaper_Map, RF_in, &Gain_Taper) &&
600*4882a593Smuzhiyun SearchMap3(m_CID_Target_Map, RF_in, &CID_Target, &CountLimit))) {
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun printk(KERN_ERR "tda18271c2dd: %s Search map failed\n", __func__);
603*4882a593Smuzhiyun return -EINVAL;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper;
607*4882a593Smuzhiyun state->m_Regs[EB14] = (RFC_Cprog);
608*4882a593Smuzhiyun status = UpdateReg(state, EP2);
609*4882a593Smuzhiyun if (status < 0)
610*4882a593Smuzhiyun break;
611*4882a593Smuzhiyun status = UpdateReg(state, EB14);
612*4882a593Smuzhiyun if (status < 0)
613*4882a593Smuzhiyun break;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun freq_MainPLL = RF_in + 1000000;
616*4882a593Smuzhiyun status = CalcMainPLL(state, freq_MainPLL);
617*4882a593Smuzhiyun if (status < 0)
618*4882a593Smuzhiyun break;
619*4882a593Smuzhiyun msleep(5);
620*4882a593Smuzhiyun state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; /* CAL_mode = 1 */
621*4882a593Smuzhiyun status = UpdateReg(state, EP4);
622*4882a593Smuzhiyun if (status < 0)
623*4882a593Smuzhiyun break;
624*4882a593Smuzhiyun status = UpdateReg(state, EP2); /* Launch power measurement */
625*4882a593Smuzhiyun if (status < 0)
626*4882a593Smuzhiyun break;
627*4882a593Smuzhiyun status = ReadExtented(state, Regs);
628*4882a593Smuzhiyun if (status < 0)
629*4882a593Smuzhiyun break;
630*4882a593Smuzhiyun CID_Gain = Regs[EB10] & 0x3F;
631*4882a593Smuzhiyun state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workaround in CalibrateRF) */
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun *pRF_Out = RF_in;
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun while (CID_Gain < CID_Target) {
636*4882a593Smuzhiyun freq_MainPLL = RF_in + sign * Count + 1000000;
637*4882a593Smuzhiyun status = CalcMainPLL(state, freq_MainPLL);
638*4882a593Smuzhiyun if (status < 0)
639*4882a593Smuzhiyun break;
640*4882a593Smuzhiyun msleep(wait ? 5 : 1);
641*4882a593Smuzhiyun wait = false;
642*4882a593Smuzhiyun status = UpdateReg(state, EP2); /* Launch power measurement */
643*4882a593Smuzhiyun if (status < 0)
644*4882a593Smuzhiyun break;
645*4882a593Smuzhiyun status = ReadExtented(state, Regs);
646*4882a593Smuzhiyun if (status < 0)
647*4882a593Smuzhiyun break;
648*4882a593Smuzhiyun CID_Gain = Regs[EB10] & 0x3F;
649*4882a593Smuzhiyun Count += 200000;
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun if (Count < CountLimit * 100000)
652*4882a593Smuzhiyun continue;
653*4882a593Smuzhiyun if (sign < 0)
654*4882a593Smuzhiyun break;
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun sign = -sign;
657*4882a593Smuzhiyun Count = 200000;
658*4882a593Smuzhiyun wait = true;
659*4882a593Smuzhiyun }
660*4882a593Smuzhiyun if (status < 0)
661*4882a593Smuzhiyun break;
662*4882a593Smuzhiyun if (CID_Gain >= CID_Target) {
663*4882a593Smuzhiyun *pbcal = true;
664*4882a593Smuzhiyun *pRF_Out = freq_MainPLL - 1000000;
665*4882a593Smuzhiyun } else
666*4882a593Smuzhiyun *pbcal = false;
667*4882a593Smuzhiyun } while (0);
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun return status;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun
PowerScanInit(struct tda_state * state)672*4882a593Smuzhiyun static int PowerScanInit(struct tda_state *state)
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun int status = 0;
675*4882a593Smuzhiyun do {
676*4882a593Smuzhiyun state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12;
677*4882a593Smuzhiyun state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); /* If level = 0, Cal mode = 0 */
678*4882a593Smuzhiyun status = UpdateRegs(state, EP3, EP4);
679*4882a593Smuzhiyun if (status < 0)
680*4882a593Smuzhiyun break;
681*4882a593Smuzhiyun state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03); /* AGC 1 Gain = 0 */
682*4882a593Smuzhiyun status = UpdateReg(state, EB18);
683*4882a593Smuzhiyun if (status < 0)
684*4882a593Smuzhiyun break;
685*4882a593Smuzhiyun state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03); /* AGC 2 Gain = 0 (Datasheet = 3) */
686*4882a593Smuzhiyun state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06); /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
687*4882a593Smuzhiyun status = UpdateRegs(state, EB21, EB23);
688*4882a593Smuzhiyun if (status < 0)
689*4882a593Smuzhiyun break;
690*4882a593Smuzhiyun } while (0);
691*4882a593Smuzhiyun return status;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun
CalcRFFilterCurve(struct tda_state * state)694*4882a593Smuzhiyun static int CalcRFFilterCurve(struct tda_state *state)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun int status = 0;
697*4882a593Smuzhiyun do {
698*4882a593Smuzhiyun msleep(200); /* Temperature stabilisation */
699*4882a593Smuzhiyun status = PowerScanInit(state);
700*4882a593Smuzhiyun if (status < 0)
701*4882a593Smuzhiyun break;
702*4882a593Smuzhiyun status = RFTrackingFiltersInit(state, 0);
703*4882a593Smuzhiyun if (status < 0)
704*4882a593Smuzhiyun break;
705*4882a593Smuzhiyun status = RFTrackingFiltersInit(state, 1);
706*4882a593Smuzhiyun if (status < 0)
707*4882a593Smuzhiyun break;
708*4882a593Smuzhiyun status = RFTrackingFiltersInit(state, 2);
709*4882a593Smuzhiyun if (status < 0)
710*4882a593Smuzhiyun break;
711*4882a593Smuzhiyun status = RFTrackingFiltersInit(state, 3);
712*4882a593Smuzhiyun if (status < 0)
713*4882a593Smuzhiyun break;
714*4882a593Smuzhiyun status = RFTrackingFiltersInit(state, 4);
715*4882a593Smuzhiyun if (status < 0)
716*4882a593Smuzhiyun break;
717*4882a593Smuzhiyun status = RFTrackingFiltersInit(state, 5);
718*4882a593Smuzhiyun if (status < 0)
719*4882a593Smuzhiyun break;
720*4882a593Smuzhiyun status = RFTrackingFiltersInit(state, 6);
721*4882a593Smuzhiyun if (status < 0)
722*4882a593Smuzhiyun break;
723*4882a593Smuzhiyun status = ThermometerRead(state, &state->m_TMValue_RFCal); /* also switches off Cal mode !!! */
724*4882a593Smuzhiyun if (status < 0)
725*4882a593Smuzhiyun break;
726*4882a593Smuzhiyun } while (0);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun return status;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun
FixedContentsI2CUpdate(struct tda_state * state)731*4882a593Smuzhiyun static int FixedContentsI2CUpdate(struct tda_state *state)
732*4882a593Smuzhiyun {
733*4882a593Smuzhiyun static u8 InitRegs[] = {
734*4882a593Smuzhiyun 0x08, 0x80, 0xC6,
735*4882a593Smuzhiyun 0xDF, 0x16, 0x60, 0x80,
736*4882a593Smuzhiyun 0x80, 0x00, 0x00, 0x00,
737*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00,
738*4882a593Smuzhiyun 0xFC, 0x01, 0x84, 0x41,
739*4882a593Smuzhiyun 0x01, 0x84, 0x40, 0x07,
740*4882a593Smuzhiyun 0x00, 0x00, 0x96, 0x3F,
741*4882a593Smuzhiyun 0xC1, 0x00, 0x8F, 0x00,
742*4882a593Smuzhiyun 0x00, 0x8C, 0x00, 0x20,
743*4882a593Smuzhiyun 0xB3, 0x48, 0xB0,
744*4882a593Smuzhiyun };
745*4882a593Smuzhiyun int status = 0;
746*4882a593Smuzhiyun memcpy(&state->m_Regs[TM], InitRegs, EB23 - TM + 1);
747*4882a593Smuzhiyun do {
748*4882a593Smuzhiyun status = UpdateRegs(state, TM, EB23);
749*4882a593Smuzhiyun if (status < 0)
750*4882a593Smuzhiyun break;
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun /* AGC1 gain setup */
753*4882a593Smuzhiyun state->m_Regs[EB17] = 0x00;
754*4882a593Smuzhiyun status = UpdateReg(state, EB17);
755*4882a593Smuzhiyun if (status < 0)
756*4882a593Smuzhiyun break;
757*4882a593Smuzhiyun state->m_Regs[EB17] = 0x03;
758*4882a593Smuzhiyun status = UpdateReg(state, EB17);
759*4882a593Smuzhiyun if (status < 0)
760*4882a593Smuzhiyun break;
761*4882a593Smuzhiyun state->m_Regs[EB17] = 0x43;
762*4882a593Smuzhiyun status = UpdateReg(state, EB17);
763*4882a593Smuzhiyun if (status < 0)
764*4882a593Smuzhiyun break;
765*4882a593Smuzhiyun state->m_Regs[EB17] = 0x4C;
766*4882a593Smuzhiyun status = UpdateReg(state, EB17);
767*4882a593Smuzhiyun if (status < 0)
768*4882a593Smuzhiyun break;
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun /* IRC Cal Low band */
771*4882a593Smuzhiyun state->m_Regs[EP3] = 0x1F;
772*4882a593Smuzhiyun state->m_Regs[EP4] = 0x66;
773*4882a593Smuzhiyun state->m_Regs[EP5] = 0x81;
774*4882a593Smuzhiyun state->m_Regs[CPD] = 0xCC;
775*4882a593Smuzhiyun state->m_Regs[CD1] = 0x6C;
776*4882a593Smuzhiyun state->m_Regs[CD2] = 0x00;
777*4882a593Smuzhiyun state->m_Regs[CD3] = 0x00;
778*4882a593Smuzhiyun state->m_Regs[MPD] = 0xC5;
779*4882a593Smuzhiyun state->m_Regs[MD1] = 0x77;
780*4882a593Smuzhiyun state->m_Regs[MD2] = 0x08;
781*4882a593Smuzhiyun state->m_Regs[MD3] = 0x00;
782*4882a593Smuzhiyun status = UpdateRegs(state, EP2, MD3); /* diff between sw and datasheet (ep3-md3) */
783*4882a593Smuzhiyun if (status < 0)
784*4882a593Smuzhiyun break;
785*4882a593Smuzhiyun
786*4882a593Smuzhiyun #if 0
787*4882a593Smuzhiyun state->m_Regs[EB4] = 0x61; /* missing in sw */
788*4882a593Smuzhiyun status = UpdateReg(state, EB4);
789*4882a593Smuzhiyun if (status < 0)
790*4882a593Smuzhiyun break;
791*4882a593Smuzhiyun msleep(1);
792*4882a593Smuzhiyun state->m_Regs[EB4] = 0x41;
793*4882a593Smuzhiyun status = UpdateReg(state, EB4);
794*4882a593Smuzhiyun if (status < 0)
795*4882a593Smuzhiyun break;
796*4882a593Smuzhiyun #endif
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun msleep(5);
799*4882a593Smuzhiyun status = UpdateReg(state, EP1);
800*4882a593Smuzhiyun if (status < 0)
801*4882a593Smuzhiyun break;
802*4882a593Smuzhiyun msleep(5);
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun state->m_Regs[EP5] = 0x85;
805*4882a593Smuzhiyun state->m_Regs[CPD] = 0xCB;
806*4882a593Smuzhiyun state->m_Regs[CD1] = 0x66;
807*4882a593Smuzhiyun state->m_Regs[CD2] = 0x70;
808*4882a593Smuzhiyun status = UpdateRegs(state, EP3, CD3);
809*4882a593Smuzhiyun if (status < 0)
810*4882a593Smuzhiyun break;
811*4882a593Smuzhiyun msleep(5);
812*4882a593Smuzhiyun status = UpdateReg(state, EP2);
813*4882a593Smuzhiyun if (status < 0)
814*4882a593Smuzhiyun break;
815*4882a593Smuzhiyun msleep(30);
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun /* IRC Cal mid band */
818*4882a593Smuzhiyun state->m_Regs[EP5] = 0x82;
819*4882a593Smuzhiyun state->m_Regs[CPD] = 0xA8;
820*4882a593Smuzhiyun state->m_Regs[CD2] = 0x00;
821*4882a593Smuzhiyun state->m_Regs[MPD] = 0xA1; /* Datasheet = 0xA9 */
822*4882a593Smuzhiyun state->m_Regs[MD1] = 0x73;
823*4882a593Smuzhiyun state->m_Regs[MD2] = 0x1A;
824*4882a593Smuzhiyun status = UpdateRegs(state, EP3, MD3);
825*4882a593Smuzhiyun if (status < 0)
826*4882a593Smuzhiyun break;
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun msleep(5);
829*4882a593Smuzhiyun status = UpdateReg(state, EP1);
830*4882a593Smuzhiyun if (status < 0)
831*4882a593Smuzhiyun break;
832*4882a593Smuzhiyun msleep(5);
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun state->m_Regs[EP5] = 0x86;
835*4882a593Smuzhiyun state->m_Regs[CPD] = 0xA8;
836*4882a593Smuzhiyun state->m_Regs[CD1] = 0x66;
837*4882a593Smuzhiyun state->m_Regs[CD2] = 0xA0;
838*4882a593Smuzhiyun status = UpdateRegs(state, EP3, CD3);
839*4882a593Smuzhiyun if (status < 0)
840*4882a593Smuzhiyun break;
841*4882a593Smuzhiyun msleep(5);
842*4882a593Smuzhiyun status = UpdateReg(state, EP2);
843*4882a593Smuzhiyun if (status < 0)
844*4882a593Smuzhiyun break;
845*4882a593Smuzhiyun msleep(30);
846*4882a593Smuzhiyun
847*4882a593Smuzhiyun /* IRC Cal high band */
848*4882a593Smuzhiyun state->m_Regs[EP5] = 0x83;
849*4882a593Smuzhiyun state->m_Regs[CPD] = 0x98;
850*4882a593Smuzhiyun state->m_Regs[CD1] = 0x65;
851*4882a593Smuzhiyun state->m_Regs[CD2] = 0x00;
852*4882a593Smuzhiyun state->m_Regs[MPD] = 0x91; /* Datasheet = 0x91 */
853*4882a593Smuzhiyun state->m_Regs[MD1] = 0x71;
854*4882a593Smuzhiyun state->m_Regs[MD2] = 0xCD;
855*4882a593Smuzhiyun status = UpdateRegs(state, EP3, MD3);
856*4882a593Smuzhiyun if (status < 0)
857*4882a593Smuzhiyun break;
858*4882a593Smuzhiyun msleep(5);
859*4882a593Smuzhiyun status = UpdateReg(state, EP1);
860*4882a593Smuzhiyun if (status < 0)
861*4882a593Smuzhiyun break;
862*4882a593Smuzhiyun msleep(5);
863*4882a593Smuzhiyun state->m_Regs[EP5] = 0x87;
864*4882a593Smuzhiyun state->m_Regs[CD1] = 0x65;
865*4882a593Smuzhiyun state->m_Regs[CD2] = 0x50;
866*4882a593Smuzhiyun status = UpdateRegs(state, EP3, CD3);
867*4882a593Smuzhiyun if (status < 0)
868*4882a593Smuzhiyun break;
869*4882a593Smuzhiyun msleep(5);
870*4882a593Smuzhiyun status = UpdateReg(state, EP2);
871*4882a593Smuzhiyun if (status < 0)
872*4882a593Smuzhiyun break;
873*4882a593Smuzhiyun msleep(30);
874*4882a593Smuzhiyun
875*4882a593Smuzhiyun /* Back to normal */
876*4882a593Smuzhiyun state->m_Regs[EP4] = 0x64;
877*4882a593Smuzhiyun status = UpdateReg(state, EP4);
878*4882a593Smuzhiyun if (status < 0)
879*4882a593Smuzhiyun break;
880*4882a593Smuzhiyun status = UpdateReg(state, EP1);
881*4882a593Smuzhiyun if (status < 0)
882*4882a593Smuzhiyun break;
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun } while (0);
885*4882a593Smuzhiyun return status;
886*4882a593Smuzhiyun }
887*4882a593Smuzhiyun
InitCal(struct tda_state * state)888*4882a593Smuzhiyun static int InitCal(struct tda_state *state)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun int status = 0;
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun do {
893*4882a593Smuzhiyun status = FixedContentsI2CUpdate(state);
894*4882a593Smuzhiyun if (status < 0)
895*4882a593Smuzhiyun break;
896*4882a593Smuzhiyun status = CalcRFFilterCurve(state);
897*4882a593Smuzhiyun if (status < 0)
898*4882a593Smuzhiyun break;
899*4882a593Smuzhiyun status = StandBy(state);
900*4882a593Smuzhiyun if (status < 0)
901*4882a593Smuzhiyun break;
902*4882a593Smuzhiyun /* m_bInitDone = true; */
903*4882a593Smuzhiyun } while (0);
904*4882a593Smuzhiyun return status;
905*4882a593Smuzhiyun };
906*4882a593Smuzhiyun
RFTrackingFiltersCorrection(struct tda_state * state,u32 Frequency)907*4882a593Smuzhiyun static int RFTrackingFiltersCorrection(struct tda_state *state,
908*4882a593Smuzhiyun u32 Frequency)
909*4882a593Smuzhiyun {
910*4882a593Smuzhiyun int status = 0;
911*4882a593Smuzhiyun s32 Cprog_table;
912*4882a593Smuzhiyun u8 RFBand;
913*4882a593Smuzhiyun u8 dCoverdT;
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun if (!SearchMap2(m_RF_Cal_Map, Frequency, &Cprog_table) ||
916*4882a593Smuzhiyun !SearchMap4(m_RF_Band_Map, Frequency, &RFBand) ||
917*4882a593Smuzhiyun !SearchMap1(m_RF_Cal_DC_Over_DT_Map, Frequency, &dCoverdT))
918*4882a593Smuzhiyun
919*4882a593Smuzhiyun return -EINVAL;
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun do {
922*4882a593Smuzhiyun u8 TMValue_Current;
923*4882a593Smuzhiyun u32 RF1 = state->m_RF1[RFBand];
924*4882a593Smuzhiyun u32 RF2 = state->m_RF1[RFBand];
925*4882a593Smuzhiyun u32 RF3 = state->m_RF1[RFBand];
926*4882a593Smuzhiyun s32 RF_A1 = state->m_RF_A1[RFBand];
927*4882a593Smuzhiyun s32 RF_B1 = state->m_RF_B1[RFBand];
928*4882a593Smuzhiyun s32 RF_A2 = state->m_RF_A2[RFBand];
929*4882a593Smuzhiyun s32 RF_B2 = state->m_RF_B2[RFBand];
930*4882a593Smuzhiyun s32 Capprox = 0;
931*4882a593Smuzhiyun int TComp;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun state->m_Regs[EP3] &= ~0xE0; /* Power up */
934*4882a593Smuzhiyun status = UpdateReg(state, EP3);
935*4882a593Smuzhiyun if (status < 0)
936*4882a593Smuzhiyun break;
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun status = ThermometerRead(state, &TMValue_Current);
939*4882a593Smuzhiyun if (status < 0)
940*4882a593Smuzhiyun break;
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun if (RF3 == 0 || Frequency < RF2)
943*4882a593Smuzhiyun Capprox = RF_A1 * ((s32)(Frequency) - (s32)(RF1)) + RF_B1 + Cprog_table;
944*4882a593Smuzhiyun else
945*4882a593Smuzhiyun Capprox = RF_A2 * ((s32)(Frequency) - (s32)(RF2)) + RF_B2 + Cprog_table;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun TComp = (int)(dCoverdT) * ((int)(TMValue_Current) - (int)(state->m_TMValue_RFCal))/1000;
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun Capprox += TComp;
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun if (Capprox < 0)
952*4882a593Smuzhiyun Capprox = 0;
953*4882a593Smuzhiyun else if (Capprox > 255)
954*4882a593Smuzhiyun Capprox = 255;
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun /* TODO Temperature compensation. There is defenitely a scale factor */
958*4882a593Smuzhiyun /* missing in the datasheet, so leave it out for now. */
959*4882a593Smuzhiyun state->m_Regs[EB14] = Capprox;
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun status = UpdateReg(state, EB14);
962*4882a593Smuzhiyun if (status < 0)
963*4882a593Smuzhiyun break;
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun } while (0);
966*4882a593Smuzhiyun return status;
967*4882a593Smuzhiyun }
968*4882a593Smuzhiyun
ChannelConfiguration(struct tda_state * state,u32 Frequency,int Standard)969*4882a593Smuzhiyun static int ChannelConfiguration(struct tda_state *state,
970*4882a593Smuzhiyun u32 Frequency, int Standard)
971*4882a593Smuzhiyun {
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun s32 IntermediateFrequency = m_StandardTable[Standard].m_IFFrequency;
974*4882a593Smuzhiyun int status = 0;
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun u8 BP_Filter = 0;
977*4882a593Smuzhiyun u8 RF_Band = 0;
978*4882a593Smuzhiyun u8 GainTaper = 0;
979*4882a593Smuzhiyun u8 IR_Meas = 0;
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun state->IF = IntermediateFrequency;
982*4882a593Smuzhiyun /* printk("tda18271c2dd: %s Freq = %d Standard = %d IF = %d\n", __func__, Frequency, Standard, IntermediateFrequency); */
983*4882a593Smuzhiyun /* get values from tables */
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun if (!(SearchMap1(m_BP_Filter_Map, Frequency, &BP_Filter) &&
986*4882a593Smuzhiyun SearchMap1(m_GainTaper_Map, Frequency, &GainTaper) &&
987*4882a593Smuzhiyun SearchMap1(m_IR_Meas_Map, Frequency, &IR_Meas) &&
988*4882a593Smuzhiyun SearchMap4(m_RF_Band_Map, Frequency, &RF_Band))) {
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun printk(KERN_ERR "tda18271c2dd: %s SearchMap failed\n", __func__);
991*4882a593Smuzhiyun return -EINVAL;
992*4882a593Smuzhiyun }
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun do {
995*4882a593Smuzhiyun state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0;
996*4882a593Smuzhiyun state->m_Regs[EP3] &= ~0x04; /* switch RFAGC to high speed mode */
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun /* m_EP4 default for XToutOn, CAL_Mode (0) */
999*4882a593Smuzhiyun state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax) ? state->m_IFLevelDigital : state->m_IFLevelAnalog);
1000*4882a593Smuzhiyun /* state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; */
1001*4882a593Smuzhiyun if (Standard <= HF_AnalogMax)
1002*4882a593Smuzhiyun state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog;
1003*4882a593Smuzhiyun else if (Standard <= HF_ATSC)
1004*4882a593Smuzhiyun state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT;
1005*4882a593Smuzhiyun else if (Standard <= HF_DVBC)
1006*4882a593Smuzhiyun state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC;
1007*4882a593Smuzhiyun else
1008*4882a593Smuzhiyun state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital;
1009*4882a593Smuzhiyun
1010*4882a593Smuzhiyun if ((Standard == HF_FM_Radio) && state->m_bFMInput)
1011*4882a593Smuzhiyun state->m_Regs[EP4] |= 0x80;
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun state->m_Regs[MPD] &= ~0x80;
1014*4882a593Smuzhiyun if (Standard > HF_AnalogMax)
1015*4882a593Smuzhiyun state->m_Regs[MPD] |= 0x80; /* Add IF_notch for digital */
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22;
1018*4882a593Smuzhiyun
1019*4882a593Smuzhiyun /* Note: This is missing from flowchart in TDA18271 specification ( 1.5 MHz cutoff for FM ) */
1020*4882a593Smuzhiyun if (Standard == HF_FM_Radio)
1021*4882a593Smuzhiyun state->m_Regs[EB23] |= 0x06; /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */
1022*4882a593Smuzhiyun else
1023*4882a593Smuzhiyun state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LPFc[2] = 0 */
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun status = UpdateRegs(state, EB22, EB23);
1026*4882a593Smuzhiyun if (status < 0)
1027*4882a593Smuzhiyun break;
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; /* Dis_Power_level = 1, Filter */
1030*4882a593Smuzhiyun state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas;
1031*4882a593Smuzhiyun state->m_Regs[EP2] = (RF_Band << 5) | GainTaper;
1032*4882a593Smuzhiyun
1033*4882a593Smuzhiyun state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) |
1034*4882a593Smuzhiyun (state->m_bMaster ? 0x04 : 0x00); /* CALVCO_FortLOn = MS */
1035*4882a593Smuzhiyun /* AGC1_always_master = 0 */
1036*4882a593Smuzhiyun /* AGC_firstn = 0 */
1037*4882a593Smuzhiyun status = UpdateReg(state, EB1);
1038*4882a593Smuzhiyun if (status < 0)
1039*4882a593Smuzhiyun break;
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun if (state->m_bMaster) {
1042*4882a593Smuzhiyun status = CalcMainPLL(state, Frequency + IntermediateFrequency);
1043*4882a593Smuzhiyun if (status < 0)
1044*4882a593Smuzhiyun break;
1045*4882a593Smuzhiyun status = UpdateRegs(state, TM, EP5);
1046*4882a593Smuzhiyun if (status < 0)
1047*4882a593Smuzhiyun break;
1048*4882a593Smuzhiyun state->m_Regs[EB4] |= 0x20; /* LO_forceSrce = 1 */
1049*4882a593Smuzhiyun status = UpdateReg(state, EB4);
1050*4882a593Smuzhiyun if (status < 0)
1051*4882a593Smuzhiyun break;
1052*4882a593Smuzhiyun msleep(1);
1053*4882a593Smuzhiyun state->m_Regs[EB4] &= ~0x20; /* LO_forceSrce = 0 */
1054*4882a593Smuzhiyun status = UpdateReg(state, EB4);
1055*4882a593Smuzhiyun if (status < 0)
1056*4882a593Smuzhiyun break;
1057*4882a593Smuzhiyun } else {
1058*4882a593Smuzhiyun u8 PostDiv = 0;
1059*4882a593Smuzhiyun u8 Div;
1060*4882a593Smuzhiyun status = CalcCalPLL(state, Frequency + IntermediateFrequency);
1061*4882a593Smuzhiyun if (status < 0)
1062*4882a593Smuzhiyun break;
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun SearchMap3(m_Cal_PLL_Map, Frequency + IntermediateFrequency, &PostDiv, &Div);
1065*4882a593Smuzhiyun state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77);
1066*4882a593Smuzhiyun status = UpdateReg(state, MPD);
1067*4882a593Smuzhiyun if (status < 0)
1068*4882a593Smuzhiyun break;
1069*4882a593Smuzhiyun status = UpdateRegs(state, TM, EP5);
1070*4882a593Smuzhiyun if (status < 0)
1071*4882a593Smuzhiyun break;
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun state->m_Regs[EB7] |= 0x20; /* CAL_forceSrce = 1 */
1074*4882a593Smuzhiyun status = UpdateReg(state, EB7);
1075*4882a593Smuzhiyun if (status < 0)
1076*4882a593Smuzhiyun break;
1077*4882a593Smuzhiyun msleep(1);
1078*4882a593Smuzhiyun state->m_Regs[EB7] &= ~0x20; /* CAL_forceSrce = 0 */
1079*4882a593Smuzhiyun status = UpdateReg(state, EB7);
1080*4882a593Smuzhiyun if (status < 0)
1081*4882a593Smuzhiyun break;
1082*4882a593Smuzhiyun }
1083*4882a593Smuzhiyun msleep(20);
1084*4882a593Smuzhiyun if (Standard != HF_FM_Radio)
1085*4882a593Smuzhiyun state->m_Regs[EP3] |= 0x04; /* RFAGC to normal mode */
1086*4882a593Smuzhiyun status = UpdateReg(state, EP3);
1087*4882a593Smuzhiyun if (status < 0)
1088*4882a593Smuzhiyun break;
1089*4882a593Smuzhiyun
1090*4882a593Smuzhiyun } while (0);
1091*4882a593Smuzhiyun return status;
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun
sleep(struct dvb_frontend * fe)1094*4882a593Smuzhiyun static int sleep(struct dvb_frontend *fe)
1095*4882a593Smuzhiyun {
1096*4882a593Smuzhiyun struct tda_state *state = fe->tuner_priv;
1097*4882a593Smuzhiyun
1098*4882a593Smuzhiyun StandBy(state);
1099*4882a593Smuzhiyun return 0;
1100*4882a593Smuzhiyun }
1101*4882a593Smuzhiyun
init(struct dvb_frontend * fe)1102*4882a593Smuzhiyun static int init(struct dvb_frontend *fe)
1103*4882a593Smuzhiyun {
1104*4882a593Smuzhiyun return 0;
1105*4882a593Smuzhiyun }
1106*4882a593Smuzhiyun
release(struct dvb_frontend * fe)1107*4882a593Smuzhiyun static void release(struct dvb_frontend *fe)
1108*4882a593Smuzhiyun {
1109*4882a593Smuzhiyun kfree(fe->tuner_priv);
1110*4882a593Smuzhiyun fe->tuner_priv = NULL;
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun
set_params(struct dvb_frontend * fe)1114*4882a593Smuzhiyun static int set_params(struct dvb_frontend *fe)
1115*4882a593Smuzhiyun {
1116*4882a593Smuzhiyun struct tda_state *state = fe->tuner_priv;
1117*4882a593Smuzhiyun int status = 0;
1118*4882a593Smuzhiyun int Standard;
1119*4882a593Smuzhiyun u32 bw = fe->dtv_property_cache.bandwidth_hz;
1120*4882a593Smuzhiyun u32 delsys = fe->dtv_property_cache.delivery_system;
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun state->m_Frequency = fe->dtv_property_cache.frequency;
1123*4882a593Smuzhiyun
1124*4882a593Smuzhiyun switch (delsys) {
1125*4882a593Smuzhiyun case SYS_DVBT:
1126*4882a593Smuzhiyun case SYS_DVBT2:
1127*4882a593Smuzhiyun switch (bw) {
1128*4882a593Smuzhiyun case 6000000:
1129*4882a593Smuzhiyun Standard = HF_DVBT_6MHZ;
1130*4882a593Smuzhiyun break;
1131*4882a593Smuzhiyun case 7000000:
1132*4882a593Smuzhiyun Standard = HF_DVBT_7MHZ;
1133*4882a593Smuzhiyun break;
1134*4882a593Smuzhiyun case 8000000:
1135*4882a593Smuzhiyun Standard = HF_DVBT_8MHZ;
1136*4882a593Smuzhiyun break;
1137*4882a593Smuzhiyun default:
1138*4882a593Smuzhiyun return -EINVAL;
1139*4882a593Smuzhiyun }
1140*4882a593Smuzhiyun break;
1141*4882a593Smuzhiyun case SYS_DVBC_ANNEX_A:
1142*4882a593Smuzhiyun case SYS_DVBC_ANNEX_C:
1143*4882a593Smuzhiyun if (bw <= 6000000)
1144*4882a593Smuzhiyun Standard = HF_DVBC_6MHZ;
1145*4882a593Smuzhiyun else if (bw <= 7000000)
1146*4882a593Smuzhiyun Standard = HF_DVBC_7MHZ;
1147*4882a593Smuzhiyun else
1148*4882a593Smuzhiyun Standard = HF_DVBC_8MHZ;
1149*4882a593Smuzhiyun break;
1150*4882a593Smuzhiyun default:
1151*4882a593Smuzhiyun return -EINVAL;
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun do {
1154*4882a593Smuzhiyun status = RFTrackingFiltersCorrection(state, state->m_Frequency);
1155*4882a593Smuzhiyun if (status < 0)
1156*4882a593Smuzhiyun break;
1157*4882a593Smuzhiyun status = ChannelConfiguration(state, state->m_Frequency,
1158*4882a593Smuzhiyun Standard);
1159*4882a593Smuzhiyun if (status < 0)
1160*4882a593Smuzhiyun break;
1161*4882a593Smuzhiyun
1162*4882a593Smuzhiyun msleep(state->m_SettlingTime); /* Allow AGC's to settle down */
1163*4882a593Smuzhiyun } while (0);
1164*4882a593Smuzhiyun return status;
1165*4882a593Smuzhiyun }
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun #if 0
1168*4882a593Smuzhiyun static int GetSignalStrength(s32 *pSignalStrength, u32 RFAgc, u32 IFAgc)
1169*4882a593Smuzhiyun {
1170*4882a593Smuzhiyun if (IFAgc < 500) {
1171*4882a593Smuzhiyun /* Scale this from 0 to 50000 */
1172*4882a593Smuzhiyun *pSignalStrength = IFAgc * 100;
1173*4882a593Smuzhiyun } else {
1174*4882a593Smuzhiyun /* Scale range 500-1500 to 50000-80000 */
1175*4882a593Smuzhiyun *pSignalStrength = 50000 + (IFAgc - 500) * 30;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun
1178*4882a593Smuzhiyun return 0;
1179*4882a593Smuzhiyun }
1180*4882a593Smuzhiyun #endif
1181*4882a593Smuzhiyun
get_if_frequency(struct dvb_frontend * fe,u32 * frequency)1182*4882a593Smuzhiyun static int get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
1183*4882a593Smuzhiyun {
1184*4882a593Smuzhiyun struct tda_state *state = fe->tuner_priv;
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun *frequency = state->IF;
1187*4882a593Smuzhiyun return 0;
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun
get_bandwidth(struct dvb_frontend * fe,u32 * bandwidth)1190*4882a593Smuzhiyun static int get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1191*4882a593Smuzhiyun {
1192*4882a593Smuzhiyun /* struct tda_state *state = fe->tuner_priv; */
1193*4882a593Smuzhiyun /* *bandwidth = priv->bandwidth; */
1194*4882a593Smuzhiyun return 0;
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun
1198*4882a593Smuzhiyun static const struct dvb_tuner_ops tuner_ops = {
1199*4882a593Smuzhiyun .info = {
1200*4882a593Smuzhiyun .name = "NXP TDA18271C2D",
1201*4882a593Smuzhiyun .frequency_min_hz = 47125 * kHz,
1202*4882a593Smuzhiyun .frequency_max_hz = 865 * MHz,
1203*4882a593Smuzhiyun .frequency_step_hz = 62500
1204*4882a593Smuzhiyun },
1205*4882a593Smuzhiyun .init = init,
1206*4882a593Smuzhiyun .sleep = sleep,
1207*4882a593Smuzhiyun .set_params = set_params,
1208*4882a593Smuzhiyun .release = release,
1209*4882a593Smuzhiyun .get_if_frequency = get_if_frequency,
1210*4882a593Smuzhiyun .get_bandwidth = get_bandwidth,
1211*4882a593Smuzhiyun };
1212*4882a593Smuzhiyun
tda18271c2dd_attach(struct dvb_frontend * fe,struct i2c_adapter * i2c,u8 adr)1213*4882a593Smuzhiyun struct dvb_frontend *tda18271c2dd_attach(struct dvb_frontend *fe,
1214*4882a593Smuzhiyun struct i2c_adapter *i2c, u8 adr)
1215*4882a593Smuzhiyun {
1216*4882a593Smuzhiyun struct tda_state *state;
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun state = kzalloc(sizeof(struct tda_state), GFP_KERNEL);
1219*4882a593Smuzhiyun if (!state)
1220*4882a593Smuzhiyun return NULL;
1221*4882a593Smuzhiyun
1222*4882a593Smuzhiyun fe->tuner_priv = state;
1223*4882a593Smuzhiyun state->adr = adr;
1224*4882a593Smuzhiyun state->i2c = i2c;
1225*4882a593Smuzhiyun memcpy(&fe->ops.tuner_ops, &tuner_ops, sizeof(struct dvb_tuner_ops));
1226*4882a593Smuzhiyun reset(state);
1227*4882a593Smuzhiyun InitCal(state);
1228*4882a593Smuzhiyun
1229*4882a593Smuzhiyun return fe;
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tda18271c2dd_attach);
1232*4882a593Smuzhiyun
1233*4882a593Smuzhiyun MODULE_DESCRIPTION("TDA18271C2 driver");
1234*4882a593Smuzhiyun MODULE_AUTHOR("DD");
1235*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1236