xref: /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/tda10071_priv.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * NXP TDA10071 + Conexant CX24118A DVB-S/S2 demodulator + tuner driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef TDA10071_PRIV
9*4882a593Smuzhiyun #define TDA10071_PRIV
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <media/dvb_frontend.h>
12*4882a593Smuzhiyun #include "tda10071.h"
13*4882a593Smuzhiyun #include <linux/firmware.h>
14*4882a593Smuzhiyun #include <linux/regmap.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun struct tda10071_dev {
17*4882a593Smuzhiyun 	struct dvb_frontend fe;
18*4882a593Smuzhiyun 	struct i2c_client *client;
19*4882a593Smuzhiyun 	struct regmap *regmap;
20*4882a593Smuzhiyun 	struct mutex cmd_execute_mutex;
21*4882a593Smuzhiyun 	u32 clk;
22*4882a593Smuzhiyun 	u16 i2c_wr_max;
23*4882a593Smuzhiyun 	u8 ts_mode;
24*4882a593Smuzhiyun 	bool spec_inv;
25*4882a593Smuzhiyun 	u8 pll_multiplier;
26*4882a593Smuzhiyun 	u8 tuner_i2c_addr;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	u8 meas_count;
29*4882a593Smuzhiyun 	u32 dvbv3_ber;
30*4882a593Smuzhiyun 	enum fe_status fe_status;
31*4882a593Smuzhiyun 	enum fe_delivery_system delivery_system;
32*4882a593Smuzhiyun 	bool warm; /* FW running */
33*4882a593Smuzhiyun 	u64 post_bit_error;
34*4882a593Smuzhiyun 	u64 block_error;
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun static struct tda10071_modcod {
38*4882a593Smuzhiyun 	enum fe_delivery_system delivery_system;
39*4882a593Smuzhiyun 	enum fe_modulation modulation;
40*4882a593Smuzhiyun 	enum fe_code_rate fec;
41*4882a593Smuzhiyun 	u8 val;
42*4882a593Smuzhiyun } TDA10071_MODCOD[] = {
43*4882a593Smuzhiyun 	/* NBC-QPSK */
44*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_AUTO, 0x00 },
45*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_1_2,  0x04 },
46*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_3_5,  0x05 },
47*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_2_3,  0x06 },
48*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_3_4,  0x07 },
49*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_4_5,  0x08 },
50*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_5_6,  0x09 },
51*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_8_9,  0x0a },
52*4882a593Smuzhiyun 	{ SYS_DVBS2, QPSK,  FEC_9_10, 0x0b },
53*4882a593Smuzhiyun 	/* 8PSK */
54*4882a593Smuzhiyun 	{ SYS_DVBS2, PSK_8, FEC_AUTO, 0x00 },
55*4882a593Smuzhiyun 	{ SYS_DVBS2, PSK_8, FEC_3_5,  0x0c },
56*4882a593Smuzhiyun 	{ SYS_DVBS2, PSK_8, FEC_2_3,  0x0d },
57*4882a593Smuzhiyun 	{ SYS_DVBS2, PSK_8, FEC_3_4,  0x0e },
58*4882a593Smuzhiyun 	{ SYS_DVBS2, PSK_8, FEC_5_6,  0x0f },
59*4882a593Smuzhiyun 	{ SYS_DVBS2, PSK_8, FEC_8_9,  0x10 },
60*4882a593Smuzhiyun 	{ SYS_DVBS2, PSK_8, FEC_9_10, 0x11 },
61*4882a593Smuzhiyun 	/* QPSK */
62*4882a593Smuzhiyun 	{ SYS_DVBS,  QPSK,  FEC_AUTO, 0x2d },
63*4882a593Smuzhiyun 	{ SYS_DVBS,  QPSK,  FEC_1_2,  0x2e },
64*4882a593Smuzhiyun 	{ SYS_DVBS,  QPSK,  FEC_2_3,  0x2f },
65*4882a593Smuzhiyun 	{ SYS_DVBS,  QPSK,  FEC_3_4,  0x30 },
66*4882a593Smuzhiyun 	{ SYS_DVBS,  QPSK,  FEC_5_6,  0x31 },
67*4882a593Smuzhiyun 	{ SYS_DVBS,  QPSK,  FEC_7_8,  0x32 },
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun struct tda10071_reg_val_mask {
71*4882a593Smuzhiyun 	u8 reg;
72*4882a593Smuzhiyun 	u8 val;
73*4882a593Smuzhiyun 	u8 mask;
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun /* firmware filename */
77*4882a593Smuzhiyun #define TDA10071_FIRMWARE "dvb-fe-tda10071.fw"
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun /* firmware commands */
80*4882a593Smuzhiyun #define CMD_DEMOD_INIT          0x10
81*4882a593Smuzhiyun #define CMD_CHANGE_CHANNEL      0x11
82*4882a593Smuzhiyun #define CMD_MPEG_CONFIG         0x13
83*4882a593Smuzhiyun #define CMD_TUNER_INIT          0x15
84*4882a593Smuzhiyun #define CMD_GET_AGCACC          0x1a
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #define CMD_LNB_CONFIG          0x20
87*4882a593Smuzhiyun #define CMD_LNB_SEND_DISEQC     0x21
88*4882a593Smuzhiyun #define CMD_LNB_SET_DC_LEVEL    0x22
89*4882a593Smuzhiyun #define CMD_LNB_PCB_CONFIG      0x23
90*4882a593Smuzhiyun #define CMD_LNB_SEND_TONEBURST  0x24
91*4882a593Smuzhiyun #define CMD_LNB_UPDATE_REPLY    0x25
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define CMD_GET_FW_VERSION      0x35
94*4882a593Smuzhiyun #define CMD_SET_SLEEP_MODE      0x36
95*4882a593Smuzhiyun #define CMD_BER_CONTROL         0x3e
96*4882a593Smuzhiyun #define CMD_BER_UPDATE_COUNTERS 0x3f
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /* firmware command struct */
99*4882a593Smuzhiyun #define TDA10071_ARGLEN      30
100*4882a593Smuzhiyun struct tda10071_cmd {
101*4882a593Smuzhiyun 	u8 args[TDA10071_ARGLEN];
102*4882a593Smuzhiyun 	u8 len;
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun #endif /* TDA10071_PRIV */
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